diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_fw.h')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_fw.h | 42 |
1 files changed, 41 insertions, 1 deletions
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h index ffff4255408..96ccb9642ba 100644 --- a/drivers/scsi/qla2xxx/qla_fw.h +++ b/drivers/scsi/qla2xxx/qla_fw.h | |||
@@ -1403,6 +1403,21 @@ struct access_chip_rsp_84xx { | |||
1403 | #define MBA_IDC_TIME_EXT 0x8102 | 1403 | #define MBA_IDC_TIME_EXT 0x8102 |
1404 | 1404 | ||
1405 | #define MBC_IDC_ACK 0x101 | 1405 | #define MBC_IDC_ACK 0x101 |
1406 | #define MBC_RESTART_MPI_FW 0x3d | ||
1407 | #define MBC_FLASH_ACCESS_CTRL 0x3e /* Control flash access. */ | ||
1408 | |||
1409 | /* Flash access control option field bit definitions */ | ||
1410 | #define FAC_OPT_FORCE_SEMAPHORE BIT_15 | ||
1411 | #define FAC_OPT_REQUESTOR_ID BIT_14 | ||
1412 | #define FAC_OPT_CMD_SUBCODE 0xff | ||
1413 | |||
1414 | /* Flash access control command subcodes */ | ||
1415 | #define FAC_OPT_CMD_WRITE_PROTECT 0x00 | ||
1416 | #define FAC_OPT_CMD_WRITE_ENABLE 0x01 | ||
1417 | #define FAC_OPT_CMD_ERASE_SECTOR 0x02 | ||
1418 | #define FAC_OPT_CMD_LOCK_SEMAPHORE 0x03 | ||
1419 | #define FAC_OPT_CMD_UNLOCK_SEMAPHORE 0x04 | ||
1420 | #define FAC_OPT_CMD_GET_SECTOR_SIZE 0x05 | ||
1406 | 1421 | ||
1407 | struct nvram_81xx { | 1422 | struct nvram_81xx { |
1408 | /* NVRAM header. */ | 1423 | /* NVRAM header. */ |
@@ -1440,7 +1455,17 @@ struct nvram_81xx { | |||
1440 | uint16_t reserved_6[24]; | 1455 | uint16_t reserved_6[24]; |
1441 | 1456 | ||
1442 | /* Offset 128. */ | 1457 | /* Offset 128. */ |
1443 | uint16_t reserved_7[64]; | 1458 | uint16_t ex_version; |
1459 | uint8_t prio_fcf_matching_flags; | ||
1460 | uint8_t reserved_6_1[3]; | ||
1461 | uint16_t pri_fcf_vlan_id; | ||
1462 | uint8_t pri_fcf_fabric_name[8]; | ||
1463 | uint16_t reserved_6_2[7]; | ||
1464 | uint8_t spma_mac_addr[6]; | ||
1465 | uint16_t reserved_6_3[14]; | ||
1466 | |||
1467 | /* Offset 192. */ | ||
1468 | uint16_t reserved_7[32]; | ||
1444 | 1469 | ||
1445 | /* | 1470 | /* |
1446 | * BIT 0 = Enable spinup delay | 1471 | * BIT 0 = Enable spinup delay |
@@ -1664,6 +1689,17 @@ struct mid_init_cb_81xx { | |||
1664 | struct mid_conf_entry_24xx entries[MAX_MULTI_ID_FABRIC]; | 1689 | struct mid_conf_entry_24xx entries[MAX_MULTI_ID_FABRIC]; |
1665 | }; | 1690 | }; |
1666 | 1691 | ||
1692 | struct ex_init_cb_81xx { | ||
1693 | uint16_t ex_version; | ||
1694 | uint8_t prio_fcf_matching_flags; | ||
1695 | uint8_t reserved_1[3]; | ||
1696 | uint16_t pri_fcf_vlan_id; | ||
1697 | uint8_t pri_fcf_fabric_name[8]; | ||
1698 | uint16_t reserved_2[7]; | ||
1699 | uint8_t spma_mac_addr[6]; | ||
1700 | uint16_t reserved_3[14]; | ||
1701 | }; | ||
1702 | |||
1667 | #define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000 | 1703 | #define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000 |
1668 | #define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000 | 1704 | #define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000 |
1669 | 1705 | ||
@@ -1672,6 +1708,10 @@ struct mid_init_cb_81xx { | |||
1672 | #define FA_RISC_CODE_ADDR_81 0xA0000 | 1708 | #define FA_RISC_CODE_ADDR_81 0xA0000 |
1673 | #define FA_FW_AREA_ADDR_81 0xC0000 | 1709 | #define FA_FW_AREA_ADDR_81 0xC0000 |
1674 | #define FA_VPD_NVRAM_ADDR_81 0xD0000 | 1710 | #define FA_VPD_NVRAM_ADDR_81 0xD0000 |
1711 | #define FA_VPD0_ADDR_81 0xD0000 | ||
1712 | #define FA_VPD1_ADDR_81 0xD0400 | ||
1713 | #define FA_NVRAM0_ADDR_81 0xD0080 | ||
1714 | #define FA_NVRAM1_ADDR_81 0xD0480 | ||
1675 | #define FA_FEATURE_ADDR_81 0xD4000 | 1715 | #define FA_FEATURE_ADDR_81 0xD4000 |
1676 | #define FA_FLASH_DESCR_ADDR_81 0xD8000 | 1716 | #define FA_FLASH_DESCR_ADDR_81 0xD8000 |
1677 | #define FA_FLASH_LAYOUT_ADDR_81 0xD8400 | 1717 | #define FA_FLASH_LAYOUT_ADDR_81 0xD8400 |