diff options
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
-rw-r--r-- | drivers/scsi/lpfc/lpfc_hw.h | 190 |
1 files changed, 100 insertions, 90 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h index 89ff7c09e29..e654d01dad2 100644 --- a/drivers/scsi/lpfc/lpfc_hw.h +++ b/drivers/scsi/lpfc/lpfc_hw.h | |||
@@ -1565,95 +1565,83 @@ enum lpfc_protgrp_type { | |||
1565 | }; | 1565 | }; |
1566 | 1566 | ||
1567 | /* PDE Descriptors */ | 1567 | /* PDE Descriptors */ |
1568 | #define LPFC_PDE1_DESCRIPTOR 0x81 | 1568 | #define LPFC_PDE5_DESCRIPTOR 0x85 |
1569 | #define LPFC_PDE2_DESCRIPTOR 0x82 | 1569 | #define LPFC_PDE6_DESCRIPTOR 0x86 |
1570 | #define LPFC_PDE3_DESCRIPTOR 0x83 | 1570 | #define LPFC_PDE7_DESCRIPTOR 0x87 |
1571 | 1571 | ||
1572 | /* BlockGuard Profiles */ | 1572 | /* BlockGuard Opcodes */ |
1573 | enum lpfc_bg_prof_codes { | 1573 | #define BG_OP_IN_NODIF_OUT_CRC 0x0 |
1574 | LPFC_PROF_INVALID, | 1574 | #define BG_OP_IN_CRC_OUT_NODIF 0x1 |
1575 | LPFC_PROF_A1 = 128, /* Full Protection */ | 1575 | #define BG_OP_IN_NODIF_OUT_CSUM 0x2 |
1576 | LPFC_PROF_A2, /* Disabled Protection Checks:A2~A4 */ | 1576 | #define BG_OP_IN_CSUM_OUT_NODIF 0x3 |
1577 | LPFC_PROF_A3, | 1577 | #define BG_OP_IN_CRC_OUT_CRC 0x4 |
1578 | LPFC_PROF_A4, | 1578 | #define BG_OP_IN_CSUM_OUT_CSUM 0x5 |
1579 | LPFC_PROF_B1, /* Embedded DIFs: B1~B3 */ | 1579 | #define BG_OP_IN_CRC_OUT_CSUM 0x6 |
1580 | LPFC_PROF_B2, | 1580 | #define BG_OP_IN_CSUM_OUT_CRC 0x7 |
1581 | LPFC_PROF_B3, | 1581 | |
1582 | LPFC_PROF_C1, /* Separate DIFs: C1~C3 */ | 1582 | struct lpfc_pde5 { |
1583 | LPFC_PROF_C2, | 1583 | uint32_t word0; |
1584 | LPFC_PROF_C3, | 1584 | #define pde5_type_SHIFT 24 |
1585 | LPFC_PROF_D1, /* Full Protection */ | 1585 | #define pde5_type_MASK 0x000000ff |
1586 | LPFC_PROF_D2, /* Partial Protection & Check Disabling */ | 1586 | #define pde5_type_WORD word0 |
1587 | LPFC_PROF_D3, | 1587 | #define pde5_rsvd0_SHIFT 0 |
1588 | LPFC_PROF_E1, /* E1~E4:out - check-only, in - update apptag */ | 1588 | #define pde5_rsvd0_MASK 0x00ffffff |
1589 | LPFC_PROF_E2, | 1589 | #define pde5_rsvd0_WORD word0 |
1590 | LPFC_PROF_E3, | 1590 | uint32_t reftag; /* Reference Tag Value */ |
1591 | LPFC_PROF_E4, | 1591 | uint32_t reftagtr; /* Reference Tag Translation Value */ |
1592 | LPFC_PROF_F1, /* Full Translation - F1 Prot Descriptor */ | ||
1593 | /* F1 Translation BDE */ | ||
1594 | LPFC_PROF_ANT1, /* TCP checksum, DIF inline with data buffers */ | ||
1595 | LPFC_PROF_AST1, /* TCP checksum, DIF split from data buffer */ | ||
1596 | LPFC_PROF_ANT2, | ||
1597 | LPFC_PROF_AST2 | ||
1598 | }; | 1592 | }; |
1599 | 1593 | ||
1600 | /* BlockGuard error-control defines */ | 1594 | struct lpfc_pde6 { |
1601 | #define BG_EC_STOP_ERR 0x00 | 1595 | uint32_t word0; |
1602 | #define BG_EC_CONT_ERR 0x01 | 1596 | #define pde6_type_SHIFT 24 |
1603 | #define BG_EC_IGN_UNINIT_STOP_ERR 0x10 | 1597 | #define pde6_type_MASK 0x000000ff |
1604 | #define BG_EC_IGN_UNINIT_CONT_ERR 0x11 | 1598 | #define pde6_type_WORD word0 |
1605 | 1599 | #define pde6_rsvd0_SHIFT 0 | |
1606 | /* PDE (Protection Descriptor Entry) word 0 bit masks and shifts */ | 1600 | #define pde6_rsvd0_MASK 0x00ffffff |
1607 | #define PDE_DESC_TYPE_MASK 0xff000000 | 1601 | #define pde6_rsvd0_WORD word0 |
1608 | #define PDE_DESC_TYPE_SHIFT 24 | 1602 | uint32_t word1; |
1609 | #define PDE_BG_PROFILE_MASK 0x00ff0000 | 1603 | #define pde6_rsvd1_SHIFT 26 |
1610 | #define PDE_BG_PROFILE_SHIFT 16 | 1604 | #define pde6_rsvd1_MASK 0x0000003f |
1611 | #define PDE_BLOCK_LEN_MASK 0x0000fffc | 1605 | #define pde6_rsvd1_WORD word1 |
1612 | #define PDE_BLOCK_LEN_SHIFT 2 | 1606 | #define pde6_na_SHIFT 25 |
1613 | #define PDE_ERR_CTRL_MASK 0x00000003 | 1607 | #define pde6_na_MASK 0x00000001 |
1614 | #define PDE_ERR_CTRL_SHIFT 0 | 1608 | #define pde6_na_WORD word1 |
1615 | /* PDE word 1 bit masks and shifts */ | 1609 | #define pde6_rsvd2_SHIFT 16 |
1616 | #define PDE_APPTAG_MASK_MASK 0xffff0000 | 1610 | #define pde6_rsvd2_MASK 0x000001FF |
1617 | #define PDE_APPTAG_MASK_SHIFT 16 | 1611 | #define pde6_rsvd2_WORD word1 |
1618 | #define PDE_APPTAG_VAL_MASK 0x0000ffff | 1612 | #define pde6_apptagtr_SHIFT 0 |
1619 | #define PDE_APPTAG_VAL_SHIFT 0 | 1613 | #define pde6_apptagtr_MASK 0x0000ffff |
1620 | struct lpfc_pde { | 1614 | #define pde6_apptagtr_WORD word1 |
1621 | uint32_t parms; /* bitfields of descriptor, prof, len, and ec */ | 1615 | uint32_t word2; |
1622 | uint32_t apptag; /* bitfields of app tag maskand app tag value */ | 1616 | #define pde6_optx_SHIFT 28 |
1623 | uint32_t reftag; /* reference tag occupying all 32 bits */ | 1617 | #define pde6_optx_MASK 0x0000000f |
1618 | #define pde6_optx_WORD word2 | ||
1619 | #define pde6_oprx_SHIFT 24 | ||
1620 | #define pde6_oprx_MASK 0x0000000f | ||
1621 | #define pde6_oprx_WORD word2 | ||
1622 | #define pde6_nr_SHIFT 23 | ||
1623 | #define pde6_nr_MASK 0x00000001 | ||
1624 | #define pde6_nr_WORD word2 | ||
1625 | #define pde6_ce_SHIFT 22 | ||
1626 | #define pde6_ce_MASK 0x00000001 | ||
1627 | #define pde6_ce_WORD word2 | ||
1628 | #define pde6_re_SHIFT 21 | ||
1629 | #define pde6_re_MASK 0x00000001 | ||
1630 | #define pde6_re_WORD word2 | ||
1631 | #define pde6_ae_SHIFT 20 | ||
1632 | #define pde6_ae_MASK 0x00000001 | ||
1633 | #define pde6_ae_WORD word2 | ||
1634 | #define pde6_ai_SHIFT 19 | ||
1635 | #define pde6_ai_MASK 0x00000001 | ||
1636 | #define pde6_ai_WORD word2 | ||
1637 | #define pde6_bs_SHIFT 16 | ||
1638 | #define pde6_bs_MASK 0x00000007 | ||
1639 | #define pde6_bs_WORD word2 | ||
1640 | #define pde6_apptagval_SHIFT 0 | ||
1641 | #define pde6_apptagval_MASK 0x0000ffff | ||
1642 | #define pde6_apptagval_WORD word2 | ||
1624 | }; | 1643 | }; |
1625 | 1644 | ||
1626 | /* inline function to set fields in parms of PDE */ | ||
1627 | static inline void | ||
1628 | lpfc_pde_set_bg_parms(struct lpfc_pde *p, u8 desc, u8 prof, u16 len, u8 ec) | ||
1629 | { | ||
1630 | uint32_t *wp = &p->parms; | ||
1631 | |||
1632 | /* spec indicates that adapter appends two 0's to length field */ | ||
1633 | len = len >> 2; | ||
1634 | |||
1635 | *wp &= 0; | ||
1636 | *wp |= ((desc << PDE_DESC_TYPE_SHIFT) & PDE_DESC_TYPE_MASK); | ||
1637 | *wp |= ((prof << PDE_BG_PROFILE_SHIFT) & PDE_BG_PROFILE_MASK); | ||
1638 | *wp |= ((len << PDE_BLOCK_LEN_SHIFT) & PDE_BLOCK_LEN_MASK); | ||
1639 | *wp |= ((ec << PDE_ERR_CTRL_SHIFT) & PDE_ERR_CTRL_MASK); | ||
1640 | *wp = le32_to_cpu(*wp); | ||
1641 | } | ||
1642 | |||
1643 | /* inline function to set apptag and reftag fields of PDE */ | ||
1644 | static inline void | ||
1645 | lpfc_pde_set_dif_parms(struct lpfc_pde *p, u16 apptagmask, u16 apptagval, | ||
1646 | u32 reftag) | ||
1647 | { | ||
1648 | uint32_t *wp = &p->apptag; | ||
1649 | *wp &= 0; | ||
1650 | *wp |= ((apptagmask << PDE_APPTAG_MASK_SHIFT) & PDE_APPTAG_MASK_MASK); | ||
1651 | *wp |= ((apptagval << PDE_APPTAG_VAL_SHIFT) & PDE_APPTAG_VAL_MASK); | ||
1652 | *wp = le32_to_cpu(*wp); | ||
1653 | wp = &p->reftag; | ||
1654 | *wp = le32_to_cpu(reftag); | ||
1655 | } | ||
1656 | |||
1657 | 1645 | ||
1658 | /* Structure for MB Command LOAD_SM and DOWN_LOAD */ | 1646 | /* Structure for MB Command LOAD_SM and DOWN_LOAD */ |
1659 | 1647 | ||
@@ -1744,6 +1732,17 @@ typedef struct { | |||
1744 | } un; | 1732 | } un; |
1745 | } BIU_DIAG_VAR; | 1733 | } BIU_DIAG_VAR; |
1746 | 1734 | ||
1735 | /* Structure for MB command READ_EVENT_LOG (0x38) */ | ||
1736 | struct READ_EVENT_LOG_VAR { | ||
1737 | uint32_t word1; | ||
1738 | #define lpfc_event_log_SHIFT 29 | ||
1739 | #define lpfc_event_log_MASK 0x00000001 | ||
1740 | #define lpfc_event_log_WORD word1 | ||
1741 | #define USE_MAILBOX_RESPONSE 1 | ||
1742 | uint32_t offset; | ||
1743 | struct ulp_bde64 rcv_bde64; | ||
1744 | }; | ||
1745 | |||
1747 | /* Structure for MB Command INIT_LINK (05) */ | 1746 | /* Structure for MB Command INIT_LINK (05) */ |
1748 | 1747 | ||
1749 | typedef struct { | 1748 | typedef struct { |
@@ -2487,8 +2486,8 @@ typedef struct { | |||
2487 | #define DMP_VPORT_REGION_SIZE 0x200 | 2486 | #define DMP_VPORT_REGION_SIZE 0x200 |
2488 | #define DMP_MBOX_OFFSET_WORD 0x5 | 2487 | #define DMP_MBOX_OFFSET_WORD 0x5 |
2489 | 2488 | ||
2490 | #define DMP_REGION_23 0x17 /* fcoe param and port state region */ | 2489 | #define DMP_REGION_23 0x17 /* fcoe param and port state region */ |
2491 | #define DMP_RGN23_SIZE 0x400 | 2490 | #define DMP_RGN23_SIZE 0x400 |
2492 | 2491 | ||
2493 | #define WAKE_UP_PARMS_REGION_ID 4 | 2492 | #define WAKE_UP_PARMS_REGION_ID 4 |
2494 | #define WAKE_UP_PARMS_WORD_SIZE 15 | 2493 | #define WAKE_UP_PARMS_WORD_SIZE 15 |
@@ -2503,9 +2502,9 @@ struct vport_rec { | |||
2503 | #define VPORT_INFO_REV 0x1 | 2502 | #define VPORT_INFO_REV 0x1 |
2504 | #define MAX_STATIC_VPORT_COUNT 16 | 2503 | #define MAX_STATIC_VPORT_COUNT 16 |
2505 | struct static_vport_info { | 2504 | struct static_vport_info { |
2506 | uint32_t signature; | 2505 | uint32_t signature; |
2507 | uint32_t rev; | 2506 | uint32_t rev; |
2508 | struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT]; | 2507 | struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT]; |
2509 | uint32_t resvd[66]; | 2508 | uint32_t resvd[66]; |
2510 | }; | 2509 | }; |
2511 | 2510 | ||
@@ -2934,6 +2933,12 @@ typedef struct { | |||
2934 | /* Union of all Mailbox Command types */ | 2933 | /* Union of all Mailbox Command types */ |
2935 | #define MAILBOX_CMD_WSIZE 32 | 2934 | #define MAILBOX_CMD_WSIZE 32 |
2936 | #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t)) | 2935 | #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t)) |
2936 | /* ext_wsize times 4 bytes should not be greater than max xmit size */ | ||
2937 | #define MAILBOX_EXT_WSIZE 512 | ||
2938 | #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t)) | ||
2939 | #define MAILBOX_HBA_EXT_OFFSET 0x100 | ||
2940 | /* max mbox xmit size is a page size for sysfs IO operations */ | ||
2941 | #define MAILBOX_MAX_XMIT_SIZE PAGE_SIZE | ||
2937 | 2942 | ||
2938 | typedef union { | 2943 | typedef union { |
2939 | uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/ | 2944 | uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/ |
@@ -2972,6 +2977,9 @@ typedef union { | |||
2972 | REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ | 2977 | REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ |
2973 | UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ | 2978 | UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ |
2974 | ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */ | 2979 | ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */ |
2980 | struct READ_EVENT_LOG_VAR varRdEventLog; /* cmd = 0x38 | ||
2981 | * (READ_EVENT_LOG) | ||
2982 | */ | ||
2975 | struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI) */ | 2983 | struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI) */ |
2976 | } MAILVARIANTS; | 2984 | } MAILVARIANTS; |
2977 | 2985 | ||
@@ -3652,7 +3660,8 @@ typedef struct _IOCB { /* IOCB structure */ | |||
3652 | /* Maximum IOCBs that will fit in SLI2 slim */ | 3660 | /* Maximum IOCBs that will fit in SLI2 slim */ |
3653 | #define MAX_SLI2_IOCB 498 | 3661 | #define MAX_SLI2_IOCB 498 |
3654 | #define MAX_SLIM_IOCB_SIZE (SLI2_SLIM_SIZE - \ | 3662 | #define MAX_SLIM_IOCB_SIZE (SLI2_SLIM_SIZE - \ |
3655 | (sizeof(MAILBOX_t) + sizeof(PCB_t))) | 3663 | (sizeof(MAILBOX_t) + sizeof(PCB_t) + \ |
3664 | sizeof(uint32_t) * MAILBOX_EXT_WSIZE)) | ||
3656 | 3665 | ||
3657 | /* HBQ entries are 4 words each = 4k */ | 3666 | /* HBQ entries are 4 words each = 4k */ |
3658 | #define LPFC_TOTAL_HBQ_SIZE (sizeof(struct lpfc_hbq_entry) * \ | 3667 | #define LPFC_TOTAL_HBQ_SIZE (sizeof(struct lpfc_hbq_entry) * \ |
@@ -3660,6 +3669,7 @@ typedef struct _IOCB { /* IOCB structure */ | |||
3660 | 3669 | ||
3661 | struct lpfc_sli2_slim { | 3670 | struct lpfc_sli2_slim { |
3662 | MAILBOX_t mbx; | 3671 | MAILBOX_t mbx; |
3672 | uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE]; | ||
3663 | PCB_t pcb; | 3673 | PCB_t pcb; |
3664 | IOCB_t IOCBs[MAX_SLIM_IOCB_SIZE]; | 3674 | IOCB_t IOCBs[MAX_SLIM_IOCB_SIZE]; |
3665 | }; | 3675 | }; |