diff options
Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc.c')
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc.c | 117 |
1 files changed, 56 insertions, 61 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc.c b/drivers/scsi/bfa/bfa_ioc.c index 8d3bf404229..fddab8857e8 100644 --- a/drivers/scsi/bfa/bfa_ioc.c +++ b/drivers/scsi/bfa/bfa_ioc.c | |||
@@ -73,7 +73,7 @@ BFA_TRC_FILE(CNA, IOC); | |||
73 | 73 | ||
74 | #define bfa_ioc_mbox_cmd_pending(__ioc) \ | 74 | #define bfa_ioc_mbox_cmd_pending(__ioc) \ |
75 | (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \ | 75 | (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \ |
76 | bfa_reg_read((__ioc)->ioc_regs.hfn_mbox_cmd)) | 76 | readl((__ioc)->ioc_regs.hfn_mbox_cmd)) |
77 | 77 | ||
78 | bfa_boolean_t bfa_auto_recover = BFA_TRUE; | 78 | bfa_boolean_t bfa_auto_recover = BFA_TRUE; |
79 | 79 | ||
@@ -866,8 +866,7 @@ bfa_iocpf_sm_enabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event) | |||
866 | case IOCPF_E_TIMEOUT: | 866 | case IOCPF_E_TIMEOUT: |
867 | iocpf->retry_count++; | 867 | iocpf->retry_count++; |
868 | if (iocpf->retry_count < BFA_IOC_HWINIT_MAX) { | 868 | if (iocpf->retry_count < BFA_IOC_HWINIT_MAX) { |
869 | bfa_reg_write(ioc->ioc_regs.ioc_fwstate, | 869 | writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate); |
870 | BFI_IOC_UNINIT); | ||
871 | bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit); | 870 | bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit); |
872 | break; | 871 | break; |
873 | } | 872 | } |
@@ -968,7 +967,7 @@ bfa_iocpf_sm_disabling(struct bfa_iocpf_s *iocpf, enum iocpf_event event) | |||
968 | */ | 967 | */ |
969 | 968 | ||
970 | case IOCPF_E_TIMEOUT: | 969 | case IOCPF_E_TIMEOUT: |
971 | bfa_reg_write(ioc->ioc_regs.ioc_fwstate, BFI_IOC_FAIL); | 970 | writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate); |
972 | bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled); | 971 | bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled); |
973 | break; | 972 | break; |
974 | 973 | ||
@@ -1057,7 +1056,7 @@ bfa_iocpf_sm_fail_entry(struct bfa_iocpf_s *iocpf) | |||
1057 | * Mark IOC as failed in hardware and stop firmware. | 1056 | * Mark IOC as failed in hardware and stop firmware. |
1058 | */ | 1057 | */ |
1059 | bfa_ioc_lpu_stop(iocpf->ioc); | 1058 | bfa_ioc_lpu_stop(iocpf->ioc); |
1060 | bfa_reg_write(iocpf->ioc->ioc_regs.ioc_fwstate, BFI_IOC_FAIL); | 1059 | writel(BFI_IOC_FAIL, iocpf->ioc->ioc_regs.ioc_fwstate); |
1061 | 1060 | ||
1062 | /** | 1061 | /** |
1063 | * Notify other functions on HB failure. | 1062 | * Notify other functions on HB failure. |
@@ -1123,18 +1122,18 @@ bfa_ioc_disable_comp(struct bfa_ioc_s *ioc) | |||
1123 | } | 1122 | } |
1124 | 1123 | ||
1125 | bfa_boolean_t | 1124 | bfa_boolean_t |
1126 | bfa_ioc_sem_get(bfa_os_addr_t sem_reg) | 1125 | bfa_ioc_sem_get(void __iomem *sem_reg) |
1127 | { | 1126 | { |
1128 | u32 r32; | 1127 | u32 r32; |
1129 | int cnt = 0; | 1128 | int cnt = 0; |
1130 | #define BFA_SEM_SPINCNT 3000 | 1129 | #define BFA_SEM_SPINCNT 3000 |
1131 | 1130 | ||
1132 | r32 = bfa_reg_read(sem_reg); | 1131 | r32 = readl(sem_reg); |
1133 | 1132 | ||
1134 | while (r32 && (cnt < BFA_SEM_SPINCNT)) { | 1133 | while (r32 && (cnt < BFA_SEM_SPINCNT)) { |
1135 | cnt++; | 1134 | cnt++; |
1136 | udelay(2); | 1135 | udelay(2); |
1137 | r32 = bfa_reg_read(sem_reg); | 1136 | r32 = readl(sem_reg); |
1138 | } | 1137 | } |
1139 | 1138 | ||
1140 | if (r32 == 0) | 1139 | if (r32 == 0) |
@@ -1145,9 +1144,9 @@ bfa_ioc_sem_get(bfa_os_addr_t sem_reg) | |||
1145 | } | 1144 | } |
1146 | 1145 | ||
1147 | void | 1146 | void |
1148 | bfa_ioc_sem_release(bfa_os_addr_t sem_reg) | 1147 | bfa_ioc_sem_release(void __iomem *sem_reg) |
1149 | { | 1148 | { |
1150 | bfa_reg_write(sem_reg, 1); | 1149 | writel(1, sem_reg); |
1151 | } | 1150 | } |
1152 | 1151 | ||
1153 | static void | 1152 | static void |
@@ -1159,7 +1158,7 @@ bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc) | |||
1159 | * First read to the semaphore register will return 0, subsequent reads | 1158 | * First read to the semaphore register will return 0, subsequent reads |
1160 | * will return 1. Semaphore is released by writing 1 to the register | 1159 | * will return 1. Semaphore is released by writing 1 to the register |
1161 | */ | 1160 | */ |
1162 | r32 = bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); | 1161 | r32 = readl(ioc->ioc_regs.ioc_sem_reg); |
1163 | if (r32 == 0) { | 1162 | if (r32 == 0) { |
1164 | bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED); | 1163 | bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED); |
1165 | return; | 1164 | return; |
@@ -1171,7 +1170,7 @@ bfa_ioc_hw_sem_get(struct bfa_ioc_s *ioc) | |||
1171 | void | 1170 | void |
1172 | bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc) | 1171 | bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc) |
1173 | { | 1172 | { |
1174 | bfa_reg_write(ioc->ioc_regs.ioc_sem_reg, 1); | 1173 | writel(1, ioc->ioc_regs.ioc_sem_reg); |
1175 | } | 1174 | } |
1176 | 1175 | ||
1177 | static void | 1176 | static void |
@@ -1190,7 +1189,7 @@ bfa_ioc_lmem_init(struct bfa_ioc_s *ioc) | |||
1190 | int i; | 1189 | int i; |
1191 | #define PSS_LMEM_INIT_TIME 10000 | 1190 | #define PSS_LMEM_INIT_TIME 10000 |
1192 | 1191 | ||
1193 | pss_ctl = bfa_reg_read(ioc->ioc_regs.pss_ctl_reg); | 1192 | pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg); |
1194 | pss_ctl &= ~__PSS_LMEM_RESET; | 1193 | pss_ctl &= ~__PSS_LMEM_RESET; |
1195 | pss_ctl |= __PSS_LMEM_INIT_EN; | 1194 | pss_ctl |= __PSS_LMEM_INIT_EN; |
1196 | 1195 | ||
@@ -1198,14 +1197,14 @@ bfa_ioc_lmem_init(struct bfa_ioc_s *ioc) | |||
1198 | * i2c workaround 12.5khz clock | 1197 | * i2c workaround 12.5khz clock |
1199 | */ | 1198 | */ |
1200 | pss_ctl |= __PSS_I2C_CLK_DIV(3UL); | 1199 | pss_ctl |= __PSS_I2C_CLK_DIV(3UL); |
1201 | bfa_reg_write(ioc->ioc_regs.pss_ctl_reg, pss_ctl); | 1200 | writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg); |
1202 | 1201 | ||
1203 | /** | 1202 | /** |
1204 | * wait for memory initialization to be complete | 1203 | * wait for memory initialization to be complete |
1205 | */ | 1204 | */ |
1206 | i = 0; | 1205 | i = 0; |
1207 | do { | 1206 | do { |
1208 | pss_ctl = bfa_reg_read(ioc->ioc_regs.pss_ctl_reg); | 1207 | pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg); |
1209 | i++; | 1208 | i++; |
1210 | } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME)); | 1209 | } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME)); |
1211 | 1210 | ||
@@ -1217,7 +1216,7 @@ bfa_ioc_lmem_init(struct bfa_ioc_s *ioc) | |||
1217 | bfa_trc(ioc, pss_ctl); | 1216 | bfa_trc(ioc, pss_ctl); |
1218 | 1217 | ||
1219 | pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN); | 1218 | pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN); |
1220 | bfa_reg_write(ioc->ioc_regs.pss_ctl_reg, pss_ctl); | 1219 | writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg); |
1221 | } | 1220 | } |
1222 | 1221 | ||
1223 | static void | 1222 | static void |
@@ -1228,10 +1227,10 @@ bfa_ioc_lpu_start(struct bfa_ioc_s *ioc) | |||
1228 | /** | 1227 | /** |
1229 | * Take processor out of reset. | 1228 | * Take processor out of reset. |
1230 | */ | 1229 | */ |
1231 | pss_ctl = bfa_reg_read(ioc->ioc_regs.pss_ctl_reg); | 1230 | pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg); |
1232 | pss_ctl &= ~__PSS_LPU0_RESET; | 1231 | pss_ctl &= ~__PSS_LPU0_RESET; |
1233 | 1232 | ||
1234 | bfa_reg_write(ioc->ioc_regs.pss_ctl_reg, pss_ctl); | 1233 | writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg); |
1235 | } | 1234 | } |
1236 | 1235 | ||
1237 | static void | 1236 | static void |
@@ -1242,10 +1241,10 @@ bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc) | |||
1242 | /** | 1241 | /** |
1243 | * Put processors in reset. | 1242 | * Put processors in reset. |
1244 | */ | 1243 | */ |
1245 | pss_ctl = bfa_reg_read(ioc->ioc_regs.pss_ctl_reg); | 1244 | pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg); |
1246 | pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET); | 1245 | pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET); |
1247 | 1246 | ||
1248 | bfa_reg_write(ioc->ioc_regs.pss_ctl_reg, pss_ctl); | 1247 | writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg); |
1249 | } | 1248 | } |
1250 | 1249 | ||
1251 | /** | 1250 | /** |
@@ -1261,7 +1260,7 @@ bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr) | |||
1261 | 1260 | ||
1262 | pgnum = bfa_ioc_smem_pgnum(ioc, loff); | 1261 | pgnum = bfa_ioc_smem_pgnum(ioc, loff); |
1263 | pgoff = bfa_ioc_smem_pgoff(ioc, loff); | 1262 | pgoff = bfa_ioc_smem_pgoff(ioc, loff); |
1264 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1263 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1265 | 1264 | ||
1266 | for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32)); | 1265 | for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr_s) / sizeof(u32)); |
1267 | i++) { | 1266 | i++) { |
@@ -1321,7 +1320,7 @@ bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env) | |||
1321 | return BFA_FALSE; | 1320 | return BFA_FALSE; |
1322 | } | 1321 | } |
1323 | 1322 | ||
1324 | if (bfa_os_swap32(fwhdr.param) != boot_env) { | 1323 | if (swab32(fwhdr.param) != boot_env) { |
1325 | bfa_trc(ioc, fwhdr.param); | 1324 | bfa_trc(ioc, fwhdr.param); |
1326 | bfa_trc(ioc, boot_env); | 1325 | bfa_trc(ioc, boot_env); |
1327 | return BFA_FALSE; | 1326 | return BFA_FALSE; |
@@ -1338,9 +1337,9 @@ bfa_ioc_msgflush(struct bfa_ioc_s *ioc) | |||
1338 | { | 1337 | { |
1339 | u32 r32; | 1338 | u32 r32; |
1340 | 1339 | ||
1341 | r32 = bfa_reg_read(ioc->ioc_regs.lpu_mbox_cmd); | 1340 | r32 = readl(ioc->ioc_regs.lpu_mbox_cmd); |
1342 | if (r32) | 1341 | if (r32) |
1343 | bfa_reg_write(ioc->ioc_regs.lpu_mbox_cmd, 1); | 1342 | writel(1, ioc->ioc_regs.lpu_mbox_cmd); |
1344 | } | 1343 | } |
1345 | 1344 | ||
1346 | 1345 | ||
@@ -1352,7 +1351,7 @@ bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force) | |||
1352 | u32 boot_type; | 1351 | u32 boot_type; |
1353 | u32 boot_env; | 1352 | u32 boot_env; |
1354 | 1353 | ||
1355 | ioc_fwstate = bfa_reg_read(ioc->ioc_regs.ioc_fwstate); | 1354 | ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate); |
1356 | 1355 | ||
1357 | if (force) | 1356 | if (force) |
1358 | ioc_fwstate = BFI_IOC_UNINIT; | 1357 | ioc_fwstate = BFI_IOC_UNINIT; |
@@ -1449,17 +1448,17 @@ bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len) | |||
1449 | * first write msg to mailbox registers | 1448 | * first write msg to mailbox registers |
1450 | */ | 1449 | */ |
1451 | for (i = 0; i < len / sizeof(u32); i++) | 1450 | for (i = 0; i < len / sizeof(u32); i++) |
1452 | bfa_reg_write(ioc->ioc_regs.hfn_mbox + i * sizeof(u32), | 1451 | writel(cpu_to_le32(msgp[i]), |
1453 | cpu_to_le32(msgp[i])); | 1452 | ioc->ioc_regs.hfn_mbox + i * sizeof(u32)); |
1454 | 1453 | ||
1455 | for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++) | 1454 | for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++) |
1456 | bfa_reg_write(ioc->ioc_regs.hfn_mbox + i * sizeof(u32), 0); | 1455 | writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32)); |
1457 | 1456 | ||
1458 | /* | 1457 | /* |
1459 | * write 1 to mailbox CMD to trigger LPU event | 1458 | * write 1 to mailbox CMD to trigger LPU event |
1460 | */ | 1459 | */ |
1461 | bfa_reg_write(ioc->ioc_regs.hfn_mbox_cmd, 1); | 1460 | writel(1, ioc->ioc_regs.hfn_mbox_cmd); |
1462 | (void) bfa_reg_read(ioc->ioc_regs.hfn_mbox_cmd); | 1461 | (void) readl(ioc->ioc_regs.hfn_mbox_cmd); |
1463 | } | 1462 | } |
1464 | 1463 | ||
1465 | static void | 1464 | static void |
@@ -1503,7 +1502,7 @@ bfa_ioc_hb_check(void *cbarg) | |||
1503 | struct bfa_ioc_s *ioc = cbarg; | 1502 | struct bfa_ioc_s *ioc = cbarg; |
1504 | u32 hb_count; | 1503 | u32 hb_count; |
1505 | 1504 | ||
1506 | hb_count = bfa_reg_read(ioc->ioc_regs.heartbeat); | 1505 | hb_count = readl(ioc->ioc_regs.heartbeat); |
1507 | if (ioc->hb_count == hb_count) { | 1506 | if (ioc->hb_count == hb_count) { |
1508 | printk(KERN_CRIT "Firmware heartbeat failure at %d", hb_count); | 1507 | printk(KERN_CRIT "Firmware heartbeat failure at %d", hb_count); |
1509 | bfa_ioc_recover(ioc); | 1508 | bfa_ioc_recover(ioc); |
@@ -1519,7 +1518,7 @@ bfa_ioc_hb_check(void *cbarg) | |||
1519 | static void | 1518 | static void |
1520 | bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc) | 1519 | bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc) |
1521 | { | 1520 | { |
1522 | ioc->hb_count = bfa_reg_read(ioc->ioc_regs.heartbeat); | 1521 | ioc->hb_count = readl(ioc->ioc_regs.heartbeat); |
1523 | bfa_hb_timer_start(ioc); | 1522 | bfa_hb_timer_start(ioc); |
1524 | } | 1523 | } |
1525 | 1524 | ||
@@ -1554,7 +1553,7 @@ bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | |||
1554 | pgnum = bfa_ioc_smem_pgnum(ioc, loff); | 1553 | pgnum = bfa_ioc_smem_pgnum(ioc, loff); |
1555 | pgoff = bfa_ioc_smem_pgoff(ioc, loff); | 1554 | pgoff = bfa_ioc_smem_pgoff(ioc, loff); |
1556 | 1555 | ||
1557 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1556 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1558 | 1557 | ||
1559 | for (i = 0; i < bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)); i++) { | 1558 | for (i = 0; i < bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)); i++) { |
1560 | 1559 | ||
@@ -1578,21 +1577,19 @@ bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | |||
1578 | loff = PSS_SMEM_PGOFF(loff); | 1577 | loff = PSS_SMEM_PGOFF(loff); |
1579 | if (loff == 0) { | 1578 | if (loff == 0) { |
1580 | pgnum++; | 1579 | pgnum++; |
1581 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, | 1580 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1582 | pgnum); | ||
1583 | } | 1581 | } |
1584 | } | 1582 | } |
1585 | 1583 | ||
1586 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, | 1584 | writel(bfa_ioc_smem_pgnum(ioc, 0), ioc->ioc_regs.host_page_num_fn); |
1587 | bfa_ioc_smem_pgnum(ioc, 0)); | ||
1588 | 1585 | ||
1589 | /* | 1586 | /* |
1590 | * Set boot type and boot param at the end. | 1587 | * Set boot type and boot param at the end. |
1591 | */ | 1588 | */ |
1592 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_BOOT_TYPE_OFF, | 1589 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_BOOT_TYPE_OFF, |
1593 | bfa_os_swap32(boot_type)); | 1590 | swab32(boot_type)); |
1594 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_BOOT_LOADER_OFF, | 1591 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_BOOT_LOADER_OFF, |
1595 | bfa_os_swap32(boot_env)); | 1592 | swab32(boot_env)); |
1596 | } | 1593 | } |
1597 | 1594 | ||
1598 | static void | 1595 | static void |
@@ -1651,7 +1648,7 @@ bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc) | |||
1651 | /** | 1648 | /** |
1652 | * If previous command is not yet fetched by firmware, do nothing | 1649 | * If previous command is not yet fetched by firmware, do nothing |
1653 | */ | 1650 | */ |
1654 | stat = bfa_reg_read(ioc->ioc_regs.hfn_mbox_cmd); | 1651 | stat = readl(ioc->ioc_regs.hfn_mbox_cmd); |
1655 | if (stat) | 1652 | if (stat) |
1656 | return; | 1653 | return; |
1657 | 1654 | ||
@@ -1704,7 +1701,7 @@ bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz) | |||
1704 | return BFA_STATUS_FAILED; | 1701 | return BFA_STATUS_FAILED; |
1705 | } | 1702 | } |
1706 | 1703 | ||
1707 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1704 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1708 | 1705 | ||
1709 | len = sz/sizeof(u32); | 1706 | len = sz/sizeof(u32); |
1710 | bfa_trc(ioc, len); | 1707 | bfa_trc(ioc, len); |
@@ -1719,11 +1716,10 @@ bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz) | |||
1719 | loff = PSS_SMEM_PGOFF(loff); | 1716 | loff = PSS_SMEM_PGOFF(loff); |
1720 | if (loff == 0) { | 1717 | if (loff == 0) { |
1721 | pgnum++; | 1718 | pgnum++; |
1722 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1719 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1723 | } | 1720 | } |
1724 | } | 1721 | } |
1725 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, | 1722 | writel(bfa_ioc_smem_pgnum(ioc, 0), ioc->ioc_regs.host_page_num_fn); |
1726 | bfa_ioc_smem_pgnum(ioc, 0)); | ||
1727 | /* | 1723 | /* |
1728 | * release semaphore. | 1724 | * release semaphore. |
1729 | */ | 1725 | */ |
@@ -1760,7 +1756,7 @@ bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz) | |||
1760 | return BFA_STATUS_FAILED; | 1756 | return BFA_STATUS_FAILED; |
1761 | } | 1757 | } |
1762 | 1758 | ||
1763 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1759 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1764 | 1760 | ||
1765 | len = sz/sizeof(u32); /* len in words */ | 1761 | len = sz/sizeof(u32); /* len in words */ |
1766 | bfa_trc(ioc, len); | 1762 | bfa_trc(ioc, len); |
@@ -1774,11 +1770,10 @@ bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz) | |||
1774 | loff = PSS_SMEM_PGOFF(loff); | 1770 | loff = PSS_SMEM_PGOFF(loff); |
1775 | if (loff == 0) { | 1771 | if (loff == 0) { |
1776 | pgnum++; | 1772 | pgnum++; |
1777 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, pgnum); | 1773 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1778 | } | 1774 | } |
1779 | } | 1775 | } |
1780 | bfa_reg_write(ioc->ioc_regs.host_page_num_fn, | 1776 | writel(bfa_ioc_smem_pgnum(ioc, 0), ioc->ioc_regs.host_page_num_fn); |
1781 | bfa_ioc_smem_pgnum(ioc, 0)); | ||
1782 | 1777 | ||
1783 | /* | 1778 | /* |
1784 | * release semaphore. | 1779 | * release semaphore. |
@@ -1855,7 +1850,7 @@ bfa_ioc_pll_init(struct bfa_ioc_s *ioc) | |||
1855 | void | 1850 | void |
1856 | bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) | 1851 | bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) |
1857 | { | 1852 | { |
1858 | bfa_os_addr_t rb; | 1853 | void __iomem *rb; |
1859 | 1854 | ||
1860 | bfa_ioc_stats(ioc, ioc_boots); | 1855 | bfa_ioc_stats(ioc, ioc_boots); |
1861 | 1856 | ||
@@ -1867,11 +1862,11 @@ bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) | |||
1867 | */ | 1862 | */ |
1868 | rb = ioc->pcidev.pci_bar_kva; | 1863 | rb = ioc->pcidev.pci_bar_kva; |
1869 | if (boot_type == BFI_BOOT_TYPE_MEMTEST) { | 1864 | if (boot_type == BFI_BOOT_TYPE_MEMTEST) { |
1870 | bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_MEMTEST); | 1865 | writel(BFI_IOC_MEMTEST, (rb + BFA_IOC0_STATE_REG)); |
1871 | bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_MEMTEST); | 1866 | writel(BFI_IOC_MEMTEST, (rb + BFA_IOC1_STATE_REG)); |
1872 | } else { | 1867 | } else { |
1873 | bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_INITING); | 1868 | writel(BFI_IOC_INITING, (rb + BFA_IOC0_STATE_REG)); |
1874 | bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_INITING); | 1869 | writel(BFI_IOC_INITING, (rb + BFA_IOC1_STATE_REG)); |
1875 | } | 1870 | } |
1876 | 1871 | ||
1877 | bfa_ioc_msgflush(ioc); | 1872 | bfa_ioc_msgflush(ioc); |
@@ -1904,7 +1899,7 @@ bfa_ioc_is_operational(struct bfa_ioc_s *ioc) | |||
1904 | bfa_boolean_t | 1899 | bfa_boolean_t |
1905 | bfa_ioc_is_initialized(struct bfa_ioc_s *ioc) | 1900 | bfa_ioc_is_initialized(struct bfa_ioc_s *ioc) |
1906 | { | 1901 | { |
1907 | u32 r32 = bfa_reg_read(ioc->ioc_regs.ioc_fwstate); | 1902 | u32 r32 = readl(ioc->ioc_regs.ioc_fwstate); |
1908 | 1903 | ||
1909 | return ((r32 != BFI_IOC_UNINIT) && | 1904 | return ((r32 != BFI_IOC_UNINIT) && |
1910 | (r32 != BFI_IOC_INITING) && | 1905 | (r32 != BFI_IOC_INITING) && |
@@ -1923,7 +1918,7 @@ bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg) | |||
1923 | */ | 1918 | */ |
1924 | for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32)); | 1919 | for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32)); |
1925 | i++) { | 1920 | i++) { |
1926 | r32 = bfa_reg_read(ioc->ioc_regs.lpu_mbox + | 1921 | r32 = readl(ioc->ioc_regs.lpu_mbox + |
1927 | i * sizeof(u32)); | 1922 | i * sizeof(u32)); |
1928 | msgp[i] = cpu_to_be32(r32); | 1923 | msgp[i] = cpu_to_be32(r32); |
1929 | } | 1924 | } |
@@ -1931,8 +1926,8 @@ bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg) | |||
1931 | /** | 1926 | /** |
1932 | * turn off mailbox interrupt by clearing mailbox status | 1927 | * turn off mailbox interrupt by clearing mailbox status |
1933 | */ | 1928 | */ |
1934 | bfa_reg_write(ioc->ioc_regs.lpu_mbox_cmd, 1); | 1929 | writel(1, ioc->ioc_regs.lpu_mbox_cmd); |
1935 | bfa_reg_read(ioc->ioc_regs.lpu_mbox_cmd); | 1930 | readl(ioc->ioc_regs.lpu_mbox_cmd); |
1936 | } | 1931 | } |
1937 | 1932 | ||
1938 | void | 1933 | void |
@@ -2162,7 +2157,7 @@ bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd) | |||
2162 | /** | 2157 | /** |
2163 | * If mailbox is busy, queue command for poll timer | 2158 | * If mailbox is busy, queue command for poll timer |
2164 | */ | 2159 | */ |
2165 | stat = bfa_reg_read(ioc->ioc_regs.hfn_mbox_cmd); | 2160 | stat = readl(ioc->ioc_regs.hfn_mbox_cmd); |
2166 | if (stat) { | 2161 | if (stat) { |
2167 | list_add_tail(&cmd->qe, &mod->cmd_q); | 2162 | list_add_tail(&cmd->qe, &mod->cmd_q); |
2168 | return; | 2163 | return; |
@@ -2251,17 +2246,17 @@ bfa_boolean_t | |||
2251 | bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc) | 2246 | bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc) |
2252 | { | 2247 | { |
2253 | u32 ioc_state; | 2248 | u32 ioc_state; |
2254 | bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; | 2249 | void __iomem *rb = ioc->pcidev.pci_bar_kva; |
2255 | 2250 | ||
2256 | if (!bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled)) | 2251 | if (!bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled)) |
2257 | return BFA_FALSE; | 2252 | return BFA_FALSE; |
2258 | 2253 | ||
2259 | ioc_state = bfa_reg_read(rb + BFA_IOC0_STATE_REG); | 2254 | ioc_state = readl(rb + BFA_IOC0_STATE_REG); |
2260 | if (!bfa_ioc_state_disabled(ioc_state)) | 2255 | if (!bfa_ioc_state_disabled(ioc_state)) |
2261 | return BFA_FALSE; | 2256 | return BFA_FALSE; |
2262 | 2257 | ||
2263 | if (ioc->pcidev.device_id != BFA_PCI_DEVICE_ID_FC_8G1P) { | 2258 | if (ioc->pcidev.device_id != BFA_PCI_DEVICE_ID_FC_8G1P) { |
2264 | ioc_state = bfa_reg_read(rb + BFA_IOC1_STATE_REG); | 2259 | ioc_state = readl(rb + BFA_IOC1_STATE_REG); |
2265 | if (!bfa_ioc_state_disabled(ioc_state)) | 2260 | if (!bfa_ioc_state_disabled(ioc_state)) |
2266 | return BFA_FALSE; | 2261 | return BFA_FALSE; |
2267 | } | 2262 | } |