diff options
Diffstat (limited to 'drivers/rtc/rtc-pl031.c')
-rw-r--r-- | drivers/rtc/rtc-pl031.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index b7a6690e5b3..0e7c15b24c1 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c | |||
@@ -293,38 +293,6 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |||
293 | return ret; | 293 | return ret; |
294 | } | 294 | } |
295 | 295 | ||
296 | /* Periodic interrupt is only available in ST variants. */ | ||
297 | static int pl031_irq_set_state(struct device *dev, int enabled) | ||
298 | { | ||
299 | struct pl031_local *ldata = dev_get_drvdata(dev); | ||
300 | |||
301 | if (enabled == 1) { | ||
302 | /* Clear any pending timer interrupt. */ | ||
303 | writel(RTC_BIT_PI, ldata->base + RTC_ICR); | ||
304 | |||
305 | writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI, | ||
306 | ldata->base + RTC_IMSC); | ||
307 | |||
308 | /* Now start the timer */ | ||
309 | writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN, | ||
310 | ldata->base + RTC_TCR); | ||
311 | |||
312 | } else { | ||
313 | writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI), | ||
314 | ldata->base + RTC_IMSC); | ||
315 | |||
316 | /* Also stop the timer */ | ||
317 | writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN), | ||
318 | ldata->base + RTC_TCR); | ||
319 | } | ||
320 | /* Wait at least 1 RTC32 clock cycle to ensure next access | ||
321 | * to RTC_TCR will succeed. | ||
322 | */ | ||
323 | udelay(40); | ||
324 | |||
325 | return 0; | ||
326 | } | ||
327 | |||
328 | static int pl031_irq_set_freq(struct device *dev, int freq) | 296 | static int pl031_irq_set_freq(struct device *dev, int freq) |
329 | { | 297 | { |
330 | struct pl031_local *ldata = dev_get_drvdata(dev); | 298 | struct pl031_local *ldata = dev_get_drvdata(dev); |
@@ -440,7 +408,6 @@ static struct rtc_class_ops stv1_pl031_ops = { | |||
440 | .read_alarm = pl031_read_alarm, | 408 | .read_alarm = pl031_read_alarm, |
441 | .set_alarm = pl031_set_alarm, | 409 | .set_alarm = pl031_set_alarm, |
442 | .alarm_irq_enable = pl031_alarm_irq_enable, | 410 | .alarm_irq_enable = pl031_alarm_irq_enable, |
443 | .irq_set_state = pl031_irq_set_state, | ||
444 | .irq_set_freq = pl031_irq_set_freq, | 411 | .irq_set_freq = pl031_irq_set_freq, |
445 | }; | 412 | }; |
446 | 413 | ||
@@ -451,7 +418,6 @@ static struct rtc_class_ops stv2_pl031_ops = { | |||
451 | .read_alarm = pl031_stv2_read_alarm, | 418 | .read_alarm = pl031_stv2_read_alarm, |
452 | .set_alarm = pl031_stv2_set_alarm, | 419 | .set_alarm = pl031_stv2_set_alarm, |
453 | .alarm_irq_enable = pl031_alarm_irq_enable, | 420 | .alarm_irq_enable = pl031_alarm_irq_enable, |
454 | .irq_set_state = pl031_irq_set_state, | ||
455 | .irq_set_freq = pl031_irq_set_freq, | 421 | .irq_set_freq = pl031_irq_set_freq, |
456 | }; | 422 | }; |
457 | 423 | ||