diff options
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r-- | drivers/pci/pci.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index f0aa3d53383..48807556b47 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1403,19 +1403,19 @@ int pci_restore_standard_config(struct pci_dev *dev) | |||
1403 | if (error) | 1403 | if (error) |
1404 | return error; | 1404 | return error; |
1405 | 1405 | ||
1406 | if (pci_is_bridge(dev)) { | 1406 | /* |
1407 | if (prev_state > PCI_D1) | 1407 | * This assumes that we won't get a bus in B2 or B3 from the BIOS, but |
1408 | mdelay(PCI_PM_BUS_WAIT); | 1408 | * we've made this assumption forever and it appears to be universally |
1409 | } else { | 1409 | * satisfied. |
1410 | switch(prev_state) { | 1410 | */ |
1411 | case PCI_D3cold: | 1411 | switch(prev_state) { |
1412 | case PCI_D3hot: | 1412 | case PCI_D3cold: |
1413 | mdelay(pci_pm_d3_delay); | 1413 | case PCI_D3hot: |
1414 | break; | 1414 | mdelay(pci_pm_d3_delay); |
1415 | case PCI_D2: | 1415 | break; |
1416 | udelay(PCI_PM_D2_DELAY); | 1416 | case PCI_D2: |
1417 | break; | 1417 | udelay(PCI_PM_D2_DELAY); |
1418 | } | 1418 | break; |
1419 | } | 1419 | } |
1420 | 1420 | ||
1421 | dev->current_state = PCI_D0; | 1421 | dev->current_state = PCI_D0; |