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path: root/drivers/net/wireless/rt2x00/rt2800lib.c
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c203
1 files changed, 119 insertions, 84 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 9deae41cb78..18d4d8e4ae6 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -37,9 +37,12 @@
37#include <linux/module.h> 37#include <linux/module.h>
38 38
39#include "rt2x00.h" 39#include "rt2x00.h"
40#if defined(CONFIG_RT2800USB) || defined(CONFIG_RT2800USB_MODULE) 40#if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE)
41#include "rt2x00usb.h" 41#include "rt2x00usb.h"
42#endif 42#endif
43#if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE)
44#include "rt2x00pci.h"
45#endif
43#include "rt2800lib.h" 46#include "rt2800lib.h"
44#include "rt2800.h" 47#include "rt2800.h"
45#include "rt2800usb.h" 48#include "rt2800usb.h"
@@ -89,7 +92,7 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
89 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word); 92 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
90 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1); 93 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
91 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0); 94 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
92 if (rt2x00_intf_is_pci(rt2x00dev)) 95 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
93 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1); 96 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
94 97
95 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); 98 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
@@ -118,7 +121,7 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
118 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word); 121 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
119 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1); 122 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
120 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1); 123 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
121 if (rt2x00_intf_is_pci(rt2x00dev)) 124 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
122 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1); 125 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
123 126
124 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); 127 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
@@ -218,10 +221,9 @@ void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
218 u32 reg; 221 u32 reg;
219 222
220 /* 223 /*
221 * RT2880 and RT3052 don't support MCU requests. 224 * SOC devices don't support MCU requests.
222 */ 225 */
223 if (rt2x00_rt(&rt2x00dev->chip, RT2880) || 226 if (rt2x00_is_soc(rt2x00dev))
224 rt2x00_rt(&rt2x00dev->chip, RT3052))
225 return; 227 return;
226 228
227 mutex_lock(&rt2x00dev->csr_mutex); 229 mutex_lock(&rt2x00dev->csr_mutex);
@@ -246,6 +248,25 @@ void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
246} 248}
247EXPORT_SYMBOL_GPL(rt2800_mcu_request); 249EXPORT_SYMBOL_GPL(rt2800_mcu_request);
248 250
251int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
252{
253 unsigned int i;
254 u32 reg;
255
256 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
257 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
258 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
259 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
260 return 0;
261
262 msleep(1);
263 }
264
265 ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");
266 return -EACCES;
267}
268EXPORT_SYMBOL_GPL(rt2800_wait_wpdma_ready);
269
249#ifdef CONFIG_RT2X00_LIB_DEBUGFS 270#ifdef CONFIG_RT2X00_LIB_DEBUGFS
250const struct rt2x00debug rt2800_rt2x00debug = { 271const struct rt2x00debug rt2800_rt2x00debug = {
251 .owner = THIS_MODULE, 272 .owner = THIS_MODULE,
@@ -348,7 +369,7 @@ static int rt2800_blink_set(struct led_classdev *led_cdev,
348 return 0; 369 return 0;
349} 370}
350 371
351void rt2800_init_led(struct rt2x00_dev *rt2x00dev, 372static void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
352 struct rt2x00_led *led, enum led_type type) 373 struct rt2x00_led *led, enum led_type type)
353{ 374{
354 led->rt2x00dev = rt2x00dev; 375 led->rt2x00dev = rt2x00dev;
@@ -357,7 +378,6 @@ void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
357 led->led_dev.blink_set = rt2800_blink_set; 378 led->led_dev.blink_set = rt2800_blink_set;
358 led->flags = LED_INITIALIZED; 379 led->flags = LED_INITIALIZED;
359} 380}
360EXPORT_SYMBOL_GPL(rt2800_init_led);
361#endif /* CONFIG_RT2X00_LIB_LEDS */ 381#endif /* CONFIG_RT2X00_LIB_LEDS */
362 382
363/* 383/*
@@ -643,7 +663,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
643 switch ((int)ant->tx) { 663 switch ((int)ant->tx) {
644 case 1: 664 case 1:
645 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0); 665 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
646 if (rt2x00_intf_is_pci(rt2x00dev)) 666 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
647 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0); 667 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
648 break; 668 break;
649 case 2: 669 case 2:
@@ -806,12 +826,12 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
806 unsigned int tx_pin; 826 unsigned int tx_pin;
807 u8 bbp; 827 u8 bbp;
808 828
809 if ((rt2x00_rt(&rt2x00dev->chip, RT3070) || 829 if ((rt2x00_rt(rt2x00dev, RT3070) ||
810 rt2x00_rt(&rt2x00dev->chip, RT3090)) && 830 rt2x00_rt(rt2x00dev, RT3090)) &&
811 (rt2x00_rf(&rt2x00dev->chip, RF2020) || 831 (rt2x00_rf(rt2x00dev, RF2020) ||
812 rt2x00_rf(&rt2x00dev->chip, RF3020) || 832 rt2x00_rf(rt2x00dev, RF3020) ||
813 rt2x00_rf(&rt2x00dev->chip, RF3021) || 833 rt2x00_rf(rt2x00dev, RF3021) ||
814 rt2x00_rf(&rt2x00dev->chip, RF3022))) 834 rt2x00_rf(rt2x00dev, RF3022)))
815 rt2800_config_channel_rt3x(rt2x00dev, conf, rf, info); 835 rt2800_config_channel_rt3x(rt2x00dev, conf, rf, info);
816 else 836 else
817 rt2800_config_channel_rt2x(rt2x00dev, conf, rf, info); 837 rt2800_config_channel_rt2x(rt2x00dev, conf, rf, info);
@@ -878,7 +898,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
878 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); 898 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
879 rt2800_bbp_write(rt2x00dev, 3, bbp); 899 rt2800_bbp_write(rt2x00dev, 3, bbp);
880 900
881 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { 901 if (rt2x00_rt(rt2x00dev, RT2860) &&
902 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
882 if (conf_is_ht40(conf)) { 903 if (conf_is_ht40(conf)) {
883 rt2800_bbp_write(rt2x00dev, 69, 0x1a); 904 rt2800_bbp_write(rt2x00dev, 69, 0x1a);
884 rt2800_bbp_write(rt2x00dev, 70, 0x0a); 905 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
@@ -1040,8 +1061,9 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
1040static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) 1061static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
1041{ 1062{
1042 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) { 1063 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
1043 if (rt2x00_intf_is_usb(rt2x00dev) && 1064 if (rt2x00_is_usb(rt2x00dev) &&
1044 rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) 1065 rt2x00_rt(rt2x00dev, RT3070) &&
1066 (rt2x00_rev(rt2x00dev) == RT3070_VERSION))
1045 return 0x1c + (2 * rt2x00dev->lna_gain); 1067 return 0x1c + (2 * rt2x00dev->lna_gain);
1046 else 1068 else
1047 return 0x2e + rt2x00dev->lna_gain; 1069 return 0x2e + rt2x00dev->lna_gain;
@@ -1072,7 +1094,8 @@ EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
1072void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual, 1094void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
1073 const u32 count) 1095 const u32 count)
1074{ 1096{
1075 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) 1097 if (rt2x00_rt(rt2x00dev, RT2860) &&
1098 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION))
1076 return; 1099 return;
1077 1100
1078 /* 1101 /*
@@ -1092,7 +1115,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1092 u32 reg; 1115 u32 reg;
1093 unsigned int i; 1116 unsigned int i;
1094 1117
1095 if (rt2x00_intf_is_usb(rt2x00dev)) { 1118 if (rt2x00_is_usb(rt2x00dev)) {
1096 /* 1119 /*
1097 * Wait until BBP and RF are ready. 1120 * Wait until BBP and RF are ready.
1098 */ 1121 */
@@ -1111,7 +1134,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1111 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg); 1134 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1112 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 1135 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL,
1113 reg & ~0x00002000); 1136 reg & ~0x00002000);
1114 } else if (rt2x00_intf_is_pci(rt2x00dev)) 1137 } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
1115 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); 1138 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1116 1139
1117 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 1140 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
@@ -1119,9 +1142,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1119 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1); 1142 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
1120 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 1143 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1121 1144
1122 if (rt2x00_intf_is_usb(rt2x00dev)) { 1145 if (rt2x00_is_usb(rt2x00dev)) {
1123 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); 1146 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1124#if defined(CONFIG_RT2800USB) || defined(CONFIG_RT2800USB_MODULE) 1147#if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE)
1125 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, 1148 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1126 USB_MODE_RESET, REGISTER_TIMEOUT); 1149 USB_MODE_RESET, REGISTER_TIMEOUT);
1127#endif 1150#endif
@@ -1157,8 +1180,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1157 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0); 1180 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
1158 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); 1181 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
1159 1182
1160 if (rt2x00_intf_is_usb(rt2x00dev) && 1183 if (rt2x00_is_usb(rt2x00dev) &&
1161 rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) { 1184 rt2x00_rt(rt2x00dev, RT3070) &&
1185 (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
1162 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 1186 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
1163 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); 1187 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
1164 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); 1188 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -1185,8 +1209,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1185 1209
1186 rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg); 1210 rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
1187 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE); 1211 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
1188 if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION && 1212 if ((rt2x00_rt(rt2x00dev, RT2872) &&
1189 rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION) 1213 (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
1214 rt2x00_rt(rt2x00dev, RT2880) ||
1215 rt2x00_rt(rt2x00dev, RT2883) ||
1216 rt2x00_rt(rt2x00dev, RT2890) ||
1217 rt2x00_rt(rt2x00dev, RT3052) ||
1218 (rt2x00_rt(rt2x00dev, RT3070) &&
1219 (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
1190 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2); 1220 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
1191 else 1221 else
1192 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1); 1222 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
@@ -1276,7 +1306,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1276 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1); 1306 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1277 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); 1307 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
1278 1308
1279 if (rt2x00_intf_is_usb(rt2x00dev)) { 1309 if (rt2x00_is_usb(rt2x00dev)) {
1280 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006); 1310 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006);
1281 1311
1282 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 1312 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
@@ -1336,7 +1366,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1336 rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0); 1366 rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
1337 rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0); 1367 rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
1338 1368
1339 if (rt2x00_intf_is_usb(rt2x00dev)) { 1369 if (rt2x00_is_usb(rt2x00dev)) {
1340 rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg); 1370 rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg);
1341 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30); 1371 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
1342 rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg); 1372 rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
@@ -1465,22 +1495,25 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
1465 rt2800_bbp_write(rt2x00dev, 103, 0x00); 1495 rt2800_bbp_write(rt2x00dev, 103, 0x00);
1466 rt2800_bbp_write(rt2x00dev, 105, 0x05); 1496 rt2800_bbp_write(rt2x00dev, 105, 0x05);
1467 1497
1468 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { 1498 if (rt2x00_rt(rt2x00dev, RT2860) &&
1499 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
1469 rt2800_bbp_write(rt2x00dev, 69, 0x16); 1500 rt2800_bbp_write(rt2x00dev, 69, 0x16);
1470 rt2800_bbp_write(rt2x00dev, 73, 0x12); 1501 rt2800_bbp_write(rt2x00dev, 73, 0x12);
1471 } 1502 }
1472 1503
1473 if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) 1504 if (rt2x00_rt(rt2x00dev, RT2860) &&
1505 (rt2x00_rev(rt2x00dev) > RT2860D_VERSION))
1474 rt2800_bbp_write(rt2x00dev, 84, 0x19); 1506 rt2800_bbp_write(rt2x00dev, 84, 0x19);
1475 1507
1476 if (rt2x00_intf_is_usb(rt2x00dev) && 1508 if (rt2x00_is_usb(rt2x00dev) &&
1477 rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) { 1509 rt2x00_rt(rt2x00dev, RT3070) &&
1510 (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
1478 rt2800_bbp_write(rt2x00dev, 70, 0x0a); 1511 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
1479 rt2800_bbp_write(rt2x00dev, 84, 0x99); 1512 rt2800_bbp_write(rt2x00dev, 84, 0x99);
1480 rt2800_bbp_write(rt2x00dev, 105, 0x05); 1513 rt2800_bbp_write(rt2x00dev, 105, 0x05);
1481 } 1514 }
1482 1515
1483 if (rt2x00_rt(&rt2x00dev->chip, RT3052)) { 1516 if (rt2x00_rt(rt2x00dev, RT3052)) {
1484 rt2800_bbp_write(rt2x00dev, 31, 0x08); 1517 rt2800_bbp_write(rt2x00dev, 31, 0x08);
1485 rt2800_bbp_write(rt2x00dev, 78, 0x0e); 1518 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
1486 rt2800_bbp_write(rt2x00dev, 80, 0x08); 1519 rt2800_bbp_write(rt2x00dev, 80, 0x08);
@@ -1565,14 +1598,15 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1565 u8 rfcsr; 1598 u8 rfcsr;
1566 u8 bbp; 1599 u8 bbp;
1567 1600
1568 if (rt2x00_intf_is_usb(rt2x00dev) && 1601 if (rt2x00_is_usb(rt2x00dev) &&
1569 rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION) 1602 rt2x00_rt(rt2x00dev, RT3070) &&
1603 (rt2x00_rev(rt2x00dev) != RT3070_VERSION))
1570 return 0; 1604 return 0;
1571 1605
1572 if (rt2x00_intf_is_pci(rt2x00dev)) { 1606 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
1573 if (!rt2x00_rf(&rt2x00dev->chip, RF3020) && 1607 if (!rt2x00_rf(rt2x00dev, RF3020) &&
1574 !rt2x00_rf(&rt2x00dev->chip, RF3021) && 1608 !rt2x00_rf(rt2x00dev, RF3021) &&
1575 !rt2x00_rf(&rt2x00dev->chip, RF3022)) 1609 !rt2x00_rf(rt2x00dev, RF3022))
1576 return 0; 1610 return 0;
1577 } 1611 }
1578 1612
@@ -1586,7 +1620,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1586 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); 1620 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
1587 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); 1621 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
1588 1622
1589 if (rt2x00_intf_is_usb(rt2x00dev)) { 1623 if (rt2x00_is_usb(rt2x00dev)) {
1590 rt2800_rfcsr_write(rt2x00dev, 4, 0x40); 1624 rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
1591 rt2800_rfcsr_write(rt2x00dev, 5, 0x03); 1625 rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
1592 rt2800_rfcsr_write(rt2x00dev, 6, 0x02); 1626 rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
@@ -1607,7 +1641,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1607 rt2800_rfcsr_write(rt2x00dev, 25, 0x01); 1641 rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
1608 rt2800_rfcsr_write(rt2x00dev, 27, 0x03); 1642 rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
1609 rt2800_rfcsr_write(rt2x00dev, 29, 0x1f); 1643 rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
1610 } else if (rt2x00_intf_is_pci(rt2x00dev)) { 1644 } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
1611 rt2800_rfcsr_write(rt2x00dev, 0, 0x50); 1645 rt2800_rfcsr_write(rt2x00dev, 0, 0x50);
1612 rt2800_rfcsr_write(rt2x00dev, 1, 0x01); 1646 rt2800_rfcsr_write(rt2x00dev, 1, 0x01);
1613 rt2800_rfcsr_write(rt2x00dev, 2, 0xf7); 1647 rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);
@@ -1737,7 +1771,12 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1737 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820); 1771 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
1738 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 1772 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1739 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); 1773 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1740 } else if (rt2x00_rev(&rt2x00dev->chip) < RT2883_VERSION) { 1774 } else if (rt2x00_rt(rt2x00dev, RT2860) ||
1775 rt2x00_rt(rt2x00dev, RT2870) ||
1776 rt2x00_rt(rt2x00dev, RT2872) ||
1777 rt2x00_rt(rt2x00dev, RT2880) ||
1778 (rt2x00_rt(rt2x00dev, RT2883) &&
1779 (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
1741 /* 1780 /*
1742 * There is a max of 2 RX streams for RT28x0 series 1781 * There is a max of 2 RX streams for RT28x0 series
1743 */ 1782 */
@@ -1836,36 +1875,34 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
1836 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1875 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1837 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg); 1876 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1838 1877
1839 rt2x00_set_chip_rf(rt2x00dev, value, reg); 1878 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
1840 1879 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
1841 if (rt2x00_intf_is_usb(rt2x00dev)) { 1880
1842 struct rt2x00_chip *chip = &rt2x00dev->chip; 1881 if (!rt2x00_rt(rt2x00dev, RT2860) &&
1843 1882 !rt2x00_rt(rt2x00dev, RT2870) &&
1844 /* 1883 !rt2x00_rt(rt2x00dev, RT2872) &&
1845 * The check for rt2860 is not a typo, some rt2870 hardware 1884 !rt2x00_rt(rt2x00dev, RT2880) &&
1846 * identifies itself as rt2860 in the CSR register. 1885 !rt2x00_rt(rt2x00dev, RT2883) &&
1847 */ 1886 !rt2x00_rt(rt2x00dev, RT2890) &&
1848 if (rt2x00_check_rev(chip, 0xfff00000, 0x28600000) || 1887 !rt2x00_rt(rt2x00dev, RT3052) &&
1849 rt2x00_check_rev(chip, 0xfff00000, 0x28700000) || 1888 !rt2x00_rt(rt2x00dev, RT3070) &&
1850 rt2x00_check_rev(chip, 0xfff00000, 0x28800000)) { 1889 !rt2x00_rt(rt2x00dev, RT3071) &&
1851 rt2x00_set_chip_rt(rt2x00dev, RT2870); 1890 !rt2x00_rt(rt2x00dev, RT3090) &&
1852 } else if (rt2x00_check_rev(chip, 0xffff0000, 0x30700000)) { 1891 !rt2x00_rt(rt2x00dev, RT3390) &&
1853 rt2x00_set_chip_rt(rt2x00dev, RT3070); 1892 !rt2x00_rt(rt2x00dev, RT3572)) {
1854 } else { 1893 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1855 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1894 return -ENODEV;
1856 return -ENODEV;
1857 }
1858 } 1895 }
1859 rt2x00_print_chip(rt2x00dev); 1896
1860 1897 if (!rt2x00_rf(rt2x00dev, RF2820) &&
1861 if (!rt2x00_rf(&rt2x00dev->chip, RF2820) && 1898 !rt2x00_rf(rt2x00dev, RF2850) &&
1862 !rt2x00_rf(&rt2x00dev->chip, RF2850) && 1899 !rt2x00_rf(rt2x00dev, RF2720) &&
1863 !rt2x00_rf(&rt2x00dev->chip, RF2720) && 1900 !rt2x00_rf(rt2x00dev, RF2750) &&
1864 !rt2x00_rf(&rt2x00dev->chip, RF2750) && 1901 !rt2x00_rf(rt2x00dev, RF3020) &&
1865 !rt2x00_rf(&rt2x00dev->chip, RF3020) && 1902 !rt2x00_rf(rt2x00dev, RF2020) &&
1866 !rt2x00_rf(&rt2x00dev->chip, RF2020) && 1903 !rt2x00_rf(rt2x00dev, RF3021) &&
1867 !rt2x00_rf(&rt2x00dev->chip, RF3021) && 1904 !rt2x00_rf(rt2x00dev, RF3022) &&
1868 !rt2x00_rf(&rt2x00dev->chip, RF3022)) { 1905 !rt2x00_rf(rt2x00dev, RF3052)) {
1869 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1906 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1870 return -ENODEV; 1907 return -ENODEV;
1871 } 1908 }
@@ -2013,7 +2050,6 @@ static const struct rf_channel rf_vals_302x[] = {
2013 2050
2014int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 2051int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2015{ 2052{
2016 struct rt2x00_chip *chip = &rt2x00dev->chip;
2017 struct hw_mode_spec *spec = &rt2x00dev->spec; 2053 struct hw_mode_spec *spec = &rt2x00dev->spec;
2018 struct channel_info *info; 2054 struct channel_info *info;
2019 char *tx_power1; 2055 char *tx_power1;
@@ -2024,7 +2060,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2024 /* 2060 /*
2025 * Disable powersaving as default on PCI devices. 2061 * Disable powersaving as default on PCI devices.
2026 */ 2062 */
2027 if (rt2x00_intf_is_pci(rt2x00dev)) 2063 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
2028 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 2064 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2029 2065
2030 /* 2066 /*
@@ -2049,19 +2085,19 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2049 spec->supported_bands = SUPPORT_BAND_2GHZ; 2085 spec->supported_bands = SUPPORT_BAND_2GHZ;
2050 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 2086 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2051 2087
2052 if (rt2x00_rf(chip, RF2820) || 2088 if (rt2x00_rf(rt2x00dev, RF2820) ||
2053 rt2x00_rf(chip, RF2720) || 2089 rt2x00_rf(rt2x00dev, RF2720) ||
2054 (rt2x00_intf_is_pci(rt2x00dev) && rt2x00_rf(chip, RF3052))) { 2090 rt2x00_rf(rt2x00dev, RF3052)) {
2055 spec->num_channels = 14; 2091 spec->num_channels = 14;
2056 spec->channels = rf_vals; 2092 spec->channels = rf_vals;
2057 } else if (rt2x00_rf(chip, RF2850) || rt2x00_rf(chip, RF2750)) { 2093 } else if (rt2x00_rf(rt2x00dev, RF2850) || rt2x00_rf(rt2x00dev, RF2750)) {
2058 spec->supported_bands |= SUPPORT_BAND_5GHZ; 2094 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2059 spec->num_channels = ARRAY_SIZE(rf_vals); 2095 spec->num_channels = ARRAY_SIZE(rf_vals);
2060 spec->channels = rf_vals; 2096 spec->channels = rf_vals;
2061 } else if (rt2x00_rf(chip, RF3020) || 2097 } else if (rt2x00_rf(rt2x00dev, RF3020) ||
2062 rt2x00_rf(chip, RF2020) || 2098 rt2x00_rf(rt2x00dev, RF2020) ||
2063 rt2x00_rf(chip, RF3021) || 2099 rt2x00_rf(rt2x00dev, RF3021) ||
2064 rt2x00_rf(chip, RF3022)) { 2100 rt2x00_rf(rt2x00dev, RF3022)) {
2065 spec->num_channels = ARRAY_SIZE(rf_vals_302x); 2101 spec->num_channels = ARRAY_SIZE(rf_vals_302x);
2066 spec->channels = rf_vals_302x; 2102 spec->channels = rf_vals_302x;
2067 } 2103 }
@@ -2069,7 +2105,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2069 /* 2105 /*
2070 * Initialize HT information. 2106 * Initialize HT information.
2071 */ 2107 */
2072 if (!rt2x00_rf(chip, RF2020)) 2108 if (!rt2x00_rf(rt2x00dev, RF2020))
2073 spec->ht.ht_supported = true; 2109 spec->ht.ht_supported = true;
2074 else 2110 else
2075 spec->ht.ht_supported = false; 2111 spec->ht.ht_supported = false;
@@ -2282,7 +2318,6 @@ const struct ieee80211_ops rt2800_mac80211_ops = {
2282 .set_rts_threshold = rt2800_set_rts_threshold, 2318 .set_rts_threshold = rt2800_set_rts_threshold,
2283 .bss_info_changed = rt2x00mac_bss_info_changed, 2319 .bss_info_changed = rt2x00mac_bss_info_changed,
2284 .conf_tx = rt2800_conf_tx, 2320 .conf_tx = rt2800_conf_tx,
2285 .get_tx_stats = rt2x00mac_get_tx_stats,
2286 .get_tsf = rt2800_get_tsf, 2321 .get_tsf = rt2800_get_tsf,
2287 .rfkill_poll = rt2x00mac_rfkill_poll, 2322 .rfkill_poll = rt2x00mac_rfkill_poll,
2288}; 2323};