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path: root/drivers/net/wireless/b43/phy.c
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Diffstat (limited to 'drivers/net/wireless/b43/phy.c')
-rw-r--r--drivers/net/wireless/b43/phy.c60
1 files changed, 24 insertions, 36 deletions
diff --git a/drivers/net/wireless/b43/phy.c b/drivers/net/wireless/b43/phy.c
index 67b8a922b33..2abf125aa2c 100644
--- a/drivers/net/wireless/b43/phy.c
+++ b/drivers/net/wireless/b43/phy.c
@@ -228,42 +228,30 @@ static void b43_shm_clear_tssi(struct b43_wldev *dev)
228 } 228 }
229} 229}
230 230
231void b43_raw_phy_lock(struct b43_wldev *dev) 231/* Lock the PHY registers against concurrent access from the microcode.
232 * This lock is nonrecursive. */
233void b43_phy_lock(struct b43_wldev *dev)
232{ 234{
233 struct b43_phy *phy = &dev->phy; 235#if B43_DEBUG
234 236 B43_WARN_ON(dev->phy.phy_locked);
235 B43_WARN_ON(!irqs_disabled()); 237 dev->phy.phy_locked = 1;
236 238#endif
237 /* We had a check for MACCTL==0 here, but I think that doesn't 239 B43_WARN_ON(dev->dev->id.revision < 3);
238 * make sense, as MACCTL is never 0 when this is called.
239 * --mb */
240 B43_WARN_ON(b43_read32(dev, B43_MMIO_MACCTL) == 0);
241 240
242 if (dev->dev->id.revision < 3) { 241 if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
243 b43_mac_suspend(dev); 242 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
244 spin_lock(&phy->lock);
245 } else {
246 if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
247 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
248 }
249 phy->locked = 1;
250} 243}
251 244
252void b43_raw_phy_unlock(struct b43_wldev *dev) 245void b43_phy_unlock(struct b43_wldev *dev)
253{ 246{
254 struct b43_phy *phy = &dev->phy; 247#if B43_DEBUG
248 B43_WARN_ON(!dev->phy.phy_locked);
249 dev->phy.phy_locked = 0;
250#endif
251 B43_WARN_ON(dev->dev->id.revision < 3);
255 252
256 B43_WARN_ON(!irqs_disabled()); 253 if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
257 if (dev->dev->id.revision < 3) { 254 b43_power_saving_ctl_bits(dev, 0);
258 if (phy->locked) {
259 spin_unlock(&phy->lock);
260 b43_mac_enable(dev);
261 }
262 } else {
263 if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
264 b43_power_saving_ctl_bits(dev, 0);
265 }
266 phy->locked = 0;
267} 255}
268 256
269/* Different PHYs require different register routing flags. 257/* Different PHYs require different register routing flags.
@@ -1730,7 +1718,6 @@ void b43_phy_xmitpower(struct b43_wldev *dev)
1730 int rfatt_delta, bbatt_delta; 1718 int rfatt_delta, bbatt_delta;
1731 int rfatt, bbatt; 1719 int rfatt, bbatt;
1732 u8 tx_control; 1720 u8 tx_control;
1733 unsigned long phylock_flags;
1734 1721
1735 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x0058); 1722 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x0058);
1736 v0 = (s8) (tmp & 0x00FF); 1723 v0 = (s8) (tmp & 0x00FF);
@@ -1861,13 +1848,13 @@ void b43_phy_xmitpower(struct b43_wldev *dev)
1861 phy->bbatt.att = bbatt; 1848 phy->bbatt.att = bbatt;
1862 1849
1863 /* Adjust the hardware */ 1850 /* Adjust the hardware */
1864 b43_phy_lock(dev, phylock_flags); 1851 b43_phy_lock(dev);
1865 b43_radio_lock(dev); 1852 b43_radio_lock(dev);
1866 b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt, 1853 b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt,
1867 phy->tx_control); 1854 phy->tx_control);
1868 b43_lo_g_ctl_mark_cur_used(dev); 1855 b43_lo_g_ctl_mark_cur_used(dev);
1869 b43_radio_unlock(dev); 1856 b43_radio_unlock(dev);
1870 b43_phy_unlock(dev, phylock_flags); 1857 b43_phy_unlock(dev);
1871 break; 1858 break;
1872 } 1859 }
1873 default: 1860 default:
@@ -2158,6 +2145,7 @@ void b43_radio_lock(struct b43_wldev *dev)
2158 u32 macctl; 2145 u32 macctl;
2159 2146
2160 macctl = b43_read32(dev, B43_MMIO_MACCTL); 2147 macctl = b43_read32(dev, B43_MMIO_MACCTL);
2148 B43_WARN_ON(macctl & B43_MACCTL_RADIOLOCK);
2161 macctl |= B43_MACCTL_RADIOLOCK; 2149 macctl |= B43_MACCTL_RADIOLOCK;
2162 b43_write32(dev, B43_MMIO_MACCTL, macctl); 2150 b43_write32(dev, B43_MMIO_MACCTL, macctl);
2163 /* Commit the write and wait for the device 2151 /* Commit the write and wait for the device
@@ -2174,6 +2162,7 @@ void b43_radio_unlock(struct b43_wldev *dev)
2174 b43_read16(dev, B43_MMIO_PHY_VER); 2162 b43_read16(dev, B43_MMIO_PHY_VER);
2175 /* unlock */ 2163 /* unlock */
2176 macctl = b43_read32(dev, B43_MMIO_MACCTL); 2164 macctl = b43_read32(dev, B43_MMIO_MACCTL);
2165 B43_WARN_ON(!(macctl & B43_MACCTL_RADIOLOCK));
2177 macctl &= ~B43_MACCTL_RADIOLOCK; 2166 macctl &= ~B43_MACCTL_RADIOLOCK;
2178 b43_write32(dev, B43_MMIO_MACCTL, macctl); 2167 b43_write32(dev, B43_MMIO_MACCTL, macctl);
2179} 2168}
@@ -2355,12 +2344,11 @@ u8 b43_radio_aci_scan(struct b43_wldev * dev)
2355 u8 ret[13]; 2344 u8 ret[13];
2356 unsigned int channel = phy->channel; 2345 unsigned int channel = phy->channel;
2357 unsigned int i, j, start, end; 2346 unsigned int i, j, start, end;
2358 unsigned long phylock_flags;
2359 2347
2360 if (!((phy->type == B43_PHYTYPE_G) && (phy->rev > 0))) 2348 if (!((phy->type == B43_PHYTYPE_G) && (phy->rev > 0)))
2361 return 0; 2349 return 0;
2362 2350
2363 b43_phy_lock(dev, phylock_flags); 2351 b43_phy_lock(dev);
2364 b43_radio_lock(dev); 2352 b43_radio_lock(dev);
2365 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & 0xFFFC); 2353 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & 0xFFFC);
2366 b43_phy_write(dev, B43_PHY_G_CRS, 2354 b43_phy_write(dev, B43_PHY_G_CRS,
@@ -2389,7 +2377,7 @@ u8 b43_radio_aci_scan(struct b43_wldev * dev)
2389 ret[j] = 1; 2377 ret[j] = 1;
2390 } 2378 }
2391 b43_radio_unlock(dev); 2379 b43_radio_unlock(dev);
2392 b43_phy_unlock(dev, phylock_flags); 2380 b43_phy_unlock(dev);
2393 2381
2394 return ret[channel - 1]; 2382 return ret[channel - 1];
2395} 2383}