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path: root/drivers/net/wireless/ath9k/core.h
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-rw-r--r--drivers/net/wireless/ath9k/core.h295
1 files changed, 153 insertions, 142 deletions
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h
index 4ee695b76b8..cb3e61e57c4 100644
--- a/drivers/net/wireless/ath9k/core.h
+++ b/drivers/net/wireless/ath9k/core.h
@@ -39,6 +39,8 @@
39#include <linux/scatterlist.h> 39#include <linux/scatterlist.h>
40#include <asm/page.h> 40#include <asm/page.h>
41#include <net/mac80211.h> 41#include <net/mac80211.h>
42#include <linux/leds.h>
43#include <linux/rfkill.h>
42 44
43#include "ath9k.h" 45#include "ath9k.h"
44#include "rc.h" 46#include "rc.h"
@@ -79,11 +81,8 @@ struct ath_node;
79 } \ 81 } \
80 } while (0) 82 } while (0)
81 83
82/* XXX: remove */ 84#define TSF_TO_TU(_h,_l) \
83#define memzero(_buf, _len) memset(_buf, 0, _len) 85 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
84
85#define get_dma_mem_context(var, field) (&((var)->field))
86#define copy_dma_mem_context(dst, src) (*dst = *src)
87 86
88#define ATH9K_BH_STATUS_INTACT 0 87#define ATH9K_BH_STATUS_INTACT 0
89#define ATH9K_BH_STATUS_CHANGE 1 88#define ATH9K_BH_STATUS_CHANGE 1
@@ -95,6 +94,8 @@ static inline unsigned long get_timestamp(void)
95 return ((jiffies / HZ) * 1000) + (jiffies % HZ) * (1000 / HZ); 94 return ((jiffies / HZ) * 1000) + (jiffies % HZ) * (1000 / HZ);
96} 95}
97 96
97static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
98
98/*************/ 99/*************/
99/* Debugging */ 100/* Debugging */
100/*************/ 101/*************/
@@ -175,42 +176,38 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht);
175/* Descriptor Management */ 176/* Descriptor Management */
176/*************************/ 177/*************************/
177 178
178/* Number of descriptors per buffer. The only case where we see skbuff
179chains is due to FF aggregation in the driver. */
180#define ATH_TXDESC 1
181/* if there's more fragment for this MSDU */
182#define ATH_BF_MORE_MPDU 1
183#define ATH_TXBUF_RESET(_bf) do { \ 179#define ATH_TXBUF_RESET(_bf) do { \
184 (_bf)->bf_status = 0; \ 180 (_bf)->bf_status = 0; \
185 (_bf)->bf_lastbf = NULL; \ 181 (_bf)->bf_lastbf = NULL; \
186 (_bf)->bf_lastfrm = NULL; \ 182 (_bf)->bf_lastfrm = NULL; \
187 (_bf)->bf_next = NULL; \ 183 (_bf)->bf_next = NULL; \
188 memzero(&((_bf)->bf_state), \ 184 memset(&((_bf)->bf_state), 0, \
189 sizeof(struct ath_buf_state)); \ 185 sizeof(struct ath_buf_state)); \
190 } while (0) 186 } while (0)
191 187
188enum buffer_type {
189 BUF_DATA = BIT(0),
190 BUF_AGGR = BIT(1),
191 BUF_AMPDU = BIT(2),
192 BUF_HT = BIT(3),
193 BUF_RETRY = BIT(4),
194 BUF_XRETRY = BIT(5),
195 BUF_SHORT_PREAMBLE = BIT(6),
196 BUF_BAR = BIT(7),
197 BUF_PSPOLL = BIT(8),
198 BUF_AGGR_BURST = BIT(9),
199 BUF_CALC_AIRTIME = BIT(10),
200};
201
192struct ath_buf_state { 202struct ath_buf_state {
193 int bfs_nframes; /* # frames in aggregate */ 203 int bfs_nframes; /* # frames in aggregate */
194 u16 bfs_al; /* length of aggregate */ 204 u16 bfs_al; /* length of aggregate */
195 u16 bfs_frmlen; /* length of frame */ 205 u16 bfs_frmlen; /* length of frame */
196 int bfs_seqno; /* sequence number */ 206 int bfs_seqno; /* sequence number */
197 int bfs_tidno; /* tid of this frame */ 207 int bfs_tidno; /* tid of this frame */
198 int bfs_retries; /* current retries */ 208 int bfs_retries; /* current retries */
199 struct ath_rc_series bfs_rcs[4]; /* rate series */ 209 struct ath_rc_series bfs_rcs[4]; /* rate series */
200 u8 bfs_isdata:1; /* is a data frame/aggregate */ 210 u32 bf_type; /* BUF_* (enum buffer_type) */
201 u8 bfs_isaggr:1; /* is an aggregate */
202 u8 bfs_isampdu:1; /* is an a-mpdu, aggregate or not */
203 u8 bfs_ht:1; /* is an HT frame */
204 u8 bfs_isretried:1; /* is retried */
205 u8 bfs_isxretried:1; /* is excessive retried */
206 u8 bfs_shpreamble:1; /* is short preamble */
207 u8 bfs_isbar:1; /* is a BAR */
208 u8 bfs_ispspoll:1; /* is a PS-Poll */
209 u8 bfs_aggrburst:1; /* is a aggr burst */
210 u8 bfs_calcairtime:1; /* requests airtime be calculated
211 when set for tx frame */
212 int bfs_rifsburst_elem; /* RIFS burst/bar */
213 int bfs_nrifsubframes; /* # of elements in burst */
214 /* key type use to encrypt this frame */ 211 /* key type use to encrypt this frame */
215 enum ath9k_key_type bfs_keytype; 212 enum ath9k_key_type bfs_keytype;
216}; 213};
@@ -222,26 +219,22 @@ struct ath_buf_state {
222#define bf_seqno bf_state.bfs_seqno 219#define bf_seqno bf_state.bfs_seqno
223#define bf_tidno bf_state.bfs_tidno 220#define bf_tidno bf_state.bfs_tidno
224#define bf_rcs bf_state.bfs_rcs 221#define bf_rcs bf_state.bfs_rcs
225#define bf_isdata bf_state.bfs_isdata
226#define bf_isaggr bf_state.bfs_isaggr
227#define bf_isampdu bf_state.bfs_isampdu
228#define bf_ht bf_state.bfs_ht
229#define bf_isretried bf_state.bfs_isretried
230#define bf_isxretried bf_state.bfs_isxretried
231#define bf_shpreamble bf_state.bfs_shpreamble
232#define bf_rifsburst_elem bf_state.bfs_rifsburst_elem
233#define bf_nrifsubframes bf_state.bfs_nrifsubframes
234#define bf_keytype bf_state.bfs_keytype 222#define bf_keytype bf_state.bfs_keytype
235#define bf_isbar bf_state.bfs_isbar 223#define bf_isdata(bf) (bf->bf_state.bf_type & BUF_DATA)
236#define bf_ispspoll bf_state.bfs_ispspoll 224#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
237#define bf_aggrburst bf_state.bfs_aggrburst 225#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
238#define bf_calcairtime bf_state.bfs_calcairtime 226#define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
227#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
228#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
229#define bf_isshpreamble(bf) (bf->bf_state.bf_type & BUF_SHORT_PREAMBLE)
230#define bf_isbar(bf) (bf->bf_state.bf_type & BUF_BAR)
231#define bf_ispspoll(bf) (bf->bf_state.bf_type & BUF_PSPOLL)
232#define bf_isaggrburst(bf) (bf->bf_state.bf_type & BUF_AGGR_BURST)
239 233
240/* 234/*
241 * Abstraction of a contiguous buffer to transmit/receive. There is only 235 * Abstraction of a contiguous buffer to transmit/receive. There is only
242 * a single hw descriptor encapsulated here. 236 * a single hw descriptor encapsulated here.
243 */ 237 */
244
245struct ath_buf { 238struct ath_buf {
246 struct list_head list; 239 struct list_head list;
247 struct list_head *last; 240 struct list_head *last;
@@ -316,7 +309,7 @@ void ath_descdma_cleanup(struct ath_softc *sc,
316#define ATH_RX_TIMEOUT 40 /* 40 milliseconds */ 309#define ATH_RX_TIMEOUT 40 /* 40 milliseconds */
317#define WME_NUM_TID 16 310#define WME_NUM_TID 16
318#define IEEE80211_BAR_CTL_TID_M 0xF000 /* tid mask */ 311#define IEEE80211_BAR_CTL_TID_M 0xF000 /* tid mask */
319#define IEEE80211_BAR_CTL_TID_S 2 /* tid shift */ 312#define IEEE80211_BAR_CTL_TID_S 12 /* tid shift */
320 313
321enum ATH_RX_TYPE { 314enum ATH_RX_TYPE {
322 ATH_RX_NON_CONSUMED = 0, 315 ATH_RX_NON_CONSUMED = 0,
@@ -391,10 +384,10 @@ int ath_rx_input(struct ath_softc *sc,
391 struct sk_buff *skb, 384 struct sk_buff *skb,
392 struct ath_recv_status *rx_status, 385 struct ath_recv_status *rx_status,
393 enum ATH_RX_TYPE *status); 386 enum ATH_RX_TYPE *status);
394int ath__rx_indicate(struct ath_softc *sc, 387int _ath_rx_indicate(struct ath_softc *sc,
395 struct sk_buff *skb, 388 struct sk_buff *skb,
396 struct ath_recv_status *status, 389 struct ath_recv_status *status,
397 u16 keyix); 390 u16 keyix);
398int ath_rx_subframe(struct ath_node *an, struct sk_buff *skb, 391int ath_rx_subframe(struct ath_node *an, struct sk_buff *skb,
399 struct ath_recv_status *status); 392 struct ath_recv_status *status);
400 393
@@ -402,8 +395,7 @@ int ath_rx_subframe(struct ath_node *an, struct sk_buff *skb,
402/* TX */ 395/* TX */
403/******/ 396/******/
404 397
405#define ATH_FRAG_PER_MSDU 1 398#define ATH_TXBUF 512
406#define ATH_TXBUF (512/ATH_FRAG_PER_MSDU)
407/* max number of transmit attempts (tries) */ 399/* max number of transmit attempts (tries) */
408#define ATH_TXMAXTRY 13 400#define ATH_TXMAXTRY 13
409/* max number of 11n transmit attempts (tries) */ 401/* max number of 11n transmit attempts (tries) */
@@ -522,7 +514,6 @@ struct ath_tx_control {
522 u32 keyix; 514 u32 keyix;
523 int min_rate; 515 int min_rate;
524 int mcast_rate; 516 int mcast_rate;
525 u16 nextfraglen;
526 struct ath_softc *dev; 517 struct ath_softc *dev;
527 dma_addr_t dmacontext; 518 dma_addr_t dmacontext;
528}; 519};
@@ -557,10 +548,10 @@ void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
557int ath_tx_setup(struct ath_softc *sc, int haltype); 548int ath_tx_setup(struct ath_softc *sc, int haltype);
558void ath_draintxq(struct ath_softc *sc, bool retry_tx); 549void ath_draintxq(struct ath_softc *sc, bool retry_tx);
559void ath_tx_draintxq(struct ath_softc *sc, 550void ath_tx_draintxq(struct ath_softc *sc,
560 struct ath_txq *txq, bool retry_tx); 551 struct ath_txq *txq, bool retry_tx);
561void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 552void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
562void ath_tx_node_cleanup(struct ath_softc *sc, 553void ath_tx_node_cleanup(struct ath_softc *sc,
563 struct ath_node *an, bool bh_flag); 554 struct ath_node *an, bool bh_flag);
564void ath_tx_node_free(struct ath_softc *sc, struct ath_node *an); 555void ath_tx_node_free(struct ath_softc *sc, struct ath_node *an);
565void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 556void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
566int ath_tx_init(struct ath_softc *sc, int nbufs); 557int ath_tx_init(struct ath_softc *sc, int nbufs);
@@ -575,6 +566,7 @@ u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum);
575void ath_notify_txq_status(struct ath_softc *sc, u16 queue_depth); 566void ath_notify_txq_status(struct ath_softc *sc, u16 queue_depth);
576void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, 567void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
577 struct ath_xmit_status *tx_status, struct ath_node *an); 568 struct ath_xmit_status *tx_status, struct ath_node *an);
569void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb);
578 570
579/**********************/ 571/**********************/
580/* Node / Aggregation */ 572/* Node / Aggregation */
@@ -585,7 +577,6 @@ void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
585/* indicates the node is 80211 power save */ 577/* indicates the node is 80211 power save */
586#define ATH_NODE_PWRSAVE 0x2 578#define ATH_NODE_PWRSAVE 0x2
587 579
588#define ADDBA_TIMEOUT 200 /* 200 milliseconds */
589#define ADDBA_EXCHANGE_ATTEMPTS 10 580#define ADDBA_EXCHANGE_ATTEMPTS 10
590#define ATH_AGGR_DELIM_SZ 4 /* delimiter size */ 581#define ATH_AGGR_DELIM_SZ 4 /* delimiter size */
591#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 582#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
@@ -705,9 +696,6 @@ struct ath_node *ath_node_find(struct ath_softc *sc, u8 *addr);
705#define ATH_BCBUF 4 /* number of beacon buffers */ 696#define ATH_BCBUF 4 /* number of beacon buffers */
706#define ATH_DEFAULT_BINTVAL 100 /* default beacon interval in TU */ 697#define ATH_DEFAULT_BINTVAL 100 /* default beacon interval in TU */
707#define ATH_DEFAULT_BMISS_LIMIT 10 698#define ATH_DEFAULT_BMISS_LIMIT 10
708#define ATH_BEACON_AIFS_DEFAULT 0 /* Default aifs for ap beacon q */
709#define ATH_BEACON_CWMIN_DEFAULT 0 /* Default cwmin for ap beacon q */
710#define ATH_BEACON_CWMAX_DEFAULT 0 /* Default cwmax for ap beacon q */
711#define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) 699#define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
712 700
713/* beacon configuration */ 701/* beacon configuration */
@@ -724,30 +712,16 @@ struct ath_beacon_config {
724 } u; /* last received beacon/probe response timestamp of this BSS. */ 712 } u; /* last received beacon/probe response timestamp of this BSS. */
725}; 713};
726 714
727/* offsets in a beacon frame for
728 * quick acess of beacon content by low-level driver */
729struct ath_beacon_offset {
730 u8 *bo_tim; /* start of atim/dtim */
731};
732
733void ath9k_beacon_tasklet(unsigned long data); 715void ath9k_beacon_tasklet(unsigned long data);
734void ath_beacon_config(struct ath_softc *sc, int if_id); 716void ath_beacon_config(struct ath_softc *sc, int if_id);
735int ath_beaconq_setup(struct ath_hal *ah); 717int ath_beaconq_setup(struct ath_hal *ah);
736int ath_beacon_alloc(struct ath_softc *sc, int if_id); 718int ath_beacon_alloc(struct ath_softc *sc, int if_id);
737void ath_bstuck_process(struct ath_softc *sc); 719void ath_bstuck_process(struct ath_softc *sc);
738void ath_beacon_tasklet(struct ath_softc *sc, int *needmark);
739void ath_beacon_free(struct ath_softc *sc);
740void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp); 720void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp);
741void ath_beacon_sync(struct ath_softc *sc, int if_id); 721void ath_beacon_sync(struct ath_softc *sc, int if_id);
742void ath_update_beacon_info(struct ath_softc *sc, int avgbrssi);
743void ath_get_beaconconfig(struct ath_softc *sc, 722void ath_get_beaconconfig(struct ath_softc *sc,
744 int if_id, 723 int if_id,
745 struct ath_beacon_config *conf); 724 struct ath_beacon_config *conf);
746int ath_update_beacon(struct ath_softc *sc,
747 int if_id,
748 struct ath_beacon_offset *bo,
749 struct sk_buff *skb,
750 int mcast);
751/********/ 725/********/
752/* VAPs */ 726/* VAPs */
753/********/ 727/********/
@@ -774,10 +748,8 @@ struct ath_vap {
774 struct ieee80211_vif *av_if_data; 748 struct ieee80211_vif *av_if_data;
775 enum ath9k_opmode av_opmode; /* VAP operational mode */ 749 enum ath9k_opmode av_opmode; /* VAP operational mode */
776 struct ath_buf *av_bcbuf; /* beacon buffer */ 750 struct ath_buf *av_bcbuf; /* beacon buffer */
777 struct ath_beacon_offset av_boff; /* dynamic update state */
778 struct ath_tx_control av_btxctl; /* txctl information for beacon */ 751 struct ath_tx_control av_btxctl; /* txctl information for beacon */
779 int av_bslot; /* beacon slot index */ 752 int av_bslot; /* beacon slot index */
780 struct ath_txq av_mcastq; /* multicast transmit queue */
781 struct ath_vap_config av_config;/* vap configuration parameters*/ 753 struct ath_vap_config av_config;/* vap configuration parameters*/
782 struct ath_rate_node *rc_node; 754 struct ath_rate_node *rc_node;
783}; 755};
@@ -788,8 +760,7 @@ int ath_vap_attach(struct ath_softc *sc,
788 enum ath9k_opmode opmode); 760 enum ath9k_opmode opmode);
789int ath_vap_detach(struct ath_softc *sc, int if_id); 761int ath_vap_detach(struct ath_softc *sc, int if_id);
790int ath_vap_config(struct ath_softc *sc, 762int ath_vap_config(struct ath_softc *sc,
791 int if_id, struct ath_vap_config *if_config); 763 int if_id, struct ath_vap_config *if_config);
792int ath_vap_listen(struct ath_softc *sc, int if_id);
793 764
794/*********************/ 765/*********************/
795/* Antenna diversity */ 766/* Antenna diversity */
@@ -829,6 +800,58 @@ void ath_slow_ant_div(struct ath_antdiv *antdiv,
829 struct ath_rx_status *rx_stats); 800 struct ath_rx_status *rx_stats);
830void ath_setdefantenna(void *sc, u32 antenna); 801void ath_setdefantenna(void *sc, u32 antenna);
831 802
803/*******/
804/* ANI */
805/*******/
806
807/* ANI values for STA only.
808 FIXME: Add appropriate values for AP later */
809
810#define ATH_ANI_POLLINTERVAL 100 /* 100 milliseconds between ANI poll */
811#define ATH_SHORT_CALINTERVAL 1000 /* 1 second between calibrations */
812#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds between calibrations */
813#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes between calibrations */
814
815struct ath_ani {
816 bool sc_caldone;
817 int16_t sc_noise_floor;
818 unsigned int sc_longcal_timer;
819 unsigned int sc_shortcal_timer;
820 unsigned int sc_resetcal_timer;
821 unsigned int sc_checkani_timer;
822 struct timer_list timer;
823};
824
825/********************/
826/* LED Control */
827/********************/
828
829#define ATH_LED_PIN 1
830
831enum ath_led_type {
832 ATH_LED_RADIO,
833 ATH_LED_ASSOC,
834 ATH_LED_TX,
835 ATH_LED_RX
836};
837
838struct ath_led {
839 struct ath_softc *sc;
840 struct led_classdev led_cdev;
841 enum ath_led_type led_type;
842 char name[32];
843 bool registered;
844};
845
846/* Rfkill */
847#define ATH_RFKILL_POLL_INTERVAL 2000 /* msecs */
848
849struct ath_rfkill {
850 struct rfkill *rfkill;
851 struct delayed_work rfkill_poll;
852 char rfkill_name[32];
853};
854
832/********************/ 855/********************/
833/* Main driver core */ 856/* Main driver core */
834/********************/ 857/********************/
@@ -841,11 +864,7 @@ void ath_setdefantenna(void *sc, u32 antenna);
841#define ATH_DEFAULT_NOISE_FLOOR -95 864#define ATH_DEFAULT_NOISE_FLOOR -95
842#define ATH_REGCLASSIDS_MAX 10 865#define ATH_REGCLASSIDS_MAX 10
843#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 866#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
844#define ATH_PREAMBLE_SHORT (1<<0)
845#define ATH_PROTECT_ENABLE (1<<1)
846#define ATH_MAX_SW_RETRIES 10 867#define ATH_MAX_SW_RETRIES 10
847/* Num farmes difference in tx to flip default recv */
848#define ATH_ANTENNA_DIFF 2
849#define ATH_CHAN_MAX 255 868#define ATH_CHAN_MAX 255
850#define IEEE80211_WEP_NKID 4 /* number of key ids */ 869#define IEEE80211_WEP_NKID 4 /* number of key ids */
851#define IEEE80211_RATE_VAL 0x7f 870#define IEEE80211_RATE_VAL 0x7f
@@ -859,9 +878,7 @@ void ath_setdefantenna(void *sc, u32 antenna);
859 */ 878 */
860#define ATH_KEYMAX 128 /* max key cache size we handle */ 879#define ATH_KEYMAX 128 /* max key cache size we handle */
861 880
862#define RESET_RETRY_TXQ 0x00000001
863#define ATH_IF_ID_ANY 0xff 881#define ATH_IF_ID_ANY 0xff
864
865#define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 882#define ATH_TXPOWER_MAX 100 /* .5 dBm units */
866 883
867#define RSSI_LPF_THRESHOLD -20 884#define RSSI_LPF_THRESHOLD -20
@@ -907,60 +924,64 @@ struct ath_ht_info {
907 u8 ext_chan_offset; 924 u8 ext_chan_offset;
908}; 925};
909 926
927#define SC_OP_INVALID BIT(0)
928#define SC_OP_BEACONS BIT(1)
929#define SC_OP_RXAGGR BIT(2)
930#define SC_OP_TXAGGR BIT(3)
931#define SC_OP_CHAINMASK_UPDATE BIT(4)
932#define SC_OP_FULL_RESET BIT(5)
933#define SC_OP_NO_RESET BIT(6)
934#define SC_OP_PREAMBLE_SHORT BIT(7)
935#define SC_OP_PROTECT_ENABLE BIT(8)
936#define SC_OP_RXFLUSH BIT(9)
937#define SC_OP_LED_ASSOCIATED BIT(10)
938#define SC_OP_RFKILL_REGISTERED BIT(11)
939#define SC_OP_RFKILL_SW_BLOCKED BIT(12)
940#define SC_OP_RFKILL_HW_BLOCKED BIT(13)
941
910struct ath_softc { 942struct ath_softc {
911 struct ieee80211_hw *hw; 943 struct ieee80211_hw *hw;
912 struct pci_dev *pdev; 944 struct pci_dev *pdev;
913 void __iomem *mem;
914 struct tasklet_struct intr_tq; 945 struct tasklet_struct intr_tq;
915 struct tasklet_struct bcon_tasklet; 946 struct tasklet_struct bcon_tasklet;
916 struct ath_config sc_config; /* load-time parameters */ 947 struct ath_config sc_config;
917 int sc_debug;
918 struct ath_hal *sc_ah; 948 struct ath_hal *sc_ah;
919 struct ath_rate_softc *sc_rc; /* tx rate control support */ 949 struct ath_rate_softc *sc_rc;
950 void __iomem *mem;
951
952 u8 sc_curbssid[ETH_ALEN];
953 u8 sc_myaddr[ETH_ALEN];
954 u8 sc_bssidmask[ETH_ALEN];
955
956 int sc_debug;
920 u32 sc_intrstatus; 957 u32 sc_intrstatus;
921 enum ath9k_opmode sc_opmode; /* current operating mode */ 958 u32 sc_flags; /* SC_OP_* */
922 959 unsigned int rx_filter;
923 u8 sc_invalid; /* being detached */
924 u8 sc_beacons; /* beacons running */
925 u8 sc_scanning; /* scanning active */
926 u8 sc_txaggr; /* enable 11n tx aggregation */
927 u8 sc_rxaggr; /* enable 11n rx aggregation */
928 u8 sc_update_chainmask; /* change chain mask */
929 u8 sc_full_reset; /* force full reset */
930 enum wireless_mode sc_curmode; /* current phy mode */
931 u16 sc_curtxpow; 960 u16 sc_curtxpow;
932 u16 sc_curaid; 961 u16 sc_curaid;
933 u8 sc_curbssid[ETH_ALEN]; 962 u16 sc_cachelsz;
934 u8 sc_myaddr[ETH_ALEN]; 963 int sc_slotupdate; /* slot to next advance fsm */
964 int sc_slottime;
965 int sc_bslot[ATH_BCBUF];
966 u8 sc_tx_chainmask;
967 u8 sc_rx_chainmask;
968 enum ath9k_int sc_imask;
969 enum wireless_mode sc_curmode; /* current phy mode */
935 enum PROT_MODE sc_protmode; 970 enum PROT_MODE sc_protmode;
936 u8 sc_mcastantenna; 971
937 u8 sc_txantenna; /* data tx antenna (fixed or auto) */
938 u8 sc_nbcnvaps; /* # of vaps sending beacons */ 972 u8 sc_nbcnvaps; /* # of vaps sending beacons */
939 u16 sc_nvaps; /* # of active virtual ap's */ 973 u16 sc_nvaps; /* # of active virtual ap's */
940 struct ath_vap *sc_vaps[ATH_BCBUF]; 974 struct ath_vap *sc_vaps[ATH_BCBUF];
941 enum ath9k_int sc_imask; 975
942 u8 sc_bssidmask[ETH_ALEN]; 976 u8 sc_mcastantenna;
943 u8 sc_defant; /* current default antenna */ 977 u8 sc_defant; /* current default antenna */
944 u8 sc_rxotherant; /* rx's on non-default antenna */ 978 u8 sc_rxotherant; /* rx's on non-default antenna */
945 u16 sc_cachelsz; 979
946 int sc_slotupdate; /* slot to next advance fsm */
947 int sc_slottime;
948 u8 sc_noreset;
949 int sc_bslot[ATH_BCBUF];
950 struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */ 980 struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */
951 struct list_head node_list; 981 struct list_head node_list;
952 struct ath_ht_info sc_ht_info; 982 struct ath_ht_info sc_ht_info;
953 int16_t sc_noise_floor; /* signal noise floor in dBm */
954 enum ath9k_ht_extprotspacing sc_ht_extprotspacing; 983 enum ath9k_ht_extprotspacing sc_ht_extprotspacing;
955 u8 sc_tx_chainmask; 984
956 u8 sc_rx_chainmask;
957 u8 sc_rxchaindetect_ref;
958 u8 sc_rxchaindetect_thresh5GHz;
959 u8 sc_rxchaindetect_thresh2GHz;
960 u8 sc_rxchaindetect_delta5GHz;
961 u8 sc_rxchaindetect_delta2GHz;
962 u32 sc_rtsaggrlimit; /* Chipset specific aggr limit */
963 u32 sc_flags;
964#ifdef CONFIG_SLOW_ANT_DIV 985#ifdef CONFIG_SLOW_ANT_DIV
965 struct ath_antdiv sc_antdiv; 986 struct ath_antdiv sc_antdiv;
966#endif 987#endif
@@ -974,15 +995,12 @@ struct ath_softc {
974 u32 sc_keymax; /* size of key cache */ 995 u32 sc_keymax; /* size of key cache */
975 DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */ 996 DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */
976 u8 sc_splitmic; /* split TKIP MIC keys */ 997 u8 sc_splitmic; /* split TKIP MIC keys */
977 int sc_keytype;
978 998
979 /* RX */ 999 /* RX */
980 struct list_head sc_rxbuf; 1000 struct list_head sc_rxbuf;
981 struct ath_descdma sc_rxdma; 1001 struct ath_descdma sc_rxdma;
982 int sc_rxbufsize; /* rx size based on mtu */ 1002 int sc_rxbufsize; /* rx size based on mtu */
983 u32 *sc_rxlink; /* link ptr in last RX desc */ 1003 u32 *sc_rxlink; /* link ptr in last RX desc */
984 u32 sc_rxflush; /* rx flush in progress */
985 u64 sc_lastrx; /* tsf of last rx'd frame */
986 1004
987 /* TX */ 1005 /* TX */
988 struct list_head sc_txbuf; 1006 struct list_head sc_txbuf;
@@ -991,7 +1009,6 @@ struct ath_softc {
991 u32 sc_txqsetup; 1009 u32 sc_txqsetup;
992 u32 sc_txintrperiod; /* tx interrupt batching */ 1010 u32 sc_txintrperiod; /* tx interrupt batching */
993 int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */ 1011 int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */
994 u32 sc_ant_tx[8]; /* recent tx frames/antenna */
995 u16 seq_no; /* TX sequence number */ 1012 u16 seq_no; /* TX sequence number */
996 1013
997 /* Beacon */ 1014 /* Beacon */
@@ -1002,6 +1019,7 @@ struct ath_softc {
1002 u32 sc_bhalq; 1019 u32 sc_bhalq;
1003 u32 sc_bmisscount; 1020 u32 sc_bmisscount;
1004 u32 ast_be_xmit; /* beacons transmitted */ 1021 u32 ast_be_xmit; /* beacons transmitted */
1022 u64 bc_tstamp;
1005 1023
1006 /* Rate */ 1024 /* Rate */
1007 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; 1025 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
@@ -1016,7 +1034,6 @@ struct ath_softc {
1016 /* Channel, Band */ 1034 /* Channel, Band */
1017 struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX]; 1035 struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX];
1018 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 1036 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
1019 struct ath9k_channel sc_curchan;
1020 1037
1021 /* Locks */ 1038 /* Locks */
1022 spinlock_t sc_rxflushlock; 1039 spinlock_t sc_rxflushlock;
@@ -1024,6 +1041,18 @@ struct ath_softc {
1024 spinlock_t sc_txbuflock; 1041 spinlock_t sc_txbuflock;
1025 spinlock_t sc_resetlock; 1042 spinlock_t sc_resetlock;
1026 spinlock_t node_lock; 1043 spinlock_t node_lock;
1044
1045 /* LEDs */
1046 struct ath_led radio_led;
1047 struct ath_led assoc_led;
1048 struct ath_led tx_led;
1049 struct ath_led rx_led;
1050
1051 /* Rfkill */
1052 struct ath_rfkill rf_kill;
1053
1054 /* ANI */
1055 struct ath_ani sc_ani;
1027}; 1056};
1028 1057
1029int ath_init(u16 devid, struct ath_softc *sc); 1058int ath_init(u16 devid, struct ath_softc *sc);
@@ -1031,14 +1060,8 @@ void ath_deinit(struct ath_softc *sc);
1031int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan); 1060int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan);
1032int ath_suspend(struct ath_softc *sc); 1061int ath_suspend(struct ath_softc *sc);
1033irqreturn_t ath_isr(int irq, void *dev); 1062irqreturn_t ath_isr(int irq, void *dev);
1034int ath_reset(struct ath_softc *sc); 1063int ath_reset(struct ath_softc *sc, bool retry_tx);
1035void ath_scan_start(struct ath_softc *sc);
1036void ath_scan_end(struct ath_softc *sc);
1037int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan); 1064int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan);
1038void ath_setup_rate(struct ath_softc *sc,
1039 enum wireless_mode wMode,
1040 enum RATE_TYPE type,
1041 const struct ath9k_rate_table *rt);
1042 1065
1043/*********************/ 1066/*********************/
1044/* Utility Functions */ 1067/* Utility Functions */
@@ -1057,17 +1080,5 @@ int ath_cabq_update(struct ath_softc *);
1057void ath_get_currentCountry(struct ath_softc *sc, 1080void ath_get_currentCountry(struct ath_softc *sc,
1058 struct ath9k_country_entry *ctry); 1081 struct ath9k_country_entry *ctry);
1059u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp); 1082u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp);
1060void ath_internal_reset(struct ath_softc *sc);
1061u32 ath_chan2flags(struct ieee80211_channel *chan, struct ath_softc *sc);
1062dma_addr_t ath_skb_map_single(struct ath_softc *sc,
1063 struct sk_buff *skb,
1064 int direction,
1065 dma_addr_t *pa);
1066void ath_skb_unmap_single(struct ath_softc *sc,
1067 struct sk_buff *skb,
1068 int direction,
1069 dma_addr_t *pa);
1070void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]);
1071enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc);
1072 1083
1073#endif /* CORE_H */ 1084#endif /* CORE_H */