diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 0b2ff98b6f3..25ed65ac992 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -565,7 +565,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
565 | ath9k_hw_init_cal_settings(ah); | 565 | ath9k_hw_init_cal_settings(ah); |
566 | 566 | ||
567 | ah->ani_function = ATH9K_ANI_ALL; | 567 | ah->ani_function = ATH9K_ANI_ALL; |
568 | if (AR_SREV_9280_10_OR_LATER(ah) && !AR_SREV_9300_20_OR_LATER(ah)) | 568 | if (AR_SREV_9280_20_OR_LATER(ah) && !AR_SREV_9300_20_OR_LATER(ah)) |
569 | ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL; | 569 | ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL; |
570 | if (!AR_SREV_9300_20_OR_LATER(ah)) | 570 | if (!AR_SREV_9300_20_OR_LATER(ah)) |
571 | ah->ani_function &= ~ATH9K_ANI_MRC_CCK; | 571 | ah->ani_function &= ~ATH9K_ANI_MRC_CCK; |
@@ -1190,7 +1190,7 @@ bool ath9k_hw_check_alive(struct ath_hw *ah) | |||
1190 | int count = 50; | 1190 | int count = 50; |
1191 | u32 reg; | 1191 | u32 reg; |
1192 | 1192 | ||
1193 | if (AR_SREV_9285_10_OR_LATER(ah)) | 1193 | if (AR_SREV_9285_12_OR_LATER(ah)) |
1194 | return true; | 1194 | return true; |
1195 | 1195 | ||
1196 | do { | 1196 | do { |
@@ -1312,7 +1312,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1312 | if (tsf) | 1312 | if (tsf) |
1313 | ath9k_hw_settsf64(ah, tsf); | 1313 | ath9k_hw_settsf64(ah, tsf); |
1314 | 1314 | ||
1315 | if (AR_SREV_9280_10_OR_LATER(ah)) | 1315 | if (AR_SREV_9280_20_OR_LATER(ah)) |
1316 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); | 1316 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); |
1317 | 1317 | ||
1318 | if (!AR_SREV_9300_20_OR_LATER(ah)) | 1318 | if (!AR_SREV_9300_20_OR_LATER(ah)) |
@@ -1787,7 +1787,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1787 | regulatory->current_rd = eeval; | 1787 | regulatory->current_rd = eeval; |
1788 | 1788 | ||
1789 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1); | 1789 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1); |
1790 | if (AR_SREV_9285_10_OR_LATER(ah)) | 1790 | if (AR_SREV_9285_12_OR_LATER(ah)) |
1791 | eeval |= AR9285_RDEXT_DEFAULT; | 1791 | eeval |= AR9285_RDEXT_DEFAULT; |
1792 | regulatory->current_rd_ext = eeval; | 1792 | regulatory->current_rd_ext = eeval; |
1793 | 1793 | ||
@@ -1857,8 +1857,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1857 | /* Use rx_chainmask from EEPROM. */ | 1857 | /* Use rx_chainmask from EEPROM. */ |
1858 | pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK); | 1858 | pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK); |
1859 | 1859 | ||
1860 | if (!(AR_SREV_9280(ah) && (ah->hw_version.macRev == 0))) | 1860 | ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; |
1861 | ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; | ||
1862 | 1861 | ||
1863 | pCap->low_2ghz_chan = 2312; | 1862 | pCap->low_2ghz_chan = 2312; |
1864 | pCap->high_2ghz_chan = 2732; | 1863 | pCap->high_2ghz_chan = 2732; |
@@ -1894,9 +1893,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1894 | pCap->num_gpio_pins = AR9271_NUM_GPIO; | 1893 | pCap->num_gpio_pins = AR9271_NUM_GPIO; |
1895 | else if (AR_DEVID_7010(ah)) | 1894 | else if (AR_DEVID_7010(ah)) |
1896 | pCap->num_gpio_pins = AR7010_NUM_GPIO; | 1895 | pCap->num_gpio_pins = AR7010_NUM_GPIO; |
1897 | else if (AR_SREV_9285_10_OR_LATER(ah)) | 1896 | else if (AR_SREV_9285_12_OR_LATER(ah)) |
1898 | pCap->num_gpio_pins = AR9285_NUM_GPIO; | 1897 | pCap->num_gpio_pins = AR9285_NUM_GPIO; |
1899 | else if (AR_SREV_9280_10_OR_LATER(ah)) | 1898 | else if (AR_SREV_9280_20_OR_LATER(ah)) |
1900 | pCap->num_gpio_pins = AR928X_NUM_GPIO; | 1899 | pCap->num_gpio_pins = AR928X_NUM_GPIO; |
1901 | else | 1900 | else |
1902 | pCap->num_gpio_pins = AR_NUM_GPIO; | 1901 | pCap->num_gpio_pins = AR_NUM_GPIO; |
@@ -1953,7 +1952,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1953 | pCap->num_antcfg_2ghz = | 1952 | pCap->num_antcfg_2ghz = |
1954 | ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ); | 1953 | ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ); |
1955 | 1954 | ||
1956 | if (AR_SREV_9280_10_OR_LATER(ah) && | 1955 | if (AR_SREV_9280_20_OR_LATER(ah) && |
1957 | ath9k_hw_btcoex_supported(ah)) { | 1956 | ath9k_hw_btcoex_supported(ah)) { |
1958 | btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO; | 1957 | btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO; |
1959 | btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO; | 1958 | btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO; |
@@ -1990,7 +1989,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1990 | if (AR_SREV_9300_20_OR_LATER(ah)) | 1989 | if (AR_SREV_9300_20_OR_LATER(ah)) |
1991 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; | 1990 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; |
1992 | 1991 | ||
1993 | if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah)) | 1992 | if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah)) |
1994 | pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; | 1993 | pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; |
1995 | 1994 | ||
1996 | if (AR_SREV_9285(ah)) | 1995 | if (AR_SREV_9285(ah)) |
@@ -2074,11 +2073,11 @@ u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio) | |||
2074 | return MS_REG_READ(AR9300, gpio) != 0; | 2073 | return MS_REG_READ(AR9300, gpio) != 0; |
2075 | else if (AR_SREV_9271(ah)) | 2074 | else if (AR_SREV_9271(ah)) |
2076 | return MS_REG_READ(AR9271, gpio) != 0; | 2075 | return MS_REG_READ(AR9271, gpio) != 0; |
2077 | else if (AR_SREV_9287_10_OR_LATER(ah)) | 2076 | else if (AR_SREV_9287_11_OR_LATER(ah)) |
2078 | return MS_REG_READ(AR9287, gpio) != 0; | 2077 | return MS_REG_READ(AR9287, gpio) != 0; |
2079 | else if (AR_SREV_9285_10_OR_LATER(ah)) | 2078 | else if (AR_SREV_9285_12_OR_LATER(ah)) |
2080 | return MS_REG_READ(AR9285, gpio) != 0; | 2079 | return MS_REG_READ(AR9285, gpio) != 0; |
2081 | else if (AR_SREV_9280_10_OR_LATER(ah)) | 2080 | else if (AR_SREV_9280_20_OR_LATER(ah)) |
2082 | return MS_REG_READ(AR928X, gpio) != 0; | 2081 | return MS_REG_READ(AR928X, gpio) != 0; |
2083 | else | 2082 | else |
2084 | return MS_REG_READ(AR, gpio) != 0; | 2083 | return MS_REG_READ(AR, gpio) != 0; |
@@ -2575,7 +2574,7 @@ void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len) | |||
2575 | int used; | 2574 | int used; |
2576 | 2575 | ||
2577 | /* chipsets >= AR9280 are single-chip */ | 2576 | /* chipsets >= AR9280 are single-chip */ |
2578 | if (AR_SREV_9280_10_OR_LATER(ah)) { | 2577 | if (AR_SREV_9280_20_OR_LATER(ah)) { |
2579 | used = snprintf(hw_name, len, | 2578 | used = snprintf(hw_name, len, |
2580 | "Atheros AR%s Rev:%x", | 2579 | "Atheros AR%s Rev:%x", |
2581 | ath9k_hw_mac_bb_name(ah->hw_version.macVersion), | 2580 | ath9k_hw_mac_bb_name(ah->hw_version.macVersion), |