aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/tg3.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 2e733c60bfa..456ef2b3d0e 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -137,6 +137,7 @@
137#define ASIC_REV_5750 0x04 137#define ASIC_REV_5750 0x04
138#define ASIC_REV_5752 0x06 138#define ASIC_REV_5752 0x06
139#define ASIC_REV_5780 0x08 139#define ASIC_REV_5780 0x08
140#define ASIC_REV_5714 0x09
140#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 141#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
141#define CHIPREV_5700_AX 0x70 142#define CHIPREV_5700_AX 0x70
142#define CHIPREV_5700_BX 0x71 143#define CHIPREV_5700_BX 0x71
@@ -531,6 +532,8 @@
531#define MAC_SERDES_CFG_EDGE_SELECT 0x00001000 532#define MAC_SERDES_CFG_EDGE_SELECT 0x00001000
532#define MAC_SERDES_STAT 0x00000594 533#define MAC_SERDES_STAT 0x00000594
533/* 0x598 --> 0x5b0 unused */ 534/* 0x598 --> 0x5b0 unused */
535#define SERDES_RX_CTRL 0x000005b0 /* 5780/5714 only */
536#define SERDES_RX_SIG_DETECT 0x00000400
534#define SG_DIG_CTRL 0x000005b0 537#define SG_DIG_CTRL 0x000005b0
535#define SG_DIG_USING_HW_AUTONEG 0x80000000 538#define SG_DIG_USING_HW_AUTONEG 0x80000000
536#define SG_DIG_SOFT_RESET 0x40000000 539#define SG_DIG_SOFT_RESET 0x40000000
@@ -1329,6 +1332,8 @@
1329#define GRC_LCLCTRL_CLEARINT 0x00000002 1332#define GRC_LCLCTRL_CLEARINT 0x00000002
1330#define GRC_LCLCTRL_SETINT 0x00000004 1333#define GRC_LCLCTRL_SETINT 0x00000004
1331#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008 1334#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
1335#define GRC_LCLCTRL_USE_SIG_DETECT 0x00000010 /* 5714/5780 only */
1336#define GRC_LCLCTRL_USE_EXT_SIG_DETECT 0x00000020 /* 5714/5780 only */
1332#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020 1337#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
1333#define GRC_LCLCTRL_GPIO_OE3 0x00000040 1338#define GRC_LCLCTRL_GPIO_OE3 0x00000040
1334#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080 1339#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080
@@ -2175,6 +2180,7 @@ struct tg3 {
2175 TG3_FLG2_MII_SERDES) 2180 TG3_FLG2_MII_SERDES)
2176#define TG3_FLG2_PARALLEL_DETECT 0x01000000 2181#define TG3_FLG2_PARALLEL_DETECT 0x01000000
2177#define TG3_FLG2_ICH_WORKAROUND 0x02000000 2182#define TG3_FLG2_ICH_WORKAROUND 0x02000000
2183#define TG3_FLG2_5780_CLASS 0x04000000
2178 2184
2179 u32 split_mode_max_reqs; 2185 u32 split_mode_max_reqs;
2180#define SPLIT_MODE_5704_MAX_REQ 3 2186#define SPLIT_MODE_5704_MAX_REQ 3
@@ -2222,6 +2228,7 @@ struct tg3 {
2222#define PHY_ID_BCM5705 0x600081a0 2228#define PHY_ID_BCM5705 0x600081a0
2223#define PHY_ID_BCM5750 0x60008180 2229#define PHY_ID_BCM5750 0x60008180
2224#define PHY_ID_BCM5752 0x60008100 2230#define PHY_ID_BCM5752 0x60008100
2231#define PHY_ID_BCM5714 0x60008340
2225#define PHY_ID_BCM5780 0x60008350 2232#define PHY_ID_BCM5780 0x60008350
2226#define PHY_ID_BCM8002 0x60010140 2233#define PHY_ID_BCM8002 0x60010140
2227#define PHY_ID_INVALID 0xffffffff 2234#define PHY_ID_INVALID 0xffffffff
@@ -2246,8 +2253,8 @@ struct tg3 {
2246 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \ 2253 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
2247 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \ 2254 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
2248 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \ 2255 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
2249 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5780 || \ 2256 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2250 (X) == PHY_ID_BCM8002) 2257 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002)
2251 2258
2252 struct tg3_hw_stats *hw_stats; 2259 struct tg3_hw_stats *hw_stats;
2253 dma_addr_t stats_mapping; 2260 dma_addr_t stats_mapping;