diff options
Diffstat (limited to 'drivers/mtd/nand/autcpu12.c')
-rw-r--r-- | drivers/mtd/nand/autcpu12.c | 125 |
1 files changed, 71 insertions, 54 deletions
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c index a3c7fea404d..fe94ae9ae1f 100644 --- a/drivers/mtd/nand/autcpu12.c +++ b/drivers/mtd/nand/autcpu12.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de> | 4 | * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de> |
5 | * | 5 | * |
6 | * Derived from drivers/mtd/spia.c | 6 | * Derived from drivers/mtd/spia.c |
7 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) | 7 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
8 | * | 8 | * |
9 | * $Id: autcpu12.c,v 1.23 2005/11/07 11:14:30 gleixner Exp $ | 9 | * $Id: autcpu12.c,v 1.23 2005/11/07 11:14:30 gleixner Exp $ |
10 | * | 10 | * |
@@ -42,12 +42,7 @@ | |||
42 | * MTD structure for AUTCPU12 board | 42 | * MTD structure for AUTCPU12 board |
43 | */ | 43 | */ |
44 | static struct mtd_info *autcpu12_mtd = NULL; | 44 | static struct mtd_info *autcpu12_mtd = NULL; |
45 | 45 | static void __iomem *autcpu12_fio_base; | |
46 | static int autcpu12_io_base = CS89712_VIRT_BASE; | ||
47 | static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC; | ||
48 | static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET; | ||
49 | static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET; | ||
50 | static void __iomem * autcpu12_fio_base; | ||
51 | 46 | ||
52 | /* | 47 | /* |
53 | * Define partitions for flash devices | 48 | * Define partitions for flash devices |
@@ -94,108 +89,131 @@ static struct mtd_partition partition_info128k[] = { | |||
94 | #define NUM_PARTITIONS128K 2 | 89 | #define NUM_PARTITIONS128K 2 |
95 | /* | 90 | /* |
96 | * hardware specific access to control-lines | 91 | * hardware specific access to control-lines |
97 | */ | 92 | * |
98 | static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd) | 93 | * ALE bit 4 autcpu12_pedr |
94 | * CLE bit 5 autcpu12_pedr | ||
95 | * NCE bit 0 fio_ctrl | ||
96 | * | ||
97 | */ | ||
98 | static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd, | ||
99 | unsigned int ctrl) | ||
99 | { | 100 | { |
101 | struct nand_chip *chip = mtd->priv; | ||
100 | 102 | ||
101 | switch(cmd){ | 103 | if (ctrl & NAND_CTRL_CHANGE) { |
102 | 104 | void __iomem *addr | |
103 | case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_CLE; break; | 105 | unsigned char bits; |
104 | case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break; | ||
105 | 106 | ||
106 | case NAND_CTL_SETALE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_ALE; break; | 107 | addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET; |
107 | case NAND_CTL_CLRALE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_ALE; break; | 108 | bits = (ctrl & NAND_CLE) << 4; |
109 | bits |= (ctrl & NAND_ALE) << 2; | ||
110 | writeb((readb(addr) & ~0x30) | bits, addr); | ||
108 | 111 | ||
109 | case NAND_CTL_SETNCE: (*(volatile unsigned char *) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x01; break; | 112 | addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET; |
110 | case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (autcpu12_fio_base + autcpu12_fio_ctrl)) = 0x00; break; | 113 | writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr); |
111 | } | 114 | } |
115 | |||
116 | if (cmd != NAND_CMD_NONE) | ||
117 | writeb(cmd, chip->IO_ADDR_W); | ||
112 | } | 118 | } |
113 | 119 | ||
114 | /* | 120 | /* |
115 | * read device ready pin | 121 | * read device ready pin |
116 | */ | 122 | */ |
117 | int autcpu12_device_ready(struct mtd_info *mtd) | 123 | int autcpu12_device_ready(struct mtd_info *mtd) |
118 | { | 124 | { |
125 | void __iomem *addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET; | ||
119 | 126 | ||
120 | return ( (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0; | 127 | return readb(addr) & AUTCPU12_SMC_RDY; |
121 | |||
122 | } | 128 | } |
123 | 129 | ||
124 | /* | 130 | /* |
125 | * Main initialization routine | 131 | * Main initialization routine |
126 | */ | 132 | */ |
127 | int __init autcpu12_init (void) | 133 | static int __init autcpu12_init(void) |
128 | { | 134 | { |
129 | struct nand_chip *this; | 135 | struct nand_chip *this; |
130 | int err = 0; | 136 | int err = 0; |
131 | 137 | ||
132 | /* Allocate memory for MTD device structure and private data */ | 138 | /* Allocate memory for MTD device structure and private data */ |
133 | autcpu12_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), | 139 | autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), |
134 | GFP_KERNEL); | 140 | GFP_KERNEL); |
135 | if (!autcpu12_mtd) { | 141 | if (!autcpu12_mtd) { |
136 | printk ("Unable to allocate AUTCPU12 NAND MTD device structure.\n"); | 142 | printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n"); |
137 | err = -ENOMEM; | 143 | err = -ENOMEM; |
138 | goto out; | 144 | goto out; |
139 | } | 145 | } |
140 | 146 | ||
141 | /* map physical adress */ | 147 | /* map physical adress */ |
142 | autcpu12_fio_base = ioremap(autcpu12_fio_pbase,SZ_1K); | 148 | autcpu12_fio_base = ioremap(AUTCPU12_PHYS_SMC, SZ_1K); |
143 | if(!autcpu12_fio_base){ | 149 | if (!autcpu12_fio_base) { |
144 | printk("Ioremap autcpu12 SmartMedia Card failed\n"); | 150 | printk("Ioremap autcpu12 SmartMedia Card failed\n"); |
145 | err = -EIO; | 151 | err = -EIO; |
146 | goto out_mtd; | 152 | goto out_mtd; |
147 | } | 153 | } |
148 | 154 | ||
149 | /* Get pointer to private data */ | 155 | /* Get pointer to private data */ |
150 | this = (struct nand_chip *) (&autcpu12_mtd[1]); | 156 | this = (struct nand_chip *)(&autcpu12_mtd[1]); |
151 | 157 | ||
152 | /* Initialize structures */ | 158 | /* Initialize structures */ |
153 | memset((char *) autcpu12_mtd, 0, sizeof(struct mtd_info)); | 159 | memset(autcpu12_mtd, 0, sizeof(struct mtd_info)); |
154 | memset((char *) this, 0, sizeof(struct nand_chip)); | 160 | memset(this, 0, sizeof(struct nand_chip)); |
155 | 161 | ||
156 | /* Link the private data with the MTD structure */ | 162 | /* Link the private data with the MTD structure */ |
157 | autcpu12_mtd->priv = this; | 163 | autcpu12_mtd->priv = this; |
164 | autcpu12_mtd->owner = THIS_MODULE; | ||
158 | 165 | ||
159 | /* Set address of NAND IO lines */ | 166 | /* Set address of NAND IO lines */ |
160 | this->IO_ADDR_R = autcpu12_fio_base; | 167 | this->IO_ADDR_R = autcpu12_fio_base; |
161 | this->IO_ADDR_W = autcpu12_fio_base; | 168 | this->IO_ADDR_W = autcpu12_fio_base; |
162 | this->hwcontrol = autcpu12_hwcontrol; | 169 | this->cmd_ctrl = autcpu12_hwcontrol; |
163 | this->dev_ready = autcpu12_device_ready; | 170 | this->dev_ready = autcpu12_device_ready; |
164 | /* 20 us command delay time */ | 171 | /* 20 us command delay time */ |
165 | this->chip_delay = 20; | 172 | this->chip_delay = 20; |
166 | this->eccmode = NAND_ECC_SOFT; | 173 | this->ecc.mode = NAND_ECC_SOFT; |
167 | 174 | ||
168 | /* Enable the following for a flash based bad block table */ | 175 | /* Enable the following for a flash based bad block table */ |
169 | /* | 176 | /* |
170 | this->options = NAND_USE_FLASH_BBT; | 177 | this->options = NAND_USE_FLASH_BBT; |
171 | */ | 178 | */ |
172 | this->options = NAND_USE_FLASH_BBT; | 179 | this->options = NAND_USE_FLASH_BBT; |
173 | 180 | ||
174 | /* Scan to find existance of the device */ | 181 | /* Scan to find existance of the device */ |
175 | if (nand_scan (autcpu12_mtd, 1)) { | 182 | if (nand_scan(autcpu12_mtd, 1)) { |
176 | err = -ENXIO; | 183 | err = -ENXIO; |
177 | goto out_ior; | 184 | goto out_ior; |
178 | } | 185 | } |
179 | 186 | ||
180 | /* Register the partitions */ | 187 | /* Register the partitions */ |
181 | switch(autcpu12_mtd->size){ | 188 | switch (autcpu12_mtd->size) { |
182 | case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break; | 189 | case SZ_16M: |
183 | case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break; | 190 | add_mtd_partitions(autcpu12_mtd, partition_info16k, |
184 | case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break; | 191 | NUM_PARTITIONS16K); |
185 | case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break; | 192 | break; |
186 | default: { | 193 | case SZ_32M: |
187 | printk ("Unsupported SmartMedia device\n"); | 194 | add_mtd_partitions(autcpu12_mtd, partition_info32k, |
195 | NUM_PARTITIONS32K); | ||
196 | break; | ||
197 | case SZ_64M: | ||
198 | add_mtd_partitions(autcpu12_mtd, partition_info64k, | ||
199 | NUM_PARTITIONS64K); | ||
200 | break; | ||
201 | case SZ_128M: | ||
202 | add_mtd_partitions(autcpu12_mtd, partition_info128k, | ||
203 | NUM_PARTITIONS128K); | ||
204 | break; | ||
205 | default: | ||
206 | printk("Unsupported SmartMedia device\n"); | ||
188 | err = -ENXIO; | 207 | err = -ENXIO; |
189 | goto out_ior; | 208 | goto out_ior; |
190 | } | ||
191 | } | 209 | } |
192 | goto out; | 210 | goto out; |
193 | 211 | ||
194 | out_ior: | 212 | out_ior: |
195 | iounmap((void *)autcpu12_fio_base); | 213 | iounmap(autcpu12_fio_base); |
196 | out_mtd: | 214 | out_mtd: |
197 | kfree (autcpu12_mtd); | 215 | kfree(autcpu12_mtd); |
198 | out: | 216 | out: |
199 | return err; | 217 | return err; |
200 | } | 218 | } |
201 | 219 | ||
@@ -204,20 +222,19 @@ module_init(autcpu12_init); | |||
204 | /* | 222 | /* |
205 | * Clean up routine | 223 | * Clean up routine |
206 | */ | 224 | */ |
207 | #ifdef MODULE | 225 | static void __exit autcpu12_cleanup(void) |
208 | static void __exit autcpu12_cleanup (void) | ||
209 | { | 226 | { |
210 | /* Release resources, unregister device */ | 227 | /* Release resources, unregister device */ |
211 | nand_release (autcpu12_mtd); | 228 | nand_release(autcpu12_mtd); |
212 | 229 | ||
213 | /* unmap physical adress */ | 230 | /* unmap physical adress */ |
214 | iounmap((void *)autcpu12_fio_base); | 231 | iounmap(autcpu12_fio_base); |
215 | 232 | ||
216 | /* Free the MTD device structure */ | 233 | /* Free the MTD device structure */ |
217 | kfree (autcpu12_mtd); | 234 | kfree(autcpu12_mtd); |
218 | } | 235 | } |
236 | |||
219 | module_exit(autcpu12_cleanup); | 237 | module_exit(autcpu12_cleanup); |
220 | #endif | ||
221 | 238 | ||
222 | MODULE_LICENSE("GPL"); | 239 | MODULE_LICENSE("GPL"); |
223 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); | 240 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); |