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-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2d6039b4571..3bd85f7e390 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -150,8 +150,6 @@ static int init_ring_common(struct intel_ring_buffer *ring)
150 I915_WRITE_HEAD(ring, 0); 150 I915_WRITE_HEAD(ring, 0);
151 ring->write_tail(ring, 0); 151 ring->write_tail(ring, 0);
152 152
153 /* Initialize the ring. */
154 I915_WRITE_START(ring, obj->gtt_offset);
155 head = I915_READ_HEAD(ring) & HEAD_ADDR; 153 head = I915_READ_HEAD(ring) & HEAD_ADDR;
156 154
157 /* G45 ring initialization fails to reset head to zero */ 155 /* G45 ring initialization fails to reset head to zero */
@@ -177,6 +175,11 @@ static int init_ring_common(struct intel_ring_buffer *ring)
177 } 175 }
178 } 176 }
179 177
178 /* Initialize the ring. This must happen _after_ we've cleared the ring
179 * registers with the above sequence (the readback of the HEAD registers
180 * also enforces ordering), otherwise the hw might lose the new ring
181 * register values. */
182 I915_WRITE_START(ring, obj->gtt_offset);
180 I915_WRITE_CTL(ring, 183 I915_WRITE_CTL(ring,
181 ((ring->size - PAGE_SIZE) & RING_NR_PAGES) 184 ((ring->size - PAGE_SIZE) & RING_NR_PAGES)
182 | RING_REPORT_64K | RING_VALID); 185 | RING_REPORT_64K | RING_VALID);