8 files changed, 38 insertions, 10 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 98ea597bc76..86157b172c8 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2944,7 +2944,7 @@ restart_ih:
                         radeon_fence_process(rdev);
                         break;
                 case 233: /* GUI IDLE */
-                        DRM_DEBUG("IH: CP EOP\n");
+                        DRM_DEBUG("IH: GUI idle\n");
                         rdev->pm.gui_idle = true;
                         wake_up(&rdev->irq.idle_queue);
                         break;
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h
index 2fef9de7f36..686f9dc5d4b 100644
--- a/drivers/gpu/drm/radeon/r100_track.h
+++ b/drivers/gpu/drm/radeon/r100_track.h
@@ -63,7 +63,7 @@ struct r100_cs_track {
         unsigned                        num_arrays;
         unsigned                        max_indx;
         unsigned                        color_channel_mask;
-        struct r100_cs_track_array      arrays[11];
+        struct r100_cs_track_array      arrays[16];
         struct r100_cs_track_cb         cb[R300_MAX_CB];
         struct r100_cs_track_cb         zb;
         struct r100_cs_track_cb         aa;
@@ -146,6 +146,12 @@ static inline int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
         ib = p->ib->ptr;
         track = (struct r100_cs_track *)p->track;
         c = radeon_get_ib_value(p, idx++) & 0x1F;
+        if (c > 16) {
+            DRM_ERROR("Only 16 vertex buffers are allowed %d\n",
+                      pkt->opcode);
+            r100_cs_dump_packet(p, pkt);
+            return -EINVAL;
+        }
         track->num_arrays = c;
         for (i = 0; i < (c - 1); i+=2, idx+=3) {
                 r = r100_cs_packet_next_reloc(p, &reloc);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d74d4d71437..7dd45ca64e2 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3444,7 +3444,7 @@ restart_ih:
                         radeon_fence_process(rdev);
                         break;
                 case 233: /* GUI IDLE */
-                        DRM_DEBUG("IH: CP EOP\n");
+                        DRM_DEBUG("IH: GUI idle\n");
                         rdev->pm.gui_idle = true;
                         wake_up(&rdev->irq.idle_queue);
                         break;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ba643b57605..27f45579e64 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -165,6 +165,7 @@ struct radeon_clock {
         uint32_t default_sclk;
         uint32_t default_dispclk;
         uint32_t dp_extclk;
+        uint32_t max_pixel_clock;
 };
 
 /*
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 90dfb2b8cf0..fa62a503ae7 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
                 }
                 *dcpll = *p1pll;
 
+                rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);
+                if (rdev->clock.max_pixel_clock == 0)
+                        rdev->clock.max_pixel_clock = 40000;
+
                 return true;
         }
 
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index 5249af8931e..2d48e7a1474 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
         p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
         if (p1pll->reference_div < 2)
                 p1pll->reference_div = 12;
-        p2pll->reference_div = p1pll->reference_div;    
+        p2pll->reference_div = p1pll->reference_div;
 
         /* These aren't in the device-tree */
         if (rdev->family >= CHIP_R420) {
@@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                 p2pll->pll_out_min = 12500;
                 p2pll->pll_out_max = 35000;
         }
+        /* not sure what the max should be in all cases */
+        rdev->clock.max_pixel_clock = 35000;
 
         spll->reference_freq = mpll->reference_freq = p1pll->reference_freq;
         spll->reference_div = mpll->reference_div =
@@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
         else
                 rdev->clock.default_sclk =
                         radeon_legacy_get_engine_clock(rdev);
-                        
+
         val = of_get_property(dp, "ATY,MCLK", NULL);
         if (val && *val)
                 rdev->clock.default_mclk = (*val) / 10;
@@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                         radeon_legacy_get_memory_clock(rdev);
 
         DRM_INFO("Using device-tree clock info\n");
-        
+
         return true;
 }
 #else
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 5b991f7c6e2..797c8bcbb6a 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
                 rdev->clock.default_sclk = sclk;
                 rdev->clock.default_mclk = mclk;
 
+                if (RBIOS32(pll_info + 0x16))
+                        rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);
+                else
+                        rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */
+
                 return true;
         }
         return false;
@@ -1548,9 +1553,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
                            (rdev->pdev->subsystem_device == 0x4a48)) {
                         /* Mac X800 */
                         rdev->mode_info.connector_table = CT_MAC_X800;
-                } else if ((rdev->pdev->device == 0x4150) &&
-                           (rdev->pdev->subsystem_vendor == 0x1002) &&
-                           (rdev->pdev->subsystem_device == 0x4150)) {
+                } else if (of_machine_is_compatible("PowerMac7,2") ||
+                           of_machine_is_compatible("PowerMac7,3")) {
                         /* Mac G5 9600 */
                         rdev->mode_info.connector_table = CT_MAC_G5_9600;
                 } else
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index ee1dccb3fec..9c2929c7e79 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -626,8 +626,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
 static int radeon_vga_mode_valid(struct drm_connector *connector,
                                   struct drm_display_mode *mode)
 {
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
+
         /* XXX check mode bandwidth */
-        /* XXX verify against max DAC output frequency */
+
+        if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+                return MODE_CLOCK_HIGH;
+
         return MODE_OK;
 }
 
@@ -1015,6 +1021,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
                 } else
                         return MODE_CLOCK_HIGH;
         }
+
+        /* check against the max pixel clock */
+        if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+                return MODE_CLOCK_HIGH;
+
         return MODE_OK;
 }