diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 180 |
1 files changed, 3 insertions, 177 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index a6733cff1fb..2d07ccc03c4 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -321,10 +321,6 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
321 | case CHIP_RV380: | 321 | case CHIP_RV380: |
322 | rdev->asic = &r300_asic; | 322 | rdev->asic = &r300_asic; |
323 | if (rdev->flags & RADEON_IS_PCIE) { | 323 | if (rdev->flags & RADEON_IS_PCIE) { |
324 | rdev->asic->gart_init = &rv370_pcie_gart_init; | ||
325 | rdev->asic->gart_fini = &rv370_pcie_gart_fini; | ||
326 | rdev->asic->gart_enable = &rv370_pcie_gart_enable; | ||
327 | rdev->asic->gart_disable = &rv370_pcie_gart_disable; | ||
328 | rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush; | 324 | rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush; |
329 | rdev->asic->gart_set_page = &rv370_pcie_gart_set_page; | 325 | rdev->asic->gart_set_page = &rv370_pcie_gart_set_page; |
330 | } | 326 | } |
@@ -529,19 +525,11 @@ int radeon_device_init(struct radeon_device *rdev, | |||
529 | rdev->family == CHIP_R423) { | 525 | rdev->family == CHIP_R423) { |
530 | DRM_INFO("Forcing AGP to PCIE mode\n"); | 526 | DRM_INFO("Forcing AGP to PCIE mode\n"); |
531 | rdev->flags |= RADEON_IS_PCIE; | 527 | rdev->flags |= RADEON_IS_PCIE; |
532 | rdev->asic->gart_init = &rv370_pcie_gart_init; | ||
533 | rdev->asic->gart_fini = &rv370_pcie_gart_fini; | ||
534 | rdev->asic->gart_enable = &rv370_pcie_gart_enable; | ||
535 | rdev->asic->gart_disable = &rv370_pcie_gart_disable; | ||
536 | rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush; | 528 | rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush; |
537 | rdev->asic->gart_set_page = &rv370_pcie_gart_set_page; | 529 | rdev->asic->gart_set_page = &rv370_pcie_gart_set_page; |
538 | } else { | 530 | } else { |
539 | DRM_INFO("Forcing AGP to PCI mode\n"); | 531 | DRM_INFO("Forcing AGP to PCI mode\n"); |
540 | rdev->flags |= RADEON_IS_PCI; | 532 | rdev->flags |= RADEON_IS_PCI; |
541 | rdev->asic->gart_init = &r100_pci_gart_init; | ||
542 | rdev->asic->gart_fini = &r100_pci_gart_fini; | ||
543 | rdev->asic->gart_enable = &r100_pci_gart_enable; | ||
544 | rdev->asic->gart_disable = &r100_pci_gart_disable; | ||
545 | rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush; | 533 | rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush; |
546 | rdev->asic->gart_set_page = &r100_pci_gart_set_page; | 534 | rdev->asic->gart_set_page = &r100_pci_gart_set_page; |
547 | } | 535 | } |
@@ -576,105 +564,10 @@ int radeon_device_init(struct radeon_device *rdev, | |||
576 | DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); | 564 | DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); |
577 | DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); | 565 | DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); |
578 | 566 | ||
579 | rdev->new_init_path = false; | ||
580 | r = radeon_init(rdev); | 567 | r = radeon_init(rdev); |
581 | if (r) { | 568 | if (r) { |
582 | return r; | 569 | return r; |
583 | } | 570 | } |
584 | if (!rdev->new_init_path) { | ||
585 | /* Setup errata flags */ | ||
586 | radeon_errata(rdev); | ||
587 | /* Initialize scratch registers */ | ||
588 | radeon_scratch_init(rdev); | ||
589 | /* Initialize surface registers */ | ||
590 | radeon_surface_init(rdev); | ||
591 | |||
592 | /* TODO: disable VGA need to use VGA request */ | ||
593 | /* BIOS*/ | ||
594 | if (!radeon_get_bios(rdev)) { | ||
595 | if (ASIC_IS_AVIVO(rdev)) | ||
596 | return -EINVAL; | ||
597 | } | ||
598 | if (rdev->is_atom_bios) { | ||
599 | r = radeon_atombios_init(rdev); | ||
600 | if (r) { | ||
601 | return r; | ||
602 | } | ||
603 | } else { | ||
604 | r = radeon_combios_init(rdev); | ||
605 | if (r) { | ||
606 | return r; | ||
607 | } | ||
608 | } | ||
609 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | ||
610 | if (radeon_gpu_reset(rdev)) { | ||
611 | /* FIXME: what do we want to do here ? */ | ||
612 | } | ||
613 | /* check if cards are posted or not */ | ||
614 | if (!radeon_card_posted(rdev) && rdev->bios) { | ||
615 | DRM_INFO("GPU not posted. posting now...\n"); | ||
616 | if (rdev->is_atom_bios) { | ||
617 | atom_asic_init(rdev->mode_info.atom_context); | ||
618 | } else { | ||
619 | radeon_combios_asic_init(rdev->ddev); | ||
620 | } | ||
621 | } | ||
622 | /* Get clock & vram information */ | ||
623 | radeon_get_clock_info(rdev->ddev); | ||
624 | radeon_vram_info(rdev); | ||
625 | /* Initialize clocks */ | ||
626 | r = radeon_clocks_init(rdev); | ||
627 | if (r) { | ||
628 | return r; | ||
629 | } | ||
630 | |||
631 | /* Initialize memory controller (also test AGP) */ | ||
632 | r = radeon_mc_init(rdev); | ||
633 | if (r) { | ||
634 | return r; | ||
635 | } | ||
636 | /* Fence driver */ | ||
637 | r = radeon_fence_driver_init(rdev); | ||
638 | if (r) { | ||
639 | return r; | ||
640 | } | ||
641 | r = radeon_irq_kms_init(rdev); | ||
642 | if (r) { | ||
643 | return r; | ||
644 | } | ||
645 | /* Memory manager */ | ||
646 | r = radeon_object_init(rdev); | ||
647 | if (r) { | ||
648 | return r; | ||
649 | } | ||
650 | r = radeon_gpu_gart_init(rdev); | ||
651 | if (r) | ||
652 | return r; | ||
653 | /* Initialize GART (initialize after TTM so we can allocate | ||
654 | * memory through TTM but finalize after TTM) */ | ||
655 | r = radeon_gart_enable(rdev); | ||
656 | if (r) | ||
657 | return 0; | ||
658 | r = radeon_gem_init(rdev); | ||
659 | if (r) | ||
660 | return 0; | ||
661 | |||
662 | /* 1M ring buffer */ | ||
663 | r = radeon_cp_init(rdev, 1024 * 1024); | ||
664 | if (r) | ||
665 | return 0; | ||
666 | r = radeon_wb_init(rdev); | ||
667 | if (r) | ||
668 | DRM_ERROR("radeon: failled initializing WB (%d).\n", r); | ||
669 | r = radeon_ib_pool_init(rdev); | ||
670 | if (r) | ||
671 | return 0; | ||
672 | r = radeon_ib_test(rdev); | ||
673 | if (r) | ||
674 | return 0; | ||
675 | rdev->accel_working = true; | ||
676 | } | ||
677 | DRM_INFO("radeon: kernel modesetting successfully initialized.\n"); | ||
678 | if (radeon_testing) { | 571 | if (radeon_testing) { |
679 | radeon_test_moves(rdev); | 572 | radeon_test_moves(rdev); |
680 | } | 573 | } |
@@ -689,30 +582,7 @@ void radeon_device_fini(struct radeon_device *rdev) | |||
689 | DRM_INFO("radeon: finishing device.\n"); | 582 | DRM_INFO("radeon: finishing device.\n"); |
690 | rdev->shutdown = true; | 583 | rdev->shutdown = true; |
691 | /* Order matter so becarefull if you rearrange anythings */ | 584 | /* Order matter so becarefull if you rearrange anythings */ |
692 | if (!rdev->new_init_path) { | 585 | radeon_fini(rdev); |
693 | radeon_ib_pool_fini(rdev); | ||
694 | radeon_cp_fini(rdev); | ||
695 | radeon_wb_fini(rdev); | ||
696 | radeon_gpu_gart_fini(rdev); | ||
697 | radeon_gem_fini(rdev); | ||
698 | radeon_mc_fini(rdev); | ||
699 | #if __OS_HAS_AGP | ||
700 | radeon_agp_fini(rdev); | ||
701 | #endif | ||
702 | radeon_irq_kms_fini(rdev); | ||
703 | radeon_fence_driver_fini(rdev); | ||
704 | radeon_clocks_fini(rdev); | ||
705 | radeon_object_fini(rdev); | ||
706 | if (rdev->is_atom_bios) { | ||
707 | radeon_atombios_fini(rdev); | ||
708 | } else { | ||
709 | radeon_combios_fini(rdev); | ||
710 | } | ||
711 | kfree(rdev->bios); | ||
712 | rdev->bios = NULL; | ||
713 | } else { | ||
714 | radeon_fini(rdev); | ||
715 | } | ||
716 | iounmap(rdev->rmmio); | 586 | iounmap(rdev->rmmio); |
717 | rdev->rmmio = NULL; | 587 | rdev->rmmio = NULL; |
718 | } | 588 | } |
@@ -752,14 +622,7 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state) | |||
752 | 622 | ||
753 | radeon_save_bios_scratch_regs(rdev); | 623 | radeon_save_bios_scratch_regs(rdev); |
754 | 624 | ||
755 | if (!rdev->new_init_path) { | 625 | radeon_suspend(rdev); |
756 | radeon_cp_disable(rdev); | ||
757 | radeon_gart_disable(rdev); | ||
758 | rdev->irq.sw_int = false; | ||
759 | radeon_irq_set(rdev); | ||
760 | } else { | ||
761 | radeon_suspend(rdev); | ||
762 | } | ||
763 | /* evict remaining vram memory */ | 626 | /* evict remaining vram memory */ |
764 | radeon_object_evict_vram(rdev); | 627 | radeon_object_evict_vram(rdev); |
765 | 628 | ||
@@ -778,7 +641,6 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state) | |||
778 | int radeon_resume_kms(struct drm_device *dev) | 641 | int radeon_resume_kms(struct drm_device *dev) |
779 | { | 642 | { |
780 | struct radeon_device *rdev = dev->dev_private; | 643 | struct radeon_device *rdev = dev->dev_private; |
781 | int r; | ||
782 | 644 | ||
783 | acquire_console_sem(); | 645 | acquire_console_sem(); |
784 | pci_set_power_state(dev->pdev, PCI_D0); | 646 | pci_set_power_state(dev->pdev, PCI_D0); |
@@ -788,43 +650,7 @@ int radeon_resume_kms(struct drm_device *dev) | |||
788 | return -1; | 650 | return -1; |
789 | } | 651 | } |
790 | pci_set_master(dev->pdev); | 652 | pci_set_master(dev->pdev); |
791 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 653 | radeon_resume(rdev); |
792 | if (!rdev->new_init_path) { | ||
793 | if (radeon_gpu_reset(rdev)) { | ||
794 | /* FIXME: what do we want to do here ? */ | ||
795 | } | ||
796 | /* post card */ | ||
797 | if (rdev->is_atom_bios) { | ||
798 | atom_asic_init(rdev->mode_info.atom_context); | ||
799 | } else { | ||
800 | radeon_combios_asic_init(rdev->ddev); | ||
801 | } | ||
802 | /* Initialize clocks */ | ||
803 | r = radeon_clocks_init(rdev); | ||
804 | if (r) { | ||
805 | release_console_sem(); | ||
806 | return r; | ||
807 | } | ||
808 | /* Enable IRQ */ | ||
809 | rdev->irq.sw_int = true; | ||
810 | radeon_irq_set(rdev); | ||
811 | /* Initialize GPU Memory Controller */ | ||
812 | r = radeon_mc_init(rdev); | ||
813 | if (r) { | ||
814 | goto out; | ||
815 | } | ||
816 | r = radeon_gart_enable(rdev); | ||
817 | if (r) { | ||
818 | goto out; | ||
819 | } | ||
820 | r = radeon_cp_init(rdev, rdev->cp.ring_size); | ||
821 | if (r) { | ||
822 | goto out; | ||
823 | } | ||
824 | } else { | ||
825 | radeon_resume(rdev); | ||
826 | } | ||
827 | out: | ||
828 | radeon_restore_bios_scratch_regs(rdev); | 654 | radeon_restore_bios_scratch_regs(rdev); |
829 | fb_set_suspend(rdev->fbdev_info, 0); | 655 | fb_set_suspend(rdev->fbdev_info, 0); |
830 | release_console_sem(); | 656 | release_console_sem(); |