diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 58 |
1 files changed, 31 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index dba53d4b9fb..85785a8844e 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -171,10 +171,10 @@ void intel_enable_asle (struct drm_device *dev) | |||
171 | ironlake_enable_display_irq(dev_priv, DE_GSE); | 171 | ironlake_enable_display_irq(dev_priv, DE_GSE); |
172 | else { | 172 | else { |
173 | i915_enable_pipestat(dev_priv, 1, | 173 | i915_enable_pipestat(dev_priv, 1, |
174 | I915_LEGACY_BLC_EVENT_ENABLE); | 174 | PIPE_LEGACY_BLC_EVENT_ENABLE); |
175 | if (IS_I965G(dev)) | 175 | if (IS_I965G(dev)) |
176 | i915_enable_pipestat(dev_priv, 0, | 176 | i915_enable_pipestat(dev_priv, 0, |
177 | I915_LEGACY_BLC_EVENT_ENABLE); | 177 | PIPE_LEGACY_BLC_EVENT_ENABLE); |
178 | } | 178 | } |
179 | } | 179 | } |
180 | 180 | ||
@@ -842,7 +842,6 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
842 | u32 iir, new_iir; | 842 | u32 iir, new_iir; |
843 | u32 pipea_stats, pipeb_stats; | 843 | u32 pipea_stats, pipeb_stats; |
844 | u32 vblank_status; | 844 | u32 vblank_status; |
845 | u32 vblank_enable; | ||
846 | int vblank = 0; | 845 | int vblank = 0; |
847 | unsigned long irqflags; | 846 | unsigned long irqflags; |
848 | int irq_received; | 847 | int irq_received; |
@@ -856,13 +855,10 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
856 | 855 | ||
857 | iir = I915_READ(IIR); | 856 | iir = I915_READ(IIR); |
858 | 857 | ||
859 | if (IS_I965G(dev)) { | 858 | if (IS_I965G(dev)) |
860 | vblank_status = I915_START_VBLANK_INTERRUPT_STATUS; | 859 | vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS; |
861 | vblank_enable = PIPE_START_VBLANK_INTERRUPT_ENABLE; | 860 | else |
862 | } else { | 861 | vblank_status = PIPE_VBLANK_INTERRUPT_STATUS; |
863 | vblank_status = I915_VBLANK_INTERRUPT_STATUS; | ||
864 | vblank_enable = I915_VBLANK_INTERRUPT_ENABLE; | ||
865 | } | ||
866 | 862 | ||
867 | for (;;) { | 863 | for (;;) { |
868 | irq_received = iir != 0; | 864 | irq_received = iir != 0; |
@@ -966,8 +962,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
966 | intel_finish_page_flip(dev, 1); | 962 | intel_finish_page_flip(dev, 1); |
967 | } | 963 | } |
968 | 964 | ||
969 | if ((pipea_stats & I915_LEGACY_BLC_EVENT_STATUS) || | 965 | if ((pipea_stats & PIPE_LEGACY_BLC_EVENT_STATUS) || |
970 | (pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) || | 966 | (pipeb_stats & PIPE_LEGACY_BLC_EVENT_STATUS) || |
971 | (iir & I915_ASLE_INTERRUPT)) | 967 | (iir & I915_ASLE_INTERRUPT)) |
972 | opregion_asle_intr(dev); | 968 | opregion_asle_intr(dev); |
973 | 969 | ||
@@ -1233,16 +1229,21 @@ void i915_hangcheck_elapsed(unsigned long data) | |||
1233 | { | 1229 | { |
1234 | struct drm_device *dev = (struct drm_device *)data; | 1230 | struct drm_device *dev = (struct drm_device *)data; |
1235 | drm_i915_private_t *dev_priv = dev->dev_private; | 1231 | drm_i915_private_t *dev_priv = dev->dev_private; |
1236 | uint32_t acthd; | 1232 | uint32_t acthd, instdone, instdone1; |
1237 | 1233 | ||
1238 | /* No reset support on this chip yet. */ | 1234 | /* No reset support on this chip yet. */ |
1239 | if (IS_GEN6(dev)) | 1235 | if (IS_GEN6(dev)) |
1240 | return; | 1236 | return; |
1241 | 1237 | ||
1242 | if (!IS_I965G(dev)) | 1238 | if (!IS_I965G(dev)) { |
1243 | acthd = I915_READ(ACTHD); | 1239 | acthd = I915_READ(ACTHD); |
1244 | else | 1240 | instdone = I915_READ(INSTDONE); |
1241 | instdone1 = 0; | ||
1242 | } else { | ||
1245 | acthd = I915_READ(ACTHD_I965); | 1243 | acthd = I915_READ(ACTHD_I965); |
1244 | instdone = I915_READ(INSTDONE_I965); | ||
1245 | instdone1 = I915_READ(INSTDONE1); | ||
1246 | } | ||
1246 | 1247 | ||
1247 | /* If all work is done then ACTHD clearly hasn't advanced. */ | 1248 | /* If all work is done then ACTHD clearly hasn't advanced. */ |
1248 | if (list_empty(&dev_priv->render_ring.request_list) || | 1249 | if (list_empty(&dev_priv->render_ring.request_list) || |
@@ -1253,21 +1254,24 @@ void i915_hangcheck_elapsed(unsigned long data) | |||
1253 | return; | 1254 | return; |
1254 | } | 1255 | } |
1255 | 1256 | ||
1256 | if (dev_priv->last_acthd == acthd && dev_priv->hangcheck_count > 0) { | 1257 | if (dev_priv->last_acthd == acthd && |
1257 | DRM_ERROR("Hangcheck timer elapsed... GPU hung\n"); | 1258 | dev_priv->last_instdone == instdone && |
1258 | i915_handle_error(dev, true); | 1259 | dev_priv->last_instdone1 == instdone1) { |
1259 | return; | 1260 | if (dev_priv->hangcheck_count++ > 1) { |
1260 | } | 1261 | DRM_ERROR("Hangcheck timer elapsed... GPU hung\n"); |
1262 | i915_handle_error(dev, true); | ||
1263 | return; | ||
1264 | } | ||
1265 | } else { | ||
1266 | dev_priv->hangcheck_count = 0; | ||
1267 | |||
1268 | dev_priv->last_acthd = acthd; | ||
1269 | dev_priv->last_instdone = instdone; | ||
1270 | dev_priv->last_instdone1 = instdone1; | ||
1271 | } | ||
1261 | 1272 | ||
1262 | /* Reset timer case chip hangs without another request being added */ | 1273 | /* Reset timer case chip hangs without another request being added */ |
1263 | mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD); | 1274 | mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD); |
1264 | |||
1265 | if (acthd != dev_priv->last_acthd) | ||
1266 | dev_priv->hangcheck_count = 0; | ||
1267 | else | ||
1268 | dev_priv->hangcheck_count++; | ||
1269 | |||
1270 | dev_priv->last_acthd = acthd; | ||
1271 | } | 1275 | } |
1272 | 1276 | ||
1273 | /* drm_dma.h hooks | 1277 | /* drm_dma.h hooks |