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Diffstat (limited to 'drivers/ata/sata_nv.c')
-rw-r--r--drivers/ata/sata_nv.c68
1 files changed, 33 insertions, 35 deletions
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 240a8920d0b..2e0279fdd7a 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -163,7 +163,7 @@ enum {
163 NV_ADMA_STAT_STOPPED = (1 << 10), 163 NV_ADMA_STAT_STOPPED = (1 << 10),
164 NV_ADMA_STAT_DONE = (1 << 12), 164 NV_ADMA_STAT_DONE = (1 << 12),
165 NV_ADMA_STAT_ERR = NV_ADMA_STAT_CPBERR | 165 NV_ADMA_STAT_ERR = NV_ADMA_STAT_CPBERR |
166 NV_ADMA_STAT_TIMEOUT, 166 NV_ADMA_STAT_TIMEOUT,
167 167
168 /* port flags */ 168 /* port flags */
169 NV_ADMA_PORT_REGISTER_MODE = (1 << 0), 169 NV_ADMA_PORT_REGISTER_MODE = (1 << 0),
@@ -228,7 +228,7 @@ struct nv_adma_cpb {
228 u8 reserved1; /* 1 */ 228 u8 reserved1; /* 1 */
229 u8 ctl_flags; /* 2 */ 229 u8 ctl_flags; /* 2 */
230 /* len is length of taskfile in 64 bit words */ 230 /* len is length of taskfile in 64 bit words */
231 u8 len; /* 3 */ 231 u8 len; /* 3 */
232 u8 tag; /* 4 */ 232 u8 tag; /* 4 */
233 u8 next_cpb_idx; /* 5 */ 233 u8 next_cpb_idx; /* 5 */
234 __le16 reserved2; /* 6-7 */ 234 __le16 reserved2; /* 6-7 */
@@ -244,9 +244,9 @@ struct nv_adma_port_priv {
244 dma_addr_t cpb_dma; 244 dma_addr_t cpb_dma;
245 struct nv_adma_prd *aprd; 245 struct nv_adma_prd *aprd;
246 dma_addr_t aprd_dma; 246 dma_addr_t aprd_dma;
247 void __iomem * ctl_block; 247 void __iomem *ctl_block;
248 void __iomem * gen_block; 248 void __iomem *gen_block;
249 void __iomem * notifier_clear_block; 249 void __iomem *notifier_clear_block;
250 u8 flags; 250 u8 flags;
251 int last_issue_ncq; 251 int last_issue_ncq;
252}; 252};
@@ -293,7 +293,7 @@ struct nv_swncq_port_priv {
293 293
294#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT))))) 294#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT)))))
295 295
296static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 296static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
297#ifdef CONFIG_PM 297#ifdef CONFIG_PM
298static int nv_pci_device_resume(struct pci_dev *pdev); 298static int nv_pci_device_resume(struct pci_dev *pdev);
299#endif 299#endif
@@ -301,8 +301,8 @@ static void nv_ck804_host_stop(struct ata_host *host);
301static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); 301static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance);
302static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); 302static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance);
303static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); 303static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance);
304static int nv_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); 304static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
305static int nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 305static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
306 306
307static void nv_nf2_freeze(struct ata_port *ap); 307static void nv_nf2_freeze(struct ata_port *ap);
308static void nv_nf2_thaw(struct ata_port *ap); 308static void nv_nf2_thaw(struct ata_port *ap);
@@ -653,12 +653,12 @@ static void nv_adma_register_mode(struct ata_port *ap)
653 return; 653 return;
654 654
655 status = readw(mmio + NV_ADMA_STAT); 655 status = readw(mmio + NV_ADMA_STAT);
656 while(!(status & NV_ADMA_STAT_IDLE) && count < 20) { 656 while (!(status & NV_ADMA_STAT_IDLE) && count < 20) {
657 ndelay(50); 657 ndelay(50);
658 status = readw(mmio + NV_ADMA_STAT); 658 status = readw(mmio + NV_ADMA_STAT);
659 count++; 659 count++;
660 } 660 }
661 if(count == 20) 661 if (count == 20)
662 ata_port_printk(ap, KERN_WARNING, 662 ata_port_printk(ap, KERN_WARNING,
663 "timeout waiting for ADMA IDLE, stat=0x%hx\n", 663 "timeout waiting for ADMA IDLE, stat=0x%hx\n",
664 status); 664 status);
@@ -668,12 +668,12 @@ static void nv_adma_register_mode(struct ata_port *ap)
668 668
669 count = 0; 669 count = 0;
670 status = readw(mmio + NV_ADMA_STAT); 670 status = readw(mmio + NV_ADMA_STAT);
671 while(!(status & NV_ADMA_STAT_LEGACY) && count < 20) { 671 while (!(status & NV_ADMA_STAT_LEGACY) && count < 20) {
672 ndelay(50); 672 ndelay(50);
673 status = readw(mmio + NV_ADMA_STAT); 673 status = readw(mmio + NV_ADMA_STAT);
674 count++; 674 count++;
675 } 675 }
676 if(count == 20) 676 if (count == 20)
677 ata_port_printk(ap, KERN_WARNING, 677 ata_port_printk(ap, KERN_WARNING,
678 "timeout waiting for ADMA LEGACY, stat=0x%hx\n", 678 "timeout waiting for ADMA LEGACY, stat=0x%hx\n",
679 status); 679 status);
@@ -697,13 +697,13 @@ static void nv_adma_mode(struct ata_port *ap)
697 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); 697 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);
698 698
699 status = readw(mmio + NV_ADMA_STAT); 699 status = readw(mmio + NV_ADMA_STAT);
700 while(((status & NV_ADMA_STAT_LEGACY) || 700 while (((status & NV_ADMA_STAT_LEGACY) ||
701 !(status & NV_ADMA_STAT_IDLE)) && count < 20) { 701 !(status & NV_ADMA_STAT_IDLE)) && count < 20) {
702 ndelay(50); 702 ndelay(50);
703 status = readw(mmio + NV_ADMA_STAT); 703 status = readw(mmio + NV_ADMA_STAT);
704 count++; 704 count++;
705 } 705 }
706 if(count == 20) 706 if (count == 20)
707 ata_port_printk(ap, KERN_WARNING, 707 ata_port_printk(ap, KERN_WARNING,
708 "timeout waiting for ADMA LEGACY clear and IDLE, stat=0x%hx\n", 708 "timeout waiting for ADMA LEGACY clear and IDLE, stat=0x%hx\n",
709 status); 709 status);
@@ -747,8 +747,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
747 on the port. */ 747 on the port. */
748 adma_enable = 0; 748 adma_enable = 0;
749 nv_adma_register_mode(ap); 749 nv_adma_register_mode(ap);
750 } 750 } else {
751 else {
752 bounce_limit = *ap->dev->dma_mask; 751 bounce_limit = *ap->dev->dma_mask;
753 segment_boundary = NV_ADMA_DMA_BOUNDARY; 752 segment_boundary = NV_ADMA_DMA_BOUNDARY;
754 sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN; 753 sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN;
@@ -757,23 +756,22 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
757 756
758 pci_read_config_dword(pdev, NV_MCP_SATA_CFG_20, &current_reg); 757 pci_read_config_dword(pdev, NV_MCP_SATA_CFG_20, &current_reg);
759 758
760 if(ap->port_no == 1) 759 if (ap->port_no == 1)
761 config_mask = NV_MCP_SATA_CFG_20_PORT1_EN | 760 config_mask = NV_MCP_SATA_CFG_20_PORT1_EN |
762 NV_MCP_SATA_CFG_20_PORT1_PWB_EN; 761 NV_MCP_SATA_CFG_20_PORT1_PWB_EN;
763 else 762 else
764 config_mask = NV_MCP_SATA_CFG_20_PORT0_EN | 763 config_mask = NV_MCP_SATA_CFG_20_PORT0_EN |
765 NV_MCP_SATA_CFG_20_PORT0_PWB_EN; 764 NV_MCP_SATA_CFG_20_PORT0_PWB_EN;
766 765
767 if(adma_enable) { 766 if (adma_enable) {
768 new_reg = current_reg | config_mask; 767 new_reg = current_reg | config_mask;
769 pp->flags &= ~NV_ADMA_ATAPI_SETUP_COMPLETE; 768 pp->flags &= ~NV_ADMA_ATAPI_SETUP_COMPLETE;
770 } 769 } else {
771 else {
772 new_reg = current_reg & ~config_mask; 770 new_reg = current_reg & ~config_mask;
773 pp->flags |= NV_ADMA_ATAPI_SETUP_COMPLETE; 771 pp->flags |= NV_ADMA_ATAPI_SETUP_COMPLETE;
774 } 772 }
775 773
776 if(current_reg != new_reg) 774 if (current_reg != new_reg)
777 pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, new_reg); 775 pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, new_reg);
778 776
779 blk_queue_bounce_limit(sdev->request_queue, bounce_limit); 777 blk_queue_bounce_limit(sdev->request_queue, bounce_limit);
@@ -807,7 +805,7 @@ static unsigned int nv_adma_tf_to_cpb(struct ata_taskfile *tf, __le16 *cpb)
807{ 805{
808 unsigned int idx = 0; 806 unsigned int idx = 0;
809 807
810 if(tf->flags & ATA_TFLAG_ISADDR) { 808 if (tf->flags & ATA_TFLAG_ISADDR) {
811 if (tf->flags & ATA_TFLAG_LBA48) { 809 if (tf->flags & ATA_TFLAG_LBA48) {
812 cpb[idx++] = cpu_to_le16((ATA_REG_ERR << 8) | tf->hob_feature | WNB); 810 cpb[idx++] = cpu_to_le16((ATA_REG_ERR << 8) | tf->hob_feature | WNB);
813 cpb[idx++] = cpu_to_le16((ATA_REG_NSECT << 8) | tf->hob_nsect); 811 cpb[idx++] = cpu_to_le16((ATA_REG_NSECT << 8) | tf->hob_nsect);
@@ -824,12 +822,12 @@ static unsigned int nv_adma_tf_to_cpb(struct ata_taskfile *tf, __le16 *cpb)
824 cpb[idx++] = cpu_to_le16((ATA_REG_LBAH << 8) | tf->lbah); 822 cpb[idx++] = cpu_to_le16((ATA_REG_LBAH << 8) | tf->lbah);
825 } 823 }
826 824
827 if(tf->flags & ATA_TFLAG_DEVICE) 825 if (tf->flags & ATA_TFLAG_DEVICE)
828 cpb[idx++] = cpu_to_le16((ATA_REG_DEVICE << 8) | tf->device); 826 cpb[idx++] = cpu_to_le16((ATA_REG_DEVICE << 8) | tf->device);
829 827
830 cpb[idx++] = cpu_to_le16((ATA_REG_CMD << 8) | tf->command | CMDEND); 828 cpb[idx++] = cpu_to_le16((ATA_REG_CMD << 8) | tf->command | CMDEND);
831 829
832 while(idx < 12) 830 while (idx < 12)
833 cpb[idx++] = cpu_to_le16(IGN); 831 cpb[idx++] = cpu_to_le16(IGN);
834 832
835 return idx; 833 return idx;
@@ -850,7 +848,7 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
850 int freeze = 0; 848 int freeze = 0;
851 849
852 ata_ehi_clear_desc(ehi); 850 ata_ehi_clear_desc(ehi);
853 __ata_ehi_push_desc(ehi, "CPB resp_flags 0x%x: ", flags ); 851 __ata_ehi_push_desc(ehi, "CPB resp_flags 0x%x: ", flags);
854 if (flags & NV_CPB_RESP_ATA_ERR) { 852 if (flags & NV_CPB_RESP_ATA_ERR) {
855 ata_ehi_push_desc(ehi, "ATA error"); 853 ata_ehi_push_desc(ehi, "ATA error");
856 ehi->err_mask |= AC_ERR_DEV; 854 ehi->err_mask |= AC_ERR_DEV;
@@ -879,7 +877,7 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
879 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, cpb_num); 877 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, cpb_num);
880 VPRINTK("CPB flags done, flags=0x%x\n", flags); 878 VPRINTK("CPB flags done, flags=0x%x\n", flags);
881 if (likely(qc)) { 879 if (likely(qc)) {
882 DPRINTK("Completing qc from tag %d\n",cpb_num); 880 DPRINTK("Completing qc from tag %d\n", cpb_num);
883 ata_qc_complete(qc); 881 ata_qc_complete(qc);
884 } else { 882 } else {
885 struct ata_eh_info *ehi = &ap->link.eh_info; 883 struct ata_eh_info *ehi = &ap->link.eh_info;
@@ -952,7 +950,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
952 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE) { 950 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE) {
953 u8 irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804) 951 u8 irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804)
954 >> (NV_INT_PORT_SHIFT * i); 952 >> (NV_INT_PORT_SHIFT * i);
955 if(ata_tag_valid(ap->link.active_tag)) 953 if (ata_tag_valid(ap->link.active_tag))
956 /** NV_INT_DEV indication seems unreliable at times 954 /** NV_INT_DEV indication seems unreliable at times
957 at least in ADMA mode. Force it on always when a 955 at least in ADMA mode. Force it on always when a
958 command is active, to prevent losing interrupts. */ 956 command is active, to prevent losing interrupts. */
@@ -966,7 +964,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
966 964
967 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL); 965 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL);
968 966
969 if( !NV_ADMA_CHECK_INTR(gen_ctl, ap->port_no) && !notifier && 967 if (!NV_ADMA_CHECK_INTR(gen_ctl, ap->port_no) && !notifier &&
970 !notifier_error) 968 !notifier_error)
971 /* Nothing to do */ 969 /* Nothing to do */
972 continue; 970 continue;
@@ -990,7 +988,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
990 struct ata_eh_info *ehi = &ap->link.eh_info; 988 struct ata_eh_info *ehi = &ap->link.eh_info;
991 989
992 ata_ehi_clear_desc(ehi); 990 ata_ehi_clear_desc(ehi);
993 __ata_ehi_push_desc(ehi, "ADMA status 0x%08x: ", status ); 991 __ata_ehi_push_desc(ehi, "ADMA status 0x%08x: ", status);
994 if (status & NV_ADMA_STAT_TIMEOUT) { 992 if (status & NV_ADMA_STAT_TIMEOUT) {
995 ehi->err_mask |= AC_ERR_SYSTEM; 993 ehi->err_mask |= AC_ERR_SYSTEM;
996 ata_ehi_push_desc(ehi, "timeout"); 994 ata_ehi_push_desc(ehi, "timeout");
@@ -1056,14 +1054,14 @@ static void nv_adma_freeze(struct ata_port *ap)
1056 return; 1054 return;
1057 1055
1058 /* clear any outstanding CK804 notifications */ 1056 /* clear any outstanding CK804 notifications */
1059 writeb( NV_INT_ALL << (ap->port_no * NV_INT_PORT_SHIFT), 1057 writeb(NV_INT_ALL << (ap->port_no * NV_INT_PORT_SHIFT),
1060 ap->host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804); 1058 ap->host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804);
1061 1059
1062 /* Disable interrupt */ 1060 /* Disable interrupt */
1063 tmp = readw(mmio + NV_ADMA_CTL); 1061 tmp = readw(mmio + NV_ADMA_CTL);
1064 writew( tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), 1062 writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
1065 mmio + NV_ADMA_CTL); 1063 mmio + NV_ADMA_CTL);
1066 readw( mmio + NV_ADMA_CTL ); /* flush posted write */ 1064 readw(mmio + NV_ADMA_CTL ); /* flush posted write */
1067} 1065}
1068 1066
1069static void nv_adma_thaw(struct ata_port *ap) 1067static void nv_adma_thaw(struct ata_port *ap)
@@ -1079,9 +1077,9 @@ static void nv_adma_thaw(struct ata_port *ap)
1079 1077
1080 /* Enable interrupt */ 1078 /* Enable interrupt */
1081 tmp = readw(mmio + NV_ADMA_CTL); 1079 tmp = readw(mmio + NV_ADMA_CTL);
1082 writew( tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), 1080 writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
1083 mmio + NV_ADMA_CTL); 1081 mmio + NV_ADMA_CTL);
1084 readw( mmio + NV_ADMA_CTL ); /* flush posted write */ 1082 readw(mmio + NV_ADMA_CTL ); /* flush posted write */
1085} 1083}
1086 1084
1087static void nv_adma_irq_clear(struct ata_port *ap) 1085static void nv_adma_irq_clear(struct ata_port *ap)
@@ -1096,7 +1094,7 @@ static void nv_adma_irq_clear(struct ata_port *ap)
1096 } 1094 }
1097 1095
1098 /* clear any outstanding CK804 notifications */ 1096 /* clear any outstanding CK804 notifications */
1099 writeb( NV_INT_ALL << (ap->port_no * NV_INT_PORT_SHIFT), 1097 writeb(NV_INT_ALL << (ap->port_no * NV_INT_PORT_SHIFT),
1100 ap->host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804); 1098 ap->host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804);
1101 1099
1102 /* clear ADMA status */ 1100 /* clear ADMA status */