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path: root/drivers/ata/pata_atiixp.c
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Diffstat (limited to 'drivers/ata/pata_atiixp.c')
-rw-r--r--drivers/ata/pata_atiixp.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index bec0b8ade66..45915566e4e 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * pata_atiixp.c - ATI PATA for new ATA layer 2 * pata_atiixp.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2009 Bartlomiej Zolnierkiewicz
4 * 5 *
5 * Based on 6 * Based on
6 * 7 *
@@ -61,20 +62,19 @@ static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev,
61 62
62 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 63 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
63 int dn = 2 * ap->port_no + adev->devno; 64 int dn = 2 * ap->port_no + adev->devno;
64
65 /* Check this is correct - the order is odd in both drivers */
66 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); 65 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
67 u16 pio_mode_data, pio_timing_data; 66 u32 pio_timing_data;
67 u16 pio_mode_data;
68 68
69 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data); 69 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
70 pio_mode_data &= ~(0x7 << (4 * dn)); 70 pio_mode_data &= ~(0x7 << (4 * dn));
71 pio_mode_data |= pio << (4 * dn); 71 pio_mode_data |= pio << (4 * dn);
72 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data); 72 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
73 73
74 pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data); 74 pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
75 pio_timing_data &= ~(0xFF << timing_shift); 75 pio_timing_data &= ~(0xFF << timing_shift);
76 pio_timing_data |= (pio_timings[pio] << timing_shift); 76 pio_timing_data |= (pio_timings[pio] << timing_shift);
77 pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data); 77 pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
78} 78}
79 79
80/** 80/**
@@ -119,16 +119,17 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
119 udma_mode_data |= dma << (4 * dn); 119 udma_mode_data |= dma << (4 * dn);
120 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data); 120 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
121 } else { 121 } else {
122 u16 mwdma_timing_data;
123 /* Check this is correct - the order is odd in both drivers */
124 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); 122 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
123 u32 mwdma_timing_data;
125 124
126 dma -= XFER_MW_DMA_0; 125 dma -= XFER_MW_DMA_0;
127 126
128 pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data); 127 pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
128 &mwdma_timing_data);
129 mwdma_timing_data &= ~(0xFF << timing_shift); 129 mwdma_timing_data &= ~(0xFF << timing_shift);
130 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift); 130 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
131 pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data); 131 pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
132 mwdma_timing_data);
132 } 133 }
133 /* 134 /*
134 * We must now look at the PIO mode situation. We may need to 135 * We must now look at the PIO mode situation. We may need to