diff options
Diffstat (limited to 'arch/sparc64/kernel/itlb_miss.S')
| -rw-r--r-- | arch/sparc64/kernel/itlb_miss.S | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S deleted file mode 100644 index 5a8377b5495..00000000000 --- a/arch/sparc64/kernel/itlb_miss.S +++ /dev/null | |||
| @@ -1,39 +0,0 @@ | |||
| 1 | /* ITLB ** ICACHE line 1: Context 0 check and TSB load */ | ||
| 2 | ldxa [%g0] ASI_IMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer | ||
| 3 | ldxa [%g0] ASI_IMMU, %g6 ! Get TAG TARGET | ||
| 4 | srlx %g6, 48, %g5 ! Get context | ||
| 5 | sllx %g6, 22, %g6 ! Zero out context | ||
| 6 | brz,pn %g5, kvmap_itlb ! Context 0 processing | ||
| 7 | srlx %g6, 22, %g6 ! Delay slot | ||
| 8 | TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry | ||
| 9 | cmp %g4, %g6 ! Compare TAG | ||
| 10 | |||
| 11 | /* ITLB ** ICACHE line 2: TSB compare and TLB load */ | ||
| 12 | bne,pn %xcc, tsb_miss_itlb ! Miss | ||
| 13 | mov FAULT_CODE_ITLB, %g3 | ||
| 14 | sethi %hi(_PAGE_EXEC_4U), %g4 | ||
| 15 | andcc %g5, %g4, %g0 ! Executable? | ||
| 16 | be,pn %xcc, tsb_do_fault | ||
| 17 | nop ! Delay slot, fill me | ||
| 18 | stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB | ||
| 19 | retry ! Trap done | ||
| 20 | |||
| 21 | /* ITLB ** ICACHE line 3: */ | ||
| 22 | nop | ||
| 23 | nop | ||
| 24 | nop | ||
| 25 | nop | ||
| 26 | nop | ||
| 27 | nop | ||
| 28 | nop | ||
| 29 | nop | ||
| 30 | |||
| 31 | /* ITLB ** ICACHE line 4: */ | ||
| 32 | nop | ||
| 33 | nop | ||
| 34 | nop | ||
| 35 | nop | ||
| 36 | nop | ||
| 37 | nop | ||
| 38 | nop | ||
| 39 | nop | ||