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-rw-r--r--arch/sh/Kconfig36
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/Kconfig14
-rw-r--r--arch/sh/boards/board-ap325rxa.c6
-rw-r--r--arch/sh/boards/board-sh7785lcr.c18
-rw-r--r--arch/sh/boards/mach-ecovec24/Makefile9
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c516
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c116
-rw-r--r--arch/sh/boards/mach-migor/setup.c9
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c4
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c53
-rw-r--r--arch/sh/boot/compressed/head_32.S2
-rw-r--r--arch/sh/configs/ecovec24_defconfig1558
-rw-r--r--arch/sh/configs/kfr2r09-romimage_defconfig774
-rw-r--r--arch/sh/configs/kfr2r09_defconfig212
-rw-r--r--arch/sh/configs/snapgear_defconfig77
-rw-r--r--arch/sh/drivers/dma/Kconfig6
-rw-r--r--arch/sh/drivers/pci/pci.c4
-rw-r--r--arch/sh/include/asm/Kbuild2
-rw-r--r--arch/sh/include/asm/bug.h31
-rw-r--r--arch/sh/include/asm/cachectl.h19
-rw-r--r--arch/sh/include/asm/device.h16
-rw-r--r--arch/sh/include/asm/dwarf.h30
-rw-r--r--arch/sh/include/asm/entry-macros.S2
-rw-r--r--arch/sh/include/asm/ftrace.h1
-rw-r--r--arch/sh/include/asm/hwblk.h4
-rw-r--r--arch/sh/include/asm/io.h16
-rw-r--r--arch/sh/include/asm/pgtable_32.h8
-rw-r--r--arch/sh/include/asm/processor.h2
-rw-r--r--arch/sh/include/asm/system.h5
-rw-r--r--arch/sh/include/asm/system_32.h28
-rw-r--r--arch/sh/include/asm/unistd_32.h2
-rw-r--r--arch/sh/include/asm/unistd_64.h2
-rw-r--r--arch/sh/include/asm/unwinder.h6
-rw-r--r--arch/sh/include/asm/watchdog.h19
-rw-r--r--arch/sh/include/cpu-sh4/cpu/freq.h4
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7757.h243
-rw-r--r--arch/sh/include/mach-common/mach/sh7785lcr.h2
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt6
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/romimage.h13
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c1
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S4
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c11
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile3
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c130
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c2019
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c31
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c40
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c43
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c513
-rw-r--r--arch/sh/kernel/cpu/shmobile/Makefile1
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm_runtime.c303
-rw-r--r--arch/sh/kernel/dwarf.c283
-rw-r--r--arch/sh/kernel/entry-common.S5
-rw-r--r--arch/sh/kernel/ftrace.c2
-rw-r--r--arch/sh/kernel/io.c97
-rw-r--r--arch/sh/kernel/io_generic.c50
-rw-r--r--arch/sh/kernel/io_trapped.c3
-rw-r--r--arch/sh/kernel/irq.c6
-rw-r--r--arch/sh/kernel/kgdb.c2
-rw-r--r--arch/sh/kernel/process_32.c20
-rw-r--r--arch/sh/kernel/ptrace_32.c4
-rw-r--r--arch/sh/kernel/setup.c8
-rw-r--r--arch/sh/kernel/signal_32.c12
-rw-r--r--arch/sh/kernel/sys_sh.c43
-rw-r--r--arch/sh/kernel/syscalls_32.S2
-rw-r--r--arch/sh/kernel/syscalls_64.S2
-rw-r--r--arch/sh/kernel/traps.c24
-rw-r--r--arch/sh/kernel/traps_32.c196
-rw-r--r--arch/sh/kernel/unwinder.c16
-rw-r--r--arch/sh/lib/__clear_user.S2
-rw-r--r--arch/sh/lib/delay.c5
-rw-r--r--arch/sh/mm/Kconfig7
-rw-r--r--arch/sh/mm/cache-sh4.c74
-rw-r--r--arch/sh/mm/ioremap_32.c8
-rw-r--r--arch/sh/mm/tlb-sh4.c9
-rw-r--r--arch/sh/tools/mach-types2
81 files changed, 7542 insertions, 336 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index c4a955d2545..2f5352c06a0 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -219,6 +219,8 @@ config CPU_SHX3
219config ARCH_SHMOBILE 219config ARCH_SHMOBILE
220 bool 220 bool
221 select ARCH_SUSPEND_POSSIBLE 221 select ARCH_SUSPEND_POSSIBLE
222 select PM
223 select PM_RUNTIME
222 224
223if SUPERH32 225if SUPERH32
224 226
@@ -396,6 +398,13 @@ config CPU_SUBTYPE_SH7724
396 help 398 help
397 Select SH7724 if you have an SH-MobileR2R CPU. 399 Select SH7724 if you have an SH-MobileR2R CPU.
398 400
401config CPU_SUBTYPE_SH7757
402 bool "Support SH7757 processor"
403 select CPU_SH4A
404 select CPU_SHX2
405 help
406 Select SH7757 if you have a SH4A SH7757 CPU.
407
399config CPU_SUBTYPE_SH7763 408config CPU_SUBTYPE_SH7763
400 bool "Support SH7763 processor" 409 bool "Support SH7763 processor"
401 select CPU_SH4A 410 select CPU_SH4A
@@ -758,12 +767,31 @@ config UBC_WAKEUP
758 767
759 If unsure, say N. 768 If unsure, say N.
760 769
761config CMDLINE_BOOL 770choice
762 bool "Default bootloader kernel arguments" 771 prompt "Kernel command line"
772 optional
773 default CMDLINE_OVERWRITE
774 help
775 Setting this option allows the kernel command line arguments
776 to be set.
777
778config CMDLINE_OVERWRITE
779 bool "Overwrite bootloader kernel arguments"
780 help
781 Given string will overwrite any arguments passed in by
782 a bootloader.
783
784config CMDLINE_EXTEND
785 bool "Extend bootloader kernel arguments"
786 help
787 Given string will be concatenated with arguments passed in
788 by a bootloader.
789
790endchoice
763 791
764config CMDLINE 792config CMDLINE
765 string "Initial kernel command string" 793 string "Kernel command line arguments string"
766 depends on CMDLINE_BOOL 794 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
767 default "console=ttySC1,115200" 795 default "console=ttySC1,115200"
768 796
769endmenu 797endmenu
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 741d20fab2e..55907af1dc2 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -38,6 +38,7 @@ config EARLY_SCIF_CONSOLE_PORT
38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ 38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ 39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
40 CPU_SUBTYPE_SH7343 40 CPU_SUBTYPE_SH7343
41 default "0xfe4c0000" if CPU_SUBTYPE_SH7757
41 default "0xffeb0000" if CPU_SUBTYPE_SH7785 42 default "0xffeb0000" if CPU_SUBTYPE_SH7785
42 default "0xffeb0000" if CPU_SUBTYPE_SH7786 43 default "0xffeb0000" if CPU_SUBTYPE_SH7786
43 default "0xfffe8000" if CPU_SUBTYPE_SH7203 44 default "0xfffe8000" if CPU_SUBTYPE_SH7203
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index e26421bf997..fc51a918b31 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -137,6 +137,7 @@ machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
138machdir-$(CONFIG_SH_MIGOR) += mach-migor 138machdir-$(CONFIG_SH_MIGOR) += mach-migor
139machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09 139machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
140machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24
140machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 141machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
141machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto 142machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
142machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp 143machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index db04c85971a..ee5bb200c71 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -171,6 +171,13 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
171 DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, 171 DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
172 you can access all on-board device in 29bit address mode. 172 you can access all on-board device in 29bit address mode.
173 173
174config SH_SH7785LCR_PT
175 bool "SH7785LCR prototype board on 32-bit MMU mode"
176 depends on SH_SH7785LCR && 32BIT
177 default n
178 help
179 If you use prototype board, this option is enabled.
180
174config SH_URQUELL 181config SH_URQUELL
175 bool "Urquell" 182 bool "Urquell"
176 depends on CPU_SUBTYPE_SH7786 183 depends on CPU_SUBTYPE_SH7786
@@ -200,6 +207,13 @@ config SH_KFR2R09
200 help 207 help
201 "Kit For R2R for 2009" support. 208 "Kit For R2R for 2009" support.
202 209
210config SH_ECOVEC
211 bool "EcoVec"
212 depends on CPU_SUBTYPE_SH7724
213 select ARCH_REQUIRE_GPIOLIB
214 help
215 Renesas "R0P7724LC0011/21RL (EcoVec)" support.
216
203config SH_SH7763RDP 217config SH_SH7763RDP
204 bool "SH7763RDP" 218 bool "SH7763RDP"
205 depends on CPU_SUBTYPE_SH7763 219 depends on CPU_SUBTYPE_SH7763
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index b9c88cc519e..19eea4ab1cc 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -227,6 +227,9 @@ static struct platform_device lcdc_device = {
227 .dev = { 227 .dev = {
228 .platform_data = &lcdc_info, 228 .platform_data = &lcdc_info,
229 }, 229 },
230 .archdata = {
231 .hwblk_id = HWBLK_LCDC,
232 },
230}; 233};
231 234
232static void camera_power(int val) 235static void camera_power(int val)
@@ -377,6 +380,9 @@ static struct platform_device ceu_device = {
377 .dev = { 380 .dev = {
378 .platform_data = &sh_mobile_ceu_info, 381 .platform_data = &sh_mobile_ceu_info,
379 }, 382 },
383 .archdata = {
384 .hwblk_id = HWBLK_CEU,
385 },
380}; 386};
381 387
382struct spi_gpio_platform_data sdcard_cn3_platform_data = { 388struct spi_gpio_platform_data sdcard_cn3_platform_data = {
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 42410a15d25..726427c3522 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -223,6 +223,19 @@ static struct platform_device sm501_device = {
223 .resource = sm501_resources, 223 .resource = sm501_resources,
224}; 224};
225 225
226static struct resource i2c_proto_resources[] = {
227 [0] = {
228 .start = PCA9564_PROTO_32BIT_ADDR,
229 .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
230 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
231 },
232 [1] = {
233 .start = 12,
234 .end = 12,
235 .flags = IORESOURCE_IRQ,
236 },
237};
238
226static struct resource i2c_resources[] = { 239static struct resource i2c_resources[] = {
227 [0] = { 240 [0] = {
228 .start = PCA9564_ADDR, 241 .start = PCA9564_ADDR,
@@ -271,6 +284,11 @@ static int __init sh7785lcr_devices_setup(void)
271 i2c_register_board_info(0, sh7785lcr_i2c_devices, 284 i2c_register_board_info(0, sh7785lcr_i2c_devices,
272 ARRAY_SIZE(sh7785lcr_i2c_devices)); 285 ARRAY_SIZE(sh7785lcr_i2c_devices));
273 286
287 if (mach_is_sh7785lcr_pt()) {
288 i2c_device.resource = &i2c_proto_resources;
289 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
290 }
291
274 return platform_add_devices(sh7785lcr_devices, 292 return platform_add_devices(sh7785lcr_devices,
275 ARRAY_SIZE(sh7785lcr_devices)); 293 ARRAY_SIZE(sh7785lcr_devices));
276} 294}
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile
new file mode 100644
index 00000000000..51f85215165
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for the R0P7724LC0011/21RL (EcoVec)
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8
9obj-y := setup.o \ No newline at end of file
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
new file mode 100644
index 00000000000..428d1187ce5
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -0,0 +1,516 @@
1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/delay.h>
19#include <linux/usb/r8a66597.h>
20#include <video/sh_mobile_lcdc.h>
21#include <media/sh_mobile_ceu.h>
22#include <asm/heartbeat.h>
23#include <asm/sh_eth.h>
24#include <cpu/sh7724.h>
25
26/*
27 * Address Interface BusWidth
28 *-----------------------------------------
29 * 0x0000_0000 uboot 16bit
30 * 0x0004_0000 Linux romImage 16bit
31 * 0x0014_0000 MTD for Linux 16bit
32 * 0x0400_0000 Internal I/O 16/32bit
33 * 0x0800_0000 DRAM 32bit
34 * 0x1800_0000 MFI 16bit
35 */
36
37/* Heartbeat */
38static unsigned char led_pos[] = { 0, 1, 2, 3 };
39static struct heartbeat_data heartbeat_data = {
40 .regsize = 8,
41 .nr_bits = 4,
42 .bit_pos = led_pos,
43};
44
45static struct resource heartbeat_resources[] = {
46 [0] = {
47 .start = 0xA405012C, /* PTG */
48 .end = 0xA405012E - 1,
49 .flags = IORESOURCE_MEM,
50 },
51};
52
53static struct platform_device heartbeat_device = {
54 .name = "heartbeat",
55 .id = -1,
56 .dev = {
57 .platform_data = &heartbeat_data,
58 },
59 .num_resources = ARRAY_SIZE(heartbeat_resources),
60 .resource = heartbeat_resources,
61};
62
63/* MTD */
64static struct mtd_partition nor_flash_partitions[] = {
65 {
66 .name = "boot loader",
67 .offset = 0,
68 .size = (5 * 1024 * 1024),
69 .mask_flags = MTD_CAP_ROM,
70 }, {
71 .name = "free-area",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 },
75};
76
77static struct physmap_flash_data nor_flash_data = {
78 .width = 2,
79 .parts = nor_flash_partitions,
80 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
81};
82
83static struct resource nor_flash_resources[] = {
84 [0] = {
85 .name = "NOR Flash",
86 .start = 0x00000000,
87 .end = 0x03ffffff,
88 .flags = IORESOURCE_MEM,
89 }
90};
91
92static struct platform_device nor_flash_device = {
93 .name = "physmap-flash",
94 .resource = nor_flash_resources,
95 .num_resources = ARRAY_SIZE(nor_flash_resources),
96 .dev = {
97 .platform_data = &nor_flash_data,
98 },
99};
100
101/* SH Eth */
102#define SH_ETH_ADDR (0xA4600000)
103#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
104#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
105static struct resource sh_eth_resources[] = {
106 [0] = {
107 .start = SH_ETH_ADDR,
108 .end = SH_ETH_ADDR + 0x1FC,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = 91,
113 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
114 },
115};
116
117struct sh_eth_plat_data sh_eth_plat = {
118 .phy = 0x1f, /* SMSC LAN8700 */
119 .edmac_endian = EDMAC_LITTLE_ENDIAN,
120};
121
122static struct platform_device sh_eth_device = {
123 .name = "sh-eth",
124 .id = 0,
125 .dev = {
126 .platform_data = &sh_eth_plat,
127 },
128 .num_resources = ARRAY_SIZE(sh_eth_resources),
129 .resource = sh_eth_resources,
130};
131
132/* USB0 host */
133void usb0_port_power(int port, int power)
134{
135 gpio_set_value(GPIO_PTB4, power);
136}
137
138static struct r8a66597_platdata usb0_host_data = {
139 .on_chip = 1,
140 .port_power = usb0_port_power,
141};
142
143static struct resource usb0_host_resources[] = {
144 [0] = {
145 .start = 0xa4d80000,
146 .end = 0xa4d80124 - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = 65,
151 .end = 65,
152 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
153 },
154};
155
156static struct platform_device usb0_host_device = {
157 .name = "r8a66597_hcd",
158 .id = 0,
159 .dev = {
160 .dma_mask = NULL, /* not use dma */
161 .coherent_dma_mask = 0xffffffff,
162 .platform_data = &usb0_host_data,
163 },
164 .num_resources = ARRAY_SIZE(usb0_host_resources),
165 .resource = usb0_host_resources,
166};
167
168/*
169 * USB1
170 *
171 * CN5 can use both host/function,
172 * and we can determine it by checking PTB[3]
173 *
174 * This time only USB1 host is supported.
175 */
176void usb1_port_power(int port, int power)
177{
178 if (!gpio_get_value(GPIO_PTB3)) {
179 printk(KERN_ERR "USB1 function is not supported\n");
180 return;
181 }
182
183 gpio_set_value(GPIO_PTB5, power);
184}
185
186static struct r8a66597_platdata usb1_host_data = {
187 .on_chip = 1,
188 .port_power = usb1_port_power,
189};
190
191static struct resource usb1_host_resources[] = {
192 [0] = {
193 .start = 0xa4d90000,
194 .end = 0xa4d90124 - 1,
195 .flags = IORESOURCE_MEM,
196 },
197 [1] = {
198 .start = 66,
199 .end = 66,
200 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
201 },
202};
203
204static struct platform_device usb1_host_device = {
205 .name = "r8a66597_hcd",
206 .id = 1,
207 .dev = {
208 .dma_mask = NULL, /* not use dma */
209 .coherent_dma_mask = 0xffffffff,
210 .platform_data = &usb1_host_data,
211 },
212 .num_resources = ARRAY_SIZE(usb1_host_resources),
213 .resource = usb1_host_resources,
214};
215
216/* LCDC */
217static struct sh_mobile_lcdc_info lcdc_info = {
218 .ch[0] = {
219 .interface_type = RGB18,
220 .chan = LCDC_CHAN_MAINLCD,
221 .bpp = 16,
222 .lcd_cfg = {
223 .sync = 0, /* hsync and vsync are active low */
224 },
225 .lcd_size_cfg = { /* 7.0 inch */
226 .width = 152,
227 .height = 91,
228 },
229 .board_cfg = {
230 },
231 }
232};
233
234static struct resource lcdc_resources[] = {
235 [0] = {
236 .name = "LCDC",
237 .start = 0xfe940000,
238 .end = 0xfe941fff,
239 .flags = IORESOURCE_MEM,
240 },
241 [1] = {
242 .start = 106,
243 .flags = IORESOURCE_IRQ,
244 },
245};
246
247static struct platform_device lcdc_device = {
248 .name = "sh_mobile_lcdc_fb",
249 .num_resources = ARRAY_SIZE(lcdc_resources),
250 .resource = lcdc_resources,
251 .dev = {
252 .platform_data = &lcdc_info,
253 },
254 .archdata = {
255 .hwblk_id = HWBLK_LCDC,
256 },
257};
258
259/* CEU0 */
260static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
261 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
262};
263
264static struct resource ceu0_resources[] = {
265 [0] = {
266 .name = "CEU0",
267 .start = 0xfe910000,
268 .end = 0xfe91009f,
269 .flags = IORESOURCE_MEM,
270 },
271 [1] = {
272 .start = 52,
273 .flags = IORESOURCE_IRQ,
274 },
275 [2] = {
276 /* place holder for contiguous memory */
277 },
278};
279
280static struct platform_device ceu0_device = {
281 .name = "sh_mobile_ceu",
282 .id = 0, /* "ceu0" clock */
283 .num_resources = ARRAY_SIZE(ceu0_resources),
284 .resource = ceu0_resources,
285 .dev = {
286 .platform_data = &sh_mobile_ceu0_info,
287 },
288 .archdata = {
289 .hwblk_id = HWBLK_CEU0,
290 },
291};
292
293/* CEU1 */
294static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
295 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
296};
297
298static struct resource ceu1_resources[] = {
299 [0] = {
300 .name = "CEU1",
301 .start = 0xfe914000,
302 .end = 0xfe91409f,
303 .flags = IORESOURCE_MEM,
304 },
305 [1] = {
306 .start = 63,
307 .flags = IORESOURCE_IRQ,
308 },
309 [2] = {
310 /* place holder for contiguous memory */
311 },
312};
313
314static struct platform_device ceu1_device = {
315 .name = "sh_mobile_ceu",
316 .id = 1, /* "ceu1" clock */
317 .num_resources = ARRAY_SIZE(ceu1_resources),
318 .resource = ceu1_resources,
319 .dev = {
320 .platform_data = &sh_mobile_ceu1_info,
321 },
322 .archdata = {
323 .hwblk_id = HWBLK_CEU1,
324 },
325};
326
327static struct platform_device *ecovec_devices[] __initdata = {
328 &heartbeat_device,
329 &nor_flash_device,
330 &sh_eth_device,
331 &usb0_host_device,
332 &usb1_host_device, /* USB1 host support */
333 &lcdc_device,
334 &ceu0_device,
335 &ceu1_device,
336};
337
338#define PORT_HIZA 0xA4050158
339#define IODRIVEA 0xA405018A
340static int __init devices_setup(void)
341{
342 /* enable SCIFA0 */
343 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
344 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
345
346 /* enable debug LED */
347 gpio_request(GPIO_PTG0, NULL);
348 gpio_request(GPIO_PTG1, NULL);
349 gpio_request(GPIO_PTG2, NULL);
350 gpio_request(GPIO_PTG3, NULL);
351 gpio_direction_output(GPIO_PTG0, 0);
352 gpio_direction_output(GPIO_PTG1, 0);
353 gpio_direction_output(GPIO_PTG2, 0);
354 gpio_direction_output(GPIO_PTG3, 0);
355
356 /* enable SH-Eth */
357 gpio_request(GPIO_PTA1, NULL);
358 gpio_direction_output(GPIO_PTA1, 1);
359 mdelay(20);
360
361 gpio_request(GPIO_FN_RMII_RXD0, NULL);
362 gpio_request(GPIO_FN_RMII_RXD1, NULL);
363 gpio_request(GPIO_FN_RMII_TXD0, NULL);
364 gpio_request(GPIO_FN_RMII_TXD1, NULL);
365 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
366 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
367 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
368 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
369 gpio_request(GPIO_FN_MDIO, NULL);
370 gpio_request(GPIO_FN_MDC, NULL);
371 gpio_request(GPIO_FN_LNKSTA, NULL);
372
373 /* enable USB */
374 gpio_request(GPIO_PTB3, NULL);
375 gpio_request(GPIO_PTB4, NULL);
376 gpio_request(GPIO_PTB5, NULL);
377 gpio_direction_input(GPIO_PTB3);
378 gpio_direction_output(GPIO_PTB4, 0);
379 gpio_direction_output(GPIO_PTB5, 0);
380 ctrl_outw(0x0600, 0xa40501d4);
381 ctrl_outw(0x0600, 0xa4050192);
382
383 /* enable LCDC */
384 gpio_request(GPIO_FN_LCDD23, NULL);
385 gpio_request(GPIO_FN_LCDD22, NULL);
386 gpio_request(GPIO_FN_LCDD21, NULL);
387 gpio_request(GPIO_FN_LCDD20, NULL);
388 gpio_request(GPIO_FN_LCDD19, NULL);
389 gpio_request(GPIO_FN_LCDD18, NULL);
390 gpio_request(GPIO_FN_LCDD17, NULL);
391 gpio_request(GPIO_FN_LCDD16, NULL);
392 gpio_request(GPIO_FN_LCDD15, NULL);
393 gpio_request(GPIO_FN_LCDD14, NULL);
394 gpio_request(GPIO_FN_LCDD13, NULL);
395 gpio_request(GPIO_FN_LCDD12, NULL);
396 gpio_request(GPIO_FN_LCDD11, NULL);
397 gpio_request(GPIO_FN_LCDD10, NULL);
398 gpio_request(GPIO_FN_LCDD9, NULL);
399 gpio_request(GPIO_FN_LCDD8, NULL);
400 gpio_request(GPIO_FN_LCDD7, NULL);
401 gpio_request(GPIO_FN_LCDD6, NULL);
402 gpio_request(GPIO_FN_LCDD5, NULL);
403 gpio_request(GPIO_FN_LCDD4, NULL);
404 gpio_request(GPIO_FN_LCDD3, NULL);
405 gpio_request(GPIO_FN_LCDD2, NULL);
406 gpio_request(GPIO_FN_LCDD1, NULL);
407 gpio_request(GPIO_FN_LCDD0, NULL);
408 gpio_request(GPIO_FN_LCDDISP, NULL);
409 gpio_request(GPIO_FN_LCDHSYN, NULL);
410 gpio_request(GPIO_FN_LCDDCK, NULL);
411 gpio_request(GPIO_FN_LCDVSYN, NULL);
412 gpio_request(GPIO_FN_LCDDON, NULL);
413 gpio_request(GPIO_FN_LCDLCLK, NULL);
414 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
415
416 gpio_request(GPIO_PTE6, NULL);
417 gpio_request(GPIO_PTU1, NULL);
418 gpio_request(GPIO_PTR1, NULL);
419 gpio_request(GPIO_PTA2, NULL);
420 gpio_direction_input(GPIO_PTE6);
421 gpio_direction_output(GPIO_PTU1, 0);
422 gpio_direction_output(GPIO_PTR1, 0);
423 gpio_direction_output(GPIO_PTA2, 0);
424
425 /* I/O buffer drive ability is low */
426 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
427
428 if (gpio_get_value(GPIO_PTE6)) {
429 /* DVI */
430 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
431 lcdc_info.ch[0].clock_divider = 1,
432 lcdc_info.ch[0].lcd_cfg.name = "DVI";
433 lcdc_info.ch[0].lcd_cfg.xres = 1280;
434 lcdc_info.ch[0].lcd_cfg.yres = 720;
435 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
436 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
437 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
438 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
439 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
440 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
441
442 gpio_set_value(GPIO_PTA2, 1);
443 gpio_set_value(GPIO_PTU1, 1);
444 } else {
445 /* Panel */
446
447 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
448 lcdc_info.ch[0].clock_divider = 2,
449 lcdc_info.ch[0].lcd_cfg.name = "Panel";
450 lcdc_info.ch[0].lcd_cfg.xres = 800;
451 lcdc_info.ch[0].lcd_cfg.yres = 480;
452 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
453 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
454 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
455 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
456 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
457 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
458
459 gpio_set_value(GPIO_PTR1, 1);
460
461 /* FIXME
462 *
463 * LCDDON control is needed for Panel,
464 * but current sh_mobile_lcdc driver doesn't control it.
465 * It is temporary correspondence
466 */
467 gpio_request(GPIO_PTF4, NULL);
468 gpio_direction_output(GPIO_PTF4, 1);
469 }
470
471 /* enable CEU0 */
472 gpio_request(GPIO_FN_VIO0_D15, NULL);
473 gpio_request(GPIO_FN_VIO0_D14, NULL);
474 gpio_request(GPIO_FN_VIO0_D13, NULL);
475 gpio_request(GPIO_FN_VIO0_D12, NULL);
476 gpio_request(GPIO_FN_VIO0_D11, NULL);
477 gpio_request(GPIO_FN_VIO0_D10, NULL);
478 gpio_request(GPIO_FN_VIO0_D9, NULL);
479 gpio_request(GPIO_FN_VIO0_D8, NULL);
480 gpio_request(GPIO_FN_VIO0_D7, NULL);
481 gpio_request(GPIO_FN_VIO0_D6, NULL);
482 gpio_request(GPIO_FN_VIO0_D5, NULL);
483 gpio_request(GPIO_FN_VIO0_D4, NULL);
484 gpio_request(GPIO_FN_VIO0_D3, NULL);
485 gpio_request(GPIO_FN_VIO0_D2, NULL);
486 gpio_request(GPIO_FN_VIO0_D1, NULL);
487 gpio_request(GPIO_FN_VIO0_D0, NULL);
488 gpio_request(GPIO_FN_VIO0_VD, NULL);
489 gpio_request(GPIO_FN_VIO0_CLK, NULL);
490 gpio_request(GPIO_FN_VIO0_FLD, NULL);
491 gpio_request(GPIO_FN_VIO0_HD, NULL);
492 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
493
494 /* enable CEU1 */
495 gpio_request(GPIO_FN_VIO1_D7, NULL);
496 gpio_request(GPIO_FN_VIO1_D6, NULL);
497 gpio_request(GPIO_FN_VIO1_D5, NULL);
498 gpio_request(GPIO_FN_VIO1_D4, NULL);
499 gpio_request(GPIO_FN_VIO1_D3, NULL);
500 gpio_request(GPIO_FN_VIO1_D2, NULL);
501 gpio_request(GPIO_FN_VIO1_D1, NULL);
502 gpio_request(GPIO_FN_VIO1_D0, NULL);
503 gpio_request(GPIO_FN_VIO1_FLD, NULL);
504 gpio_request(GPIO_FN_VIO1_HD, NULL);
505 gpio_request(GPIO_FN_VIO1_VD, NULL);
506 gpio_request(GPIO_FN_VIO1_CLK, NULL);
507 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
508
509 return platform_add_devices(ecovec_devices,
510 ARRAY_SIZE(ecovec_devices));
511}
512device_initcall(devices_setup);
513
514static struct sh_machine_vector mv_ecovec __initmv = {
515 .mv_name = "R0P7724 (EcoVec)",
516};
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index bdb10c29ef1..7155be0d115 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -16,6 +16,8 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/i2c.h>
20#include <linux/usb/r8a66597.h>
19#include <video/sh_mobile_lcdc.h> 21#include <video/sh_mobile_lcdc.h>
20#include <asm/clock.h> 22#include <asm/clock.h>
21#include <asm/machvec.h> 23#include <asm/machvec.h>
@@ -113,6 +115,9 @@ static struct platform_device kfr2r09_sh_keysc_device = {
113 .dev = { 115 .dev = {
114 .platform_data = &kfr2r09_sh_keysc_info, 116 .platform_data = &kfr2r09_sh_keysc_info,
115 }, 117 },
118 .archdata = {
119 .hwblk_id = HWBLK_KEYSC,
120 },
116}; 121};
117 122
118static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = { 123static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
@@ -173,6 +178,38 @@ static struct platform_device kfr2r09_sh_lcdc_device = {
173 .dev = { 178 .dev = {
174 .platform_data = &kfr2r09_sh_lcdc_info, 179 .platform_data = &kfr2r09_sh_lcdc_info,
175 }, 180 },
181 .archdata = {
182 .hwblk_id = HWBLK_LCDC,
183 },
184};
185
186static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
187 .on_chip = 1,
188};
189
190static struct resource kfr2r09_usb0_gadget_resources[] = {
191 [0] = {
192 .start = 0x04d80000,
193 .end = 0x04d80123,
194 .flags = IORESOURCE_MEM,
195 },
196 [1] = {
197 .start = 65,
198 .end = 65,
199 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
200 },
201};
202
203static struct platform_device kfr2r09_usb0_gadget_device = {
204 .name = "r8a66597_udc",
205 .id = 0,
206 .dev = {
207 .dma_mask = NULL, /* not use dma */
208 .coherent_dma_mask = 0xffffffff,
209 .platform_data = &kfr2r09_usb0_gadget_data,
210 },
211 .num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources),
212 .resource = kfr2r09_usb0_gadget_resources,
176}; 213};
177 214
178static struct platform_device *kfr2r09_devices[] __initdata = { 215static struct platform_device *kfr2r09_devices[] __initdata = {
@@ -186,6 +223,81 @@ static struct platform_device *kfr2r09_devices[] __initdata = {
186#define BSC_CS0WCR 0xfec10024 223#define BSC_CS0WCR 0xfec10024
187#define BSC_CS4BCR 0xfec10010 224#define BSC_CS4BCR 0xfec10010
188#define BSC_CS4WCR 0xfec10030 225#define BSC_CS4WCR 0xfec10030
226#define PORT_MSELCRB 0xa4050182
227
228#ifdef CONFIG_I2C
229static int kfr2r09_usb0_gadget_i2c_setup(void)
230{
231 struct i2c_adapter *a;
232 struct i2c_msg msg;
233 unsigned char buf[2];
234 int ret;
235
236 a = i2c_get_adapter(0);
237 if (!a)
238 return -ENODEV;
239
240 /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
241 buf[0] = 0x13;
242 msg.addr = 0x09;
243 msg.buf = buf;
244 msg.len = 1;
245 msg.flags = 0;
246 ret = i2c_transfer(a, &msg, 1);
247 if (ret != 1)
248 return -ENODEV;
249
250 buf[0] = 0;
251 msg.addr = 0x09;
252 msg.buf = buf;
253 msg.len = 1;
254 msg.flags = I2C_M_RD;
255 ret = i2c_transfer(a, &msg, 1);
256 if (ret != 1)
257 return -ENODEV;
258
259 buf[1] = buf[0] | (1 << 1);
260 buf[0] = 0x13;
261 msg.addr = 0x09;
262 msg.buf = buf;
263 msg.len = 2;
264 msg.flags = 0;
265 ret = i2c_transfer(a, &msg, 1);
266 if (ret != 1)
267 return -ENODEV;
268
269 return 0;
270}
271#else
272static int kfr2r09_usb0_gadget_i2c_setup(void)
273{
274 return -ENODEV;
275}
276#endif
277
278static int kfr2r09_usb0_gadget_setup(void)
279{
280 int plugged_in;
281
282 gpio_request(GPIO_PTN4, NULL); /* USB_DET */
283 gpio_direction_input(GPIO_PTN4);
284 plugged_in = gpio_get_value(GPIO_PTN4);
285 if (!plugged_in)
286 return -ENODEV; /* no cable plugged in */
287
288 if (kfr2r09_usb0_gadget_i2c_setup() != 0)
289 return -ENODEV; /* unable to configure using i2c */
290
291 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
292 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
293 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
294 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
295 msleep(20); /* wait 20ms to let the clock settle */
296 clk_enable(clk_get(NULL, "usb0"));
297 ctrl_outw(0x0600, 0xa40501d4);
298
299 return 0;
300}
189 301
190static int __init kfr2r09_devices_setup(void) 302static int __init kfr2r09_devices_setup(void)
191{ 303{
@@ -245,6 +357,10 @@ static int __init kfr2r09_devices_setup(void)
245 gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */ 357 gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
246 gpio_direction_output(GPIO_PTU0, 1); 358 gpio_direction_output(GPIO_PTU0, 1);
247 359
360 /* setup USB function */
361 if (kfr2r09_usb0_gadget_setup() == 0)
362 platform_device_register(&kfr2r09_usb0_gadget_device);
363
248 return platform_add_devices(kfr2r09_devices, 364 return platform_add_devices(kfr2r09_devices,
249 ARRAY_SIZE(kfr2r09_devices)); 365 ARRAY_SIZE(kfr2r09_devices));
250} 366}
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index f9b2e4df35b..be8f0d94f6f 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -98,6 +98,9 @@ static struct platform_device sh_keysc_device = {
98 .dev = { 98 .dev = {
99 .platform_data = &sh_keysc_info, 99 .platform_data = &sh_keysc_info,
100 }, 100 },
101 .archdata = {
102 .hwblk_id = HWBLK_KEYSC,
103 },
101}; 104};
102 105
103static struct mtd_partition migor_nor_flash_partitions[] = 106static struct mtd_partition migor_nor_flash_partitions[] =
@@ -292,6 +295,9 @@ static struct platform_device migor_lcdc_device = {
292 .dev = { 295 .dev = {
293 .platform_data = &sh_mobile_lcdc_info, 296 .platform_data = &sh_mobile_lcdc_info,
294 }, 297 },
298 .archdata = {
299 .hwblk_id = HWBLK_LCDC,
300 },
295}; 301};
296 302
297static struct clk *camera_clk; 303static struct clk *camera_clk;
@@ -379,6 +385,9 @@ static struct platform_device migor_ceu_device = {
379 .dev = { 385 .dev = {
380 .platform_data = &sh_mobile_ceu_info, 386 .platform_data = &sh_mobile_ceu_info,
381 }, 387 },
388 .archdata = {
389 .hwblk_id = HWBLK_CEU,
390 },
382}; 391};
383 392
384struct spi_gpio_platform_data sdcard_cn9_platform_data = { 393struct spi_gpio_platform_data sdcard_cn9_platform_data = {
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index af84904ed86..36374078e52 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -22,6 +22,7 @@
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <asm/sh_keysc.h> 24#include <asm/sh_keysc.h>
25#include <cpu/sh7722.h>
25 26
26/* Heartbeat */ 27/* Heartbeat */
27static struct heartbeat_data heartbeat_data = { 28static struct heartbeat_data heartbeat_data = {
@@ -137,6 +138,9 @@ static struct platform_device sh_keysc_device = {
137 .dev = { 138 .dev = {
138 .platform_data = &sh_keysc_info, 139 .platform_data = &sh_keysc_info,
139 }, 140 },
141 .archdata = {
142 .hwblk_id = HWBLK_KEYSC,
143 },
140}; 144};
141 145
142static struct platform_device *se7722_devices[] __initdata = { 146static struct platform_device *se7722_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 9162081504e..1876c8306c8 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -182,6 +182,9 @@ static struct platform_device lcdc_device = {
182 .dev = { 182 .dev = {
183 .platform_data = &lcdc_info, 183 .platform_data = &lcdc_info,
184 }, 184 },
185 .archdata = {
186 .hwblk_id = HWBLK_LCDC,
187 },
185}; 188};
186 189
187/* CEU0 */ 190/* CEU0 */
@@ -213,6 +216,9 @@ static struct platform_device ceu0_device = {
213 .dev = { 216 .dev = {
214 .platform_data = &sh_mobile_ceu0_info, 217 .platform_data = &sh_mobile_ceu0_info,
215 }, 218 },
219 .archdata = {
220 .hwblk_id = HWBLK_CEU0,
221 },
216}; 222};
217 223
218/* CEU1 */ 224/* CEU1 */
@@ -244,6 +250,9 @@ static struct platform_device ceu1_device = {
244 .dev = { 250 .dev = {
245 .platform_data = &sh_mobile_ceu1_info, 251 .platform_data = &sh_mobile_ceu1_info,
246 }, 252 },
253 .archdata = {
254 .hwblk_id = HWBLK_CEU1,
255 },
247}; 256};
248 257
249/* KEYSC in SoC (Needs SW33-2 set to ON) */ 258/* KEYSC in SoC (Needs SW33-2 set to ON) */
@@ -282,6 +291,9 @@ static struct platform_device keysc_device = {
282 .dev = { 291 .dev = {
283 .platform_data = &keysc_info, 292 .platform_data = &keysc_info,
284 }, 293 },
294 .archdata = {
295 .hwblk_id = HWBLK_KEYSC,
296 },
285}; 297};
286 298
287/* SH Eth */ 299/* SH Eth */
@@ -310,6 +322,9 @@ static struct platform_device sh_eth_device = {
310 }, 322 },
311 .num_resources = ARRAY_SIZE(sh_eth_resources), 323 .num_resources = ARRAY_SIZE(sh_eth_resources),
312 .resource = sh_eth_resources, 324 .resource = sh_eth_resources,
325 .archdata = {
326 .hwblk_id = HWBLK_ETHER,
327 },
313}; 328};
314 329
315static struct r8a66597_platdata sh7724_usb0_host_data = { 330static struct r8a66597_platdata sh7724_usb0_host_data = {
@@ -319,7 +334,7 @@ static struct r8a66597_platdata sh7724_usb0_host_data = {
319static struct resource sh7724_usb0_host_resources[] = { 334static struct resource sh7724_usb0_host_resources[] = {
320 [0] = { 335 [0] = {
321 .start = 0xa4d80000, 336 .start = 0xa4d80000,
322 .end = 0xa4d800ff, 337 .end = 0xa4d80124 - 1,
323 .flags = IORESOURCE_MEM, 338 .flags = IORESOURCE_MEM,
324 }, 339 },
325 [1] = { 340 [1] = {
@@ -339,6 +354,38 @@ static struct platform_device sh7724_usb0_host_device = {
339 }, 354 },
340 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 355 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
341 .resource = sh7724_usb0_host_resources, 356 .resource = sh7724_usb0_host_resources,
357 .archdata = {
358 .hwblk_id = HWBLK_USB0,
359 },
360};
361
362static struct r8a66597_platdata sh7724_usb1_gadget_data = {
363 .on_chip = 1,
364};
365
366static struct resource sh7724_usb1_gadget_resources[] = {
367 [0] = {
368 .start = 0xa4d90000,
369 .end = 0xa4d90123,
370 .flags = IORESOURCE_MEM,
371 },
372 [1] = {
373 .start = 66,
374 .end = 66,
375 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
376 },
377};
378
379static struct platform_device sh7724_usb1_gadget_device = {
380 .name = "r8a66597_udc",
381 .id = 1, /* USB1 */
382 .dev = {
383 .dma_mask = NULL, /* not use dma */
384 .coherent_dma_mask = 0xffffffff,
385 .platform_data = &sh7724_usb1_gadget_data,
386 },
387 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
388 .resource = sh7724_usb1_gadget_resources,
342}; 389};
343 390
344static struct platform_device *ms7724se_devices[] __initdata = { 391static struct platform_device *ms7724se_devices[] __initdata = {
@@ -351,6 +398,7 @@ static struct platform_device *ms7724se_devices[] __initdata = {
351 &keysc_device, 398 &keysc_device,
352 &sh_eth_device, 399 &sh_eth_device,
353 &sh7724_usb0_host_device, 400 &sh7724_usb0_host_device,
401 &sh7724_usb1_gadget_device,
354}; 402};
355 403
356#define EEPROM_OP 0xBA206000 404#define EEPROM_OP 0xBA206000
@@ -459,6 +507,9 @@ static int __init devices_setup(void)
459 /* enable USB0 port */ 507 /* enable USB0 port */
460 ctrl_outw(0x0600, 0xa40501d4); 508 ctrl_outw(0x0600, 0xa40501d4);
461 509
510 /* enable USB1 port */
511 ctrl_outw(0x0600, 0xa4050192);
512
462 /* enable IRQ 0,1,2 */ 513 /* enable IRQ 0,1,2 */
463 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 514 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
464 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 515 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 06ac31f3be8..02a30935f0b 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -22,7 +22,7 @@ startup:
22 bt clear_bss 22 bt clear_bss
23 sub r0, r2 23 sub r0, r2
24 mov.l bss_start_addr, r0 24 mov.l bss_start_addr, r0
25 mov #0xe0, r1 25 mov #0xffffffe0, r1
26 and r1, r0 ! align cache line 26 and r1, r0 ! align cache line
27 mov.l text_start_addr, r3 27 mov.l text_start_addr, r3
28 mov r0, r1 28 mov r0, r1
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
new file mode 100644
index 00000000000..2050a76683c
--- /dev/null
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -0,0 +1,1558 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc7
4# Wed Aug 26 09:09:07 2009
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y
18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y
26CONFIG_LOCKDEP_SUPPORT=y
27CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U32 is not set
29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y
35
36#
37# General setup
38#
39CONFIG_EXPERIMENTAL=y
40CONFIG_BROKEN_ON_SMP=y
41CONFIG_LOCK_KERNEL=y
42CONFIG_INIT_ENV_ARG_LIMIT=32
43CONFIG_LOCALVERSION=""
44# CONFIG_LOCALVERSION_AUTO is not set
45CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y
48CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set
51CONFIG_SWAP=y
52CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y
54# CONFIG_POSIX_MQUEUE is not set
55CONFIG_BSD_PROCESS_ACCT=y
56# CONFIG_BSD_PROCESS_ACCT_V3 is not set
57# CONFIG_TASKSTATS is not set
58# CONFIG_AUDIT is not set
59
60#
61# RCU Subsystem
62#
63CONFIG_CLASSIC_RCU=y
64# CONFIG_TREE_RCU is not set
65# CONFIG_PREEMPT_RCU is not set
66# CONFIG_TREE_RCU_TRACE is not set
67# CONFIG_PREEMPT_RCU_TRACE is not set
68# CONFIG_IKCONFIG is not set
69CONFIG_LOG_BUF_SHIFT=14
70CONFIG_GROUP_SCHED=y
71CONFIG_FAIR_GROUP_SCHED=y
72# CONFIG_RT_GROUP_SCHED is not set
73CONFIG_USER_SCHED=y
74# CONFIG_CGROUP_SCHED is not set
75# CONFIG_CGROUPS is not set
76CONFIG_SYSFS_DEPRECATED=y
77CONFIG_SYSFS_DEPRECATED_V2=y
78# CONFIG_RELAY is not set
79# CONFIG_NAMESPACES is not set
80# CONFIG_BLK_DEV_INITRD is not set
81CONFIG_CC_OPTIMIZE_FOR_SIZE=y
82CONFIG_SYSCTL=y
83CONFIG_ANON_INODES=y
84CONFIG_EMBEDDED=y
85CONFIG_UID16=y
86CONFIG_SYSCTL_SYSCALL=y
87# CONFIG_KALLSYMS is not set
88CONFIG_HOTPLUG=y
89CONFIG_PRINTK=y
90CONFIG_BUG=y
91CONFIG_ELF_CORE=y
92CONFIG_BASE_FULL=y
93CONFIG_FUTEX=y
94CONFIG_EPOLL=y
95CONFIG_SIGNALFD=y
96CONFIG_TIMERFD=y
97CONFIG_EVENTFD=y
98CONFIG_SHMEM=y
99CONFIG_AIO=y
100CONFIG_HAVE_PERF_COUNTERS=y
101
102#
103# Performance Counters
104#
105# CONFIG_PERF_COUNTERS is not set
106CONFIG_VM_EVENT_COUNTERS=y
107# CONFIG_STRIP_ASM_SYMS is not set
108CONFIG_COMPAT_BRK=y
109CONFIG_SLAB=y
110# CONFIG_SLUB is not set
111# CONFIG_SLOB is not set
112# CONFIG_PROFILING is not set
113# CONFIG_MARKERS is not set
114CONFIG_HAVE_OPROFILE=y
115CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y
121
122#
123# GCOV-based kernel profiling
124#
125# CONFIG_GCOV_KERNEL is not set
126# CONFIG_SLOW_WORK is not set
127CONFIG_HAVE_GENERIC_DMA_COHERENT=y
128CONFIG_SLABINFO=y
129CONFIG_RT_MUTEXES=y
130CONFIG_BASE_SMALL=0
131CONFIG_MODULES=y
132# CONFIG_MODULE_FORCE_LOAD is not set
133CONFIG_MODULE_UNLOAD=y
134# CONFIG_MODULE_FORCE_UNLOAD is not set
135# CONFIG_MODVERSIONS is not set
136# CONFIG_MODULE_SRCVERSION_ALL is not set
137CONFIG_BLOCK=y
138CONFIG_LBDAF=y
139# CONFIG_BLK_DEV_BSG is not set
140# CONFIG_BLK_DEV_INTEGRITY is not set
141
142#
143# IO Schedulers
144#
145CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y
149# CONFIG_DEFAULT_AS is not set
150# CONFIG_DEFAULT_DEADLINE is not set
151CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="cfq"
154CONFIG_FREEZER=y
155
156#
157# System type
158#
159CONFIG_CPU_SH4=y
160CONFIG_CPU_SH4A=y
161CONFIG_CPU_SHX2=y
162CONFIG_ARCH_SHMOBILE=y
163# CONFIG_CPU_SUBTYPE_SH7619 is not set
164# CONFIG_CPU_SUBTYPE_SH7201 is not set
165# CONFIG_CPU_SUBTYPE_SH7203 is not set
166# CONFIG_CPU_SUBTYPE_SH7206 is not set
167# CONFIG_CPU_SUBTYPE_SH7263 is not set
168# CONFIG_CPU_SUBTYPE_MXG is not set
169# CONFIG_CPU_SUBTYPE_SH7705 is not set
170# CONFIG_CPU_SUBTYPE_SH7706 is not set
171# CONFIG_CPU_SUBTYPE_SH7707 is not set
172# CONFIG_CPU_SUBTYPE_SH7708 is not set
173# CONFIG_CPU_SUBTYPE_SH7709 is not set
174# CONFIG_CPU_SUBTYPE_SH7710 is not set
175# CONFIG_CPU_SUBTYPE_SH7712 is not set
176# CONFIG_CPU_SUBTYPE_SH7720 is not set
177# CONFIG_CPU_SUBTYPE_SH7721 is not set
178# CONFIG_CPU_SUBTYPE_SH7750 is not set
179# CONFIG_CPU_SUBTYPE_SH7091 is not set
180# CONFIG_CPU_SUBTYPE_SH7750R is not set
181# CONFIG_CPU_SUBTYPE_SH7750S is not set
182# CONFIG_CPU_SUBTYPE_SH7751 is not set
183# CONFIG_CPU_SUBTYPE_SH7751R is not set
184# CONFIG_CPU_SUBTYPE_SH7760 is not set
185# CONFIG_CPU_SUBTYPE_SH4_202 is not set
186# CONFIG_CPU_SUBTYPE_SH7723 is not set
187CONFIG_CPU_SUBTYPE_SH7724=y
188# CONFIG_CPU_SUBTYPE_SH7757 is not set
189# CONFIG_CPU_SUBTYPE_SH7763 is not set
190# CONFIG_CPU_SUBTYPE_SH7770 is not set
191# CONFIG_CPU_SUBTYPE_SH7780 is not set
192# CONFIG_CPU_SUBTYPE_SH7785 is not set
193# CONFIG_CPU_SUBTYPE_SH7786 is not set
194# CONFIG_CPU_SUBTYPE_SHX3 is not set
195# CONFIG_CPU_SUBTYPE_SH7343 is not set
196# CONFIG_CPU_SUBTYPE_SH7722 is not set
197# CONFIG_CPU_SUBTYPE_SH7366 is not set
198
199#
200# Memory management options
201#
202CONFIG_QUICKLIST=y
203CONFIG_MMU=y
204CONFIG_PAGE_OFFSET=0x80000000
205CONFIG_FORCE_MAX_ZONEORDER=11
206CONFIG_MEMORY_START=0x08000000
207CONFIG_MEMORY_SIZE=0x08000000
208CONFIG_29BIT=y
209# CONFIG_X2TLB is not set
210CONFIG_VSYSCALL=y
211CONFIG_ARCH_FLATMEM_ENABLE=y
212CONFIG_ARCH_SPARSEMEM_ENABLE=y
213CONFIG_ARCH_SPARSEMEM_DEFAULT=y
214CONFIG_MAX_ACTIVE_REGIONS=1
215CONFIG_ARCH_POPULATES_NODE_MAP=y
216CONFIG_ARCH_SELECT_MEMORY_MODEL=y
217CONFIG_PAGE_SIZE_4KB=y
218# CONFIG_PAGE_SIZE_8KB is not set
219# CONFIG_PAGE_SIZE_16KB is not set
220# CONFIG_PAGE_SIZE_64KB is not set
221CONFIG_SELECT_MEMORY_MODEL=y
222CONFIG_FLATMEM_MANUAL=y
223# CONFIG_DISCONTIGMEM_MANUAL is not set
224# CONFIG_SPARSEMEM_MANUAL is not set
225CONFIG_FLATMEM=y
226CONFIG_FLAT_NODE_MEM_MAP=y
227CONFIG_SPARSEMEM_STATIC=y
228CONFIG_PAGEFLAGS_EXTENDED=y
229CONFIG_SPLIT_PTLOCK_CPUS=4
230# CONFIG_PHYS_ADDR_T_64BIT is not set
231CONFIG_ZONE_DMA_FLAG=0
232CONFIG_NR_QUICK=2
233CONFIG_HAVE_MLOCK=y
234CONFIG_HAVE_MLOCKED_PAGE_BIT=y
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236
237#
238# Cache configuration
239#
240CONFIG_CACHE_WRITEBACK=y
241# CONFIG_CACHE_WRITETHROUGH is not set
242# CONFIG_CACHE_OFF is not set
243
244#
245# Processor features
246#
247CONFIG_CPU_LITTLE_ENDIAN=y
248# CONFIG_CPU_BIG_ENDIAN is not set
249CONFIG_SH_FPU=y
250# CONFIG_SH_STORE_QUEUES is not set
251CONFIG_CPU_HAS_INTEVT=y
252CONFIG_CPU_HAS_SR_RB=y
253CONFIG_CPU_HAS_FPU=y
254
255#
256# Board support
257#
258# CONFIG_SH_7724_SOLUTION_ENGINE is not set
259# CONFIG_SH_KFR2R09 is not set
260CONFIG_SH_ECOVEC=y
261
262#
263# Timer and clock configuration
264#
265CONFIG_SH_TIMER_TMU=y
266# CONFIG_SH_TIMER_CMT is not set
267CONFIG_SH_PCLK_FREQ=33333333
268CONFIG_SH_CLK_CPG=y
269# CONFIG_NO_HZ is not set
270# CONFIG_HIGH_RES_TIMERS is not set
271CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
272
273#
274# CPU Frequency scaling
275#
276# CONFIG_CPU_FREQ is not set
277
278#
279# DMA support
280#
281# CONFIG_SH_DMA is not set
282
283#
284# Companion Chips
285#
286
287#
288# Additional SuperH Device Drivers
289#
290CONFIG_HEARTBEAT=y
291# CONFIG_PUSH_SWITCH is not set
292
293#
294# Kernel features
295#
296# CONFIG_HZ_100 is not set
297CONFIG_HZ_250=y
298# CONFIG_HZ_300 is not set
299# CONFIG_HZ_1000 is not set
300CONFIG_HZ=250
301# CONFIG_SCHED_HRTICK is not set
302# CONFIG_KEXEC is not set
303# CONFIG_CRASH_DUMP is not set
304CONFIG_SECCOMP=y
305# CONFIG_PREEMPT_NONE is not set
306# CONFIG_PREEMPT_VOLUNTARY is not set
307CONFIG_PREEMPT=y
308CONFIG_GUSA=y
309# CONFIG_SPARSE_IRQ is not set
310
311#
312# Boot options
313#
314CONFIG_ZERO_PAGE_OFFSET=0x00001000
315CONFIG_BOOT_LINK_OFFSET=0x00800000
316CONFIG_ENTRY_OFFSET=0x00001000
317CONFIG_CMDLINE_BOOL=y
318CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m"
319
320#
321# Bus options
322#
323# CONFIG_ARCH_SUPPORTS_MSI is not set
324# CONFIG_PCCARD is not set
325
326#
327# Executable file formats
328#
329CONFIG_BINFMT_ELF=y
330# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
331# CONFIG_HAVE_AOUT is not set
332# CONFIG_BINFMT_MISC is not set
333
334#
335# Power management options (EXPERIMENTAL)
336#
337CONFIG_PM=y
338# CONFIG_PM_DEBUG is not set
339CONFIG_PM_SLEEP=y
340CONFIG_SUSPEND=y
341CONFIG_SUSPEND_FREEZER=y
342# CONFIG_HIBERNATION is not set
343CONFIG_PM_RUNTIME=y
344# CONFIG_CPU_IDLE is not set
345CONFIG_NET=y
346
347#
348# Networking options
349#
350CONFIG_PACKET=y
351# CONFIG_PACKET_MMAP is not set
352CONFIG_UNIX=y
353# CONFIG_NET_KEY is not set
354CONFIG_INET=y
355# CONFIG_IP_MULTICAST is not set
356CONFIG_IP_ADVANCED_ROUTER=y
357CONFIG_ASK_IP_FIB_HASH=y
358# CONFIG_IP_FIB_TRIE is not set
359CONFIG_IP_FIB_HASH=y
360# CONFIG_IP_MULTIPLE_TABLES is not set
361# CONFIG_IP_ROUTE_MULTIPATH is not set
362# CONFIG_IP_ROUTE_VERBOSE is not set
363CONFIG_IP_PNP=y
364CONFIG_IP_PNP_DHCP=y
365# CONFIG_IP_PNP_BOOTP is not set
366# CONFIG_IP_PNP_RARP is not set
367# CONFIG_NET_IPIP is not set
368# CONFIG_NET_IPGRE is not set
369# CONFIG_ARPD is not set
370# CONFIG_SYN_COOKIES is not set
371# CONFIG_INET_AH is not set
372# CONFIG_INET_ESP is not set
373# CONFIG_INET_IPCOMP is not set
374# CONFIG_INET_XFRM_TUNNEL is not set
375# CONFIG_INET_TUNNEL is not set
376# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
377# CONFIG_INET_XFRM_MODE_TUNNEL is not set
378# CONFIG_INET_XFRM_MODE_BEET is not set
379# CONFIG_INET_LRO is not set
380CONFIG_INET_DIAG=y
381CONFIG_INET_TCP_DIAG=y
382# CONFIG_TCP_CONG_ADVANCED is not set
383CONFIG_TCP_CONG_CUBIC=y
384CONFIG_DEFAULT_TCP_CONG="cubic"
385# CONFIG_TCP_MD5SIG is not set
386# CONFIG_IPV6 is not set
387# CONFIG_NETWORK_SECMARK is not set
388# CONFIG_NETFILTER is not set
389# CONFIG_IP_DCCP is not set
390# CONFIG_IP_SCTP is not set
391# CONFIG_TIPC is not set
392# CONFIG_ATM is not set
393# CONFIG_BRIDGE is not set
394# CONFIG_NET_DSA is not set
395# CONFIG_VLAN_8021Q is not set
396# CONFIG_DECNET is not set
397# CONFIG_LLC2 is not set
398# CONFIG_IPX is not set
399# CONFIG_ATALK is not set
400# CONFIG_X25 is not set
401# CONFIG_LAPB is not set
402# CONFIG_ECONET is not set
403# CONFIG_WAN_ROUTER is not set
404# CONFIG_PHONET is not set
405# CONFIG_IEEE802154 is not set
406# CONFIG_NET_SCHED is not set
407# CONFIG_DCB is not set
408
409#
410# Network testing
411#
412# CONFIG_NET_PKTGEN is not set
413# CONFIG_HAMRADIO is not set
414# CONFIG_CAN is not set
415# CONFIG_IRDA is not set
416# CONFIG_BT is not set
417# CONFIG_AF_RXRPC is not set
418CONFIG_WIRELESS=y
419# CONFIG_CFG80211 is not set
420# CONFIG_WIRELESS_OLD_REGULATORY is not set
421# CONFIG_WIRELESS_EXT is not set
422# CONFIG_LIB80211 is not set
423
424#
425# CFG80211 needs to be enabled for MAC80211
426#
427CONFIG_MAC80211_DEFAULT_PS_VALUE=0
428# CONFIG_WIMAX is not set
429# CONFIG_RFKILL is not set
430# CONFIG_NET_9P is not set
431
432#
433# Device Drivers
434#
435
436#
437# Generic Driver Options
438#
439CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
440CONFIG_STANDALONE=y
441CONFIG_PREVENT_FIRMWARE_BUILD=y
442CONFIG_FW_LOADER=y
443CONFIG_FIRMWARE_IN_KERNEL=y
444CONFIG_EXTRA_FIRMWARE=""
445# CONFIG_SYS_HYPERVISOR is not set
446# CONFIG_CONNECTOR is not set
447CONFIG_MTD=y
448# CONFIG_MTD_DEBUG is not set
449CONFIG_MTD_CONCAT=y
450CONFIG_MTD_PARTITIONS=y
451# CONFIG_MTD_TESTS is not set
452# CONFIG_MTD_REDBOOT_PARTS is not set
453CONFIG_MTD_CMDLINE_PARTS=y
454# CONFIG_MTD_AR7_PARTS is not set
455
456#
457# User Modules And Translation Layers
458#
459CONFIG_MTD_CHAR=y
460CONFIG_MTD_BLKDEVS=y
461CONFIG_MTD_BLOCK=y
462# CONFIG_FTL is not set
463# CONFIG_NFTL is not set
464# CONFIG_INFTL is not set
465# CONFIG_RFD_FTL is not set
466# CONFIG_SSFDC is not set
467# CONFIG_MTD_OOPS is not set
468
469#
470# RAM/ROM/Flash chip drivers
471#
472CONFIG_MTD_CFI=y
473# CONFIG_MTD_JEDECPROBE is not set
474CONFIG_MTD_GEN_PROBE=y
475# CONFIG_MTD_CFI_ADV_OPTIONS is not set
476CONFIG_MTD_MAP_BANK_WIDTH_1=y
477CONFIG_MTD_MAP_BANK_WIDTH_2=y
478CONFIG_MTD_MAP_BANK_WIDTH_4=y
479# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
480# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
481# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
482CONFIG_MTD_CFI_I1=y
483CONFIG_MTD_CFI_I2=y
484# CONFIG_MTD_CFI_I4 is not set
485# CONFIG_MTD_CFI_I8 is not set
486# CONFIG_MTD_CFI_INTELEXT is not set
487CONFIG_MTD_CFI_AMDSTD=y
488# CONFIG_MTD_CFI_STAA is not set
489CONFIG_MTD_CFI_UTIL=y
490# CONFIG_MTD_RAM is not set
491# CONFIG_MTD_ROM is not set
492# CONFIG_MTD_ABSENT is not set
493
494#
495# Mapping drivers for chip access
496#
497# CONFIG_MTD_COMPLEX_MAPPINGS is not set
498CONFIG_MTD_PHYSMAP=y
499# CONFIG_MTD_PHYSMAP_COMPAT is not set
500# CONFIG_MTD_PLATRAM is not set
501
502#
503# Self-contained MTD device drivers
504#
505# CONFIG_MTD_DATAFLASH is not set
506# CONFIG_MTD_M25P80 is not set
507# CONFIG_MTD_SLRAM is not set
508# CONFIG_MTD_PHRAM is not set
509# CONFIG_MTD_MTDRAM is not set
510# CONFIG_MTD_BLOCK2MTD is not set
511
512#
513# Disk-On-Chip Device Drivers
514#
515# CONFIG_MTD_DOC2000 is not set
516# CONFIG_MTD_DOC2001 is not set
517# CONFIG_MTD_DOC2001PLUS is not set
518CONFIG_MTD_NAND=y
519# CONFIG_MTD_NAND_VERIFY_WRITE is not set
520# CONFIG_MTD_NAND_ECC_SMC is not set
521# CONFIG_MTD_NAND_MUSEUM_IDS is not set
522CONFIG_MTD_NAND_IDS=y
523# CONFIG_MTD_NAND_DISKONCHIP is not set
524# CONFIG_MTD_NAND_NANDSIM is not set
525# CONFIG_MTD_NAND_PLATFORM is not set
526# CONFIG_MTD_ALAUDA is not set
527# CONFIG_MTD_ONENAND is not set
528
529#
530# LPDDR flash memory drivers
531#
532# CONFIG_MTD_LPDDR is not set
533
534#
535# UBI - Unsorted block images
536#
537CONFIG_MTD_UBI=y
538CONFIG_MTD_UBI_WL_THRESHOLD=4096
539CONFIG_MTD_UBI_BEB_RESERVE=1
540# CONFIG_MTD_UBI_GLUEBI is not set
541
542#
543# UBI debugging options
544#
545# CONFIG_MTD_UBI_DEBUG is not set
546# CONFIG_PARPORT is not set
547CONFIG_BLK_DEV=y
548# CONFIG_BLK_DEV_COW_COMMON is not set
549# CONFIG_BLK_DEV_LOOP is not set
550# CONFIG_BLK_DEV_NBD is not set
551# CONFIG_BLK_DEV_UB is not set
552CONFIG_BLK_DEV_RAM=y
553CONFIG_BLK_DEV_RAM_COUNT=4
554CONFIG_BLK_DEV_RAM_SIZE=4096
555# CONFIG_BLK_DEV_XIP is not set
556# CONFIG_CDROM_PKTCDVD is not set
557# CONFIG_ATA_OVER_ETH is not set
558# CONFIG_BLK_DEV_HD is not set
559CONFIG_MISC_DEVICES=y
560# CONFIG_ICS932S401 is not set
561# CONFIG_ENCLOSURE_SERVICES is not set
562# CONFIG_ISL29003 is not set
563# CONFIG_C2PORT is not set
564
565#
566# EEPROM support
567#
568# CONFIG_EEPROM_AT24 is not set
569# CONFIG_EEPROM_AT25 is not set
570# CONFIG_EEPROM_LEGACY is not set
571# CONFIG_EEPROM_MAX6875 is not set
572# CONFIG_EEPROM_93CX6 is not set
573CONFIG_HAVE_IDE=y
574# CONFIG_IDE is not set
575
576#
577# SCSI device support
578#
579# CONFIG_RAID_ATTRS is not set
580CONFIG_SCSI=y
581CONFIG_SCSI_DMA=y
582# CONFIG_SCSI_TGT is not set
583# CONFIG_SCSI_NETLINK is not set
584CONFIG_SCSI_PROC_FS=y
585
586#
587# SCSI support type (disk, tape, CD-ROM)
588#
589CONFIG_BLK_DEV_SD=y
590# CONFIG_CHR_DEV_ST is not set
591# CONFIG_CHR_DEV_OSST is not set
592# CONFIG_BLK_DEV_SR is not set
593# CONFIG_CHR_DEV_SG is not set
594# CONFIG_CHR_DEV_SCH is not set
595# CONFIG_SCSI_MULTI_LUN is not set
596# CONFIG_SCSI_CONSTANTS is not set
597# CONFIG_SCSI_LOGGING is not set
598# CONFIG_SCSI_SCAN_ASYNC is not set
599CONFIG_SCSI_WAIT_SCAN=m
600
601#
602# SCSI Transports
603#
604# CONFIG_SCSI_SPI_ATTRS is not set
605# CONFIG_SCSI_FC_ATTRS is not set
606# CONFIG_SCSI_ISCSI_ATTRS is not set
607# CONFIG_SCSI_SAS_LIBSAS is not set
608# CONFIG_SCSI_SRP_ATTRS is not set
609CONFIG_SCSI_LOWLEVEL=y
610# CONFIG_ISCSI_TCP is not set
611# CONFIG_LIBFC is not set
612# CONFIG_LIBFCOE is not set
613# CONFIG_SCSI_DEBUG is not set
614# CONFIG_SCSI_DH is not set
615# CONFIG_SCSI_OSD_INITIATOR is not set
616# CONFIG_ATA is not set
617# CONFIG_MD is not set
618CONFIG_NETDEVICES=y
619# CONFIG_DUMMY is not set
620# CONFIG_BONDING is not set
621# CONFIG_MACVLAN is not set
622# CONFIG_EQUALIZER is not set
623# CONFIG_TUN is not set
624# CONFIG_VETH is not set
625CONFIG_PHYLIB=y
626
627#
628# MII PHY device drivers
629#
630# CONFIG_MARVELL_PHY is not set
631# CONFIG_DAVICOM_PHY is not set
632# CONFIG_QSEMI_PHY is not set
633# CONFIG_LXT_PHY is not set
634# CONFIG_CICADA_PHY is not set
635# CONFIG_VITESSE_PHY is not set
636CONFIG_SMSC_PHY=y
637# CONFIG_BROADCOM_PHY is not set
638# CONFIG_ICPLUS_PHY is not set
639# CONFIG_REALTEK_PHY is not set
640# CONFIG_NATIONAL_PHY is not set
641# CONFIG_STE10XP is not set
642# CONFIG_LSI_ET1011C_PHY is not set
643# CONFIG_FIXED_PHY is not set
644CONFIG_MDIO_BITBANG=y
645# CONFIG_MDIO_GPIO is not set
646CONFIG_NET_ETHERNET=y
647CONFIG_MII=y
648# CONFIG_AX88796 is not set
649# CONFIG_STNIC is not set
650CONFIG_SH_ETH=y
651# CONFIG_SMC91X is not set
652# CONFIG_ENC28J60 is not set
653# CONFIG_ETHOC is not set
654# CONFIG_SMC911X is not set
655# CONFIG_SMSC911X is not set
656# CONFIG_DNET is not set
657# CONFIG_IBM_NEW_EMAC_ZMII is not set
658# CONFIG_IBM_NEW_EMAC_RGMII is not set
659# CONFIG_IBM_NEW_EMAC_TAH is not set
660# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
661# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
662# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
663# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
664# CONFIG_B44 is not set
665# CONFIG_KS8842 is not set
666# CONFIG_KS8851 is not set
667# CONFIG_NETDEV_1000 is not set
668# CONFIG_NETDEV_10000 is not set
669
670#
671# Wireless LAN
672#
673# CONFIG_WLAN_PRE80211 is not set
674# CONFIG_WLAN_80211 is not set
675
676#
677# Enable WiMAX (Networking options) to see the WiMAX drivers
678#
679
680#
681# USB Network Adapters
682#
683# CONFIG_USB_CATC is not set
684# CONFIG_USB_KAWETH is not set
685# CONFIG_USB_PEGASUS is not set
686# CONFIG_USB_RTL8150 is not set
687# CONFIG_USB_USBNET is not set
688# CONFIG_WAN is not set
689# CONFIG_PPP is not set
690# CONFIG_SLIP is not set
691# CONFIG_NETCONSOLE is not set
692# CONFIG_NETPOLL is not set
693# CONFIG_NET_POLL_CONTROLLER is not set
694# CONFIG_ISDN is not set
695# CONFIG_PHONE is not set
696
697#
698# Input device support
699#
700CONFIG_INPUT=y
701# CONFIG_INPUT_FF_MEMLESS is not set
702# CONFIG_INPUT_POLLDEV is not set
703
704#
705# Userland interfaces
706#
707# CONFIG_INPUT_MOUSEDEV is not set
708# CONFIG_INPUT_JOYDEV is not set
709CONFIG_INPUT_EVDEV=y
710# CONFIG_INPUT_EVBUG is not set
711
712#
713# Input Device Drivers
714#
715CONFIG_INPUT_KEYBOARD=y
716# CONFIG_KEYBOARD_ATKBD is not set
717# CONFIG_KEYBOARD_LKKBD is not set
718# CONFIG_KEYBOARD_GPIO is not set
719# CONFIG_KEYBOARD_MATRIX is not set
720# CONFIG_KEYBOARD_NEWTON is not set
721# CONFIG_KEYBOARD_STOWAWAY is not set
722# CONFIG_KEYBOARD_SUNKBD is not set
723CONFIG_KEYBOARD_SH_KEYSC=y
724# CONFIG_KEYBOARD_XTKBD is not set
725# CONFIG_INPUT_MOUSE is not set
726# CONFIG_INPUT_JOYSTICK is not set
727# CONFIG_INPUT_TABLET is not set
728# CONFIG_INPUT_TOUCHSCREEN is not set
729# CONFIG_INPUT_MISC is not set
730
731#
732# Hardware I/O ports
733#
734# CONFIG_SERIO is not set
735# CONFIG_GAMEPORT is not set
736
737#
738# Character devices
739#
740CONFIG_VT=y
741CONFIG_CONSOLE_TRANSLATIONS=y
742CONFIG_VT_CONSOLE=y
743CONFIG_HW_CONSOLE=y
744CONFIG_VT_HW_CONSOLE_BINDING=y
745CONFIG_DEVKMEM=y
746# CONFIG_SERIAL_NONSTANDARD is not set
747
748#
749# Serial drivers
750#
751# CONFIG_SERIAL_8250 is not set
752
753#
754# Non-8250 serial port support
755#
756# CONFIG_SERIAL_MAX3100 is not set
757CONFIG_SERIAL_SH_SCI=y
758CONFIG_SERIAL_SH_SCI_NR_UARTS=6
759CONFIG_SERIAL_SH_SCI_CONSOLE=y
760CONFIG_SERIAL_CORE=y
761CONFIG_SERIAL_CORE_CONSOLE=y
762CONFIG_UNIX98_PTYS=y
763# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
764CONFIG_LEGACY_PTYS=y
765CONFIG_LEGACY_PTY_COUNT=256
766# CONFIG_IPMI_HANDLER is not set
767CONFIG_HW_RANDOM=y
768# CONFIG_HW_RANDOM_TIMERIOMEM is not set
769# CONFIG_R3964 is not set
770# CONFIG_RAW_DRIVER is not set
771# CONFIG_TCG_TPM is not set
772CONFIG_I2C=y
773CONFIG_I2C_BOARDINFO=y
774CONFIG_I2C_CHARDEV=y
775CONFIG_I2C_HELPER_AUTO=y
776
777#
778# I2C Hardware Bus support
779#
780
781#
782# I2C system bus drivers (mostly embedded / system-on-chip)
783#
784# CONFIG_I2C_DESIGNWARE is not set
785# CONFIG_I2C_GPIO is not set
786# CONFIG_I2C_OCORES is not set
787CONFIG_I2C_SH_MOBILE=y
788# CONFIG_I2C_SIMTEC is not set
789
790#
791# External I2C/SMBus adapter drivers
792#
793# CONFIG_I2C_PARPORT_LIGHT is not set
794# CONFIG_I2C_TAOS_EVM is not set
795# CONFIG_I2C_TINY_USB is not set
796
797#
798# Other I2C/SMBus bus drivers
799#
800# CONFIG_I2C_PCA_PLATFORM is not set
801# CONFIG_I2C_STUB is not set
802
803#
804# Miscellaneous I2C Chip support
805#
806# CONFIG_DS1682 is not set
807# CONFIG_SENSORS_PCF8574 is not set
808# CONFIG_PCF8575 is not set
809# CONFIG_SENSORS_PCA9539 is not set
810# CONFIG_SENSORS_TSL2550 is not set
811# CONFIG_I2C_DEBUG_CORE is not set
812# CONFIG_I2C_DEBUG_ALGO is not set
813# CONFIG_I2C_DEBUG_BUS is not set
814# CONFIG_I2C_DEBUG_CHIP is not set
815CONFIG_SPI=y
816CONFIG_SPI_MASTER=y
817
818#
819# SPI Master Controller Drivers
820#
821CONFIG_SPI_BITBANG=y
822# CONFIG_SPI_GPIO is not set
823# CONFIG_SPI_SH_SCI is not set
824
825#
826# SPI Protocol Masters
827#
828# CONFIG_SPI_SPIDEV is not set
829# CONFIG_SPI_TLE62X0 is not set
830
831#
832# PPS support
833#
834# CONFIG_PPS is not set
835CONFIG_ARCH_REQUIRE_GPIOLIB=y
836CONFIG_GPIOLIB=y
837# CONFIG_GPIO_SYSFS is not set
838
839#
840# Memory mapped GPIO expanders:
841#
842
843#
844# I2C GPIO expanders:
845#
846# CONFIG_GPIO_MAX732X is not set
847# CONFIG_GPIO_PCA953X is not set
848# CONFIG_GPIO_PCF857X is not set
849
850#
851# PCI GPIO expanders:
852#
853
854#
855# SPI GPIO expanders:
856#
857# CONFIG_GPIO_MAX7301 is not set
858# CONFIG_GPIO_MCP23S08 is not set
859# CONFIG_W1 is not set
860# CONFIG_POWER_SUPPLY is not set
861# CONFIG_HWMON is not set
862# CONFIG_THERMAL is not set
863# CONFIG_THERMAL_HWMON is not set
864# CONFIG_WATCHDOG is not set
865CONFIG_SSB_POSSIBLE=y
866
867#
868# Sonics Silicon Backplane
869#
870# CONFIG_SSB is not set
871
872#
873# Multifunction device drivers
874#
875# CONFIG_MFD_CORE is not set
876# CONFIG_MFD_SM501 is not set
877# CONFIG_HTC_PASIC3 is not set
878# CONFIG_TPS65010 is not set
879# CONFIG_TWL4030_CORE is not set
880# CONFIG_MFD_TMIO is not set
881# CONFIG_PMIC_DA903X is not set
882# CONFIG_MFD_WM8400 is not set
883# CONFIG_MFD_WM8350_I2C is not set
884# CONFIG_MFD_PCF50633 is not set
885# CONFIG_AB3100_CORE is not set
886# CONFIG_EZX_PCAP is not set
887# CONFIG_REGULATOR is not set
888CONFIG_MEDIA_SUPPORT=y
889
890#
891# Multimedia core support
892#
893CONFIG_VIDEO_DEV=y
894CONFIG_VIDEO_V4L2_COMMON=y
895CONFIG_VIDEO_ALLOW_V4L1=y
896CONFIG_VIDEO_V4L1_COMPAT=y
897# CONFIG_DVB_CORE is not set
898CONFIG_VIDEO_MEDIA=y
899
900#
901# Multimedia drivers
902#
903# CONFIG_MEDIA_ATTACH is not set
904CONFIG_MEDIA_TUNER=y
905# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
906CONFIG_MEDIA_TUNER_SIMPLE=y
907CONFIG_MEDIA_TUNER_TDA8290=y
908CONFIG_MEDIA_TUNER_TDA9887=y
909CONFIG_MEDIA_TUNER_TEA5761=y
910CONFIG_MEDIA_TUNER_TEA5767=y
911CONFIG_MEDIA_TUNER_MT20XX=y
912CONFIG_MEDIA_TUNER_XC2028=y
913CONFIG_MEDIA_TUNER_XC5000=y
914CONFIG_MEDIA_TUNER_MC44S803=y
915CONFIG_VIDEO_V4L2=y
916CONFIG_VIDEO_V4L1=y
917CONFIG_VIDEOBUF_GEN=y
918CONFIG_VIDEOBUF_DMA_CONTIG=y
919CONFIG_VIDEO_CAPTURE_DRIVERS=y
920# CONFIG_VIDEO_ADV_DEBUG is not set
921# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
922CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
923# CONFIG_VIDEO_VIVI is not set
924# CONFIG_VIDEO_CPIA is not set
925# CONFIG_VIDEO_CPIA2 is not set
926# CONFIG_VIDEO_SAA5246A is not set
927# CONFIG_VIDEO_SAA5249 is not set
928CONFIG_SOC_CAMERA=y
929# CONFIG_SOC_CAMERA_MT9M001 is not set
930# CONFIG_SOC_CAMERA_MT9M111 is not set
931# CONFIG_SOC_CAMERA_MT9T031 is not set
932# CONFIG_SOC_CAMERA_MT9V022 is not set
933# CONFIG_SOC_CAMERA_TW9910 is not set
934# CONFIG_SOC_CAMERA_PLATFORM is not set
935# CONFIG_SOC_CAMERA_OV772X is not set
936CONFIG_VIDEO_SH_MOBILE_CEU=y
937# CONFIG_V4L_USB_DRIVERS is not set
938CONFIG_RADIO_ADAPTERS=y
939# CONFIG_USB_DSBR is not set
940# CONFIG_USB_SI470X is not set
941# CONFIG_USB_MR800 is not set
942# CONFIG_RADIO_TEA5764 is not set
943# CONFIG_DAB is not set
944
945#
946# Graphics support
947#
948# CONFIG_VGASTATE is not set
949# CONFIG_VIDEO_OUTPUT_CONTROL is not set
950CONFIG_FB=y
951# CONFIG_FIRMWARE_EDID is not set
952# CONFIG_FB_DDC is not set
953# CONFIG_FB_BOOT_VESA_SUPPORT is not set
954# CONFIG_FB_CFB_FILLRECT is not set
955# CONFIG_FB_CFB_COPYAREA is not set
956# CONFIG_FB_CFB_IMAGEBLIT is not set
957# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
958CONFIG_FB_SYS_FILLRECT=y
959CONFIG_FB_SYS_COPYAREA=y
960CONFIG_FB_SYS_IMAGEBLIT=y
961# CONFIG_FB_FOREIGN_ENDIAN is not set
962CONFIG_FB_SYS_FOPS=y
963CONFIG_FB_DEFERRED_IO=y
964# CONFIG_FB_SVGALIB is not set
965# CONFIG_FB_MACMODES is not set
966# CONFIG_FB_BACKLIGHT is not set
967# CONFIG_FB_MODE_HELPERS is not set
968# CONFIG_FB_TILEBLITTING is not set
969
970#
971# Frame buffer hardware drivers
972#
973# CONFIG_FB_S1D13XXX is not set
974CONFIG_FB_SH_MOBILE_LCDC=y
975# CONFIG_FB_VIRTUAL is not set
976# CONFIG_FB_METRONOME is not set
977# CONFIG_FB_MB862XX is not set
978# CONFIG_FB_BROADSHEET is not set
979# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
980
981#
982# Display device support
983#
984# CONFIG_DISPLAY_SUPPORT is not set
985
986#
987# Console display driver support
988#
989CONFIG_DUMMY_CONSOLE=y
990CONFIG_FRAMEBUFFER_CONSOLE=y
991# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
992# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
993# CONFIG_FONTS is not set
994CONFIG_FONT_8x8=y
995CONFIG_FONT_8x16=y
996CONFIG_LOGO=y
997# CONFIG_LOGO_LINUX_MONO is not set
998# CONFIG_LOGO_LINUX_VGA16 is not set
999# CONFIG_LOGO_LINUX_CLUT224 is not set
1000# CONFIG_LOGO_SUPERH_MONO is not set
1001# CONFIG_LOGO_SUPERH_VGA16 is not set
1002CONFIG_LOGO_SUPERH_CLUT224=y
1003# CONFIG_SOUND is not set
1004CONFIG_HID_SUPPORT=y
1005CONFIG_HID=y
1006# CONFIG_HID_DEBUG is not set
1007# CONFIG_HIDRAW is not set
1008
1009#
1010# USB Input Devices
1011#
1012CONFIG_USB_HID=y
1013# CONFIG_HID_PID is not set
1014# CONFIG_USB_HIDDEV is not set
1015
1016#
1017# Special HID drivers
1018#
1019# CONFIG_HID_A4TECH is not set
1020# CONFIG_HID_APPLE is not set
1021# CONFIG_HID_BELKIN is not set
1022# CONFIG_HID_CHERRY is not set
1023# CONFIG_HID_CHICONY is not set
1024# CONFIG_HID_CYPRESS is not set
1025# CONFIG_HID_DRAGONRISE is not set
1026# CONFIG_HID_EZKEY is not set
1027# CONFIG_HID_KYE is not set
1028# CONFIG_HID_GYRATION is not set
1029# CONFIG_HID_KENSINGTON is not set
1030# CONFIG_HID_LOGITECH is not set
1031# CONFIG_HID_MICROSOFT is not set
1032# CONFIG_HID_MONTEREY is not set
1033# CONFIG_HID_NTRIG is not set
1034# CONFIG_HID_PANTHERLORD is not set
1035# CONFIG_HID_PETALYNX is not set
1036# CONFIG_HID_SAMSUNG is not set
1037# CONFIG_HID_SONY is not set
1038# CONFIG_HID_SUNPLUS is not set
1039# CONFIG_HID_GREENASIA is not set
1040# CONFIG_HID_SMARTJOYPLUS is not set
1041# CONFIG_HID_TOPSEED is not set
1042# CONFIG_HID_THRUSTMASTER is not set
1043# CONFIG_HID_ZEROPLUS is not set
1044CONFIG_USB_SUPPORT=y
1045CONFIG_USB_ARCH_HAS_HCD=y
1046# CONFIG_USB_ARCH_HAS_OHCI is not set
1047# CONFIG_USB_ARCH_HAS_EHCI is not set
1048CONFIG_USB=y
1049# CONFIG_USB_DEBUG is not set
1050# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1051
1052#
1053# Miscellaneous USB options
1054#
1055CONFIG_USB_DEVICEFS=y
1056CONFIG_USB_DEVICE_CLASS=y
1057# CONFIG_USB_DYNAMIC_MINORS is not set
1058# CONFIG_USB_SUSPEND is not set
1059# CONFIG_USB_OTG is not set
1060# CONFIG_USB_OTG_WHITELIST is not set
1061# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1062CONFIG_USB_MON=y
1063# CONFIG_USB_WUSB is not set
1064# CONFIG_USB_WUSB_CBAF is not set
1065
1066#
1067# USB Host Controller Drivers
1068#
1069# CONFIG_USB_C67X00_HCD is not set
1070# CONFIG_USB_OXU210HP_HCD is not set
1071# CONFIG_USB_ISP116X_HCD is not set
1072# CONFIG_USB_ISP1760_HCD is not set
1073# CONFIG_USB_SL811_HCD is not set
1074CONFIG_USB_R8A66597_HCD=y
1075# CONFIG_USB_HWA_HCD is not set
1076
1077#
1078# USB Device Class drivers
1079#
1080# CONFIG_USB_ACM is not set
1081# CONFIG_USB_PRINTER is not set
1082# CONFIG_USB_WDM is not set
1083# CONFIG_USB_TMC is not set
1084
1085#
1086# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1087#
1088
1089#
1090# also be needed; see USB_STORAGE Help for more info
1091#
1092CONFIG_USB_STORAGE=y
1093# CONFIG_USB_STORAGE_DEBUG is not set
1094# CONFIG_USB_STORAGE_DATAFAB is not set
1095# CONFIG_USB_STORAGE_FREECOM is not set
1096# CONFIG_USB_STORAGE_ISD200 is not set
1097# CONFIG_USB_STORAGE_USBAT is not set
1098# CONFIG_USB_STORAGE_SDDR09 is not set
1099# CONFIG_USB_STORAGE_SDDR55 is not set
1100# CONFIG_USB_STORAGE_JUMPSHOT is not set
1101# CONFIG_USB_STORAGE_ALAUDA is not set
1102# CONFIG_USB_STORAGE_ONETOUCH is not set
1103# CONFIG_USB_STORAGE_KARMA is not set
1104# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1105# CONFIG_USB_LIBUSUAL is not set
1106
1107#
1108# USB Imaging devices
1109#
1110# CONFIG_USB_MDC800 is not set
1111# CONFIG_USB_MICROTEK is not set
1112
1113#
1114# USB port drivers
1115#
1116# CONFIG_USB_SERIAL is not set
1117
1118#
1119# USB Miscellaneous drivers
1120#
1121# CONFIG_USB_EMI62 is not set
1122# CONFIG_USB_EMI26 is not set
1123# CONFIG_USB_ADUTUX is not set
1124# CONFIG_USB_SEVSEG is not set
1125# CONFIG_USB_RIO500 is not set
1126# CONFIG_USB_LEGOTOWER is not set
1127# CONFIG_USB_LCD is not set
1128# CONFIG_USB_BERRY_CHARGE is not set
1129# CONFIG_USB_LED is not set
1130# CONFIG_USB_CYPRESS_CY7C63 is not set
1131# CONFIG_USB_CYTHERM is not set
1132# CONFIG_USB_IDMOUSE is not set
1133# CONFIG_USB_FTDI_ELAN is not set
1134# CONFIG_USB_APPLEDISPLAY is not set
1135# CONFIG_USB_LD is not set
1136# CONFIG_USB_TRANCEVIBRATOR is not set
1137# CONFIG_USB_IOWARRIOR is not set
1138# CONFIG_USB_TEST is not set
1139# CONFIG_USB_ISIGHTFW is not set
1140# CONFIG_USB_VST is not set
1141# CONFIG_USB_GADGET is not set
1142
1143#
1144# OTG and related infrastructure
1145#
1146# CONFIG_USB_GPIO_VBUS is not set
1147# CONFIG_NOP_USB_XCEIV is not set
1148CONFIG_MMC=y
1149# CONFIG_MMC_DEBUG is not set
1150# CONFIG_MMC_UNSAFE_RESUME is not set
1151
1152#
1153# MMC/SD/SDIO Card Drivers
1154#
1155CONFIG_MMC_BLOCK=y
1156CONFIG_MMC_BLOCK_BOUNCE=y
1157# CONFIG_SDIO_UART is not set
1158# CONFIG_MMC_TEST is not set
1159
1160#
1161# MMC/SD/SDIO Host Controller Drivers
1162#
1163# CONFIG_MMC_SDHCI is not set
1164CONFIG_MMC_SPI=y
1165# CONFIG_MEMSTICK is not set
1166# CONFIG_NEW_LEDS is not set
1167# CONFIG_ACCESSIBILITY is not set
1168CONFIG_RTC_LIB=y
1169CONFIG_RTC_CLASS=y
1170CONFIG_RTC_HCTOSYS=y
1171CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1172# CONFIG_RTC_DEBUG is not set
1173
1174#
1175# RTC interfaces
1176#
1177CONFIG_RTC_INTF_SYSFS=y
1178CONFIG_RTC_INTF_PROC=y
1179CONFIG_RTC_INTF_DEV=y
1180# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1181# CONFIG_RTC_DRV_TEST is not set
1182
1183#
1184# I2C RTC drivers
1185#
1186# CONFIG_RTC_DRV_DS1307 is not set
1187# CONFIG_RTC_DRV_DS1374 is not set
1188# CONFIG_RTC_DRV_DS1672 is not set
1189# CONFIG_RTC_DRV_MAX6900 is not set
1190# CONFIG_RTC_DRV_RS5C372 is not set
1191# CONFIG_RTC_DRV_ISL1208 is not set
1192# CONFIG_RTC_DRV_X1205 is not set
1193CONFIG_RTC_DRV_PCF8563=y
1194# CONFIG_RTC_DRV_PCF8583 is not set
1195# CONFIG_RTC_DRV_M41T80 is not set
1196# CONFIG_RTC_DRV_S35390A is not set
1197# CONFIG_RTC_DRV_FM3130 is not set
1198# CONFIG_RTC_DRV_RX8581 is not set
1199# CONFIG_RTC_DRV_RX8025 is not set
1200
1201#
1202# SPI RTC drivers
1203#
1204# CONFIG_RTC_DRV_M41T94 is not set
1205# CONFIG_RTC_DRV_DS1305 is not set
1206# CONFIG_RTC_DRV_DS1390 is not set
1207# CONFIG_RTC_DRV_MAX6902 is not set
1208# CONFIG_RTC_DRV_R9701 is not set
1209# CONFIG_RTC_DRV_RS5C348 is not set
1210# CONFIG_RTC_DRV_DS3234 is not set
1211
1212#
1213# Platform RTC drivers
1214#
1215# CONFIG_RTC_DRV_DS1286 is not set
1216# CONFIG_RTC_DRV_DS1511 is not set
1217# CONFIG_RTC_DRV_DS1553 is not set
1218# CONFIG_RTC_DRV_DS1742 is not set
1219# CONFIG_RTC_DRV_STK17TA8 is not set
1220# CONFIG_RTC_DRV_M48T86 is not set
1221# CONFIG_RTC_DRV_M48T35 is not set
1222# CONFIG_RTC_DRV_M48T59 is not set
1223# CONFIG_RTC_DRV_BQ4802 is not set
1224# CONFIG_RTC_DRV_V3020 is not set
1225
1226#
1227# on-CPU RTC drivers
1228#
1229# CONFIG_RTC_DRV_SH is not set
1230# CONFIG_RTC_DRV_GENERIC is not set
1231# CONFIG_DMADEVICES is not set
1232# CONFIG_AUXDISPLAY is not set
1233CONFIG_UIO=y
1234# CONFIG_UIO_PDRV is not set
1235CONFIG_UIO_PDRV_GENIRQ=y
1236# CONFIG_UIO_SMX is not set
1237# CONFIG_UIO_SERCOS3 is not set
1238
1239#
1240# TI VLYNQ
1241#
1242# CONFIG_STAGING is not set
1243
1244#
1245# File systems
1246#
1247CONFIG_EXT2_FS=y
1248CONFIG_EXT2_FS_XATTR=y
1249CONFIG_EXT2_FS_POSIX_ACL=y
1250CONFIG_EXT2_FS_SECURITY=y
1251# CONFIG_EXT2_FS_XIP is not set
1252CONFIG_EXT3_FS=y
1253# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1254CONFIG_EXT3_FS_XATTR=y
1255CONFIG_EXT3_FS_POSIX_ACL=y
1256CONFIG_EXT3_FS_SECURITY=y
1257# CONFIG_EXT4_FS is not set
1258CONFIG_JBD=y
1259# CONFIG_JBD_DEBUG is not set
1260CONFIG_FS_MBCACHE=y
1261# CONFIG_REISERFS_FS is not set
1262# CONFIG_JFS_FS is not set
1263CONFIG_FS_POSIX_ACL=y
1264# CONFIG_XFS_FS is not set
1265# CONFIG_GFS2_FS is not set
1266# CONFIG_OCFS2_FS is not set
1267# CONFIG_BTRFS_FS is not set
1268CONFIG_FILE_LOCKING=y
1269CONFIG_FSNOTIFY=y
1270CONFIG_DNOTIFY=y
1271CONFIG_INOTIFY=y
1272CONFIG_INOTIFY_USER=y
1273# CONFIG_QUOTA is not set
1274# CONFIG_AUTOFS_FS is not set
1275# CONFIG_AUTOFS4_FS is not set
1276# CONFIG_FUSE_FS is not set
1277
1278#
1279# Caches
1280#
1281# CONFIG_FSCACHE is not set
1282
1283#
1284# CD-ROM/DVD Filesystems
1285#
1286# CONFIG_ISO9660_FS is not set
1287# CONFIG_UDF_FS is not set
1288
1289#
1290# DOS/FAT/NT Filesystems
1291#
1292CONFIG_FAT_FS=y
1293# CONFIG_MSDOS_FS is not set
1294CONFIG_VFAT_FS=y
1295CONFIG_FAT_DEFAULT_CODEPAGE=437
1296CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1297# CONFIG_NTFS_FS is not set
1298
1299#
1300# Pseudo filesystems
1301#
1302CONFIG_PROC_FS=y
1303CONFIG_PROC_KCORE=y
1304CONFIG_PROC_SYSCTL=y
1305CONFIG_PROC_PAGE_MONITOR=y
1306CONFIG_SYSFS=y
1307CONFIG_TMPFS=y
1308# CONFIG_TMPFS_POSIX_ACL is not set
1309# CONFIG_HUGETLBFS is not set
1310# CONFIG_HUGETLB_PAGE is not set
1311# CONFIG_CONFIGFS_FS is not set
1312CONFIG_MISC_FILESYSTEMS=y
1313# CONFIG_ADFS_FS is not set
1314# CONFIG_AFFS_FS is not set
1315# CONFIG_HFS_FS is not set
1316# CONFIG_HFSPLUS_FS is not set
1317# CONFIG_BEFS_FS is not set
1318# CONFIG_BFS_FS is not set
1319# CONFIG_EFS_FS is not set
1320# CONFIG_JFFS2_FS is not set
1321# CONFIG_UBIFS_FS is not set
1322# CONFIG_CRAMFS is not set
1323# CONFIG_SQUASHFS is not set
1324# CONFIG_VXFS_FS is not set
1325# CONFIG_MINIX_FS is not set
1326# CONFIG_OMFS_FS is not set
1327# CONFIG_HPFS_FS is not set
1328# CONFIG_QNX4FS_FS is not set
1329# CONFIG_ROMFS_FS is not set
1330# CONFIG_SYSV_FS is not set
1331# CONFIG_UFS_FS is not set
1332# CONFIG_NILFS2_FS is not set
1333CONFIG_NETWORK_FILESYSTEMS=y
1334CONFIG_NFS_FS=y
1335CONFIG_NFS_V3=y
1336# CONFIG_NFS_V3_ACL is not set
1337# CONFIG_NFS_V4 is not set
1338CONFIG_ROOT_NFS=y
1339CONFIG_NFSD=y
1340CONFIG_NFSD_V3=y
1341# CONFIG_NFSD_V3_ACL is not set
1342# CONFIG_NFSD_V4 is not set
1343CONFIG_LOCKD=y
1344CONFIG_LOCKD_V4=y
1345CONFIG_EXPORTFS=y
1346CONFIG_NFS_COMMON=y
1347CONFIG_SUNRPC=y
1348# CONFIG_RPCSEC_GSS_KRB5 is not set
1349# CONFIG_RPCSEC_GSS_SPKM3 is not set
1350# CONFIG_SMB_FS is not set
1351# CONFIG_CIFS is not set
1352# CONFIG_NCP_FS is not set
1353# CONFIG_CODA_FS is not set
1354# CONFIG_AFS_FS is not set
1355
1356#
1357# Partition Types
1358#
1359# CONFIG_PARTITION_ADVANCED is not set
1360CONFIG_MSDOS_PARTITION=y
1361CONFIG_NLS=y
1362CONFIG_NLS_DEFAULT="iso8859-1"
1363CONFIG_NLS_CODEPAGE_437=y
1364# CONFIG_NLS_CODEPAGE_737 is not set
1365# CONFIG_NLS_CODEPAGE_775 is not set
1366# CONFIG_NLS_CODEPAGE_850 is not set
1367# CONFIG_NLS_CODEPAGE_852 is not set
1368# CONFIG_NLS_CODEPAGE_855 is not set
1369# CONFIG_NLS_CODEPAGE_857 is not set
1370# CONFIG_NLS_CODEPAGE_860 is not set
1371# CONFIG_NLS_CODEPAGE_861 is not set
1372# CONFIG_NLS_CODEPAGE_862 is not set
1373# CONFIG_NLS_CODEPAGE_863 is not set
1374# CONFIG_NLS_CODEPAGE_864 is not set
1375# CONFIG_NLS_CODEPAGE_865 is not set
1376# CONFIG_NLS_CODEPAGE_866 is not set
1377# CONFIG_NLS_CODEPAGE_869 is not set
1378# CONFIG_NLS_CODEPAGE_936 is not set
1379# CONFIG_NLS_CODEPAGE_950 is not set
1380CONFIG_NLS_CODEPAGE_932=y
1381# CONFIG_NLS_CODEPAGE_949 is not set
1382# CONFIG_NLS_CODEPAGE_874 is not set
1383# CONFIG_NLS_ISO8859_8 is not set
1384# CONFIG_NLS_CODEPAGE_1250 is not set
1385# CONFIG_NLS_CODEPAGE_1251 is not set
1386# CONFIG_NLS_ASCII is not set
1387CONFIG_NLS_ISO8859_1=y
1388# CONFIG_NLS_ISO8859_2 is not set
1389# CONFIG_NLS_ISO8859_3 is not set
1390# CONFIG_NLS_ISO8859_4 is not set
1391# CONFIG_NLS_ISO8859_5 is not set
1392# CONFIG_NLS_ISO8859_6 is not set
1393# CONFIG_NLS_ISO8859_7 is not set
1394# CONFIG_NLS_ISO8859_9 is not set
1395# CONFIG_NLS_ISO8859_13 is not set
1396# CONFIG_NLS_ISO8859_14 is not set
1397# CONFIG_NLS_ISO8859_15 is not set
1398# CONFIG_NLS_KOI8_R is not set
1399# CONFIG_NLS_KOI8_U is not set
1400# CONFIG_NLS_UTF8 is not set
1401# CONFIG_DLM is not set
1402
1403#
1404# Kernel hacking
1405#
1406CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1407# CONFIG_PRINTK_TIME is not set
1408CONFIG_ENABLE_WARN_DEPRECATED=y
1409# CONFIG_ENABLE_MUST_CHECK is not set
1410CONFIG_FRAME_WARN=1024
1411# CONFIG_MAGIC_SYSRQ is not set
1412# CONFIG_UNUSED_SYMBOLS is not set
1413CONFIG_DEBUG_FS=y
1414# CONFIG_HEADERS_CHECK is not set
1415# CONFIG_DEBUG_KERNEL is not set
1416# CONFIG_DEBUG_BUGVERBOSE is not set
1417# CONFIG_DEBUG_MEMORY_INIT is not set
1418# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1419# CONFIG_LATENCYTOP is not set
1420CONFIG_SYSCTL_SYSCALL_CHECK=y
1421CONFIG_HAVE_FUNCTION_TRACER=y
1422CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1423CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1424CONFIG_HAVE_DYNAMIC_FTRACE=y
1425CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1426CONFIG_HAVE_FTRACE_SYSCALLS=y
1427CONFIG_TRACING_SUPPORT=y
1428# CONFIG_FTRACE is not set
1429# CONFIG_DYNAMIC_DEBUG is not set
1430# CONFIG_DMA_API_DEBUG is not set
1431# CONFIG_SAMPLES is not set
1432CONFIG_HAVE_ARCH_KGDB=y
1433# CONFIG_SH_STANDARD_BIOS is not set
1434# CONFIG_EARLY_SCIF_CONSOLE is not set
1435# CONFIG_DWARF_UNWINDER is not set
1436
1437#
1438# Security options
1439#
1440# CONFIG_KEYS is not set
1441# CONFIG_SECURITY is not set
1442# CONFIG_SECURITYFS is not set
1443# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1444CONFIG_CRYPTO=y
1445
1446#
1447# Crypto core or helper
1448#
1449# CONFIG_CRYPTO_FIPS is not set
1450CONFIG_CRYPTO_ALGAPI=y
1451CONFIG_CRYPTO_ALGAPI2=y
1452CONFIG_CRYPTO_AEAD2=y
1453CONFIG_CRYPTO_BLKCIPHER=y
1454CONFIG_CRYPTO_BLKCIPHER2=y
1455CONFIG_CRYPTO_HASH2=y
1456CONFIG_CRYPTO_RNG2=y
1457CONFIG_CRYPTO_PCOMP=y
1458CONFIG_CRYPTO_MANAGER=y
1459CONFIG_CRYPTO_MANAGER2=y
1460# CONFIG_CRYPTO_GF128MUL is not set
1461# CONFIG_CRYPTO_NULL is not set
1462CONFIG_CRYPTO_WORKQUEUE=y
1463# CONFIG_CRYPTO_CRYPTD is not set
1464# CONFIG_CRYPTO_AUTHENC is not set
1465# CONFIG_CRYPTO_TEST is not set
1466
1467#
1468# Authenticated Encryption with Associated Data
1469#
1470# CONFIG_CRYPTO_CCM is not set
1471# CONFIG_CRYPTO_GCM is not set
1472# CONFIG_CRYPTO_SEQIV is not set
1473
1474#
1475# Block modes
1476#
1477CONFIG_CRYPTO_CBC=y
1478# CONFIG_CRYPTO_CTR is not set
1479# CONFIG_CRYPTO_CTS is not set
1480# CONFIG_CRYPTO_ECB is not set
1481# CONFIG_CRYPTO_LRW is not set
1482# CONFIG_CRYPTO_PCBC is not set
1483# CONFIG_CRYPTO_XTS is not set
1484
1485#
1486# Hash modes
1487#
1488# CONFIG_CRYPTO_HMAC is not set
1489# CONFIG_CRYPTO_XCBC is not set
1490
1491#
1492# Digest
1493#
1494# CONFIG_CRYPTO_CRC32C is not set
1495# CONFIG_CRYPTO_MD4 is not set
1496# CONFIG_CRYPTO_MD5 is not set
1497# CONFIG_CRYPTO_MICHAEL_MIC is not set
1498# CONFIG_CRYPTO_RMD128 is not set
1499# CONFIG_CRYPTO_RMD160 is not set
1500# CONFIG_CRYPTO_RMD256 is not set
1501# CONFIG_CRYPTO_RMD320 is not set
1502# CONFIG_CRYPTO_SHA1 is not set
1503# CONFIG_CRYPTO_SHA256 is not set
1504# CONFIG_CRYPTO_SHA512 is not set
1505# CONFIG_CRYPTO_TGR192 is not set
1506# CONFIG_CRYPTO_WP512 is not set
1507
1508#
1509# Ciphers
1510#
1511# CONFIG_CRYPTO_AES is not set
1512# CONFIG_CRYPTO_ANUBIS is not set
1513# CONFIG_CRYPTO_ARC4 is not set
1514# CONFIG_CRYPTO_BLOWFISH is not set
1515# CONFIG_CRYPTO_CAMELLIA is not set
1516# CONFIG_CRYPTO_CAST5 is not set
1517# CONFIG_CRYPTO_CAST6 is not set
1518# CONFIG_CRYPTO_DES is not set
1519# CONFIG_CRYPTO_FCRYPT is not set
1520# CONFIG_CRYPTO_KHAZAD is not set
1521# CONFIG_CRYPTO_SALSA20 is not set
1522# CONFIG_CRYPTO_SEED is not set
1523# CONFIG_CRYPTO_SERPENT is not set
1524# CONFIG_CRYPTO_TEA is not set
1525# CONFIG_CRYPTO_TWOFISH is not set
1526
1527#
1528# Compression
1529#
1530# CONFIG_CRYPTO_DEFLATE is not set
1531# CONFIG_CRYPTO_ZLIB is not set
1532# CONFIG_CRYPTO_LZO is not set
1533
1534#
1535# Random Number Generation
1536#
1537# CONFIG_CRYPTO_ANSI_CPRNG is not set
1538CONFIG_CRYPTO_HW=y
1539# CONFIG_BINARY_PRINTF is not set
1540
1541#
1542# Library routines
1543#
1544CONFIG_BITREVERSE=y
1545CONFIG_GENERIC_FIND_LAST_BIT=y
1546# CONFIG_CRC_CCITT is not set
1547# CONFIG_CRC16 is not set
1548CONFIG_CRC_T10DIF=y
1549CONFIG_CRC_ITU_T=y
1550CONFIG_CRC32=y
1551CONFIG_CRC7=y
1552# CONFIG_LIBCRC32C is not set
1553CONFIG_HAS_IOMEM=y
1554CONFIG_HAS_IOPORT=y
1555CONFIG_HAS_DMA=y
1556CONFIG_HAVE_LMB=y
1557CONFIG_NLATTR=y
1558CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig
new file mode 100644
index 00000000000..c0f9263e138
--- /dev/null
+++ b/arch/sh/configs/kfr2r09-romimage_defconfig
@@ -0,0 +1,774 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc6
4# Thu Aug 20 15:09:16 2009
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y
18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y
26CONFIG_LOCKDEP_SUPPORT=y
27CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U32 is not set
29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y
35
36#
37# General setup
38#
39CONFIG_EXPERIMENTAL=y
40CONFIG_BROKEN_ON_SMP=y
41CONFIG_INIT_ENV_ARG_LIMIT=32
42CONFIG_LOCALVERSION=""
43# CONFIG_LOCALVERSION_AUTO is not set
44CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set
50CONFIG_SYSVIPC=y
51CONFIG_SYSVIPC_SYSCTL=y
52# CONFIG_POSIX_MQUEUE is not set
53CONFIG_BSD_PROCESS_ACCT=y
54# CONFIG_BSD_PROCESS_ACCT_V3 is not set
55# CONFIG_TASKSTATS is not set
56# CONFIG_AUDIT is not set
57
58#
59# RCU Subsystem
60#
61CONFIG_CLASSIC_RCU=y
62# CONFIG_TREE_RCU is not set
63# CONFIG_PREEMPT_RCU is not set
64# CONFIG_TREE_RCU_TRACE is not set
65# CONFIG_PREEMPT_RCU_TRACE is not set
66CONFIG_IKCONFIG=y
67CONFIG_IKCONFIG_PROC=y
68CONFIG_LOG_BUF_SHIFT=14
69CONFIG_GROUP_SCHED=y
70CONFIG_FAIR_GROUP_SCHED=y
71# CONFIG_RT_GROUP_SCHED is not set
72CONFIG_USER_SCHED=y
73# CONFIG_CGROUP_SCHED is not set
74# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y
77# CONFIG_RELAY is not set
78# CONFIG_NAMESPACES is not set
79CONFIG_BLK_DEV_INITRD=y
80CONFIG_INITRAMFS_SOURCE=""
81CONFIG_INITRAMFS_ROOT_UID=0
82CONFIG_INITRAMFS_ROOT_GID=0
83CONFIG_RD_GZIP=y
84# CONFIG_RD_BZIP2 is not set
85# CONFIG_RD_LZMA is not set
86# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
87CONFIG_INITRAMFS_COMPRESSION_GZIP=y
88# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
89# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
90CONFIG_CC_OPTIMIZE_FOR_SIZE=y
91CONFIG_SYSCTL=y
92CONFIG_ANON_INODES=y
93CONFIG_EMBEDDED=y
94CONFIG_UID16=y
95CONFIG_SYSCTL_SYSCALL=y
96# CONFIG_KALLSYMS is not set
97CONFIG_HOTPLUG=y
98CONFIG_PRINTK=y
99CONFIG_BUG=y
100CONFIG_ELF_CORE=y
101CONFIG_BASE_FULL=y
102CONFIG_FUTEX=y
103CONFIG_EPOLL=y
104CONFIG_SIGNALFD=y
105CONFIG_TIMERFD=y
106CONFIG_EVENTFD=y
107CONFIG_SHMEM=y
108CONFIG_AIO=y
109CONFIG_HAVE_PERF_COUNTERS=y
110
111#
112# Performance Counters
113#
114# CONFIG_PERF_COUNTERS is not set
115CONFIG_VM_EVENT_COUNTERS=y
116# CONFIG_STRIP_ASM_SYMS is not set
117CONFIG_COMPAT_BRK=y
118CONFIG_SLAB=y
119# CONFIG_SLUB is not set
120# CONFIG_SLOB is not set
121# CONFIG_PROFILING is not set
122# CONFIG_MARKERS is not set
123CONFIG_HAVE_OPROFILE=y
124CONFIG_HAVE_IOREMAP_PROT=y
125CONFIG_HAVE_KPROBES=y
126CONFIG_HAVE_KRETPROBES=y
127CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_CLK=y
129CONFIG_HAVE_DMA_API_DEBUG=y
130
131#
132# GCOV-based kernel profiling
133#
134# CONFIG_GCOV_KERNEL is not set
135# CONFIG_SLOW_WORK is not set
136CONFIG_HAVE_GENERIC_DMA_COHERENT=y
137CONFIG_SLABINFO=y
138CONFIG_RT_MUTEXES=y
139CONFIG_BASE_SMALL=0
140# CONFIG_MODULES is not set
141# CONFIG_BLOCK is not set
142# CONFIG_FREEZER is not set
143
144#
145# System type
146#
147CONFIG_CPU_SH4=y
148CONFIG_CPU_SH4A=y
149CONFIG_CPU_SHX2=y
150CONFIG_ARCH_SHMOBILE=y
151# CONFIG_CPU_SUBTYPE_SH7619 is not set
152# CONFIG_CPU_SUBTYPE_SH7201 is not set
153# CONFIG_CPU_SUBTYPE_SH7203 is not set
154# CONFIG_CPU_SUBTYPE_SH7206 is not set
155# CONFIG_CPU_SUBTYPE_SH7263 is not set
156# CONFIG_CPU_SUBTYPE_MXG is not set
157# CONFIG_CPU_SUBTYPE_SH7705 is not set
158# CONFIG_CPU_SUBTYPE_SH7706 is not set
159# CONFIG_CPU_SUBTYPE_SH7707 is not set
160# CONFIG_CPU_SUBTYPE_SH7708 is not set
161# CONFIG_CPU_SUBTYPE_SH7709 is not set
162# CONFIG_CPU_SUBTYPE_SH7710 is not set
163# CONFIG_CPU_SUBTYPE_SH7712 is not set
164# CONFIG_CPU_SUBTYPE_SH7720 is not set
165# CONFIG_CPU_SUBTYPE_SH7721 is not set
166# CONFIG_CPU_SUBTYPE_SH7750 is not set
167# CONFIG_CPU_SUBTYPE_SH7091 is not set
168# CONFIG_CPU_SUBTYPE_SH7750R is not set
169# CONFIG_CPU_SUBTYPE_SH7750S is not set
170# CONFIG_CPU_SUBTYPE_SH7751 is not set
171# CONFIG_CPU_SUBTYPE_SH7751R is not set
172# CONFIG_CPU_SUBTYPE_SH7760 is not set
173# CONFIG_CPU_SUBTYPE_SH4_202 is not set
174# CONFIG_CPU_SUBTYPE_SH7723 is not set
175CONFIG_CPU_SUBTYPE_SH7724=y
176# CONFIG_CPU_SUBTYPE_SH7763 is not set
177# CONFIG_CPU_SUBTYPE_SH7770 is not set
178# CONFIG_CPU_SUBTYPE_SH7780 is not set
179# CONFIG_CPU_SUBTYPE_SH7785 is not set
180# CONFIG_CPU_SUBTYPE_SH7786 is not set
181# CONFIG_CPU_SUBTYPE_SHX3 is not set
182# CONFIG_CPU_SUBTYPE_SH7343 is not set
183# CONFIG_CPU_SUBTYPE_SH7722 is not set
184# CONFIG_CPU_SUBTYPE_SH7366 is not set
185
186#
187# Memory management options
188#
189CONFIG_QUICKLIST=y
190CONFIG_MMU=y
191CONFIG_PAGE_OFFSET=0x80000000
192CONFIG_FORCE_MAX_ZONEORDER=11
193CONFIG_MEMORY_START=0x08000000
194CONFIG_MEMORY_SIZE=0x08000000
195CONFIG_29BIT=y
196# CONFIG_X2TLB is not set
197CONFIG_VSYSCALL=y
198CONFIG_ARCH_FLATMEM_ENABLE=y
199CONFIG_ARCH_SPARSEMEM_ENABLE=y
200CONFIG_ARCH_SPARSEMEM_DEFAULT=y
201CONFIG_MAX_ACTIVE_REGIONS=1
202CONFIG_ARCH_POPULATES_NODE_MAP=y
203CONFIG_ARCH_SELECT_MEMORY_MODEL=y
204CONFIG_PAGE_SIZE_4KB=y
205# CONFIG_PAGE_SIZE_8KB is not set
206# CONFIG_PAGE_SIZE_16KB is not set
207# CONFIG_PAGE_SIZE_64KB is not set
208CONFIG_SELECT_MEMORY_MODEL=y
209CONFIG_FLATMEM_MANUAL=y
210# CONFIG_DISCONTIGMEM_MANUAL is not set
211# CONFIG_SPARSEMEM_MANUAL is not set
212CONFIG_FLATMEM=y
213CONFIG_FLAT_NODE_MEM_MAP=y
214CONFIG_SPARSEMEM_STATIC=y
215CONFIG_PAGEFLAGS_EXTENDED=y
216CONFIG_SPLIT_PTLOCK_CPUS=4
217# CONFIG_PHYS_ADDR_T_64BIT is not set
218CONFIG_ZONE_DMA_FLAG=0
219CONFIG_NR_QUICK=2
220CONFIG_HAVE_MLOCK=y
221CONFIG_HAVE_MLOCKED_PAGE_BIT=y
222CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
223
224#
225# Cache configuration
226#
227CONFIG_CACHE_WRITEBACK=y
228# CONFIG_CACHE_WRITETHROUGH is not set
229# CONFIG_CACHE_OFF is not set
230
231#
232# Processor features
233#
234CONFIG_CPU_LITTLE_ENDIAN=y
235# CONFIG_CPU_BIG_ENDIAN is not set
236CONFIG_SH_FPU=y
237# CONFIG_SH_STORE_QUEUES is not set
238CONFIG_CPU_HAS_INTEVT=y
239CONFIG_CPU_HAS_SR_RB=y
240CONFIG_CPU_HAS_FPU=y
241
242#
243# Board support
244#
245# CONFIG_SH_7724_SOLUTION_ENGINE is not set
246CONFIG_SH_KFR2R09=y
247# CONFIG_SH_ECOVEC is not set
248
249#
250# Timer and clock configuration
251#
252# CONFIG_SH_TIMER_TMU is not set
253CONFIG_SH_TIMER_CMT=y
254CONFIG_SH_PCLK_FREQ=33333333
255CONFIG_SH_CLK_CPG=y
256# CONFIG_NO_HZ is not set
257# CONFIG_HIGH_RES_TIMERS is not set
258CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
259
260#
261# CPU Frequency scaling
262#
263# CONFIG_CPU_FREQ is not set
264
265#
266# DMA support
267#
268# CONFIG_SH_DMA is not set
269
270#
271# Companion Chips
272#
273
274#
275# Additional SuperH Device Drivers
276#
277# CONFIG_HEARTBEAT is not set
278# CONFIG_PUSH_SWITCH is not set
279
280#
281# Kernel features
282#
283CONFIG_HZ_100=y
284# CONFIG_HZ_250 is not set
285# CONFIG_HZ_300 is not set
286# CONFIG_HZ_1000 is not set
287CONFIG_HZ=100
288# CONFIG_SCHED_HRTICK is not set
289CONFIG_KEXEC=y
290# CONFIG_CRASH_DUMP is not set
291# CONFIG_SECCOMP is not set
292CONFIG_PREEMPT_NONE=y
293# CONFIG_PREEMPT_VOLUNTARY is not set
294# CONFIG_PREEMPT is not set
295CONFIG_GUSA=y
296# CONFIG_SPARSE_IRQ is not set
297
298#
299# Boot options
300#
301CONFIG_ZERO_PAGE_OFFSET=0x00001000
302CONFIG_BOOT_LINK_OFFSET=0x00800000
303CONFIG_ENTRY_OFFSET=0x00001000
304CONFIG_CMDLINE_BOOL=y
305CONFIG_CMDLINE="console=ttySC1,115200 quiet"
306
307#
308# Bus options
309#
310# CONFIG_ARCH_SUPPORTS_MSI is not set
311# CONFIG_PCCARD is not set
312
313#
314# Executable file formats
315#
316CONFIG_BINFMT_ELF=y
317# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
318# CONFIG_HAVE_AOUT is not set
319# CONFIG_BINFMT_MISC is not set
320
321#
322# Power management options (EXPERIMENTAL)
323#
324CONFIG_PM=y
325# CONFIG_PM_DEBUG is not set
326# CONFIG_SUSPEND is not set
327# CONFIG_CPU_IDLE is not set
328CONFIG_NET=y
329
330#
331# Networking options
332#
333CONFIG_PACKET=y
334CONFIG_PACKET_MMAP=y
335CONFIG_UNIX=y
336# CONFIG_NET_KEY is not set
337CONFIG_INET=y
338# CONFIG_IP_MULTICAST is not set
339# CONFIG_IP_ADVANCED_ROUTER is not set
340CONFIG_IP_FIB_HASH=y
341# CONFIG_IP_PNP is not set
342# CONFIG_NET_IPIP is not set
343# CONFIG_NET_IPGRE is not set
344# CONFIG_ARPD is not set
345# CONFIG_SYN_COOKIES is not set
346# CONFIG_INET_AH is not set
347# CONFIG_INET_ESP is not set
348# CONFIG_INET_IPCOMP is not set
349# CONFIG_INET_XFRM_TUNNEL is not set
350# CONFIG_INET_TUNNEL is not set
351# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
352# CONFIG_INET_XFRM_MODE_TUNNEL is not set
353# CONFIG_INET_XFRM_MODE_BEET is not set
354# CONFIG_INET_LRO is not set
355# CONFIG_INET_DIAG is not set
356# CONFIG_TCP_CONG_ADVANCED is not set
357CONFIG_TCP_CONG_CUBIC=y
358CONFIG_DEFAULT_TCP_CONG="cubic"
359# CONFIG_TCP_MD5SIG is not set
360# CONFIG_IPV6 is not set
361# CONFIG_NETWORK_SECMARK is not set
362# CONFIG_NETFILTER is not set
363# CONFIG_IP_DCCP is not set
364# CONFIG_IP_SCTP is not set
365# CONFIG_TIPC is not set
366# CONFIG_ATM is not set
367# CONFIG_BRIDGE is not set
368# CONFIG_NET_DSA is not set
369# CONFIG_VLAN_8021Q is not set
370# CONFIG_DECNET is not set
371# CONFIG_LLC2 is not set
372# CONFIG_IPX is not set
373# CONFIG_ATALK is not set
374# CONFIG_X25 is not set
375# CONFIG_LAPB is not set
376# CONFIG_ECONET is not set
377# CONFIG_WAN_ROUTER is not set
378# CONFIG_PHONET is not set
379# CONFIG_IEEE802154 is not set
380# CONFIG_NET_SCHED is not set
381# CONFIG_DCB is not set
382
383#
384# Network testing
385#
386# CONFIG_NET_PKTGEN is not set
387# CONFIG_HAMRADIO is not set
388# CONFIG_CAN is not set
389# CONFIG_IRDA is not set
390# CONFIG_BT is not set
391# CONFIG_AF_RXRPC is not set
392# CONFIG_WIRELESS is not set
393# CONFIG_WIMAX is not set
394# CONFIG_RFKILL is not set
395# CONFIG_NET_9P is not set
396
397#
398# Device Drivers
399#
400
401#
402# Generic Driver Options
403#
404CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
405CONFIG_STANDALONE=y
406CONFIG_PREVENT_FIRMWARE_BUILD=y
407CONFIG_FW_LOADER=y
408CONFIG_FIRMWARE_IN_KERNEL=y
409CONFIG_EXTRA_FIRMWARE=""
410# CONFIG_SYS_HYPERVISOR is not set
411# CONFIG_CONNECTOR is not set
412# CONFIG_MTD is not set
413# CONFIG_PARPORT is not set
414# CONFIG_MISC_DEVICES is not set
415CONFIG_HAVE_IDE=y
416
417#
418# SCSI device support
419#
420# CONFIG_SCSI_DMA is not set
421# CONFIG_SCSI_NETLINK is not set
422# CONFIG_NETDEVICES is not set
423# CONFIG_ISDN is not set
424# CONFIG_PHONE is not set
425
426#
427# Input device support
428#
429CONFIG_INPUT=y
430# CONFIG_INPUT_FF_MEMLESS is not set
431# CONFIG_INPUT_POLLDEV is not set
432
433#
434# Userland interfaces
435#
436# CONFIG_INPUT_MOUSEDEV is not set
437# CONFIG_INPUT_JOYDEV is not set
438# CONFIG_INPUT_EVDEV is not set
439# CONFIG_INPUT_EVBUG is not set
440
441#
442# Input Device Drivers
443#
444# CONFIG_INPUT_KEYBOARD is not set
445# CONFIG_INPUT_MOUSE is not set
446# CONFIG_INPUT_JOYSTICK is not set
447# CONFIG_INPUT_TABLET is not set
448# CONFIG_INPUT_TOUCHSCREEN is not set
449# CONFIG_INPUT_MISC is not set
450
451#
452# Hardware I/O ports
453#
454# CONFIG_SERIO is not set
455# CONFIG_GAMEPORT is not set
456
457#
458# Character devices
459#
460CONFIG_VT=y
461CONFIG_CONSOLE_TRANSLATIONS=y
462CONFIG_VT_CONSOLE=y
463CONFIG_HW_CONSOLE=y
464CONFIG_VT_HW_CONSOLE_BINDING=y
465CONFIG_DEVKMEM=y
466# CONFIG_SERIAL_NONSTANDARD is not set
467
468#
469# Serial drivers
470#
471# CONFIG_SERIAL_8250 is not set
472
473#
474# Non-8250 serial port support
475#
476CONFIG_SERIAL_SH_SCI=y
477CONFIG_SERIAL_SH_SCI_NR_UARTS=6
478CONFIG_SERIAL_SH_SCI_CONSOLE=y
479CONFIG_SERIAL_CORE=y
480CONFIG_SERIAL_CORE_CONSOLE=y
481CONFIG_UNIX98_PTYS=y
482# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
483CONFIG_LEGACY_PTYS=y
484CONFIG_LEGACY_PTY_COUNT=256
485# CONFIG_IPMI_HANDLER is not set
486CONFIG_HW_RANDOM=y
487# CONFIG_HW_RANDOM_TIMERIOMEM is not set
488# CONFIG_R3964 is not set
489# CONFIG_TCG_TPM is not set
490CONFIG_I2C=y
491CONFIG_I2C_BOARDINFO=y
492# CONFIG_I2C_CHARDEV is not set
493CONFIG_I2C_HELPER_AUTO=y
494
495#
496# I2C Hardware Bus support
497#
498
499#
500# I2C system bus drivers (mostly embedded / system-on-chip)
501#
502# CONFIG_I2C_DESIGNWARE is not set
503# CONFIG_I2C_GPIO is not set
504# CONFIG_I2C_OCORES is not set
505CONFIG_I2C_SH_MOBILE=y
506# CONFIG_I2C_SIMTEC is not set
507
508#
509# External I2C/SMBus adapter drivers
510#
511# CONFIG_I2C_PARPORT_LIGHT is not set
512# CONFIG_I2C_TAOS_EVM is not set
513
514#
515# Other I2C/SMBus bus drivers
516#
517# CONFIG_I2C_PCA_PLATFORM is not set
518
519#
520# Miscellaneous I2C Chip support
521#
522# CONFIG_DS1682 is not set
523# CONFIG_SENSORS_PCF8574 is not set
524# CONFIG_PCF8575 is not set
525# CONFIG_SENSORS_PCA9539 is not set
526# CONFIG_SENSORS_TSL2550 is not set
527# CONFIG_I2C_DEBUG_CORE is not set
528# CONFIG_I2C_DEBUG_ALGO is not set
529# CONFIG_I2C_DEBUG_BUS is not set
530# CONFIG_I2C_DEBUG_CHIP is not set
531# CONFIG_SPI is not set
532
533#
534# PPS support
535#
536# CONFIG_PPS is not set
537CONFIG_ARCH_REQUIRE_GPIOLIB=y
538CONFIG_GPIOLIB=y
539CONFIG_GPIO_SYSFS=y
540
541#
542# Memory mapped GPIO expanders:
543#
544
545#
546# I2C GPIO expanders:
547#
548# CONFIG_GPIO_MAX732X is not set
549# CONFIG_GPIO_PCA953X is not set
550# CONFIG_GPIO_PCF857X is not set
551
552#
553# PCI GPIO expanders:
554#
555
556#
557# SPI GPIO expanders:
558#
559# CONFIG_W1 is not set
560# CONFIG_POWER_SUPPLY is not set
561# CONFIG_HWMON is not set
562# CONFIG_THERMAL is not set
563# CONFIG_THERMAL_HWMON is not set
564# CONFIG_WATCHDOG is not set
565CONFIG_SSB_POSSIBLE=y
566
567#
568# Sonics Silicon Backplane
569#
570# CONFIG_SSB is not set
571
572#
573# Multifunction device drivers
574#
575# CONFIG_MFD_CORE is not set
576# CONFIG_MFD_SM501 is not set
577# CONFIG_HTC_PASIC3 is not set
578# CONFIG_TPS65010 is not set
579# CONFIG_TWL4030_CORE is not set
580# CONFIG_MFD_TMIO is not set
581# CONFIG_PMIC_DA903X is not set
582# CONFIG_MFD_WM8400 is not set
583# CONFIG_MFD_WM8350_I2C is not set
584# CONFIG_MFD_PCF50633 is not set
585# CONFIG_AB3100_CORE is not set
586# CONFIG_REGULATOR is not set
587# CONFIG_MEDIA_SUPPORT is not set
588
589#
590# Graphics support
591#
592# CONFIG_VGASTATE is not set
593# CONFIG_VIDEO_OUTPUT_CONTROL is not set
594# CONFIG_FB is not set
595# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
596
597#
598# Display device support
599#
600# CONFIG_DISPLAY_SUPPORT is not set
601
602#
603# Console display driver support
604#
605CONFIG_DUMMY_CONSOLE=y
606# CONFIG_SOUND is not set
607# CONFIG_HID_SUPPORT is not set
608CONFIG_USB_SUPPORT=y
609CONFIG_USB_ARCH_HAS_HCD=y
610# CONFIG_USB_ARCH_HAS_OHCI is not set
611# CONFIG_USB_ARCH_HAS_EHCI is not set
612# CONFIG_USB is not set
613# CONFIG_USB_OTG_WHITELIST is not set
614# CONFIG_USB_OTG_BLACKLIST_HUB is not set
615# CONFIG_USB_GADGET_MUSB_HDRC is not set
616
617#
618# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
619#
620CONFIG_USB_GADGET=y
621# CONFIG_USB_GADGET_DEBUG_FILES is not set
622# CONFIG_USB_GADGET_DEBUG_FS is not set
623CONFIG_USB_GADGET_VBUS_DRAW=2
624CONFIG_USB_GADGET_SELECTED=y
625# CONFIG_USB_GADGET_AT91 is not set
626# CONFIG_USB_GADGET_ATMEL_USBA is not set
627# CONFIG_USB_GADGET_FSL_USB2 is not set
628# CONFIG_USB_GADGET_LH7A40X is not set
629# CONFIG_USB_GADGET_OMAP is not set
630# CONFIG_USB_GADGET_PXA25X is not set
631CONFIG_USB_GADGET_R8A66597=y
632CONFIG_USB_R8A66597=y
633# CONFIG_USB_GADGET_PXA27X is not set
634# CONFIG_USB_GADGET_S3C_HSOTG is not set
635# CONFIG_USB_GADGET_IMX is not set
636# CONFIG_USB_GADGET_S3C2410 is not set
637# CONFIG_USB_GADGET_M66592 is not set
638# CONFIG_USB_GADGET_AMD5536UDC is not set
639# CONFIG_USB_GADGET_FSL_QE is not set
640# CONFIG_USB_GADGET_CI13XXX is not set
641# CONFIG_USB_GADGET_NET2280 is not set
642# CONFIG_USB_GADGET_GOKU is not set
643# CONFIG_USB_GADGET_LANGWELL is not set
644# CONFIG_USB_GADGET_DUMMY_HCD is not set
645CONFIG_USB_GADGET_DUALSPEED=y
646# CONFIG_USB_ZERO is not set
647# CONFIG_USB_AUDIO is not set
648# CONFIG_USB_ETH is not set
649# CONFIG_USB_GADGETFS is not set
650# CONFIG_USB_FILE_STORAGE is not set
651# CONFIG_USB_G_SERIAL is not set
652# CONFIG_USB_MIDI_GADGET is not set
653# CONFIG_USB_G_PRINTER is not set
654CONFIG_USB_CDC_COMPOSITE=y
655
656#
657# OTG and related infrastructure
658#
659# CONFIG_USB_GPIO_VBUS is not set
660# CONFIG_NOP_USB_XCEIV is not set
661# CONFIG_MMC is not set
662# CONFIG_MEMSTICK is not set
663# CONFIG_NEW_LEDS is not set
664# CONFIG_ACCESSIBILITY is not set
665CONFIG_RTC_LIB=y
666# CONFIG_RTC_CLASS is not set
667# CONFIG_DMADEVICES is not set
668# CONFIG_AUXDISPLAY is not set
669# CONFIG_UIO is not set
670
671#
672# TI VLYNQ
673#
674# CONFIG_STAGING is not set
675
676#
677# File systems
678#
679CONFIG_FILE_LOCKING=y
680# CONFIG_FSNOTIFY is not set
681# CONFIG_DNOTIFY is not set
682# CONFIG_INOTIFY is not set
683# CONFIG_INOTIFY_USER is not set
684# CONFIG_QUOTA is not set
685# CONFIG_AUTOFS_FS is not set
686# CONFIG_AUTOFS4_FS is not set
687# CONFIG_FUSE_FS is not set
688
689#
690# Caches
691#
692# CONFIG_FSCACHE is not set
693
694#
695# Pseudo filesystems
696#
697CONFIG_PROC_FS=y
698CONFIG_PROC_KCORE=y
699CONFIG_PROC_SYSCTL=y
700CONFIG_PROC_PAGE_MONITOR=y
701CONFIG_SYSFS=y
702CONFIG_TMPFS=y
703# CONFIG_TMPFS_POSIX_ACL is not set
704# CONFIG_HUGETLBFS is not set
705# CONFIG_HUGETLB_PAGE is not set
706# CONFIG_CONFIGFS_FS is not set
707# CONFIG_MISC_FILESYSTEMS is not set
708# CONFIG_NETWORK_FILESYSTEMS is not set
709# CONFIG_NLS is not set
710# CONFIG_DLM is not set
711
712#
713# Kernel hacking
714#
715CONFIG_TRACE_IRQFLAGS_SUPPORT=y
716# CONFIG_PRINTK_TIME is not set
717CONFIG_ENABLE_WARN_DEPRECATED=y
718# CONFIG_ENABLE_MUST_CHECK is not set
719CONFIG_FRAME_WARN=1024
720# CONFIG_MAGIC_SYSRQ is not set
721# CONFIG_UNUSED_SYMBOLS is not set
722CONFIG_DEBUG_FS=y
723# CONFIG_HEADERS_CHECK is not set
724# CONFIG_DEBUG_KERNEL is not set
725# CONFIG_DEBUG_BUGVERBOSE is not set
726# CONFIG_DEBUG_MEMORY_INIT is not set
727# CONFIG_RCU_CPU_STALL_DETECTOR is not set
728# CONFIG_LATENCYTOP is not set
729# CONFIG_SYSCTL_SYSCALL_CHECK is not set
730CONFIG_HAVE_FUNCTION_TRACER=y
731CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
732CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
733CONFIG_HAVE_DYNAMIC_FTRACE=y
734CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
735CONFIG_HAVE_FTRACE_SYSCALLS=y
736CONFIG_TRACING_SUPPORT=y
737# CONFIG_FTRACE is not set
738# CONFIG_DYNAMIC_DEBUG is not set
739# CONFIG_DMA_API_DEBUG is not set
740# CONFIG_SAMPLES is not set
741CONFIG_HAVE_ARCH_KGDB=y
742# CONFIG_SH_STANDARD_BIOS is not set
743# CONFIG_EARLY_SCIF_CONSOLE is not set
744# CONFIG_DWARF_UNWINDER is not set
745
746#
747# Security options
748#
749# CONFIG_KEYS is not set
750# CONFIG_SECURITY is not set
751# CONFIG_SECURITYFS is not set
752# CONFIG_SECURITY_FILE_CAPABILITIES is not set
753# CONFIG_CRYPTO is not set
754# CONFIG_BINARY_PRINTF is not set
755
756#
757# Library routines
758#
759CONFIG_GENERIC_FIND_LAST_BIT=y
760# CONFIG_CRC_CCITT is not set
761# CONFIG_CRC16 is not set
762# CONFIG_CRC_T10DIF is not set
763# CONFIG_CRC_ITU_T is not set
764# CONFIG_CRC32 is not set
765# CONFIG_CRC7 is not set
766# CONFIG_LIBCRC32C is not set
767CONFIG_ZLIB_INFLATE=y
768CONFIG_DECOMPRESS_GZIP=y
769CONFIG_HAS_IOMEM=y
770CONFIG_HAS_IOPORT=y
771CONFIG_HAS_DMA=y
772CONFIG_HAVE_LMB=y
773CONFIG_NLATTR=y
774CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig
index 90e575c34d5..cef61319d2f 100644
--- a/arch/sh/configs/kfr2r09_defconfig
+++ b/arch/sh/configs/kfr2r09_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc3 3# Linux kernel version: 2.6.31-rc6
4# Thu Jul 23 17:45:09 2009 4# Thu Aug 20 21:58:52 2009
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -38,6 +38,7 @@ CONFIG_CONSTRUCTORS=y
38# 38#
39CONFIG_EXPERIMENTAL=y 39CONFIG_EXPERIMENTAL=y
40CONFIG_BROKEN_ON_SMP=y 40CONFIG_BROKEN_ON_SMP=y
41CONFIG_LOCK_KERNEL=y
41CONFIG_INIT_ENV_ARG_LIMIT=32 42CONFIG_INIT_ENV_ARG_LIMIT=32
42CONFIG_LOCALVERSION="" 43CONFIG_LOCALVERSION=""
43# CONFIG_LOCALVERSION_AUTO is not set 44# CONFIG_LOCALVERSION_AUTO is not set
@@ -132,7 +133,12 @@ CONFIG_HAVE_GENERIC_DMA_COHERENT=y
132CONFIG_SLABINFO=y 133CONFIG_SLABINFO=y
133CONFIG_RT_MUTEXES=y 134CONFIG_RT_MUTEXES=y
134CONFIG_BASE_SMALL=0 135CONFIG_BASE_SMALL=0
135# CONFIG_MODULES is not set 136CONFIG_MODULES=y
137# CONFIG_MODULE_FORCE_LOAD is not set
138CONFIG_MODULE_UNLOAD=y
139# CONFIG_MODULE_FORCE_UNLOAD is not set
140# CONFIG_MODVERSIONS is not set
141# CONFIG_MODULE_SRCVERSION_ALL is not set
136CONFIG_BLOCK=y 142CONFIG_BLOCK=y
137CONFIG_LBDAF=y 143CONFIG_LBDAF=y
138# CONFIG_BLK_DEV_BSG is not set 144# CONFIG_BLK_DEV_BSG is not set
@@ -255,6 +261,7 @@ CONFIG_CPU_HAS_FPU=y
255# 261#
256# CONFIG_SH_7724_SOLUTION_ENGINE is not set 262# CONFIG_SH_7724_SOLUTION_ENGINE is not set
257CONFIG_SH_KFR2R09=y 263CONFIG_SH_KFR2R09=y
264# CONFIG_SH_ECOVEC is not set
258 265
259# 266#
260# Timer and clock configuration 267# Timer and clock configuration
@@ -301,8 +308,8 @@ CONFIG_KEXEC=y
301# CONFIG_CRASH_DUMP is not set 308# CONFIG_CRASH_DUMP is not set
302# CONFIG_SECCOMP is not set 309# CONFIG_SECCOMP is not set
303# CONFIG_PREEMPT_NONE is not set 310# CONFIG_PREEMPT_NONE is not set
304CONFIG_PREEMPT_VOLUNTARY=y 311# CONFIG_PREEMPT_VOLUNTARY is not set
305# CONFIG_PREEMPT is not set 312CONFIG_PREEMPT=y
306CONFIG_GUSA=y 313CONFIG_GUSA=y
307# CONFIG_SPARSE_IRQ is not set 314# CONFIG_SPARSE_IRQ is not set
308 315
@@ -313,7 +320,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
313CONFIG_BOOT_LINK_OFFSET=0x00800000 320CONFIG_BOOT_LINK_OFFSET=0x00800000
314CONFIG_ENTRY_OFFSET=0x00001000 321CONFIG_ENTRY_OFFSET=0x00001000
315CONFIG_CMDLINE_BOOL=y 322CONFIG_CMDLINE_BOOL=y
316CONFIG_CMDLINE="console=ttySC1,115200" 323CONFIG_CMDLINE="console=tty0 console=ttySC1,115200"
317 324
318# 325#
319# Bus options 326# Bus options
@@ -427,6 +434,7 @@ CONFIG_MTD=y
427# CONFIG_MTD_DEBUG is not set 434# CONFIG_MTD_DEBUG is not set
428CONFIG_MTD_CONCAT=y 435CONFIG_MTD_CONCAT=y
429CONFIG_MTD_PARTITIONS=y 436CONFIG_MTD_PARTITIONS=y
437# CONFIG_MTD_TESTS is not set
430# CONFIG_MTD_REDBOOT_PARTS is not set 438# CONFIG_MTD_REDBOOT_PARTS is not set
431CONFIG_MTD_CMDLINE_PARTS=y 439CONFIG_MTD_CMDLINE_PARTS=y
432# CONFIG_MTD_AR7_PARTS is not set 440# CONFIG_MTD_AR7_PARTS is not set
@@ -639,6 +647,7 @@ CONFIG_I2C_SH_MOBILE=y
639# Other I2C/SMBus bus drivers 647# Other I2C/SMBus bus drivers
640# 648#
641# CONFIG_I2C_PCA_PLATFORM is not set 649# CONFIG_I2C_PCA_PLATFORM is not set
650# CONFIG_I2C_STUB is not set
642 651
643# 652#
644# Miscellaneous I2C Chip support 653# Miscellaneous I2C Chip support
@@ -715,7 +724,35 @@ CONFIG_SSB_POSSIBLE=y
715# 724#
716# CONFIG_VGASTATE is not set 725# CONFIG_VGASTATE is not set
717# CONFIG_VIDEO_OUTPUT_CONTROL is not set 726# CONFIG_VIDEO_OUTPUT_CONTROL is not set
718# CONFIG_FB is not set 727CONFIG_FB=y
728# CONFIG_FIRMWARE_EDID is not set
729# CONFIG_FB_DDC is not set
730# CONFIG_FB_BOOT_VESA_SUPPORT is not set
731# CONFIG_FB_CFB_FILLRECT is not set
732# CONFIG_FB_CFB_COPYAREA is not set
733# CONFIG_FB_CFB_IMAGEBLIT is not set
734# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
735CONFIG_FB_SYS_FILLRECT=y
736CONFIG_FB_SYS_COPYAREA=y
737CONFIG_FB_SYS_IMAGEBLIT=y
738# CONFIG_FB_FOREIGN_ENDIAN is not set
739CONFIG_FB_SYS_FOPS=y
740CONFIG_FB_DEFERRED_IO=y
741# CONFIG_FB_SVGALIB is not set
742# CONFIG_FB_MACMODES is not set
743# CONFIG_FB_BACKLIGHT is not set
744# CONFIG_FB_MODE_HELPERS is not set
745# CONFIG_FB_TILEBLITTING is not set
746
747#
748# Frame buffer hardware drivers
749#
750# CONFIG_FB_S1D13XXX is not set
751CONFIG_FB_SH_MOBILE_LCDC=y
752# CONFIG_FB_VIRTUAL is not set
753# CONFIG_FB_METRONOME is not set
754# CONFIG_FB_MB862XX is not set
755# CONFIG_FB_BROADSHEET is not set
719# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 756# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
720 757
721# 758#
@@ -727,15 +764,157 @@ CONFIG_SSB_POSSIBLE=y
727# Console display driver support 764# Console display driver support
728# 765#
729CONFIG_DUMMY_CONSOLE=y 766CONFIG_DUMMY_CONSOLE=y
767CONFIG_FRAMEBUFFER_CONSOLE=y
768CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
769# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
770CONFIG_FONTS=y
771# CONFIG_FONT_8x8 is not set
772# CONFIG_FONT_8x16 is not set
773# CONFIG_FONT_6x11 is not set
774# CONFIG_FONT_7x14 is not set
775# CONFIG_FONT_PEARL_8x8 is not set
776# CONFIG_FONT_ACORN_8x8 is not set
777CONFIG_FONT_MINI_4x6=y
778# CONFIG_FONT_SUN8x16 is not set
779# CONFIG_FONT_SUN12x22 is not set
780# CONFIG_FONT_10x18 is not set
781CONFIG_LOGO=y
782# CONFIG_LOGO_LINUX_MONO is not set
783# CONFIG_LOGO_LINUX_VGA16 is not set
784# CONFIG_LOGO_LINUX_CLUT224 is not set
785# CONFIG_LOGO_SUPERH_MONO is not set
786CONFIG_LOGO_SUPERH_VGA16=y
787# CONFIG_LOGO_SUPERH_CLUT224 is not set
730# CONFIG_SOUND is not set 788# CONFIG_SOUND is not set
731# CONFIG_HID_SUPPORT is not set 789# CONFIG_HID_SUPPORT is not set
732# CONFIG_USB_SUPPORT is not set 790CONFIG_USB_SUPPORT=y
733# CONFIG_MMC is not set 791CONFIG_USB_ARCH_HAS_HCD=y
792# CONFIG_USB_ARCH_HAS_OHCI is not set
793# CONFIG_USB_ARCH_HAS_EHCI is not set
794# CONFIG_USB is not set
795# CONFIG_USB_OTG_WHITELIST is not set
796# CONFIG_USB_OTG_BLACKLIST_HUB is not set
797# CONFIG_USB_GADGET_MUSB_HDRC is not set
798
799#
800# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
801#
802CONFIG_USB_GADGET=y
803# CONFIG_USB_GADGET_DEBUG_FILES is not set
804# CONFIG_USB_GADGET_DEBUG_FS is not set
805CONFIG_USB_GADGET_VBUS_DRAW=2
806CONFIG_USB_GADGET_SELECTED=y
807# CONFIG_USB_GADGET_AT91 is not set
808# CONFIG_USB_GADGET_ATMEL_USBA is not set
809# CONFIG_USB_GADGET_FSL_USB2 is not set
810# CONFIG_USB_GADGET_LH7A40X is not set
811# CONFIG_USB_GADGET_OMAP is not set
812# CONFIG_USB_GADGET_PXA25X is not set
813CONFIG_USB_GADGET_R8A66597=y
814CONFIG_USB_R8A66597=y
815# CONFIG_USB_GADGET_PXA27X is not set
816# CONFIG_USB_GADGET_S3C_HSOTG is not set
817# CONFIG_USB_GADGET_IMX is not set
818# CONFIG_USB_GADGET_S3C2410 is not set
819# CONFIG_USB_GADGET_M66592 is not set
820# CONFIG_USB_GADGET_AMD5536UDC is not set
821# CONFIG_USB_GADGET_FSL_QE is not set
822# CONFIG_USB_GADGET_CI13XXX is not set
823# CONFIG_USB_GADGET_NET2280 is not set
824# CONFIG_USB_GADGET_GOKU is not set
825# CONFIG_USB_GADGET_LANGWELL is not set
826# CONFIG_USB_GADGET_DUMMY_HCD is not set
827CONFIG_USB_GADGET_DUALSPEED=y
828# CONFIG_USB_ZERO is not set
829# CONFIG_USB_AUDIO is not set
830# CONFIG_USB_ETH is not set
831# CONFIG_USB_GADGETFS is not set
832# CONFIG_USB_FILE_STORAGE is not set
833# CONFIG_USB_G_SERIAL is not set
834# CONFIG_USB_MIDI_GADGET is not set
835# CONFIG_USB_G_PRINTER is not set
836CONFIG_USB_CDC_COMPOSITE=y
837
838#
839# OTG and related infrastructure
840#
841# CONFIG_USB_GPIO_VBUS is not set
842# CONFIG_NOP_USB_XCEIV is not set
843CONFIG_MMC=y
844# CONFIG_MMC_DEBUG is not set
845# CONFIG_MMC_UNSAFE_RESUME is not set
846
847#
848# MMC/SD/SDIO Card Drivers
849#
850CONFIG_MMC_BLOCK=y
851CONFIG_MMC_BLOCK_BOUNCE=y
852# CONFIG_SDIO_UART is not set
853# CONFIG_MMC_TEST is not set
854
855#
856# MMC/SD/SDIO Host Controller Drivers
857#
858# CONFIG_MMC_SDHCI is not set
734# CONFIG_MEMSTICK is not set 859# CONFIG_MEMSTICK is not set
735# CONFIG_NEW_LEDS is not set 860# CONFIG_NEW_LEDS is not set
736# CONFIG_ACCESSIBILITY is not set 861# CONFIG_ACCESSIBILITY is not set
737CONFIG_RTC_LIB=y 862CONFIG_RTC_LIB=y
738# CONFIG_RTC_CLASS is not set 863CONFIG_RTC_CLASS=y
864CONFIG_RTC_HCTOSYS=y
865CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
866# CONFIG_RTC_DEBUG is not set
867
868#
869# RTC interfaces
870#
871CONFIG_RTC_INTF_SYSFS=y
872CONFIG_RTC_INTF_PROC=y
873CONFIG_RTC_INTF_DEV=y
874# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
875# CONFIG_RTC_DRV_TEST is not set
876
877#
878# I2C RTC drivers
879#
880# CONFIG_RTC_DRV_DS1307 is not set
881# CONFIG_RTC_DRV_DS1374 is not set
882# CONFIG_RTC_DRV_DS1672 is not set
883# CONFIG_RTC_DRV_MAX6900 is not set
884# CONFIG_RTC_DRV_RS5C372 is not set
885# CONFIG_RTC_DRV_ISL1208 is not set
886# CONFIG_RTC_DRV_X1205 is not set
887# CONFIG_RTC_DRV_PCF8563 is not set
888# CONFIG_RTC_DRV_PCF8583 is not set
889# CONFIG_RTC_DRV_M41T80 is not set
890# CONFIG_RTC_DRV_S35390A is not set
891# CONFIG_RTC_DRV_FM3130 is not set
892# CONFIG_RTC_DRV_RX8581 is not set
893# CONFIG_RTC_DRV_RX8025 is not set
894
895#
896# SPI RTC drivers
897#
898
899#
900# Platform RTC drivers
901#
902# CONFIG_RTC_DRV_DS1286 is not set
903# CONFIG_RTC_DRV_DS1511 is not set
904# CONFIG_RTC_DRV_DS1553 is not set
905# CONFIG_RTC_DRV_DS1742 is not set
906# CONFIG_RTC_DRV_STK17TA8 is not set
907# CONFIG_RTC_DRV_M48T86 is not set
908# CONFIG_RTC_DRV_M48T35 is not set
909# CONFIG_RTC_DRV_M48T59 is not set
910# CONFIG_RTC_DRV_BQ4802 is not set
911# CONFIG_RTC_DRV_V3020 is not set
912
913#
914# on-CPU RTC drivers
915#
916CONFIG_RTC_DRV_SH=y
917# CONFIG_RTC_DRV_GENERIC is not set
739# CONFIG_DMADEVICES is not set 918# CONFIG_DMADEVICES is not set
740# CONFIG_AUXDISPLAY is not set 919# CONFIG_AUXDISPLAY is not set
741CONFIG_UIO=y 920CONFIG_UIO=y
@@ -763,8 +942,10 @@ CONFIG_UIO_PDRV_GENIRQ=y
763# CONFIG_OCFS2_FS is not set 942# CONFIG_OCFS2_FS is not set
764# CONFIG_BTRFS_FS is not set 943# CONFIG_BTRFS_FS is not set
765CONFIG_FILE_LOCKING=y 944CONFIG_FILE_LOCKING=y
766# CONFIG_FSNOTIFY is not set 945CONFIG_FSNOTIFY=y
946CONFIG_DNOTIFY=y
767# CONFIG_INOTIFY is not set 947# CONFIG_INOTIFY is not set
948CONFIG_INOTIFY_USER=y
768# CONFIG_QUOTA is not set 949# CONFIG_QUOTA is not set
769# CONFIG_AUTOFS_FS is not set 950# CONFIG_AUTOFS_FS is not set
770# CONFIG_AUTOFS4_FS is not set 951# CONFIG_AUTOFS4_FS is not set
@@ -829,7 +1010,7 @@ CONFIG_DEBUG_FS=y
829# CONFIG_DEBUG_MEMORY_INIT is not set 1010# CONFIG_DEBUG_MEMORY_INIT is not set
830# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1011# CONFIG_RCU_CPU_STALL_DETECTOR is not set
831# CONFIG_LATENCYTOP is not set 1012# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y 1013# CONFIG_SYSCTL_SYSCALL_CHECK is not set
833CONFIG_HAVE_FUNCTION_TRACER=y 1014CONFIG_HAVE_FUNCTION_TRACER=y
834CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1015CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
835CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1016CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -844,6 +1025,7 @@ CONFIG_TRACING_SUPPORT=y
844CONFIG_HAVE_ARCH_KGDB=y 1025CONFIG_HAVE_ARCH_KGDB=y
845# CONFIG_SH_STANDARD_BIOS is not set 1026# CONFIG_SH_STANDARD_BIOS is not set
846# CONFIG_EARLY_SCIF_CONSOLE is not set 1027# CONFIG_EARLY_SCIF_CONSOLE is not set
1028# CONFIG_DWARF_UNWINDER is not set
847 1029
848# 1030#
849# Security options 1031# Security options
@@ -862,10 +1044,10 @@ CONFIG_BITREVERSE=y
862CONFIG_GENERIC_FIND_LAST_BIT=y 1044CONFIG_GENERIC_FIND_LAST_BIT=y
863# CONFIG_CRC_CCITT is not set 1045# CONFIG_CRC_CCITT is not set
864# CONFIG_CRC16 is not set 1046# CONFIG_CRC16 is not set
865CONFIG_CRC_T10DIF=y 1047# CONFIG_CRC_T10DIF is not set
866CONFIG_CRC_ITU_T=y 1048# CONFIG_CRC_ITU_T is not set
867CONFIG_CRC32=y 1049CONFIG_CRC32=y
868CONFIG_CRC7=y 1050# CONFIG_CRC7 is not set
869# CONFIG_LIBCRC32C is not set 1051# CONFIG_LIBCRC32C is not set
870CONFIG_ZLIB_INFLATE=y 1052CONFIG_ZLIB_INFLATE=y
871CONFIG_DECOMPRESS_GZIP=y 1053CONFIG_DECOMPRESS_GZIP=y
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig
index ca3c88a8802..2be2d75adbb 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/snapgear_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30 3# Linux kernel version: 2.6.31-rc6
4# Thu Jun 18 13:11:58 2009 4# Thu Aug 20 15:03:04 2009
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y
17# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U64 is not set 29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y
32 35
33# 36#
34# General setup 37# General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
38CONFIG_INIT_ENV_ARG_LIMIT=32 41CONFIG_INIT_ENV_ARG_LIMIT=32
39CONFIG_LOCALVERSION="" 42CONFIG_LOCALVERSION=""
40CONFIG_LOCALVERSION_AUTO=y 43CONFIG_LOCALVERSION_AUTO=y
44CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set
41# CONFIG_SWAP is not set 50# CONFIG_SWAP is not set
42# CONFIG_SYSVIPC is not set 51# CONFIG_SYSVIPC is not set
43# CONFIG_POSIX_MQUEUE is not set 52# CONFIG_POSIX_MQUEUE is not set
@@ -86,10 +95,12 @@ CONFIG_TIMERFD=y
86CONFIG_EVENTFD=y 95CONFIG_EVENTFD=y
87CONFIG_SHMEM=y 96CONFIG_SHMEM=y
88CONFIG_AIO=y 97CONFIG_AIO=y
98CONFIG_HAVE_PERF_COUNTERS=y
89 99
90# 100#
91# Performance Counters 101# Performance Counters
92# 102#
103# CONFIG_PERF_COUNTERS is not set
93CONFIG_VM_EVENT_COUNTERS=y 104CONFIG_VM_EVENT_COUNTERS=y
94CONFIG_PCI_QUIRKS=y 105CONFIG_PCI_QUIRKS=y
95# CONFIG_STRIP_ASM_SYMS is not set 106# CONFIG_STRIP_ASM_SYMS is not set
@@ -106,6 +117,10 @@ CONFIG_HAVE_KRETPROBES=y
106CONFIG_HAVE_ARCH_TRACEHOOK=y 117CONFIG_HAVE_ARCH_TRACEHOOK=y
107CONFIG_HAVE_CLK=y 118CONFIG_HAVE_CLK=y
108CONFIG_HAVE_DMA_API_DEBUG=y 119CONFIG_HAVE_DMA_API_DEBUG=y
120
121#
122# GCOV-based kernel profiling
123#
109# CONFIG_SLOW_WORK is not set 124# CONFIG_SLOW_WORK is not set
110CONFIG_HAVE_GENERIC_DMA_COHERENT=y 125CONFIG_HAVE_GENERIC_DMA_COHERENT=y
111CONFIG_SLABINFO=y 126CONFIG_SLABINFO=y
@@ -113,7 +128,7 @@ CONFIG_RT_MUTEXES=y
113CONFIG_BASE_SMALL=0 128CONFIG_BASE_SMALL=0
114# CONFIG_MODULES is not set 129# CONFIG_MODULES is not set
115CONFIG_BLOCK=y 130CONFIG_BLOCK=y
116# CONFIG_LBD is not set 131CONFIG_LBDAF=y
117# CONFIG_BLK_DEV_BSG is not set 132# CONFIG_BLK_DEV_BSG is not set
118# CONFIG_BLK_DEV_INTEGRITY is not set 133# CONFIG_BLK_DEV_INTEGRITY is not set
119 134
@@ -534,7 +549,11 @@ CONFIG_HAVE_IDE=y
534# 549#
535 550
536# 551#
537# Enable only one of the two stacks, unless you know what you are doing 552# You can enable one or both FireWire driver stacks.
553#
554
555#
556# See the help texts for more information.
538# 557#
539# CONFIG_FIREWIRE is not set 558# CONFIG_FIREWIRE is not set
540# CONFIG_IEEE1394 is not set 559# CONFIG_IEEE1394 is not set
@@ -686,6 +705,11 @@ CONFIG_LEGACY_PTY_COUNT=256
686CONFIG_DEVPORT=y 705CONFIG_DEVPORT=y
687# CONFIG_I2C is not set 706# CONFIG_I2C is not set
688# CONFIG_SPI is not set 707# CONFIG_SPI is not set
708
709#
710# PPS support
711#
712# CONFIG_PPS is not set
689# CONFIG_W1 is not set 713# CONFIG_W1 is not set
690# CONFIG_POWER_SUPPLY is not set 714# CONFIG_POWER_SUPPLY is not set
691# CONFIG_HWMON is not set 715# CONFIG_HWMON is not set
@@ -732,7 +756,44 @@ CONFIG_SSB_POSSIBLE=y
732# CONFIG_ACCESSIBILITY is not set 756# CONFIG_ACCESSIBILITY is not set
733# CONFIG_INFINIBAND is not set 757# CONFIG_INFINIBAND is not set
734CONFIG_RTC_LIB=y 758CONFIG_RTC_LIB=y
735# CONFIG_RTC_CLASS is not set 759CONFIG_RTC_CLASS=y
760CONFIG_RTC_HCTOSYS=y
761CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
762# CONFIG_RTC_DEBUG is not set
763
764#
765# RTC interfaces
766#
767CONFIG_RTC_INTF_SYSFS=y
768CONFIG_RTC_INTF_PROC=y
769CONFIG_RTC_INTF_DEV=y
770# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
771# CONFIG_RTC_DRV_TEST is not set
772
773#
774# SPI RTC drivers
775#
776
777#
778# Platform RTC drivers
779#
780# CONFIG_RTC_DRV_DS1286 is not set
781CONFIG_RTC_DRV_DS1302=y
782# CONFIG_RTC_DRV_DS1511 is not set
783# CONFIG_RTC_DRV_DS1553 is not set
784# CONFIG_RTC_DRV_DS1742 is not set
785# CONFIG_RTC_DRV_STK17TA8 is not set
786# CONFIG_RTC_DRV_M48T86 is not set
787# CONFIG_RTC_DRV_M48T35 is not set
788# CONFIG_RTC_DRV_M48T59 is not set
789# CONFIG_RTC_DRV_BQ4802 is not set
790# CONFIG_RTC_DRV_V3020 is not set
791
792#
793# on-CPU RTC drivers
794#
795# CONFIG_RTC_DRV_SH is not set
796# CONFIG_RTC_DRV_GENERIC is not set
736# CONFIG_DMADEVICES is not set 797# CONFIG_DMADEVICES is not set
737# CONFIG_AUXDISPLAY is not set 798# CONFIG_AUXDISPLAY is not set
738# CONFIG_UIO is not set 799# CONFIG_UIO is not set
@@ -754,6 +815,7 @@ CONFIG_EXT2_FS=y
754# CONFIG_JFS_FS is not set 815# CONFIG_JFS_FS is not set
755# CONFIG_FS_POSIX_ACL is not set 816# CONFIG_FS_POSIX_ACL is not set
756# CONFIG_XFS_FS is not set 817# CONFIG_XFS_FS is not set
818# CONFIG_GFS2_FS is not set
757# CONFIG_OCFS2_FS is not set 819# CONFIG_OCFS2_FS is not set
758# CONFIG_BTRFS_FS is not set 820# CONFIG_BTRFS_FS is not set
759CONFIG_FILE_LOCKING=y 821CONFIG_FILE_LOCKING=y
@@ -856,8 +918,11 @@ CONFIG_FRAME_WARN=1024
856# CONFIG_RCU_CPU_STALL_DETECTOR is not set 918# CONFIG_RCU_CPU_STALL_DETECTOR is not set
857# CONFIG_LATENCYTOP is not set 919# CONFIG_LATENCYTOP is not set
858CONFIG_HAVE_FUNCTION_TRACER=y 920CONFIG_HAVE_FUNCTION_TRACER=y
921CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
922CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
859CONFIG_HAVE_DYNAMIC_FTRACE=y 923CONFIG_HAVE_DYNAMIC_FTRACE=y
860CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 924CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
925CONFIG_HAVE_FTRACE_SYSCALLS=y
861CONFIG_TRACING_SUPPORT=y 926CONFIG_TRACING_SUPPORT=y
862# CONFIG_FTRACE is not set 927# CONFIG_FTRACE is not set
863# CONFIG_DMA_API_DEBUG is not set 928# CONFIG_DMA_API_DEBUG is not set
@@ -865,6 +930,7 @@ CONFIG_TRACING_SUPPORT=y
865CONFIG_HAVE_ARCH_KGDB=y 930CONFIG_HAVE_ARCH_KGDB=y
866# CONFIG_SH_STANDARD_BIOS is not set 931# CONFIG_SH_STANDARD_BIOS is not set
867# CONFIG_EARLY_SCIF_CONSOLE is not set 932# CONFIG_EARLY_SCIF_CONSOLE is not set
933# CONFIG_DWARF_UNWINDER is not set
868 934
869# 935#
870# Security options 936# Security options
@@ -893,5 +959,6 @@ CONFIG_DECOMPRESS_GZIP=y
893CONFIG_HAS_IOMEM=y 959CONFIG_HAS_IOMEM=y
894CONFIG_HAS_IOPORT=y 960CONFIG_HAS_IOPORT=y
895CONFIG_HAS_DMA=y 961CONFIG_HAS_DMA=y
962CONFIG_HAVE_LMB=y
896CONFIG_NLATTR=y 963CONFIG_NLATTR=y
897CONFIG_GENERIC_ATOMIC64=y 964CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 63e9dd30b41..b91fa8dbf04 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -27,12 +27,12 @@ config NR_ONCHIP_DMA_CHANNELS
27 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ 27 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
28 CPU_SUBTYPE_SH7760 28 CPU_SUBTYPE_SH7760
29 default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ 29 default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \
30 CPU_SUBTYPE_SH7785 30 CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
31 default "6" 31 default "6"
32 help 32 help
33 This allows you to specify the number of channels that the on-chip 33 This allows you to specify the number of channels that the on-chip
34 DMAC supports. This will be 4 for SH7091/SH7750/SH7751 and 8 for the 34 DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
35 SH7750R/SH7751R. 35 SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
36 36
37config NR_DMA_CHANNELS_BOOL 37config NR_DMA_CHANNELS_BOOL
38 depends on SH_DMA 38 depends on SH_DMA
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 9a1c423ad16..c481df63902 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -295,6 +295,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
295 vma->vm_page_prot); 295 vma->vm_page_prot);
296} 296}
297 297
298#ifndef CONFIG_GENERIC_IOMAP
299
298static void __iomem *ioport_map_pci(struct pci_dev *dev, 300static void __iomem *ioport_map_pci(struct pci_dev *dev,
299 unsigned long port, unsigned int nr) 301 unsigned long port, unsigned int nr)
300{ 302{
@@ -346,6 +348,8 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
346} 348}
347EXPORT_SYMBOL(pci_iounmap); 349EXPORT_SYMBOL(pci_iounmap);
348 350
351#endif /* CONFIG_GENERIC_IOMAP */
352
349#ifdef CONFIG_HOTPLUG 353#ifdef CONFIG_HOTPLUG
350EXPORT_SYMBOL(pcibios_resource_to_bus); 354EXPORT_SYMBOL(pcibios_resource_to_bus);
351EXPORT_SYMBOL(pcibios_bus_to_resource); 355EXPORT_SYMBOL(pcibios_bus_to_resource);
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 43910cdf78a..e121c30f797 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,6 +1,6 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += cpu-features.h 3header-y += cachectl.h cpu-features.h
4 4
5unifdef-y += unistd_32.h 5unifdef-y += unistd_32.h
6unifdef-y += unistd_64.h 6unifdef-y += unistd_64.h
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h
index c0171804016..d02c01b3e6b 100644
--- a/arch/sh/include/asm/bug.h
+++ b/arch/sh/include/asm/bug.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_BUG_H 2#define __ASM_SH_BUG_H
3 3
4#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ 4#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */
5#define BUGFLAG_UNWINDER (1 << 1)
5 6
6#ifdef CONFIG_GENERIC_BUG 7#ifdef CONFIG_GENERIC_BUG
7#define HAVE_ARCH_BUG 8#define HAVE_ARCH_BUG
@@ -72,6 +73,36 @@ do { \
72 unlikely(__ret_warn_on); \ 73 unlikely(__ret_warn_on); \
73}) 74})
74 75
76#define UNWINDER_BUG() \
77do { \
78 __asm__ __volatile__ ( \
79 "1:\t.short %O0\n" \
80 _EMIT_BUG_ENTRY \
81 : \
82 : "n" (TRAPA_BUG_OPCODE), \
83 "i" (__FILE__), \
84 "i" (__LINE__), \
85 "i" (BUGFLAG_UNWINDER), \
86 "i" (sizeof(struct bug_entry))); \
87} while (0)
88
89#define UNWINDER_BUG_ON(x) ({ \
90 int __ret_unwinder_on = !!(x); \
91 if (__builtin_constant_p(__ret_unwinder_on)) { \
92 if (__ret_unwinder_on) \
93 UNWINDER_BUG(); \
94 } else { \
95 if (unlikely(__ret_unwinder_on)) \
96 UNWINDER_BUG(); \
97 } \
98 unlikely(__ret_unwinder_on); \
99})
100
101#else
102
103#define UNWINDER_BUG BUG
104#define UNWINDER_BUG_ON BUG_ON
105
75#endif /* CONFIG_GENERIC_BUG */ 106#endif /* CONFIG_GENERIC_BUG */
76 107
77#include <asm-generic/bug.h> 108#include <asm-generic/bug.h>
diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/asm/cachectl.h
new file mode 100644
index 00000000000..6ffb4b7a212
--- /dev/null
+++ b/arch/sh/include/asm/cachectl.h
@@ -0,0 +1,19 @@
1#ifndef _SH_CACHECTL_H
2#define _SH_CACHECTL_H
3
4/* Definitions for the cacheflush system call. */
5
6#define CACHEFLUSH_D_INVAL 0x1 /* invalidate (without write back) */
7#define CACHEFLUSH_D_WB 0x2 /* write back (without invalidate) */
8#define CACHEFLUSH_D_PURGE 0x3 /* writeback and invalidate */
9
10#define CACHEFLUSH_I 0x4
11
12/*
13 * Options for cacheflush system call
14 */
15#define ICACHE CACHEFLUSH_I /* flush instruction cache */
16#define DCACHE CACHEFLUSH_D_PURGE /* writeback and flush data cache */
17#define BCACHE (ICACHE|DCACHE) /* flush both caches */
18
19#endif /* _SH_CACHECTL_H */
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index 8688a88303e..b16debfe8c1 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -3,7 +3,9 @@
3 * 3 *
4 * This file is released under the GPLv2 4 * This file is released under the GPLv2
5 */ 5 */
6#include <asm-generic/device.h> 6
7struct dev_archdata {
8};
7 9
8struct platform_device; 10struct platform_device;
9/* allocate contiguous memory chunk and fill in struct resource */ 11/* allocate contiguous memory chunk and fill in struct resource */
@@ -12,3 +14,15 @@ int platform_resource_setup_memory(struct platform_device *pdev,
12 14
13void plat_early_device_setup(void); 15void plat_early_device_setup(void);
14 16
17#define PDEV_ARCHDATA_FLAG_INIT 0
18#define PDEV_ARCHDATA_FLAG_IDLE 1
19#define PDEV_ARCHDATA_FLAG_SUSP 2
20
21struct pdev_archdata {
22 int hwblk_id;
23#ifdef CONFIG_PM_RUNTIME
24 unsigned long flags;
25 struct list_head entry;
26 struct mutex mutex;
27#endif
28};
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
index d3d3837c5e1..ced6795891a 100644
--- a/arch/sh/include/asm/dwarf.h
+++ b/arch/sh/include/asm/dwarf.h
@@ -200,7 +200,7 @@
200 */ 200 */
201static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg) 201static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg)
202{ 202{
203 unsigned long value; 203 unsigned long value = 0;
204 204
205 switch (reg) { 205 switch (reg) {
206 case 14: 206 case 14:
@@ -265,10 +265,7 @@ struct dwarf_frame {
265 265
266 unsigned long pc; 266 unsigned long pc;
267 267
268 struct dwarf_reg *regs; 268 struct list_head reg_list;
269 unsigned int num_regs; /* how many regs are allocated? */
270
271 unsigned int depth; /* what level are we in the callstack? */
272 269
273 unsigned long cfa; 270 unsigned long cfa;
274 271
@@ -292,20 +289,15 @@ struct dwarf_frame {
292 * @flags: Describes how to calculate the value of this register 289 * @flags: Describes how to calculate the value of this register
293 */ 290 */
294struct dwarf_reg { 291struct dwarf_reg {
292 struct list_head link;
293
294 unsigned int number;
295
295 unsigned long addr; 296 unsigned long addr;
296 unsigned long flags; 297 unsigned long flags;
297#define DWARF_REG_OFFSET (1 << 0) 298#define DWARF_REG_OFFSET (1 << 0)
298}; 299#define DWARF_VAL_OFFSET (1 << 1)
299 300#define DWARF_UNDEFINED (1 << 2)
300/**
301 * dwarf_stack - a DWARF stack contains a collection of DWARF frames
302 * @depth: the number of frames in the stack
303 * @level: an array of DWARF frames, indexed by stack level
304 *
305 */
306struct dwarf_stack {
307 unsigned int depth;
308 struct dwarf_frame **level;
309}; 301};
310 302
311/* 303/*
@@ -370,17 +362,16 @@ static inline unsigned int DW_CFA_operand(unsigned long insn)
370#define DW_EXT_HI 0xffffffff 362#define DW_EXT_HI 0xffffffff
371#define DW_EXT_DWARF64 DW_EXT_HI 363#define DW_EXT_DWARF64 DW_EXT_HI
372 364
373extern void dwarf_unwinder_init(void);
374
375extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, 365extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
376 struct dwarf_frame *); 366 struct dwarf_frame *);
377#endif /* __ASSEMBLY__ */ 367#endif /* !__ASSEMBLY__ */
378 368
379#define CFI_STARTPROC .cfi_startproc 369#define CFI_STARTPROC .cfi_startproc
380#define CFI_ENDPROC .cfi_endproc 370#define CFI_ENDPROC .cfi_endproc
381#define CFI_DEF_CFA .cfi_def_cfa 371#define CFI_DEF_CFA .cfi_def_cfa
382#define CFI_REGISTER .cfi_register 372#define CFI_REGISTER .cfi_register
383#define CFI_REL_OFFSET .cfi_rel_offset 373#define CFI_REL_OFFSET .cfi_rel_offset
374#define CFI_UNDEFINED .cfi_undefined
384 375
385#else 376#else
386 377
@@ -394,6 +385,7 @@ extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
394#define CFI_DEF_CFA CFI_IGNORE 385#define CFI_DEF_CFA CFI_IGNORE
395#define CFI_REGISTER CFI_IGNORE 386#define CFI_REGISTER CFI_IGNORE
396#define CFI_REL_OFFSET CFI_IGNORE 387#define CFI_REL_OFFSET CFI_IGNORE
388#define CFI_UNDEFINED CFI_IGNORE
397 389
398#ifndef __ASSEMBLY__ 390#ifndef __ASSEMBLY__
399static inline void dwarf_unwinder_init(void) 391static inline void dwarf_unwinder_init(void)
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S
index 64fd0de24da..cc43a55e1fc 100644
--- a/arch/sh/include/asm/entry-macros.S
+++ b/arch/sh/include/asm/entry-macros.S
@@ -7,7 +7,7 @@
7 .endm 7 .endm
8 8
9 .macro sti 9 .macro sti
10 mov #0xf0, r11 10 mov #0xfffffff0, r11
11 extu.b r11, r11 11 extu.b r11, r11
12 not r11, r11 12 not r11, r11
13 stc sr, r10 13 stc sr, r10
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 7e0bcc4d4a9..12f3a31f20a 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -4,6 +4,7 @@
4#ifdef CONFIG_FUNCTION_TRACER 4#ifdef CONFIG_FUNCTION_TRACER
5 5
6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ 6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
7#define FTRACE_SYSCALL_MAX NR_syscalls
7 8
8#ifndef __ASSEMBLY__ 9#ifndef __ASSEMBLY__
9extern void mcount(void); 10extern void mcount(void);
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h
index c01d72cb675..5d3ccae4202 100644
--- a/arch/sh/include/asm/hwblk.h
+++ b/arch/sh/include/asm/hwblk.h
@@ -5,7 +5,9 @@
5#include <asm/io.h> 5#include <asm/io.h>
6 6
7#define HWBLK_CNT_USAGE 0 7#define HWBLK_CNT_USAGE 0
8#define HWBLK_CNT_NR 1 8#define HWBLK_CNT_IDLE 1
9#define HWBLK_CNT_DEVICES 2
10#define HWBLK_CNT_NR 3
9 11
10#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */ 12#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */
11 13
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 25348141674..5be45ea4dfe 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -92,8 +92,12 @@
92 92
93static inline void ctrl_delay(void) 93static inline void ctrl_delay(void)
94{ 94{
95#ifdef P2SEG 95#ifdef CONFIG_CPU_SH4
96 __raw_readw(CCN_PVR);
97#elif defined(P2SEG)
96 __raw_readw(P2SEG); 98 __raw_readw(P2SEG);
99#else
100#error "Need a dummy address for delay"
97#endif 101#endif
98} 102}
99 103
@@ -146,6 +150,7 @@ __BUILD_MEMORY_STRING(q, u64)
146#define readl_relaxed(a) readl(a) 150#define readl_relaxed(a) readl(a)
147#define readq_relaxed(a) readq(a) 151#define readq_relaxed(a) readq(a)
148 152
153#ifndef CONFIG_GENERIC_IOMAP
149/* Simple MMIO */ 154/* Simple MMIO */
150#define ioread8(a) __raw_readb(a) 155#define ioread8(a) __raw_readb(a)
151#define ioread16(a) __raw_readw(a) 156#define ioread16(a) __raw_readw(a)
@@ -166,6 +171,15 @@ __BUILD_MEMORY_STRING(q, u64)
166#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c)) 171#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
167#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) 172#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
168#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) 173#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
174#endif
175
176#define mmio_insb(p,d,c) __raw_readsb(p,d,c)
177#define mmio_insw(p,d,c) __raw_readsw(p,d,c)
178#define mmio_insl(p,d,c) __raw_readsl(p,d,c)
179
180#define mmio_outsb(p,s,c) __raw_writesb(p,s,c)
181#define mmio_outsw(p,s,c) __raw_writesw(p,s,c)
182#define mmio_outsl(p,s,c) __raw_writesl(p,s,c)
169 183
170/* synco on SH-4A, otherwise a nop */ 184/* synco on SH-4A, otherwise a nop */
171#define mmiowb() wmb() 185#define mmiowb() wmb()
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 0db19db913c..4c4429cda56 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -87,6 +87,14 @@
87#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 87#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
88#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 88#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
89 89
90#ifndef CONFIG_X2TLB
91/* copy the ptea attributes */
92static inline unsigned long copy_ptea_attributes(unsigned long x)
93{
94 return ((x >> 28) & 0xe) | (x & 0x1);
95}
96#endif
97
90/* Mask which drops unused bits from the PTEL value */ 98/* Mask which drops unused bits from the PTEL value */
91#if defined(CONFIG_CPU_SH3) 99#if defined(CONFIG_CPU_SH3)
92#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ 100#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index db1a4f3a755..017e0c1807b 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -32,7 +32,7 @@ enum cpu_type {
32 32
33 /* SH-4A types */ 33 /* SH-4A types */
34 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786, 34 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
35 CPU_SH7723, CPU_SH7724, CPU_SHX3, 35 CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
36 36
37 /* SH4AL-DSP types */ 37 /* SH4AL-DSP types */
38 CPU_SH7343, CPU_SH7722, CPU_SH7366, 38 CPU_SH7343, CPU_SH7722, CPU_SH7366,
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index bf7c4cbde37..6b272238a46 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -169,6 +169,11 @@ BUILD_TRAP_HANDLER(breakpoint);
169BUILD_TRAP_HANDLER(singlestep); 169BUILD_TRAP_HANDLER(singlestep);
170BUILD_TRAP_HANDLER(fpu_error); 170BUILD_TRAP_HANDLER(fpu_error);
171BUILD_TRAP_HANDLER(fpu_state_restore); 171BUILD_TRAP_HANDLER(fpu_state_restore);
172BUILD_TRAP_HANDLER(unwinder);
173
174#ifdef CONFIG_BUG
175extern void handle_BUG(struct pt_regs *);
176#endif
172 177
173#define arch_align_stack(x) (x) 178#define arch_align_stack(x) (x)
174 179
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 5ddd2359f3e..607d413f616 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -14,12 +14,12 @@ do { \
14 (u32 *)&tsk->thread.dsp_status; \ 14 (u32 *)&tsk->thread.dsp_status; \
15 __asm__ __volatile__ ( \ 15 __asm__ __volatile__ ( \
16 ".balign 4\n\t" \ 16 ".balign 4\n\t" \
17 "movs.l @r2+, a0\n\t" \
17 "movs.l @r2+, a1\n\t" \ 18 "movs.l @r2+, a1\n\t" \
18 "movs.l @r2+, a0g\n\t" \ 19 "movs.l @r2+, a0g\n\t" \
19 "movs.l @r2+, a1g\n\t" \ 20 "movs.l @r2+, a1g\n\t" \
20 "movs.l @r2+, m0\n\t" \ 21 "movs.l @r2+, m0\n\t" \
21 "movs.l @r2+, m1\n\t" \ 22 "movs.l @r2+, m1\n\t" \
22 "movs.l @r2+, a0\n\t" \
23 "movs.l @r2+, x0\n\t" \ 23 "movs.l @r2+, x0\n\t" \
24 "movs.l @r2+, x1\n\t" \ 24 "movs.l @r2+, x1\n\t" \
25 "movs.l @r2+, y0\n\t" \ 25 "movs.l @r2+, y0\n\t" \
@@ -39,20 +39,20 @@ do { \
39 \ 39 \
40 __asm__ __volatile__ ( \ 40 __asm__ __volatile__ ( \
41 ".balign 4\n\t" \ 41 ".balign 4\n\t" \
42 "stc.l mod, @-r2\n\t" \ 42 "stc.l mod, @-r2\n\t" \
43 "stc.l re, @-r2\n\t" \ 43 "stc.l re, @-r2\n\t" \
44 "stc.l rs, @-r2\n\t" \ 44 "stc.l rs, @-r2\n\t" \
45 "sts.l dsr, @-r2\n\t" \ 45 "sts.l dsr, @-r2\n\t" \
46 "sts.l y1, @-r2\n\t" \ 46 "movs.l y1, @-r2\n\t" \
47 "sts.l y0, @-r2\n\t" \ 47 "movs.l y0, @-r2\n\t" \
48 "sts.l x1, @-r2\n\t" \ 48 "movs.l x1, @-r2\n\t" \
49 "sts.l x0, @-r2\n\t" \ 49 "movs.l x0, @-r2\n\t" \
50 "sts.l a0, @-r2\n\t" \ 50 "movs.l m1, @-r2\n\t" \
51 ".word 0xf653 ! movs.l a1, @-r2\n\t" \ 51 "movs.l m0, @-r2\n\t" \
52 ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \ 52 "movs.l a1g, @-r2\n\t" \
53 ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \ 53 "movs.l a0g, @-r2\n\t" \
54 ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \ 54 "movs.l a1, @-r2\n\t" \
55 ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \ 55 "movs.l a0, @-r2\n\t" \
56 : : "r" (__ts2)); \ 56 : : "r" (__ts2)); \
57} while (0) 57} while (0)
58 58
@@ -214,7 +214,7 @@ static inline reg_size_t register_align(void *val)
214} 214}
215 215
216int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 216int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
217 struct mem_access *ma); 217 struct mem_access *ma, int);
218 218
219asmlinkage void do_address_error(struct pt_regs *regs, 219asmlinkage void do_address_error(struct pt_regs *regs,
220 unsigned long writeaccess, 220 unsigned long writeaccess,
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 61d6ad93d78..925dd40d9d5 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -132,7 +132,7 @@
132#define __NR_clone 120 132#define __NR_clone 120
133#define __NR_setdomainname 121 133#define __NR_setdomainname 121
134#define __NR_uname 122 134#define __NR_uname 122
135#define __NR_modify_ldt 123 135#define __NR_cacheflush 123
136#define __NR_adjtimex 124 136#define __NR_adjtimex 124
137#define __NR_mprotect 125 137#define __NR_mprotect 125
138#define __NR_sigprocmask 126 138#define __NR_sigprocmask 126
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index a751699afda..2b84bc916bc 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -137,7 +137,7 @@
137#define __NR_clone 120 137#define __NR_clone 120
138#define __NR_setdomainname 121 138#define __NR_setdomainname 121
139#define __NR_uname 122 139#define __NR_uname 122
140#define __NR_modify_ldt 123 140#define __NR_cacheflush 123
141#define __NR_adjtimex 124 141#define __NR_adjtimex 124
142#define __NR_mprotect 125 142#define __NR_mprotect 125
143#define __NR_sigprocmask 126 143#define __NR_sigprocmask 126
diff --git a/arch/sh/include/asm/unwinder.h b/arch/sh/include/asm/unwinder.h
index 3dc551453e2..1e65c07b3e1 100644
--- a/arch/sh/include/asm/unwinder.h
+++ b/arch/sh/include/asm/unwinder.h
@@ -22,4 +22,10 @@ extern void stack_reader_dump(struct task_struct *, struct pt_regs *,
22 unsigned long *, const struct stacktrace_ops *, 22 unsigned long *, const struct stacktrace_ops *,
23 void *); 23 void *);
24 24
25/*
26 * Used by fault handling code to signal to the unwinder code that it
27 * should switch to a different unwinder.
28 */
29extern int unwinder_faulted;
30
25#endif /* _LINUX_UNWINDER_H */ 31#endif /* _LINUX_UNWINDER_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index f024fed00a7..2fe7cee9e43 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -13,10 +13,18 @@
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/io.h>
17
18#define WTCNT_HIGH 0x5a
19#define WTCSR_HIGH 0xa5
20
21#define WTCSR_CKS2 0x04
22#define WTCSR_CKS1 0x02
23#define WTCSR_CKS0 0x01
24
16#include <cpu/watchdog.h> 25#include <cpu/watchdog.h>
17#include <asm/io.h>
18 26
19/* 27/*
20 * See cpu-sh2/watchdog.h for explanation of this stupidity.. 28 * See cpu-sh2/watchdog.h for explanation of this stupidity..
21 */ 29 */
22#ifndef WTCNT_R 30#ifndef WTCNT_R
@@ -27,13 +35,6 @@
27# define WTCSR_R WTCSR 35# define WTCSR_R WTCSR
28#endif 36#endif
29 37
30#define WTCNT_HIGH 0x5a
31#define WTCSR_HIGH 0xa5
32
33#define WTCSR_CKS2 0x04
34#define WTCSR_CKS1 0x02
35#define WTCSR_CKS0 0x01
36
37/* 38/*
38 * CKS0-2 supports a number of clock division ratios. At the time the watchdog 39 * CKS0-2 supports a number of clock division ratios. At the time the watchdog
39 * is enabled, it defaults to a 41 usec overflow period .. we overload this to 40 * is enabled, it defaults to a 41 usec overflow period .. we overload this to
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index ccf1d999db6..e1e90960ee9 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -22,6 +22,10 @@
22#define MSTPCR0 0xa4150030 22#define MSTPCR0 0xa4150030
23#define MSTPCR1 0xa4150034 23#define MSTPCR1 0xa4150034
24#define MSTPCR2 0xa4150038 24#define MSTPCR2 0xa4150038
25#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
26#define FRQCR 0xffc80000
27#define OSCCR 0xffc80018
28#define PLLCR 0xffc80024
25#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 29#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7780) 30 defined(CONFIG_CPU_SUBTYPE_SH7780)
27#define FRQCR 0xffc80000 31#define FRQCR 0xffc80000
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
new file mode 100644
index 00000000000..f4d267efad7
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -0,0 +1,243 @@
1#ifndef __ASM_SH7757_H__
2#define __ASM_SH7757_H__
3
4enum {
5 /* PTA */
6 GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
7 GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
8
9 /* PTB */
10 GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
11 GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
12
13 /* PTC */
14 GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4,
15 GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0,
16
17 /* PTD */
18 GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
19 GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
20
21 /* PTE */
22 GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4,
23 GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0,
24
25 /* PTF */
26 GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4,
27 GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0,
28
29 /* PTG */
30 GPIO_PTG7, GPIO_PTG6, GPIO_PTG5, GPIO_PTG4,
31 GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0,
32
33 /* PTH */
34 GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4,
35 GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
36
37 /* PTI */
38 GPIO_PTI7, GPIO_PTI6, GPIO_PTI5, GPIO_PTI4,
39 GPIO_PTI3, GPIO_PTI2, GPIO_PTI1, GPIO_PTI0,
40
41 /* PTJ */
42 GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4,
43 GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0,
44
45 /* PTK */
46 GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4,
47 GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
48
49 /* PTL */
50 GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4,
51 GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0,
52
53 /* PTM */
54 GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
55 GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
56
57 /* PTN */
58 GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4,
59 GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0,
60
61 /* PTO */
62 GPIO_PTO7, GPIO_PTO6, GPIO_PTO5, GPIO_PTO4,
63 GPIO_PTO3, GPIO_PTO2, GPIO_PTO1, GPIO_PTO0,
64
65 /* PTP */
66 GPIO_PTP6, GPIO_PTP5, GPIO_PTP4,
67 GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0,
68
69 /* PTQ */
70 GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4,
71 GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0,
72
73 /* PTR */
74 GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4,
75 GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
76
77 /* PTS */
78 GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4,
79 GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
80
81 /* PTT */
82 GPIO_PTT5, GPIO_PTT4,
83 GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0,
84
85 /* PTU */
86 GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4,
87 GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0,
88
89 /* PTV */
90 GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4,
91 GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
92
93 /* PTW */
94 GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4,
95 GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0,
96
97 /* PTX */
98 GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4,
99 GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0,
100
101 /* PTY */
102 GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4,
103 GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0,
104
105 /* PTZ */
106 GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4,
107 GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0,
108
109
110 /* PTA (mobule: LBSC, CPG, LPC) */
111 GPIO_FN_BS, GPIO_FN_RDWR, GPIO_FN_WE1, GPIO_FN_RDY,
112 GPIO_FN_MD10, GPIO_FN_MD9, GPIO_FN_MD8,
113 GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4,
114 GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0,
115
116 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
117 GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
118 GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,
119 GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO,
120 GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO,
121 GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST,
122 GPIO_FN_WPSZ1, GPIO_FN_WPSZ0, GPIO_FN_FWID, GPIO_FN_FLSHSZ,
123 GPIO_FN_LPC_SPIEN, GPIO_FN_BASEL,
124
125 /* PTC (mobule: SD) */
126 GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD,
127 GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0,
128
129 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
130 GPIO_FN_IRQ7, GPIO_FN_IRQ6, GPIO_FN_IRQ5, GPIO_FN_IRQ4,
131 GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0,
132 GPIO_FN_MD6, GPIO_FN_MD5, GPIO_FN_MD3, GPIO_FN_MD2,
133 GPIO_FN_MD1, GPIO_FN_MD0, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0,
134
135 /* PTE (mobule: EtherC) */
136 GPIO_FN_ET0_CRS_DV, GPIO_FN_ET0_TXD1,
137 GPIO_FN_ET0_TXD0, GPIO_FN_ET0_TX_EN,
138 GPIO_FN_ET0_REF_CLK, GPIO_FN_ET0_RXD1,
139 GPIO_FN_ET0_RXD0, GPIO_FN_ET0_RX_ER,
140
141 /* PTF (mobule: EtherC) */
142 GPIO_FN_ET1_CRS_DV, GPIO_FN_ET1_TXD1,
143 GPIO_FN_ET1_TXD0, GPIO_FN_ET1_TX_EN,
144 GPIO_FN_ET1_REF_CLK, GPIO_FN_ET1_RXD1,
145 GPIO_FN_ET1_RXD0, GPIO_FN_ET1_RX_ER,
146
147 /* PTG (mobule: SYSTEM, PWMX, LPC) */
148 GPIO_FN_STATUS0, GPIO_FN_STATUS1,
149 GPIO_FN_PWX0, GPIO_FN_PWX1, GPIO_FN_PWX2, GPIO_FN_PWX3,
150 GPIO_FN_SERIRQ, GPIO_FN_CLKRUN, GPIO_FN_LPCPD, GPIO_FN_LDRQ,
151
152 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
153 GPIO_FN_TCLK, GPIO_FN_RXD4, GPIO_FN_TXD4,
154 GPIO_FN_SP1_MOSI, GPIO_FN_SP1_MISO,
155 GPIO_FN_SP1_SCK, GPIO_FN_SP1_SCK_FB,
156 GPIO_FN_SP1_SS0, GPIO_FN_SP1_SS1,
157 GPIO_FN_SP0_SS1,
158
159 /* PTI (mobule: INTC) */
160 GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12,
161 GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8,
162
163 /* PTJ (mobule: SCIF234, SERMUX) */
164 GPIO_FN_RXD3, GPIO_FN_TXD3, GPIO_FN_RXD2, GPIO_FN_TXD2,
165 GPIO_FN_COM1_TXD, GPIO_FN_COM1_RXD,
166 GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS,
167
168 /* PTK (mobule: SERMUX) */
169 GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD,
170 GPIO_FN_COM2_RTS, GPIO_FN_COM2_CTS,
171 GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR,
172 GPIO_FN_COM2_DCD, GPIO_FN_COM2_RI,
173
174 /* PTL (mobule: SERMUX) */
175 GPIO_FN_RAC_TXD, GPIO_FN_RAC_RXD,
176 GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS,
177 GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR,
178 GPIO_FN_RAC_DCD, GPIO_FN_RAC_RI,
179
180 /* PTM (mobule: IIC, LPC) */
181 GPIO_FN_SDA6, GPIO_FN_SCL6, GPIO_FN_SDA7, GPIO_FN_SCL7,
182 GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_FMS1,
183
184 /* PTN (mobule: SCIF234, EVC) */
185 GPIO_FN_SCK2, GPIO_FN_RTS4, GPIO_FN_RTS3, GPIO_FN_RTS2,
186 GPIO_FN_CTS4, GPIO_FN_CTS3, GPIO_FN_CTS2,
187 GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_EVENT5, GPIO_FN_EVENT4,
188 GPIO_FN_EVENT3, GPIO_FN_EVENT2, GPIO_FN_EVENT1, GPIO_FN_EVENT0,
189
190 /* PTO (mobule: SGPIO) */
191 GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD,
192 GPIO_FN_SGPIO0_DI, GPIO_FN_SGPIO0_DO,
193 GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD,
194 GPIO_FN_SGPIO1_DI, GPIO_FN_SGPIO1_DO,
195
196 /* PTP (mobule: JMC, SCIF234) */
197 GPIO_FN_JMCTCK, GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI,
198 GPIO_FN_JMCRST, GPIO_FN_SCK4, GPIO_FN_SCK3,
199
200 /* PTQ (mobule: LPC) */
201 GPIO_FN_LAD3, GPIO_FN_LAD2, GPIO_FN_LAD1, GPIO_FN_LAD0,
202 GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK,
203
204 /* PTR (mobule: GRA, IIC) */
205 GPIO_FN_DDC3, GPIO_FN_DDC2,
206 GPIO_FN_SDA8, GPIO_FN_SCL8, GPIO_FN_SDA2, GPIO_FN_SCL2,
207 GPIO_FN_SDA1, GPIO_FN_SCL1, GPIO_FN_SDA0, GPIO_FN_SCL0,
208
209 /* PTS (mobule: GRA, IIC) */
210 GPIO_FN_DDC1, GPIO_FN_DDC0,
211 GPIO_FN_SDA9, GPIO_FN_SCL9, GPIO_FN_SDA5, GPIO_FN_SCL5,
212 GPIO_FN_SDA4, GPIO_FN_SCL4, GPIO_FN_SDA3, GPIO_FN_SCL3,
213
214 /* PTT (mobule: SYSTEM, PWMX) */
215 GPIO_FN_AUDSYNC, GPIO_FN_AUDCK,
216 GPIO_FN_AUDATA3, GPIO_FN_AUDATA2,
217 GPIO_FN_AUDATA1, GPIO_FN_AUDATA0,
218 GPIO_FN_PWX7, GPIO_FN_PWX6, GPIO_FN_PWX5, GPIO_FN_PWX4,
219
220 /* PTU (mobule: LBSC, DMAC) */
221 GPIO_FN_CS6, GPIO_FN_CS5, GPIO_FN_CS4, GPIO_FN_CS0,
222 GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_A25, GPIO_FN_A24,
223 GPIO_FN_DREQ0, GPIO_FN_DACK0,
224
225 /* PTV (mobule: LBSC, DMAC) */
226 GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,
227 GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,
228 GPIO_FN_TEND0, GPIO_FN_DREQ1, GPIO_FN_DACK1, GPIO_FN_TEND1,
229
230 /* PTW (mobule: LBSC) */
231 GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,
232 GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,
233
234 /* PTX (mobule: LBSC) */
235 GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,
236 GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,
237
238 /* PTY (mobule: LBSC) */
239 GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,
240 GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,
241};
242
243#endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h
index 90011d435f3..1292ae5c21b 100644
--- a/arch/sh/include/mach-common/mach/sh7785lcr.h
+++ b/arch/sh/include/mach-common/mach/sh7785lcr.h
@@ -35,6 +35,8 @@
35#define PCA9564_ADDR 0x06000000 /* I2C */ 35#define PCA9564_ADDR 0x06000000 /* I2C */
36#define PCA9564_SIZE 0x00000100 36#define PCA9564_SIZE 0x00000100
37 37
38#define PCA9564_PROTO_32BIT_ADDR 0x14000000
39
38#define SM107_MEM_ADDR 0x10000000 40#define SM107_MEM_ADDR 0x10000000
39#define SM107_MEM_SIZE 0x00e00000 41#define SM107_MEM_SIZE 0x00e00000
40#define SM107_REG_ADDR 0x13e00000 42#define SM107_REG_ADDR 0x13e00000
diff --git a/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
index 25801d495c5..a19ac31c8cd 100644
--- a/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
+++ b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
@@ -16,6 +16,12 @@ LIST "--------------------------------"
16LIST "disable watchdog" 16LIST "disable watchdog"
17EW 0xa4520004, 0xa507 17EW 0xa4520004, 0xa507
18 18
19LIST "invalidate instruction cache"
20ED 0xff00001c, 0x00000800
21
22LIST "invalidate TLBs"
23ED 0xff000010, 0x00000004
24
19LIST "select mode for cs5 + cs6" 25LIST "select mode for cs5 + cs6"
20ED 0xff800020, 0xa5a50001 26ED 0xff800020, 0xa5a50001
21ED 0xfec10000, 0x0000001b 27ED 0xfec10000, 0x0000001b
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
index f5aa8e16770..39ee7944356 100644
--- a/arch/sh/include/mach-kfr2r09/mach/romimage.h
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -73,3 +73,16 @@
73.endm 73.endm
74 74
75#include "partner-jet-setup.txt" 75#include "partner-jet-setup.txt"
76
77 /* execute icbi after enabling cache */
78 mov.l 1f, r0
79 icbi @r0
80
81 /* jump to cached area */
82 mova 2f, r0
83 jmp @r0
84 nop
85
86 .align 2
871: .long 0xa8000000
882:
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 808d99a48ef..c1508a90fc6 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -35,6 +35,7 @@ static void disable_ipr_irq(unsigned int irq)
35 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx]; 35 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
36 /* Set the priority in IPR to 0 */ 36 /* Set the priority in IPR to 0 */
37 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); 37 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
38 (void)__raw_readw(addr); /* Read back to flush write posting */
38} 39}
39 40
40static void enable_ipr_irq(unsigned int irq) 41static void enable_ipr_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index f94f25e666c..aebd33d18ff 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -265,7 +265,7 @@ restore_all:
265 ! 265 !
266 ! Calculate new SR value 266 ! Calculate new SR value
267 mov k3, k2 ! original SR value 267 mov k3, k2 ! original SR value
268 mov #0xf0, k1 268 mov #0xfffffff0, k1
269 extu.b k1, k1 269 extu.b k1, k1
270 not k1, k1 270 not k1, k1
271 and k1, k2 ! Mask original SR value 271 and k1, k2 ! Mask original SR value
@@ -516,6 +516,8 @@ ENTRY(handle_interrupt)
516 bsr save_regs ! needs original pr value in k3 516 bsr save_regs ! needs original pr value in k3
517 mov #-1, k2 ! default vector kept in k2 517 mov #-1, k2 ! default vector kept in k2
518 518
519 setup_frame_reg
520
519 stc sr, r0 ! get status register 521 stc sr, r0 ! get status register
520 shlr2 r0 522 shlr2 r0
521 and #0x3c, r0 523 and #0x3c, r0
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 695026a3f02..d36f0c45f55 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -144,8 +144,15 @@ int __init detect_cpu_and_cache_system(void)
144 } 144 }
145 break; 145 break;
146 case 0x300b: 146 case 0x300b:
147 boot_cpu_data.type = CPU_SH7724; 147 switch (prr) {
148 boot_cpu_data.flags |= CPU_HAS_L2_CACHE; 148 case 0x20:
149 boot_cpu_data.type = CPU_SH7724;
150 boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
151 break;
152 case 0x50:
153 boot_cpu_data.type = CPU_SH7757;
154 break;
155 }
149 break; 156 break;
150 case 0x4000: /* 1st cut */ 157 case 0x4000: /* 1st cut */
151 case 0x4001: /* 2nd cut */ 158 case 0x4001: /* 2nd cut */
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 12cddf4c721..490d5dc9e37 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -3,6 +3,7 @@
3# 3#
4 4
5# CPU subtype setup 5# CPU subtype setup
6obj-$(CONFIG_CPU_SUBTYPE_SH7757) += setup-sh7757.o
6obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o 7obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o
7obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
8obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
19smp-$(CONFIG_CPU_SHX3) := smp-shx3.o 20smp-$(CONFIG_CPU_SHX3) := smp-shx3.o
20 21
21# Primary on-chip clocks (common) 22# Primary on-chip clocks (common)
23clock-$(CONFIG_CPU_SUBTYPE_SH7757) := clock-sh7757.o
22clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o 24clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o
23clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 25clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
24clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 26clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
@@ -35,6 +37,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
35pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o 37pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o
36pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o 38pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o
37pinmux-$(CONFIG_CPU_SUBTYPE_SH7724) := pinmux-sh7724.o 39pinmux-$(CONFIG_CPU_SUBTYPE_SH7724) := pinmux-sh7724.o
40pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o
38pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o 41pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o
39pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o 42pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o
40 43
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 5b1bbbe63b1..ea38b554dc0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -164,11 +164,11 @@ static struct clk mstp_clks[] = {
164 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 164 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
165 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), 165 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
166 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 166 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
167 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT), 167 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0),
168 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), 168 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
169 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), 169 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
170 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, CLK_ENABLE_ON_INIT), 170 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, 0),
171 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT), 171 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
172 SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0), 172 SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0),
173}; 173};
174 174
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index e5c63911403..20a31c2255a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -190,12 +190,12 @@ static struct clk mstp_clks[] = {
190 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0), 190 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0),
191 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 191 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
192 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), 192 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
193 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, CLK_ENABLE_ON_INIT), 193 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, 0),
194 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 194 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
195 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), 195 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
196 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), 196 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
197 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, CLK_ENABLE_ON_INIT), 197 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, 0),
198 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT), 198 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
199 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 199 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
200}; 200};
201 201
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 627588dfddf..dfe9192be63 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -204,17 +204,17 @@ static struct clk mstp_clks[] = {
204 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 204 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
205 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), 205 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
206 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), 206 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
207 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, CLK_ENABLE_ON_INIT), 207 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, 0),
208 SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0), 208 SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0),
209 SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0), 209 SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0),
210 SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0), 210 SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0),
211 SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0), 211 SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0),
212 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT), 212 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0),
213 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 213 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
214 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0), 214 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0),
215 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0), 215 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0),
216 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, CLK_ENABLE_ON_INIT), 216 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, 0),
217 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT), 217 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
218 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 218 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
219}; 219};
220 220
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
new file mode 100644
index 00000000000..ddc235ca966
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -0,0 +1,130 @@
1/*
2 * arch/sh/kernel/cpu/sh4/clock-sh7757.c
3 *
4 * SH7757 support for the clock framework
5 *
6 * Copyright (C) 2009 Renesas Solutions Corp.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <asm/clock.h>
16#include <asm/freq.h>
17
18static int ifc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
19 16, 1, 1, 32, 1, 1, 1, 1 };
20static int sfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
21 16, 1, 1, 32, 1, 1, 1, 1 };
22static int bfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
23 16, 1, 1, 32, 1, 1, 1, 1 };
24static int p1fc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
25 16, 1, 1, 32, 1, 1, 1, 1 };
26
27static void master_clk_init(struct clk *clk)
28{
29 clk->rate = CONFIG_SH_PCLK_FREQ * 16;
30}
31
32static struct clk_ops sh7757_master_clk_ops = {
33 .init = master_clk_init,
34};
35
36static void module_clk_recalc(struct clk *clk)
37{
38 int idx = ctrl_inl(FRQCR) & 0x0000000f;
39 clk->rate = clk->parent->rate / p1fc_divisors[idx];
40}
41
42static struct clk_ops sh7757_module_clk_ops = {
43 .recalc = module_clk_recalc,
44};
45
46static void bus_clk_recalc(struct clk *clk)
47{
48 int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f;
49 clk->rate = clk->parent->rate / bfc_divisors[idx];
50}
51
52static struct clk_ops sh7757_bus_clk_ops = {
53 .recalc = bus_clk_recalc,
54};
55
56static void cpu_clk_recalc(struct clk *clk)
57{
58 int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f;
59 clk->rate = clk->parent->rate / ifc_divisors[idx];
60}
61
62static struct clk_ops sh7757_cpu_clk_ops = {
63 .recalc = cpu_clk_recalc,
64};
65
66static struct clk_ops *sh7757_clk_ops[] = {
67 &sh7757_master_clk_ops,
68 &sh7757_module_clk_ops,
69 &sh7757_bus_clk_ops,
70 &sh7757_cpu_clk_ops,
71};
72
73void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
74{
75 if (idx < ARRAY_SIZE(sh7757_clk_ops))
76 *ops = sh7757_clk_ops[idx];
77}
78
79static void shyway_clk_recalc(struct clk *clk)
80{
81 int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f;
82 clk->rate = clk->parent->rate / sfc_divisors[idx];
83}
84
85static struct clk_ops sh7757_shyway_clk_ops = {
86 .recalc = shyway_clk_recalc,
87};
88
89static struct clk sh7757_shyway_clk = {
90 .name = "shyway_clk",
91 .flags = CLK_ENABLE_ON_INIT,
92 .ops = &sh7757_shyway_clk_ops,
93};
94
95/*
96 * Additional sh7757-specific on-chip clocks that aren't already part of the
97 * clock framework
98 */
99static struct clk *sh7757_onchip_clocks[] = {
100 &sh7757_shyway_clk,
101};
102
103static int __init sh7757_clk_init(void)
104{
105 struct clk *clk = clk_get(NULL, "master_clk");
106 int i;
107
108 for (i = 0; i < ARRAY_SIZE(sh7757_onchip_clocks); i++) {
109 struct clk *clkp = sh7757_onchip_clocks[i];
110
111 clkp->parent = clk;
112 clk_register(clkp);
113 clk_enable(clkp);
114 }
115
116 /*
117 * Now that we have the rest of the clocks registered, we need to
118 * force the parent clock to propagate so that these clocks will
119 * automatically figure out their rate. We cheat by handing the
120 * parent clock its current rate and forcing child propagation.
121 */
122 clk_set_rate(clk, clk_get_rate(clk));
123
124 clk_put(clk);
125
126 return 0;
127}
128
129arch_initcall(sh7757_clk_init);
130
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
new file mode 100644
index 00000000000..ed23b155c09
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
@@ -0,0 +1,2019 @@
1/*
2 * SH7757 (A0 step) Pinmux
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * Based on SH7757 Pinmux
9 * Copyright (C) 2008 Magnus Damm
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/gpio.h>
19#include <cpu/sh7757.h>
20
21enum {
22 PINMUX_RESERVED = 0,
23
24 PINMUX_DATA_BEGIN,
25 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
26 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
27 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
28 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
29 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
30 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
31 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
32 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
33 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
34 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
35 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
36 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
37 PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
38 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
39 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
40 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
41 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
42 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
43 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
44 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
45 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
46 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
47 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
48 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
49 PTM6_DATA, PTM5_DATA, PTM4_DATA,
50 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
51 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
52 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
53 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
54 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
55 PTP6_DATA, PTP5_DATA, PTP4_DATA,
56 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
57 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
58 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
59 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
60 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
61 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
62 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
63 PTT5_DATA, PTT4_DATA,
64 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
65 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
66 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
67 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
68 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
69 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
70 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
71 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
72 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
73 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
74 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
75 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
76 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
77 PINMUX_DATA_END,
78
79 PINMUX_INPUT_BEGIN,
80 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
81 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
82 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
83 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
84 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
85 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
86 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
87 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
88 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
89 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
90 PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
91 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
92 PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN,
93 PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
94 PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
95 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
96 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
97 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
98 PTJ7_IN, PTJ6_IN, PTJ5_IN, PTJ4_IN,
99 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
100 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
101 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
102 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
103 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
104 PTM6_IN, PTM5_IN, PTM4_IN,
105 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
106 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
107 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
108 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
109 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
110 PTP6_IN, PTP5_IN, PTP4_IN,
111 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
112 PTQ6_IN, PTQ5_IN, PTQ4_IN,
113 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
114 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
115 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
116 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
117 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
118 PTT5_IN, PTT4_IN,
119 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
120 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
121 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
122 PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
123 PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
124 PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
125 PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
126 PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
127 PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
128 PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
129 PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
130 PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
131 PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
132 PINMUX_INPUT_END,
133
134 PINMUX_INPUT_PULLUP_BEGIN,
135 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
136 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
137 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
138 PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
139 PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
140 PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
141 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
142 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
143 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
144 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
145 PINMUX_INPUT_PULLUP_END,
146
147 PINMUX_OUTPUT_BEGIN,
148 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
149 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
150 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
151 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
152 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
153 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
154 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
155 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
156 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
157 PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
158 PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
159 PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
160 PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT,
161 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
162 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
163 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
164 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
165 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
166 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
167 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
168 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
169 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
170 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
171 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
172 PTM6_OUT, PTM5_OUT, PTM4_OUT,
173 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
174 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
175 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
176 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
177 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
178 PTP6_OUT, PTP5_OUT, PTP4_OUT,
179 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
180 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
181 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
182 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
183 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
184 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
185 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
186 PTT5_OUT, PTT4_OUT,
187 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
188 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
189 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
190 PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
191 PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
192 PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
193 PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
194 PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
195 PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
196 PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
197 PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
198 PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
199 PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
200 PINMUX_OUTPUT_END,
201
202 PINMUX_FUNCTION_BEGIN,
203 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
204 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
205 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
206 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
207 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
208 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
209 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
210 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
211 PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
212 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
213 PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
214 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
215 PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN,
216 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
217 PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
218 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
219 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
220 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
221 PTJ7_FN, PTJ6_FN, PTJ5_FN, PTJ4_FN,
222 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
223 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
224 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
225 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
226 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
227 PTM6_FN, PTM5_FN, PTM4_FN,
228 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
229 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
230 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
231 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
232 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
233 PTP6_FN, PTP5_FN, PTP4_FN,
234 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
235 PTQ6_FN, PTQ5_FN, PTQ4_FN,
236 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
237 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
238 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
239 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
240 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
241 PTT5_FN, PTT4_FN,
242 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
243 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
244 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
245 PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
246 PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
247 PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
248 PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
249 PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
250 PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
251 PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
252 PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
253 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
254 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
255
256 PS0_15_FN1, PS0_15_FN3,
257 PS0_14_FN1, PS0_14_FN3,
258 PS0_13_FN1, PS0_13_FN3,
259 PS0_12_FN1, PS0_12_FN3,
260 PS0_7_FN1, PS0_7_FN2,
261 PS0_6_FN1, PS0_6_FN2,
262 PS0_5_FN1, PS0_5_FN2,
263 PS0_4_FN1, PS0_4_FN2,
264 PS0_3_FN1, PS0_3_FN2,
265 PS0_2_FN1, PS0_2_FN2,
266 PS0_1_FN1, PS0_1_FN2,
267
268 PS1_7_FN1, PS1_7_FN3,
269 PS1_6_FN1, PS1_6_FN3,
270
271 PS2_13_FN1, PS2_13_FN3,
272 PS2_12_FN1, PS2_12_FN3,
273 PS2_1_FN1, PS2_1_FN2,
274 PS2_0_FN1, PS2_0_FN2,
275
276 PS4_15_FN1, PS4_15_FN2,
277 PS4_14_FN1, PS4_14_FN2,
278 PS4_13_FN1, PS4_13_FN2,
279 PS4_12_FN1, PS4_12_FN2,
280 PS4_11_FN1, PS4_11_FN2,
281 PS4_10_FN1, PS4_10_FN2,
282 PS4_9_FN1, PS4_9_FN2,
283 PS4_3_FN1, PS4_3_FN2,
284 PS4_2_FN1, PS4_2_FN2,
285 PS4_1_FN1, PS4_1_FN2,
286 PS4_0_FN1, PS4_0_FN2,
287
288 PS5_9_FN1, PS5_9_FN2,
289 PS5_8_FN1, PS5_8_FN2,
290 PS5_7_FN1, PS5_7_FN2,
291 PS5_6_FN1, PS5_6_FN2,
292 PS5_5_FN1, PS5_5_FN2,
293 PS5_4_FN1, PS5_4_FN2,
294
295 /* AN15 to 8 : EVENT15 to 8 */
296 PS6_7_FN_AN, PS6_7_FN_EV,
297 PS6_6_FN_AN, PS6_6_FN_EV,
298 PS6_5_FN_AN, PS6_5_FN_EV,
299 PS6_4_FN_AN, PS6_4_FN_EV,
300 PS6_3_FN_AN, PS6_3_FN_EV,
301 PS6_2_FN_AN, PS6_2_FN_EV,
302 PS6_1_FN_AN, PS6_1_FN_EV,
303 PS6_0_FN_AN, PS6_0_FN_EV,
304
305 PINMUX_FUNCTION_END,
306
307 PINMUX_MARK_BEGIN,
308 /* PTA (mobule: LBSC, CPG, LPC) */
309 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK,
310 MD10_MARK, MD9_MARK, MD8_MARK,
311 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
312 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
313
314 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
315 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
316 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
317 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK,
318 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
319 WPSZ1_MARK, WPSZ0_MARK, FWID_MARK, FLSHSZ_MARK,
320 LPC_SPIEN_MARK, BASEL_MARK,
321
322 /* PTC (mobule: SD) */
323 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK,
324 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK,
325
326 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
327 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK,
328 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
329 MD6_MARK, MD5_MARK, MD3_MARK, MD2_MARK,
330 MD1_MARK, MD0_MARK, ADTRG1_MARK, ADTRG0_MARK,
331
332 /* PTE (mobule: EtherC) */
333 ET0_CRS_DV_MARK, ET0_TXD1_MARK,
334 ET0_TXD0_MARK, ET0_TX_EN_MARK,
335 ET0_REF_CLK_MARK, ET0_RXD1_MARK,
336 ET0_RXD0_MARK, ET0_RX_ER_MARK,
337
338 /* PTF (mobule: EtherC) */
339 ET1_CRS_DV_MARK, ET1_TXD1_MARK,
340 ET1_TXD0_MARK, ET1_TX_EN_MARK,
341 ET1_REF_CLK_MARK, ET1_RXD1_MARK,
342 ET1_RXD0_MARK, ET1_RX_ER_MARK,
343
344 /* PTG (mobule: SYSTEM, PWMX, LPC) */
345 STATUS0_MARK, STATUS1_MARK,
346 PWX0_MARK, PWX1_MARK, PWX2_MARK, PWX3_MARK,
347 SERIRQ_MARK, CLKRUN_MARK, LPCPD_MARK, LDRQ_MARK,
348
349 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
350 TCLK_MARK, RXD4_MARK, TXD4_MARK,
351 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK,
352 SP1_SS0_MARK, SP1_SS1_MARK, SP0_SS1_MARK,
353
354 /* PTI (mobule: INTC) */
355 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK,
356 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK,
357
358 /* PTJ (mobule: SCIF234, SERMUX) */
359 RXD3_MARK, TXD3_MARK, RXD2_MARK, TXD2_MARK,
360 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK,
361
362 /* PTK (mobule: SERMUX) */
363 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK,
364 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, COM2_RI_MARK,
365
366 /* PTL (mobule: SERMUX) */
367 RAC_TXD_MARK, RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK,
368 RAC_DTR_MARK, RAC_DSR_MARK, RAC_DCD_MARK, RAC_RI_MARK,
369
370 /* PTM (mobule: IIC, LPC) */
371 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK,
372 WP_MARK, FMS0_MARK, FMS1_MARK,
373
374 /* PTN (mobule: SCIF234, EVC) */
375 SCK2_MARK, RTS4_MARK, RTS3_MARK, RTS2_MARK,
376 CTS4_MARK, CTS3_MARK, CTS2_MARK,
377 EVENT7_MARK, EVENT6_MARK, EVENT5_MARK, EVENT4_MARK,
378 EVENT3_MARK, EVENT2_MARK, EVENT1_MARK, EVENT0_MARK,
379
380 /* PTO (mobule: SGPIO) */
381 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK,
382 SGPIO0_DI_MARK, SGPIO0_DO_MARK,
383 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK,
384 SGPIO1_DI_MARK, SGPIO1_DO_MARK,
385
386 /* PTP (mobule: JMC, SCIF234) */
387 JMCTCK_MARK, JMCTMS_MARK, JMCTDO_MARK, JMCTDI_MARK,
388 JMCRST_MARK, SCK4_MARK, SCK3_MARK,
389
390 /* PTQ (mobule: LPC) */
391 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK,
392 LFRAME_MARK, LRESET_MARK, LCLK_MARK,
393
394 /* PTR (mobule: GRA, IIC) */
395 DDC3_MARK, DDC2_MARK,
396 SDA8_MARK, SCL8_MARK, SDA2_MARK, SCL2_MARK,
397 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK,
398
399 /* PTS (mobule: GRA, IIC) */
400 DDC1_MARK, DDC0_MARK,
401 SDA9_MARK, SCL9_MARK, SDA5_MARK, SCL5_MARK,
402 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK,
403
404 /* PTT (mobule: SYSTEM, PWMX) */
405 AUDSYNC_MARK, AUDCK_MARK,
406 AUDATA3_MARK, AUDATA2_MARK,
407 AUDATA1_MARK, AUDATA0_MARK,
408 PWX7_MARK, PWX6_MARK, PWX5_MARK, PWX4_MARK,
409
410 /* PTU (mobule: LBSC, DMAC) */
411 CS6_MARK, CS5_MARK, CS4_MARK, CS0_MARK,
412 RD_MARK, WE0_MARK, A25_MARK, A24_MARK,
413 DREQ0_MARK, DACK0_MARK,
414
415 /* PTV (mobule: LBSC, DMAC) */
416 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
417 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
418 TEND0_MARK, DREQ1_MARK, DACK1_MARK, TEND1_MARK,
419
420 /* PTW (mobule: LBSC) */
421 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
422 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
423
424 /* PTX (mobule: LBSC) */
425 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
426 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
427
428 /* PTY (mobule: LBSC) */
429 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
430 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
431 PINMUX_MARK_END,
432};
433
434static pinmux_enum_t pinmux_data[] = {
435 /* PTA GPIO */
436 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
437 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
438 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
439 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
440 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
441 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
442 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
443 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
444
445 /* PTB GPIO */
446 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
447 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
448 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
449 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
450 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
451 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
452 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
453 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
454
455 /* PTC GPIO */
456 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
457 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
458 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
459 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
460 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
461 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
462 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
463 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
464
465 /* PTD GPIO */
466 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
467 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
468 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
469 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
470 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
471 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
472 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
473 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
474
475 /* PTE GPIO */
476 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
477 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
478 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
479 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
480 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
481 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
482
483 /* PTF GPIO */
484 PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
485 PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
486 PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
487 PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
488 PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
489 PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
490 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
491 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
492
493 /* PTG GPIO */
494 PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT),
495 PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
496 PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
497 PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
498 PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
499 PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
500 PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
501 PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
502
503 /* PTH GPIO */
504 PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
505 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
506 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
507 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
508 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
509 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
510 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
511 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
512
513 /* PTI GPIO */
514 PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT),
515 PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT),
516 PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT),
517 PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT),
518 PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT),
519 PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT),
520 PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT),
521 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
522
523 /* PTJ GPIO */
524 PINMUX_DATA(PTJ7_DATA, PTJ7_IN, PTJ7_OUT),
525 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
526 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
527 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
528 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
529 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
530 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
531 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
532
533 /* PTK GPIO */
534 PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
535 PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
536 PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
537 PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
538 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
539 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
540 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
541 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
542
543 /* PTL GPIO */
544 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
545 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
546 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
547 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
548 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
549 PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
550 PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
551 PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
552
553 /* PTM GPIO */
554 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
555 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
556 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
557 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
558 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
559 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
560 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
561
562 /* PTN GPIO */
563 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
564 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
565 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
566 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
567 PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
568 PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
569 PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
570 PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
571
572 /* PTO GPIO */
573 PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT),
574 PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT),
575 PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT),
576 PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT),
577 PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT),
578 PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT),
579 PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT),
580 PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT),
581
582 /* PTQ GPIO */
583 PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
584 PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
585 PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
586 PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
587 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
588 PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
589 PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
590
591 /* PTR GPIO */
592 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
593 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
594 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
595 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
596 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
597 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
598 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
599 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
600
601 /* PTS GPIO */
602 PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
603 PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
604 PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
605 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
606 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
607 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
608 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
609 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
610
611 /* PTT GPIO */
612 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
613 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
614 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
615 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
616 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
617 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
618
619 /* PTU GPIO */
620 PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
621 PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
622 PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
623 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
624 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
625 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
626 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
627 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
628
629 /* PTV GPIO */
630 PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
631 PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
632 PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
633 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
634 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
635 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
636 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
637 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
638
639 /* PTW GPIO */
640 PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
641 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
642 PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
643 PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
644 PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
645 PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
646 PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
647 PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
648
649 /* PTX GPIO */
650 PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
651 PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
652 PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
653 PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
654 PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
655 PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
656 PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
657 PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
658
659 /* PTY GPIO */
660 PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
661 PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
662 PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
663 PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
664 PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
665 PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
666 PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
667 PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
668
669 /* PTZ GPIO */
670 PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
671 PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
672 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
673 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
674 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
675 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
676 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
677 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
678
679 /* PTA FN */
680 PINMUX_DATA(BS_MARK, PS0_15_FN1, PTA7_FN),
681 PINMUX_DATA(LGPIO7_MARK, PS0_15_FN3, PTA7_FN),
682 PINMUX_DATA(RDWR_MARK, PS0_14_FN1, PTA6_FN),
683 PINMUX_DATA(LGPIO6_MARK, PS0_14_FN3, PTA6_FN),
684 PINMUX_DATA(WE1_MARK, PS0_13_FN1, PTA5_FN),
685 PINMUX_DATA(LGPIO5_MARK, PS0_13_FN3, PTA5_FN),
686 PINMUX_DATA(RDY_MARK, PS0_12_FN1, PTA4_FN),
687 PINMUX_DATA(LGPIO4_MARK, PS0_12_FN3, PTA4_FN),
688 PINMUX_DATA(LGPIO3_MARK, PTA3_FN),
689 PINMUX_DATA(LGPIO2_MARK, PTA2_FN),
690 PINMUX_DATA(LGPIO1_MARK, PTA1_FN),
691 PINMUX_DATA(LGPIO0_MARK, PTA0_FN),
692
693 /* PTB FN */
694 PINMUX_DATA(D15_MARK, PS0_7_FN1, PTB7_FN),
695 PINMUX_DATA(ET0_MDC_MARK, PS0_7_FN2, PTB7_FN),
696 PINMUX_DATA(D14_MARK, PS0_6_FN1, PTB6_FN),
697 PINMUX_DATA(ET0_MDIO_MARK, PS0_6_FN2, PTB6_FN),
698 PINMUX_DATA(D13_MARK, PS0_5_FN1, PTB5_FN),
699 PINMUX_DATA(ET1_MDC_MARK, PS0_5_FN2, PTB5_FN),
700 PINMUX_DATA(D12_MARK, PS0_4_FN1, PTB4_FN),
701 PINMUX_DATA(ET1_MDIO_MARK, PS0_4_FN2, PTB4_FN),
702 PINMUX_DATA(D11_MARK, PS0_3_FN1, PTB3_FN),
703 PINMUX_DATA(SIM_D_MARK, PS0_3_FN2, PTB3_FN),
704 PINMUX_DATA(D10_MARK, PS0_2_FN1, PTB2_FN),
705 PINMUX_DATA(SIM_CLK_MARK, PS0_2_FN2, PTB2_FN),
706 PINMUX_DATA(D9_MARK, PS0_1_FN1, PTB1_FN),
707 PINMUX_DATA(SIM_RST_MARK, PS0_1_FN2, PTB1_FN),
708 PINMUX_DATA(D8_MARK, PTB0_FN),
709
710 /* PTC FN */
711 PINMUX_DATA(SD_WP_MARK, PTC7_FN),
712 PINMUX_DATA(SD_CD_MARK, PTC6_FN),
713 PINMUX_DATA(SD_CLK_MARK, PTC5_FN),
714 PINMUX_DATA(SD_CMD_MARK, PTC4_FN),
715 PINMUX_DATA(SD_D3_MARK, PTC3_FN),
716 PINMUX_DATA(SD_D2_MARK, PTC2_FN),
717 PINMUX_DATA(SD_D1_MARK, PTC1_FN),
718 PINMUX_DATA(SD_D0_MARK, PTC0_FN),
719
720 /* PTD FN */
721 PINMUX_DATA(IRQ7_MARK, PS1_7_FN1, PTD7_FN),
722 PINMUX_DATA(ADTRG1_MARK, PS1_7_FN3, PTD7_FN),
723 PINMUX_DATA(IRQ6_MARK, PS1_6_FN1, PTD6_FN),
724 PINMUX_DATA(ADTRG0_MARK, PS1_6_FN3, PTD6_FN),
725 PINMUX_DATA(IRQ5_MARK, PTD5_FN),
726 PINMUX_DATA(IRQ4_MARK, PTD4_FN),
727 PINMUX_DATA(IRQ3_MARK, PTD3_FN),
728 PINMUX_DATA(IRQ2_MARK, PTD2_FN),
729 PINMUX_DATA(IRQ1_MARK, PTD1_FN),
730 PINMUX_DATA(IRQ0_MARK, PTD0_FN),
731
732 /* PTE FN */
733 PINMUX_DATA(ET0_CRS_DV_MARK, PTE7_FN),
734 PINMUX_DATA(ET0_TXD1_MARK, PTE6_FN),
735 PINMUX_DATA(ET0_TXD0_MARK, PTE5_FN),
736 PINMUX_DATA(ET0_TX_EN_MARK, PTE4_FN),
737 PINMUX_DATA(ET0_REF_CLK_MARK, PTE3_FN),
738 PINMUX_DATA(ET0_RXD1_MARK, PTE2_FN),
739 PINMUX_DATA(ET0_RXD0_MARK, PTE1_FN),
740 PINMUX_DATA(ET0_RX_ER_MARK, PTE0_FN),
741
742 /* PTF FN */
743 PINMUX_DATA(ET1_CRS_DV_MARK, PTF7_FN),
744 PINMUX_DATA(ET1_TXD1_MARK, PTF6_FN),
745 PINMUX_DATA(ET1_TXD0_MARK, PTF5_FN),
746 PINMUX_DATA(ET1_TX_EN_MARK, PTF4_FN),
747 PINMUX_DATA(ET1_REF_CLK_MARK, PTF3_FN),
748 PINMUX_DATA(ET1_RXD1_MARK, PTF2_FN),
749 PINMUX_DATA(ET1_RXD0_MARK, PTF1_FN),
750 PINMUX_DATA(ET1_RX_ER_MARK, PTF0_FN),
751
752 /* PTG FN */
753 PINMUX_DATA(PWX0_MARK, PTG7_FN),
754 PINMUX_DATA(PWX1_MARK, PTG6_FN),
755 PINMUX_DATA(STATUS0_MARK, PS2_13_FN1, PTG5_FN),
756 PINMUX_DATA(PWX2_MARK, PS2_13_FN3, PTG5_FN),
757 PINMUX_DATA(STATUS1_MARK, PS2_12_FN1, PTG4_FN),
758 PINMUX_DATA(PWX3_MARK, PS2_12_FN3, PTG4_FN),
759 PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
760 PINMUX_DATA(CLKRUN_MARK, PTG2_FN),
761 PINMUX_DATA(LPCPD_MARK, PTG1_FN),
762 PINMUX_DATA(LDRQ_MARK, PTG0_FN),
763
764 /* PTH FN */
765 PINMUX_DATA(SP1_MOSI_MARK, PTH7_FN),
766 PINMUX_DATA(SP1_MISO_MARK, PTH6_FN),
767 PINMUX_DATA(SP1_SCK_MARK, PTH5_FN),
768 PINMUX_DATA(SP1_SCK_FB_MARK, PTH4_FN),
769 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
770 PINMUX_DATA(TCLK_MARK, PTH2_FN),
771 PINMUX_DATA(RXD4_MARK, PS2_1_FN1, PTH1_FN),
772 PINMUX_DATA(SP1_SS1_MARK, PS2_1_FN2, PTH1_FN),
773 PINMUX_DATA(TXD4_MARK, PS2_0_FN1, PTH0_FN),
774 PINMUX_DATA(SP0_SS1_MARK, PS2_0_FN2, PTH0_FN),
775
776 /* PTI FN */
777 PINMUX_DATA(IRQ15_MARK, PTI7_FN),
778 PINMUX_DATA(IRQ14_MARK, PTI6_FN),
779 PINMUX_DATA(IRQ13_MARK, PTI5_FN),
780 PINMUX_DATA(IRQ12_MARK, PTI4_FN),
781 PINMUX_DATA(IRQ11_MARK, PTI3_FN),
782 PINMUX_DATA(IRQ10_MARK, PTI2_FN),
783 PINMUX_DATA(IRQ9_MARK, PTI1_FN),
784 PINMUX_DATA(IRQ8_MARK, PTI0_FN),
785
786 /* PTJ FN */
787 PINMUX_DATA(RXD3_MARK, PTJ7_FN),
788 PINMUX_DATA(TXD3_MARK, PTJ6_FN),
789 PINMUX_DATA(RXD2_MARK, PTJ5_FN),
790 PINMUX_DATA(TXD2_MARK, PTJ4_FN),
791 PINMUX_DATA(COM1_TXD_MARK, PTJ3_FN),
792 PINMUX_DATA(COM1_RXD_MARK, PTJ2_FN),
793 PINMUX_DATA(COM1_RTS_MARK, PTJ1_FN),
794 PINMUX_DATA(COM1_CTS_MARK, PTJ0_FN),
795
796 /* PTK FN */
797 PINMUX_DATA(COM2_TXD_MARK, PTK7_FN),
798 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
799 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
800 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
801 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
802 PINMUX_DATA(COM2_DSR_MARK, PTK2_FN),
803 PINMUX_DATA(COM2_DCD_MARK, PTK1_FN),
804 PINMUX_DATA(COM2_RI_MARK, PTK0_FN),
805
806 /* PTL FN */
807 PINMUX_DATA(RAC_TXD_MARK, PTL7_FN),
808 PINMUX_DATA(RAC_RXD_MARK, PTL6_FN),
809 PINMUX_DATA(RAC_RTS_MARK, PTL5_FN),
810 PINMUX_DATA(RAC_CTS_MARK, PTL4_FN),
811 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
812 PINMUX_DATA(RAC_DSR_MARK, PTL2_FN),
813 PINMUX_DATA(RAC_DCD_MARK, PTL1_FN),
814 PINMUX_DATA(RAC_RI_MARK, PTL0_FN),
815
816 /* PTM FN */
817 PINMUX_DATA(WP_MARK, PTM6_FN),
818 PINMUX_DATA(FMS0_MARK, PTM5_FN),
819 PINMUX_DATA(FMS1_MARK, PTM4_FN),
820 PINMUX_DATA(SDA6_MARK, PTM3_FN),
821 PINMUX_DATA(SCL6_MARK, PTM2_FN),
822 PINMUX_DATA(SDA7_MARK, PTM1_FN),
823 PINMUX_DATA(SCL7_MARK, PTM0_FN),
824
825 /* PTN FN */
826 PINMUX_DATA(SCK2_MARK, PS4_15_FN1, PTN7_FN),
827 PINMUX_DATA(EVENT7_MARK, PS4_15_FN2, PTN7_FN),
828 PINMUX_DATA(RTS4_MARK, PS4_14_FN1, PTN6_FN),
829 PINMUX_DATA(EVENT6_MARK, PS4_14_FN2, PTN6_FN),
830 PINMUX_DATA(RTS3_MARK, PS4_13_FN1, PTN5_FN),
831 PINMUX_DATA(EVENT5_MARK, PS4_13_FN2, PTN5_FN),
832 PINMUX_DATA(RTS2_MARK, PS4_12_FN1, PTN4_FN),
833 PINMUX_DATA(EVENT4_MARK, PS4_12_FN2, PTN4_FN),
834 PINMUX_DATA(CTS4_MARK, PS4_11_FN1, PTN3_FN),
835 PINMUX_DATA(EVENT3_MARK, PS4_11_FN2, PTN3_FN),
836 PINMUX_DATA(CTS3_MARK, PS4_10_FN1, PTN2_FN),
837 PINMUX_DATA(EVENT2_MARK, PS4_10_FN2, PTN2_FN),
838 PINMUX_DATA(CTS2_MARK, PS4_9_FN1, PTN1_FN),
839 PINMUX_DATA(EVENT1_MARK, PS4_9_FN2, PTN1_FN),
840 PINMUX_DATA(EVENT0_MARK, PTN0_FN),
841
842 /* PTO FN */
843 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
844 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
845 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
846 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
847 PINMUX_DATA(SGPIO1_CLK_MARK, PTO3_FN),
848 PINMUX_DATA(SGPIO1_LOAD_MARK, PTO2_FN),
849 PINMUX_DATA(SGPIO1_DI_MARK, PTO1_FN),
850 PINMUX_DATA(SGPIO1_DO_MARK, PTO0_FN),
851
852 /* PTP FN */
853 PINMUX_DATA(JMCTCK_MARK, PTP6_FN),
854 PINMUX_DATA(JMCTMS_MARK, PTP5_FN),
855 PINMUX_DATA(JMCTDO_MARK, PTP4_FN),
856 PINMUX_DATA(JMCTDI_MARK, PTP3_FN),
857 PINMUX_DATA(JMCRST_MARK, PTP2_FN),
858 PINMUX_DATA(SCK4_MARK, PTP1_FN),
859 PINMUX_DATA(SCK3_MARK, PTP0_FN),
860
861 /* PTQ FN */
862 PINMUX_DATA(LAD3_MARK, PTQ6_FN),
863 PINMUX_DATA(LAD2_MARK, PTQ5_FN),
864 PINMUX_DATA(LAD1_MARK, PTQ4_FN),
865 PINMUX_DATA(LAD0_MARK, PTQ3_FN),
866 PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
867 PINMUX_DATA(SCK4_MARK, PTQ1_FN),
868 PINMUX_DATA(SCK3_MARK, PTQ0_FN),
869
870 /* PTR FN */
871 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */
872 PINMUX_DATA(SCL8_MARK, PTR6_FN), /* DDC2? */
873 PINMUX_DATA(SDA2_MARK, PTR5_FN),
874 PINMUX_DATA(SCL2_MARK, PTR4_FN),
875 PINMUX_DATA(SDA1_MARK, PTR3_FN),
876 PINMUX_DATA(SCL1_MARK, PTR2_FN),
877 PINMUX_DATA(SDA0_MARK, PTR1_FN),
878 PINMUX_DATA(SCL0_MARK, PTR0_FN),
879
880 /* PTS FN */
881 PINMUX_DATA(SDA9_MARK, PTS7_FN), /* DDC1? */
882 PINMUX_DATA(SCL9_MARK, PTS6_FN), /* DDC0? */
883 PINMUX_DATA(SDA5_MARK, PTS5_FN),
884 PINMUX_DATA(SCL5_MARK, PTS4_FN),
885 PINMUX_DATA(SDA4_MARK, PTS3_FN),
886 PINMUX_DATA(SCL4_MARK, PTS2_FN),
887 PINMUX_DATA(SDA3_MARK, PTS1_FN),
888 PINMUX_DATA(SCL3_MARK, PTS0_FN),
889
890 /* PTT FN */
891 PINMUX_DATA(AUDSYNC_MARK, PTS5_FN),
892 PINMUX_DATA(AUDCK_MARK, PTS4_FN),
893 PINMUX_DATA(AUDATA3_MARK, PS4_3_FN1, PTS3_FN),
894 PINMUX_DATA(PWX7_MARK, PS4_3_FN2, PTS3_FN),
895 PINMUX_DATA(AUDATA2_MARK, PS4_2_FN1, PTS2_FN),
896 PINMUX_DATA(PWX6_MARK, PS4_2_FN2, PTS2_FN),
897 PINMUX_DATA(AUDATA1_MARK, PS4_1_FN1, PTS1_FN),
898 PINMUX_DATA(PWX5_MARK, PS4_1_FN2, PTS1_FN),
899 PINMUX_DATA(AUDATA0_MARK, PS4_0_FN1, PTS0_FN),
900 PINMUX_DATA(PWX4_MARK, PS4_0_FN2, PTS0_FN),
901
902 /* PTU FN */
903 PINMUX_DATA(CS6_MARK, PTU7_FN),
904 PINMUX_DATA(CS5_MARK, PTU6_FN),
905 PINMUX_DATA(CS4_MARK, PTU5_FN),
906 PINMUX_DATA(CS0_MARK, PTU4_FN),
907 PINMUX_DATA(RD_MARK, PTU3_FN),
908 PINMUX_DATA(WE0_MARK, PTU2_FN),
909 PINMUX_DATA(A25_MARK, PS5_9_FN1, PTU1_FN),
910 PINMUX_DATA(DREQ0_MARK, PS5_9_FN2, PTU1_FN),
911 PINMUX_DATA(A24_MARK, PS5_8_FN1, PTU0_FN),
912 PINMUX_DATA(DACK0_MARK, PS5_8_FN2, PTU0_FN),
913
914 /* PTV FN */
915 PINMUX_DATA(A23_MARK, PS5_7_FN1, PTV7_FN),
916 PINMUX_DATA(TEND0_MARK, PS5_7_FN2, PTV7_FN),
917 PINMUX_DATA(A22_MARK, PS5_6_FN1, PTV6_FN),
918 PINMUX_DATA(DREQ1_MARK, PS5_6_FN2, PTV6_FN),
919 PINMUX_DATA(A21_MARK, PS5_5_FN1, PTV5_FN),
920 PINMUX_DATA(DACK1_MARK, PS5_5_FN2, PTV5_FN),
921 PINMUX_DATA(A20_MARK, PS5_4_FN1, PTV4_FN),
922 PINMUX_DATA(TEND1_MARK, PS5_4_FN2, PTV4_FN),
923 PINMUX_DATA(A19_MARK, PTV3_FN),
924 PINMUX_DATA(A18_MARK, PTV2_FN),
925 PINMUX_DATA(A17_MARK, PTV1_FN),
926 PINMUX_DATA(A16_MARK, PTV0_FN),
927
928 /* PTW FN */
929 PINMUX_DATA(A15_MARK, PTW7_FN),
930 PINMUX_DATA(A14_MARK, PTW6_FN),
931 PINMUX_DATA(A13_MARK, PTW5_FN),
932 PINMUX_DATA(A12_MARK, PTW4_FN),
933 PINMUX_DATA(A11_MARK, PTW3_FN),
934 PINMUX_DATA(A10_MARK, PTW2_FN),
935 PINMUX_DATA(A9_MARK, PTW1_FN),
936 PINMUX_DATA(A8_MARK, PTW0_FN),
937
938 /* PTX FN */
939 PINMUX_DATA(A7_MARK, PTX7_FN),
940 PINMUX_DATA(A6_MARK, PTX6_FN),
941 PINMUX_DATA(A5_MARK, PTX5_FN),
942 PINMUX_DATA(A4_MARK, PTX4_FN),
943 PINMUX_DATA(A3_MARK, PTX3_FN),
944 PINMUX_DATA(A2_MARK, PTX2_FN),
945 PINMUX_DATA(A1_MARK, PTX1_FN),
946 PINMUX_DATA(A0_MARK, PTX0_FN),
947
948 /* PTY FN */
949 PINMUX_DATA(D7_MARK, PTY7_FN),
950 PINMUX_DATA(D6_MARK, PTY6_FN),
951 PINMUX_DATA(D5_MARK, PTY5_FN),
952 PINMUX_DATA(D4_MARK, PTY4_FN),
953 PINMUX_DATA(D3_MARK, PTY3_FN),
954 PINMUX_DATA(D2_MARK, PTY2_FN),
955 PINMUX_DATA(D1_MARK, PTY1_FN),
956 PINMUX_DATA(D0_MARK, PTY0_FN),
957};
958
959static struct pinmux_gpio pinmux_gpios[] = {
960 /* PTA */
961 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
962 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
963 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
964 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
965 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
966 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
967 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
968 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
969
970 /* PTB */
971 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
972 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
973 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
974 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
975 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
976 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
977 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
978 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
979
980 /* PTC */
981 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
982 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
983 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
984 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
985 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
986 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
987 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
988 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
989
990 /* PTD */
991 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
992 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
993 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
994 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
995 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
996 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
997 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
998 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
999
1000 /* PTE */
1001 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
1002 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
1003 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
1004 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
1005 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
1006 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
1007 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
1008 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
1009
1010 /* PTF */
1011 PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
1012 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
1013 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
1014 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
1015 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
1016 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
1017 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
1018 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
1019
1020 /* PTG */
1021 PINMUX_GPIO(GPIO_PTG7, PTG7_DATA),
1022 PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
1023 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
1024 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
1025 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
1026 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
1027 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
1028 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
1029
1030 /* PTH */
1031 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
1032 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
1033 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
1034 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
1035 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
1036 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
1037 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
1038 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
1039
1040 /* PTI */
1041 PINMUX_GPIO(GPIO_PTI7, PTI7_DATA),
1042 PINMUX_GPIO(GPIO_PTI6, PTI6_DATA),
1043 PINMUX_GPIO(GPIO_PTI5, PTI5_DATA),
1044 PINMUX_GPIO(GPIO_PTI4, PTI4_DATA),
1045 PINMUX_GPIO(GPIO_PTI3, PTI3_DATA),
1046 PINMUX_GPIO(GPIO_PTI2, PTI2_DATA),
1047 PINMUX_GPIO(GPIO_PTI1, PTI1_DATA),
1048 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
1049
1050 /* PTJ */
1051 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1052 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
1053 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1054 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
1055 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
1056 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
1057 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
1058 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
1059
1060 /* PTK */
1061 PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
1062 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
1063 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
1064 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
1065 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
1066 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
1067 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
1068 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1069
1070 /* PTL */
1071 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1072 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1073 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1074 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
1075 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
1076 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
1077 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
1078 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1079
1080 /* PTM */
1081 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1082 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1083 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
1084 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
1085 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
1086 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
1087 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1088
1089 /* PTN */
1090 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1091 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1092 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1093 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
1094 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
1095 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
1096 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
1097 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
1098
1099 /* PTO */
1100 PINMUX_GPIO(GPIO_PTO7, PTO7_DATA),
1101 PINMUX_GPIO(GPIO_PTO6, PTO6_DATA),
1102 PINMUX_GPIO(GPIO_PTO5, PTO5_DATA),
1103 PINMUX_GPIO(GPIO_PTO4, PTO4_DATA),
1104 PINMUX_GPIO(GPIO_PTO3, PTO3_DATA),
1105 PINMUX_GPIO(GPIO_PTO2, PTO2_DATA),
1106 PINMUX_GPIO(GPIO_PTO1, PTO1_DATA),
1107 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
1108
1109 /* PTP */
1110 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
1111 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
1112 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
1113 PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
1114 PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
1115 PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
1116 PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
1117
1118 /* PTQ */
1119 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
1120 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
1121 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
1122 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
1123 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
1124 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
1125 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
1126
1127 /* PTR */
1128 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
1129 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
1130 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
1131 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
1132 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
1133 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
1134 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
1135 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
1136
1137 /* PTS */
1138 PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
1139 PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
1140 PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
1141 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
1142 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
1143 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
1144 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
1145 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1146
1147 /* PTT */
1148 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1149 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1150 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
1151 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
1152 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
1153 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
1154
1155 /* PTU */
1156 PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
1157 PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
1158 PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
1159 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
1160 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
1161 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
1162 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
1163 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
1164
1165 /* PTV */
1166 PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
1167 PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
1168 PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
1169 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
1170 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
1171 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
1172 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
1173 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
1174
1175 /* PTW */
1176 PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
1177 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
1178 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
1179 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
1180 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
1181 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
1182 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
1183 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
1184
1185 /* PTX */
1186 PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
1187 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
1188 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
1189 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
1190 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
1191 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
1192 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
1193 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
1194
1195 /* PTY */
1196 PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
1197 PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
1198 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
1199 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
1200 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
1201 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
1202 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
1203 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
1204
1205 /* PTZ */
1206 PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
1207 PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
1208 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
1209 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
1210 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
1211 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
1212 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1213 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1214
1215 /* PTA (mobule: LBSC, CPG, LPC) */
1216 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1217 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1218 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
1219 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
1220 PINMUX_GPIO(GPIO_FN_MD10, MD10_MARK),
1221 PINMUX_GPIO(GPIO_FN_MD9, MD9_MARK),
1222 PINMUX_GPIO(GPIO_FN_MD8, MD8_MARK),
1223 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1224 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1225 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1226 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1227 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1228 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1229 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1230 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1231
1232 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
1233 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1234 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1235 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1236 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1237 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1238 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1239 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1240 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1241 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
1242 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK),
1243 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
1244 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK),
1245 PINMUX_GPIO(GPIO_FN_WPSZ1, WPSZ1_MARK),
1246 PINMUX_GPIO(GPIO_FN_WPSZ0, WPSZ0_MARK),
1247 PINMUX_GPIO(GPIO_FN_FWID, FWID_MARK),
1248 PINMUX_GPIO(GPIO_FN_FLSHSZ, FLSHSZ_MARK),
1249 PINMUX_GPIO(GPIO_FN_LPC_SPIEN, LPC_SPIEN_MARK),
1250 PINMUX_GPIO(GPIO_FN_BASEL, BASEL_MARK),
1251
1252 /* PTC (mobule: SD) */
1253 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1254 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1255 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1256 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1257 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1258 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1259 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1260 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1261
1262 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
1263 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1264 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1265 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1266 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1267 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1268 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1269 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1270 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1271 PINMUX_GPIO(GPIO_FN_MD6, MD6_MARK),
1272 PINMUX_GPIO(GPIO_FN_MD5, MD5_MARK),
1273 PINMUX_GPIO(GPIO_FN_MD3, MD3_MARK),
1274 PINMUX_GPIO(GPIO_FN_MD2, MD2_MARK),
1275 PINMUX_GPIO(GPIO_FN_MD1, MD1_MARK),
1276 PINMUX_GPIO(GPIO_FN_MD0, MD0_MARK),
1277 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
1278 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
1279
1280 /* PTE (mobule: EtherC) */
1281 PINMUX_GPIO(GPIO_FN_ET0_CRS_DV, ET0_CRS_DV_MARK),
1282 PINMUX_GPIO(GPIO_FN_ET0_TXD1, ET0_TXD1_MARK),
1283 PINMUX_GPIO(GPIO_FN_ET0_TXD0, ET0_TXD0_MARK),
1284 PINMUX_GPIO(GPIO_FN_ET0_TX_EN, ET0_TX_EN_MARK),
1285 PINMUX_GPIO(GPIO_FN_ET0_REF_CLK, ET0_REF_CLK_MARK),
1286 PINMUX_GPIO(GPIO_FN_ET0_RXD1, ET0_RXD1_MARK),
1287 PINMUX_GPIO(GPIO_FN_ET0_RXD0, ET0_RXD0_MARK),
1288 PINMUX_GPIO(GPIO_FN_ET0_RX_ER, ET0_RX_ER_MARK),
1289
1290 /* PTF (mobule: EtherC) */
1291 PINMUX_GPIO(GPIO_FN_ET1_CRS_DV, ET1_CRS_DV_MARK),
1292 PINMUX_GPIO(GPIO_FN_ET1_TXD1, ET1_TXD1_MARK),
1293 PINMUX_GPIO(GPIO_FN_ET1_TXD0, ET1_TXD0_MARK),
1294 PINMUX_GPIO(GPIO_FN_ET1_TX_EN, ET1_TX_EN_MARK),
1295 PINMUX_GPIO(GPIO_FN_ET1_REF_CLK, ET1_REF_CLK_MARK),
1296 PINMUX_GPIO(GPIO_FN_ET1_RXD1, ET1_RXD1_MARK),
1297 PINMUX_GPIO(GPIO_FN_ET1_RXD0, ET1_RXD0_MARK),
1298 PINMUX_GPIO(GPIO_FN_ET1_RX_ER, ET1_RX_ER_MARK),
1299
1300 /* PTG (mobule: SYSTEM, PWMX, LPC) */
1301 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1302 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
1303 PINMUX_GPIO(GPIO_FN_PWX0, PWX0_MARK),
1304 PINMUX_GPIO(GPIO_FN_PWX1, PWX1_MARK),
1305 PINMUX_GPIO(GPIO_FN_PWX2, PWX2_MARK),
1306 PINMUX_GPIO(GPIO_FN_PWX3, PWX3_MARK),
1307 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
1308 PINMUX_GPIO(GPIO_FN_CLKRUN, CLKRUN_MARK),
1309 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
1310 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
1311
1312 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
1313 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1314 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1315 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1316 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
1317 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
1318 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
1319 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
1320 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
1321 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
1322 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
1323
1324 /* PTI (mobule: INTC) */
1325 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
1326 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
1327 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
1328 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
1329 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
1330 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
1331 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
1332 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
1333
1334 /* PTJ (mobule: SCIF234, SERMUX) */
1335 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1336 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1337 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1338 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1339 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
1340 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
1341 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1342 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1343
1344 /* PTK (mobule: SERMUX) */
1345 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
1346 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
1347 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
1348 PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK),
1349 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
1350 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
1351 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
1352 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
1353
1354 /* PTL (mobule: SERMUX) */
1355 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1356 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
1357 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
1358 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
1359 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
1360 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
1361 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
1362 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
1363
1364 /* PTM (mobule: IIC, LPC) */
1365 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
1366 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
1367 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
1368 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
1369 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1370 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1371 PINMUX_GPIO(GPIO_FN_FMS1, FMS1_MARK),
1372
1373 /* PTN (mobule: SCIF234, EVC) */
1374 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1375 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
1376 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1377 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
1378 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
1379 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1380 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
1381 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
1382 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
1383 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
1384 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
1385 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
1386 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1387 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1388 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1389
1390 /* PTO (mobule: SGPIO) */
1391 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
1392 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
1393 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
1394 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
1395 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
1396 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
1397 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
1398 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
1399
1400 /* PTP (mobule: JMC, SCIF234) */
1401 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1402 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1403 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1404 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1405 PINMUX_GPIO(GPIO_FN_JMCRST, JMCRST_MARK),
1406 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1407 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1408
1409 /* PTQ (mobule: LPC) */
1410 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
1411 PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK),
1412 PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK),
1413 PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK),
1414 PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK),
1415 PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK),
1416 PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK),
1417
1418 /* PTR (mobule: GRA, IIC) */
1419 PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK),
1420 PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK),
1421 PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK),
1422 PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK),
1423 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
1424 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
1425 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
1426 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
1427 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
1428 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
1429
1430 /* PTS (mobule: GRA, IIC) */
1431 PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK),
1432 PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK),
1433 PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK),
1434 PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK),
1435 PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK),
1436 PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK),
1437 PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK),
1438 PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK),
1439 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
1440 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
1441
1442 /* PTT (mobule: SYSTEM, PWMX) */
1443 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1444 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1445 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1446 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1447 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1448 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1449 PINMUX_GPIO(GPIO_FN_PWX7, PWX7_MARK),
1450 PINMUX_GPIO(GPIO_FN_PWX6, PWX6_MARK),
1451 PINMUX_GPIO(GPIO_FN_PWX5, PWX5_MARK),
1452 PINMUX_GPIO(GPIO_FN_PWX4, PWX4_MARK),
1453
1454 /* PTU (mobule: LBSC, DMAC) */
1455 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1456 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1457 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1458 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1459 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1460 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1461 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1462 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1463 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1464 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1465
1466 /* PTV (mobule: LBSC, DMAC) */
1467 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1468 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1469 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
1470 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
1471 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
1472 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1473 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1474 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1475 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1476 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1477 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1478 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1479
1480 /* PTW (mobule: LBSC) */
1481 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1482 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1483 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
1484 PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
1485 PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
1486 PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
1487 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1488 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1489 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1490
1491 /* PTX (mobule: LBSC) */
1492 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
1493 PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
1494 PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
1495 PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
1496 PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
1497 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1498 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1499 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1500
1501 /* PTY (mobule: LBSC) */
1502 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
1503 PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
1504 PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
1505 PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
1506 PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
1507 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1508 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1509 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1510 };
1511
1512static struct pinmux_cfg_reg pinmux_config_regs[] = {
1513 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
1514 PTA7_FN, PTA7_OUT, PTA7_IN, 0,
1515 PTA6_FN, PTA6_OUT, PTA6_IN, 0,
1516 PTA5_FN, PTA5_OUT, PTA5_IN, 0,
1517 PTA4_FN, PTA4_OUT, PTA4_IN, 0,
1518 PTA3_FN, PTA3_OUT, PTA3_IN, 0,
1519 PTA2_FN, PTA2_OUT, PTA2_IN, 0,
1520 PTA1_FN, PTA1_OUT, PTA1_IN, 0,
1521 PTA0_FN, PTA0_OUT, PTA0_IN, 0 }
1522 },
1523 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
1524 PTB7_FN, PTB7_OUT, PTB7_IN, 0,
1525 PTB6_FN, PTB6_OUT, PTB6_IN, 0,
1526 PTB5_FN, PTB5_OUT, PTB5_IN, 0,
1527 PTB4_FN, PTB4_OUT, PTB4_IN, 0,
1528 PTB3_FN, PTB3_OUT, PTB3_IN, 0,
1529 PTB2_FN, PTB2_OUT, PTB2_IN, 0,
1530 PTB1_FN, PTB1_OUT, PTB1_IN, 0,
1531 PTB0_FN, PTB0_OUT, PTB0_IN, 0 }
1532 },
1533 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) {
1534 PTC7_FN, PTC7_OUT, PTC7_IN, 0,
1535 PTC6_FN, PTC6_OUT, PTC6_IN, 0,
1536 PTC5_FN, PTC5_OUT, PTC5_IN, 0,
1537 PTC4_FN, PTC4_OUT, PTC4_IN, 0,
1538 PTC3_FN, PTC3_OUT, PTC3_IN, 0,
1539 PTC2_FN, PTC2_OUT, PTC2_IN, 0,
1540 PTC1_FN, PTC1_OUT, PTC1_IN, 0,
1541 PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
1542 },
1543 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
1544 PTD7_FN, PTD7_OUT, PTD7_IN, 0,
1545 PTD6_FN, PTD6_OUT, PTD6_IN, 0,
1546 PTD5_FN, PTD5_OUT, PTD5_IN, 0,
1547 PTD4_FN, PTD4_OUT, PTD4_IN, 0,
1548 PTD3_FN, PTD3_OUT, PTD3_IN, 0,
1549 PTD2_FN, PTD2_OUT, PTD2_IN, 0,
1550 PTD1_FN, PTD1_OUT, PTD1_IN, 0,
1551 PTD0_FN, PTD0_OUT, PTD0_IN, 0 }
1552 },
1553 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
1554 PTE7_FN, PTE7_OUT, PTE7_IN, 0,
1555 PTE6_FN, PTE6_OUT, PTE6_IN, 0,
1556 PTE5_FN, PTE5_OUT, PTE5_IN, 0,
1557 PTE4_FN, PTE4_OUT, PTE4_IN, 0,
1558 PTE3_FN, PTE3_OUT, PTE3_IN, 0,
1559 PTE2_FN, PTE2_OUT, PTE2_IN, 0,
1560 PTE1_FN, PTE1_OUT, PTE1_IN, 0,
1561 PTE0_FN, PTE0_OUT, PTE0_IN, 0 }
1562 },
1563 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
1564 PTF7_FN, PTF7_OUT, PTF7_IN, 0,
1565 PTF6_FN, PTF6_OUT, PTF6_IN, 0,
1566 PTF5_FN, PTF5_OUT, PTF5_IN, 0,
1567 PTF4_FN, PTF4_OUT, PTF4_IN, 0,
1568 PTF3_FN, PTF3_OUT, PTF3_IN, 0,
1569 PTF2_FN, PTF2_OUT, PTF2_IN, 0,
1570 PTF1_FN, PTF1_OUT, PTF1_IN, 0,
1571 PTF0_FN, PTF0_OUT, PTF0_IN, 0 }
1572 },
1573 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
1574 PTG7_FN, PTG7_OUT, PTG7_IN, 0,
1575 PTG6_FN, PTG6_OUT, PTG6_IN, 0,
1576 PTG5_FN, PTG5_OUT, PTG5_IN, 0,
1577 PTG4_FN, PTG4_OUT, PTG4_IN, 0,
1578 PTG3_FN, PTG3_OUT, PTG3_IN, 0,
1579 PTG2_FN, PTG2_OUT, PTG2_IN, 0,
1580 PTG1_FN, PTG1_OUT, PTG1_IN, 0,
1581 PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
1582 },
1583 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
1584 PTH7_FN, PTH7_OUT, PTH7_IN, 0,
1585 PTH6_FN, PTH6_OUT, PTH6_IN, 0,
1586 PTH5_FN, PTH5_OUT, PTH5_IN, 0,
1587 PTH4_FN, PTH4_OUT, PTH4_IN, 0,
1588 PTH3_FN, PTH3_OUT, PTH3_IN, 0,
1589 PTH2_FN, PTH2_OUT, PTH2_IN, 0,
1590 PTH1_FN, PTH1_OUT, PTH1_IN, 0,
1591 PTH0_FN, PTH0_OUT, PTH0_IN, 0 }
1592 },
1593 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
1594 PTI7_FN, PTI7_OUT, PTI7_IN, 0,
1595 PTI6_FN, PTI6_OUT, PTI6_IN, 0,
1596 PTI5_FN, PTI5_OUT, PTI5_IN, 0,
1597 PTI4_FN, PTI4_OUT, PTI4_IN, 0,
1598 PTI3_FN, PTI3_OUT, PTI3_IN, 0,
1599 PTI2_FN, PTI2_OUT, PTI2_IN, 0,
1600 PTI1_FN, PTI1_OUT, PTI1_IN, 0,
1601 PTI0_FN, PTI0_OUT, PTI0_IN, 0 }
1602 },
1603 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
1604 PTJ7_FN, PTJ7_OUT, PTJ7_IN, 0,
1605 PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0,
1606 PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0,
1607 PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0,
1608 PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0,
1609 PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0,
1610 PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0,
1611 PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 }
1612 },
1613 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
1614 PTK7_FN, PTK7_OUT, PTK7_IN, 0,
1615 PTK6_FN, PTK6_OUT, PTK6_IN, 0,
1616 PTK5_FN, PTK5_OUT, PTK5_IN, 0,
1617 PTK4_FN, PTK4_OUT, PTK4_IN, 0,
1618 PTK3_FN, PTK3_OUT, PTK3_IN, 0,
1619 PTK2_FN, PTK2_OUT, PTK2_IN, 0,
1620 PTK1_FN, PTK1_OUT, PTK1_IN, 0,
1621 PTK0_FN, PTK0_OUT, PTK0_IN, 0 }
1622 },
1623 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
1624 PTL7_FN, PTL7_OUT, PTL7_IN, 0,
1625 PTL6_FN, PTL6_OUT, PTL6_IN, 0,
1626 PTL5_FN, PTL5_OUT, PTL5_IN, 0,
1627 PTL4_FN, PTL4_OUT, PTL4_IN, 0,
1628 PTL3_FN, PTL3_OUT, PTL3_IN, 0,
1629 PTL2_FN, PTL2_OUT, PTL2_IN, 0,
1630 PTL1_FN, PTL1_OUT, PTL1_IN, 0,
1631 PTL0_FN, PTL0_OUT, PTL0_IN, 0 }
1632 },
1633 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
1634 0, 0, 0, 0, /* reserved: always set 1 */
1635 PTM6_FN, PTM6_OUT, PTM6_IN, 0,
1636 PTM5_FN, PTM5_OUT, PTM5_IN, 0,
1637 PTM4_FN, PTM4_OUT, PTM4_IN, 0,
1638 PTM3_FN, PTM3_OUT, PTM3_IN, 0,
1639 PTM2_FN, PTM2_OUT, PTM2_IN, 0,
1640 PTM1_FN, PTM1_OUT, PTM1_IN, 0,
1641 PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
1642 },
1643 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
1644 PTN7_FN, PTN7_OUT, PTN7_IN, 0,
1645 PTN6_FN, PTN6_OUT, PTN6_IN, 0,
1646 PTN5_FN, PTN5_OUT, PTN5_IN, 0,
1647 PTN4_FN, PTN4_OUT, PTN4_IN, 0,
1648 PTN3_FN, PTN3_OUT, PTN3_IN, 0,
1649 PTN2_FN, PTN2_OUT, PTN2_IN, 0,
1650 PTN1_FN, PTN1_OUT, PTN1_IN, 0,
1651 PTN0_FN, PTN0_OUT, PTN0_IN, 0 }
1652 },
1653 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
1654 PTO7_FN, PTO7_OUT, PTO7_IN, 0,
1655 PTO6_FN, PTO6_OUT, PTO6_IN, 0,
1656 PTO5_FN, PTO5_OUT, PTO5_IN, 0,
1657 PTO4_FN, PTO4_OUT, PTO4_IN, 0,
1658 PTO3_FN, PTO3_OUT, PTO3_IN, 0,
1659 PTO2_FN, PTO2_OUT, PTO2_IN, 0,
1660 PTO1_FN, PTO1_OUT, PTO1_IN, 0,
1661 PTO0_FN, PTO0_OUT, PTO0_IN, 0 }
1662 },
1663 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
1664 0, 0, 0, 0, /* reserved: always set 1 */
1665 PTP6_FN, PTP6_OUT, PTP6_IN, 0,
1666 PTP5_FN, PTP5_OUT, PTP5_IN, 0,
1667 PTP4_FN, PTP4_OUT, PTP4_IN, 0,
1668 PTP3_FN, PTP3_OUT, PTP3_IN, 0,
1669 PTP2_FN, PTP2_OUT, PTP2_IN, 0,
1670 PTP1_FN, PTP1_OUT, PTP1_IN, 0,
1671 PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
1672 },
1673 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
1674 0, 0, 0, 0, /* reserved: always set 1 */
1675 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
1676 PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0,
1677 PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0,
1678 PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0,
1679 PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0,
1680 PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0,
1681 PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 }
1682 },
1683 { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) {
1684 PTR7_FN, PTR7_OUT, PTR7_IN, 0,
1685 PTR6_FN, PTR6_OUT, PTR6_IN, 0,
1686 PTR5_FN, PTR5_OUT, PTR5_IN, 0,
1687 PTR4_FN, PTR4_OUT, PTR4_IN, 0,
1688 PTR3_FN, PTR3_OUT, PTR3_IN, 0,
1689 PTR2_FN, PTR2_OUT, PTR2_IN, 0,
1690 PTR1_FN, PTR1_OUT, PTR1_IN, 0,
1691 PTR0_FN, PTR0_OUT, PTR0_IN, 0 }
1692 },
1693 { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) {
1694 PTS7_FN, PTS7_OUT, PTS7_IN, 0,
1695 PTS6_FN, PTS6_OUT, PTS6_IN, 0,
1696 PTS5_FN, PTS5_OUT, PTS5_IN, 0,
1697 PTS4_FN, PTS4_OUT, PTS4_IN, 0,
1698 PTS3_FN, PTS3_OUT, PTS3_IN, 0,
1699 PTS2_FN, PTS2_OUT, PTS2_IN, 0,
1700 PTS1_FN, PTS1_OUT, PTS1_IN, 0,
1701 PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
1702 },
1703 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
1704 0, 0, 0, 0, /* reserved: always set 1 */
1705 0, 0, 0, 0, /* reserved: always set 1 */
1706 PTT5_FN, PTT5_OUT, PTT5_IN, 0,
1707 PTT4_FN, PTT4_OUT, PTT4_IN, 0,
1708 PTT3_FN, PTT3_OUT, PTT3_IN, 0,
1709 PTT2_FN, PTT2_OUT, PTT2_IN, 0,
1710 PTT1_FN, PTT1_OUT, PTT1_IN, 0,
1711 PTT0_FN, PTT0_OUT, PTT0_IN, 0 }
1712 },
1713 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
1714 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
1715 PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
1716 PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
1717 PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
1718 PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
1719 PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
1720 PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
1721 PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
1722 },
1723 { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
1724 PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
1725 PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
1726 PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
1727 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
1728 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
1729 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
1730 PTV1_FN, PTV1_OUT, PTV1_IN, PTV1_IN_PU,
1731 PTV0_FN, PTV0_OUT, PTV0_IN, PTV0_IN_PU }
1732 },
1733 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
1734 PTW7_FN, PTW7_OUT, PTW7_IN, PTW7_IN_PU,
1735 PTW6_FN, PTW6_OUT, PTW6_IN, PTW6_IN_PU,
1736 PTW5_FN, PTW5_OUT, PTW5_IN, PTW5_IN_PU,
1737 PTW4_FN, PTW4_OUT, PTW4_IN, PTW4_IN_PU,
1738 PTW3_FN, PTW3_OUT, PTW3_IN, PTW3_IN_PU,
1739 PTW2_FN, PTW2_OUT, PTW2_IN, PTW2_IN_PU,
1740 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
1741 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
1742 },
1743 { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
1744 PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
1745 PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
1746 PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
1747 PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
1748 PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
1749 PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
1750 PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
1751 PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
1752 },
1753 { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
1754 PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
1755 PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
1756 PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
1757 PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
1758 PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
1759 PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
1760 PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
1761 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
1762 },
1763 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
1764 0, PTZ7_OUT, PTZ7_IN, 0,
1765 0, PTZ6_OUT, PTZ6_IN, 0,
1766 0, PTZ5_OUT, PTZ5_IN, 0,
1767 0, PTZ4_OUT, PTZ4_IN, 0,
1768 0, PTZ3_OUT, PTZ3_IN, 0,
1769 0, PTZ2_OUT, PTZ2_IN, 0,
1770 0, PTZ1_OUT, PTZ1_IN, 0,
1771 0, PTZ0_OUT, PTZ0_IN, 0 }
1772 },
1773
1774 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
1775 PS0_15_FN3, PS0_15_FN1,
1776 PS0_14_FN3, PS0_14_FN1,
1777 PS0_13_FN3, PS0_13_FN1,
1778 PS0_12_FN3, PS0_12_FN1,
1779 0, 0,
1780 0, 0,
1781 0, 0,
1782 0, 0,
1783 PS0_7_FN2, PS0_7_FN1,
1784 PS0_6_FN2, PS0_6_FN1,
1785 PS0_5_FN2, PS0_5_FN1,
1786 PS0_4_FN2, PS0_4_FN1,
1787 PS0_3_FN2, PS0_3_FN1,
1788 PS0_2_FN2, PS0_2_FN1,
1789 PS0_1_FN2, PS0_1_FN1,
1790 0, 0, }
1791 },
1792 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
1793 0, 0,
1794 0, 0,
1795 0, 0,
1796 0, 0,
1797 0, 0,
1798 0, 0,
1799 0, 0,
1800 0, 0,
1801 PS1_7_FN1, PS1_7_FN3,
1802 PS1_6_FN1, PS1_6_FN3,
1803 0, 0,
1804 0, 0,
1805 0, 0,
1806 0, 0,
1807 0, 0,
1808 0, 0, }
1809 },
1810 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
1811 0, 0,
1812 0, 0,
1813 PS2_13_FN3, PS2_13_FN1,
1814 PS2_12_FN3, PS2_12_FN1,
1815 0, 0,
1816 0, 0,
1817 0, 0,
1818 0, 0,
1819 0, 0,
1820 0, 0,
1821 0, 0,
1822 0, 0,
1823 0, 0,
1824 0, 0,
1825 PS2_1_FN1, PS2_1_FN2,
1826 PS2_0_FN1, PS2_0_FN2, }
1827 },
1828 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
1829 PS4_15_FN2, PS4_15_FN1,
1830 PS4_14_FN2, PS4_14_FN1,
1831 PS4_13_FN2, PS4_13_FN1,
1832 PS4_12_FN2, PS4_12_FN1,
1833 PS4_11_FN2, PS4_11_FN1,
1834 PS4_10_FN2, PS4_10_FN1,
1835 PS4_9_FN2, PS4_9_FN1,
1836 0, 0,
1837 0, 0,
1838 0, 0,
1839 0, 0,
1840 0, 0,
1841 PS4_3_FN2, PS4_3_FN1,
1842 PS4_2_FN2, PS4_2_FN1,
1843 PS4_1_FN2, PS4_1_FN1,
1844 PS4_0_FN2, PS4_0_FN1, }
1845 },
1846 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
1847 0, 0,
1848 0, 0,
1849 0, 0,
1850 0, 0,
1851 0, 0,
1852 0, 0,
1853 PS5_9_FN1, PS5_9_FN2,
1854 PS5_8_FN1, PS5_8_FN2,
1855 PS5_7_FN1, PS5_7_FN2,
1856 PS5_6_FN1, PS5_6_FN2,
1857 PS5_5_FN1, PS5_5_FN2,
1858 0, 0,
1859 0, 0,
1860 0, 0,
1861 0, 0,
1862 0, 0, }
1863 },
1864 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
1865 0, 0,
1866 0, 0,
1867 0, 0,
1868 0, 0,
1869 0, 0,
1870 0, 0,
1871 0, 0,
1872 0, 0,
1873 PS6_7_FN_AN, PS6_7_FN_EV,
1874 PS6_6_FN_AN, PS6_6_FN_EV,
1875 PS6_5_FN_AN, PS6_5_FN_EV,
1876 PS6_4_FN_AN, PS6_4_FN_EV,
1877 PS6_3_FN_AN, PS6_3_FN_EV,
1878 PS6_2_FN_AN, PS6_2_FN_EV,
1879 PS6_1_FN_AN, PS6_1_FN_EV,
1880 PS6_0_FN_AN, PS6_0_FN_EV, }
1881 },
1882 {}
1883};
1884
1885static struct pinmux_data_reg pinmux_data_regs[] = {
1886 { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
1887 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1888 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1889 },
1890 { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) {
1891 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1892 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1893 },
1894 { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) {
1895 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1896 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1897 },
1898 { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) {
1899 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1900 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1901 },
1902 { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) {
1903 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1904 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1905 },
1906 { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) {
1907 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1908 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1909 },
1910 { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) {
1911 PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
1912 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1913 },
1914 { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) {
1915 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1916 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1917 },
1918 { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) {
1919 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
1920 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
1921 },
1922 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
1923 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1924 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1925 },
1926 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
1927 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1928 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1929 },
1930 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
1931 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1932 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1933 },
1934 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
1935 0, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1936 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1937 },
1938 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
1939 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1940 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1941 },
1942 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
1943 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
1944 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
1945 },
1946 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
1947 0, PTP6_DATA, PTP5_DATA, PTP4_DATA,
1948 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1949 },
1950 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
1951 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
1952 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1953 },
1954 { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) {
1955 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1956 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1957 },
1958 { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) {
1959 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
1960 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1961 },
1962 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
1963 0, 0, PTT5_DATA, PTT4_DATA,
1964 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1965 },
1966 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
1967 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
1968 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1969 },
1970 { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) {
1971 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
1972 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1973 },
1974 { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) {
1975 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1976 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1977 },
1978 { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) {
1979 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1980 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1981 },
1982 { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) {
1983 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1984 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1985 },
1986 { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) {
1987 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
1988 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1989 },
1990 { },
1991};
1992
1993static struct pinmux_info sh7757_pinmux_info = {
1994 .name = "sh7757_pfc",
1995 .reserved_id = PINMUX_RESERVED,
1996 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1997 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1998 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1999 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2000 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2001 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2002
2003 .first_gpio = GPIO_PTA7,
2004 .last_gpio = GPIO_FN_D0,
2005
2006 .gpios = pinmux_gpios,
2007 .cfg_regs = pinmux_config_regs,
2008 .data_regs = pinmux_data_regs,
2009
2010 .gpio_data = pinmux_data,
2011 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2012};
2013
2014static int __init plat_pinmux_setup(void)
2015{
2016 return register_pinmux(&sh7757_pinmux_info);
2017}
2018
2019arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 67b0d87fcb2..35097753456 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -17,6 +17,7 @@
17#include <linux/sh_timer.h> 17#include <linux/sh_timer.h>
18#include <asm/clock.h> 18#include <asm/clock.h>
19#include <asm/mmzone.h> 19#include <asm/mmzone.h>
20#include <cpu/sh7722.h>
20 21
21static struct resource rtc_resources[] = { 22static struct resource rtc_resources[] = {
22 [0] = { 23 [0] = {
@@ -46,6 +47,9 @@ static struct platform_device rtc_device = {
46 .id = -1, 47 .id = -1,
47 .num_resources = ARRAY_SIZE(rtc_resources), 48 .num_resources = ARRAY_SIZE(rtc_resources),
48 .resource = rtc_resources, 49 .resource = rtc_resources,
50 .archdata = {
51 .hwblk_id = HWBLK_RTC,
52 },
49}; 53};
50 54
51static struct m66592_platdata usbf_platdata = { 55static struct m66592_platdata usbf_platdata = {
@@ -76,6 +80,9 @@ static struct platform_device usbf_device = {
76 }, 80 },
77 .num_resources = ARRAY_SIZE(usbf_resources), 81 .num_resources = ARRAY_SIZE(usbf_resources),
78 .resource = usbf_resources, 82 .resource = usbf_resources,
83 .archdata = {
84 .hwblk_id = HWBLK_USBF,
85 },
79}; 86};
80 87
81static struct resource iic_resources[] = { 88static struct resource iic_resources[] = {
@@ -97,6 +104,9 @@ static struct platform_device iic_device = {
97 .id = 0, /* "i2c0" clock */ 104 .id = 0, /* "i2c0" clock */
98 .num_resources = ARRAY_SIZE(iic_resources), 105 .num_resources = ARRAY_SIZE(iic_resources),
99 .resource = iic_resources, 106 .resource = iic_resources,
107 .archdata = {
108 .hwblk_id = HWBLK_IIC,
109 },
100}; 110};
101 111
102static struct uio_info vpu_platform_data = { 112static struct uio_info vpu_platform_data = {
@@ -125,6 +135,9 @@ static struct platform_device vpu_device = {
125 }, 135 },
126 .resource = vpu_resources, 136 .resource = vpu_resources,
127 .num_resources = ARRAY_SIZE(vpu_resources), 137 .num_resources = ARRAY_SIZE(vpu_resources),
138 .archdata = {
139 .hwblk_id = HWBLK_VPU,
140 },
128}; 141};
129 142
130static struct uio_info veu_platform_data = { 143static struct uio_info veu_platform_data = {
@@ -153,6 +166,9 @@ static struct platform_device veu_device = {
153 }, 166 },
154 .resource = veu_resources, 167 .resource = veu_resources,
155 .num_resources = ARRAY_SIZE(veu_resources), 168 .num_resources = ARRAY_SIZE(veu_resources),
169 .archdata = {
170 .hwblk_id = HWBLK_VEU,
171 },
156}; 172};
157 173
158static struct uio_info jpu_platform_data = { 174static struct uio_info jpu_platform_data = {
@@ -181,6 +197,9 @@ static struct platform_device jpu_device = {
181 }, 197 },
182 .resource = jpu_resources, 198 .resource = jpu_resources,
183 .num_resources = ARRAY_SIZE(jpu_resources), 199 .num_resources = ARRAY_SIZE(jpu_resources),
200 .archdata = {
201 .hwblk_id = HWBLK_JPU,
202 },
184}; 203};
185 204
186static struct sh_timer_config cmt_platform_data = { 205static struct sh_timer_config cmt_platform_data = {
@@ -213,6 +232,9 @@ static struct platform_device cmt_device = {
213 }, 232 },
214 .resource = cmt_resources, 233 .resource = cmt_resources,
215 .num_resources = ARRAY_SIZE(cmt_resources), 234 .num_resources = ARRAY_SIZE(cmt_resources),
235 .archdata = {
236 .hwblk_id = HWBLK_CMT,
237 },
216}; 238};
217 239
218static struct sh_timer_config tmu0_platform_data = { 240static struct sh_timer_config tmu0_platform_data = {
@@ -244,6 +266,9 @@ static struct platform_device tmu0_device = {
244 }, 266 },
245 .resource = tmu0_resources, 267 .resource = tmu0_resources,
246 .num_resources = ARRAY_SIZE(tmu0_resources), 268 .num_resources = ARRAY_SIZE(tmu0_resources),
269 .archdata = {
270 .hwblk_id = HWBLK_TMU,
271 },
247}; 272};
248 273
249static struct sh_timer_config tmu1_platform_data = { 274static struct sh_timer_config tmu1_platform_data = {
@@ -275,6 +300,9 @@ static struct platform_device tmu1_device = {
275 }, 300 },
276 .resource = tmu1_resources, 301 .resource = tmu1_resources,
277 .num_resources = ARRAY_SIZE(tmu1_resources), 302 .num_resources = ARRAY_SIZE(tmu1_resources),
303 .archdata = {
304 .hwblk_id = HWBLK_TMU,
305 },
278}; 306};
279 307
280static struct sh_timer_config tmu2_platform_data = { 308static struct sh_timer_config tmu2_platform_data = {
@@ -305,6 +333,9 @@ static struct platform_device tmu2_device = {
305 }, 333 },
306 .resource = tmu2_resources, 334 .resource = tmu2_resources,
307 .num_resources = ARRAY_SIZE(tmu2_resources), 335 .num_resources = ARRAY_SIZE(tmu2_resources),
336 .archdata = {
337 .hwblk_id = HWBLK_TMU,
338 },
308}; 339};
309 340
310static struct plat_sci_port sci_platform_data[] = { 341static struct plat_sci_port sci_platform_data[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 26dc4d32325..4caa5a7ca86 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -18,6 +18,7 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <asm/clock.h> 19#include <asm/clock.h>
20#include <asm/mmzone.h> 20#include <asm/mmzone.h>
21#include <cpu/sh7723.h>
21 22
22static struct uio_info vpu_platform_data = { 23static struct uio_info vpu_platform_data = {
23 .name = "VPU5", 24 .name = "VPU5",
@@ -45,6 +46,9 @@ static struct platform_device vpu_device = {
45 }, 46 },
46 .resource = vpu_resources, 47 .resource = vpu_resources,
47 .num_resources = ARRAY_SIZE(vpu_resources), 48 .num_resources = ARRAY_SIZE(vpu_resources),
49 .archdata = {
50 .hwblk_id = HWBLK_VPU,
51 },
48}; 52};
49 53
50static struct uio_info veu0_platform_data = { 54static struct uio_info veu0_platform_data = {
@@ -73,6 +77,9 @@ static struct platform_device veu0_device = {
73 }, 77 },
74 .resource = veu0_resources, 78 .resource = veu0_resources,
75 .num_resources = ARRAY_SIZE(veu0_resources), 79 .num_resources = ARRAY_SIZE(veu0_resources),
80 .archdata = {
81 .hwblk_id = HWBLK_VEU2H0,
82 },
76}; 83};
77 84
78static struct uio_info veu1_platform_data = { 85static struct uio_info veu1_platform_data = {
@@ -101,6 +108,9 @@ static struct platform_device veu1_device = {
101 }, 108 },
102 .resource = veu1_resources, 109 .resource = veu1_resources,
103 .num_resources = ARRAY_SIZE(veu1_resources), 110 .num_resources = ARRAY_SIZE(veu1_resources),
111 .archdata = {
112 .hwblk_id = HWBLK_VEU2H1,
113 },
104}; 114};
105 115
106static struct sh_timer_config cmt_platform_data = { 116static struct sh_timer_config cmt_platform_data = {
@@ -133,6 +143,9 @@ static struct platform_device cmt_device = {
133 }, 143 },
134 .resource = cmt_resources, 144 .resource = cmt_resources,
135 .num_resources = ARRAY_SIZE(cmt_resources), 145 .num_resources = ARRAY_SIZE(cmt_resources),
146 .archdata = {
147 .hwblk_id = HWBLK_CMT,
148 },
136}; 149};
137 150
138static struct sh_timer_config tmu0_platform_data = { 151static struct sh_timer_config tmu0_platform_data = {
@@ -164,6 +177,9 @@ static struct platform_device tmu0_device = {
164 }, 177 },
165 .resource = tmu0_resources, 178 .resource = tmu0_resources,
166 .num_resources = ARRAY_SIZE(tmu0_resources), 179 .num_resources = ARRAY_SIZE(tmu0_resources),
180 .archdata = {
181 .hwblk_id = HWBLK_TMU0,
182 },
167}; 183};
168 184
169static struct sh_timer_config tmu1_platform_data = { 185static struct sh_timer_config tmu1_platform_data = {
@@ -195,6 +211,9 @@ static struct platform_device tmu1_device = {
195 }, 211 },
196 .resource = tmu1_resources, 212 .resource = tmu1_resources,
197 .num_resources = ARRAY_SIZE(tmu1_resources), 213 .num_resources = ARRAY_SIZE(tmu1_resources),
214 .archdata = {
215 .hwblk_id = HWBLK_TMU0,
216 },
198}; 217};
199 218
200static struct sh_timer_config tmu2_platform_data = { 219static struct sh_timer_config tmu2_platform_data = {
@@ -225,6 +244,9 @@ static struct platform_device tmu2_device = {
225 }, 244 },
226 .resource = tmu2_resources, 245 .resource = tmu2_resources,
227 .num_resources = ARRAY_SIZE(tmu2_resources), 246 .num_resources = ARRAY_SIZE(tmu2_resources),
247 .archdata = {
248 .hwblk_id = HWBLK_TMU0,
249 },
228}; 250};
229 251
230static struct sh_timer_config tmu3_platform_data = { 252static struct sh_timer_config tmu3_platform_data = {
@@ -255,6 +277,9 @@ static struct platform_device tmu3_device = {
255 }, 277 },
256 .resource = tmu3_resources, 278 .resource = tmu3_resources,
257 .num_resources = ARRAY_SIZE(tmu3_resources), 279 .num_resources = ARRAY_SIZE(tmu3_resources),
280 .archdata = {
281 .hwblk_id = HWBLK_TMU1,
282 },
258}; 283};
259 284
260static struct sh_timer_config tmu4_platform_data = { 285static struct sh_timer_config tmu4_platform_data = {
@@ -285,6 +310,9 @@ static struct platform_device tmu4_device = {
285 }, 310 },
286 .resource = tmu4_resources, 311 .resource = tmu4_resources,
287 .num_resources = ARRAY_SIZE(tmu4_resources), 312 .num_resources = ARRAY_SIZE(tmu4_resources),
313 .archdata = {
314 .hwblk_id = HWBLK_TMU1,
315 },
288}; 316};
289 317
290static struct sh_timer_config tmu5_platform_data = { 318static struct sh_timer_config tmu5_platform_data = {
@@ -315,6 +343,9 @@ static struct platform_device tmu5_device = {
315 }, 343 },
316 .resource = tmu5_resources, 344 .resource = tmu5_resources,
317 .num_resources = ARRAY_SIZE(tmu5_resources), 345 .num_resources = ARRAY_SIZE(tmu5_resources),
346 .archdata = {
347 .hwblk_id = HWBLK_TMU1,
348 },
318}; 349};
319 350
320static struct plat_sci_port sci_platform_data[] = { 351static struct plat_sci_port sci_platform_data[] = {
@@ -395,6 +426,9 @@ static struct platform_device rtc_device = {
395 .id = -1, 426 .id = -1,
396 .num_resources = ARRAY_SIZE(rtc_resources), 427 .num_resources = ARRAY_SIZE(rtc_resources),
397 .resource = rtc_resources, 428 .resource = rtc_resources,
429 .archdata = {
430 .hwblk_id = HWBLK_RTC,
431 },
398}; 432};
399 433
400static struct r8a66597_platdata r8a66597_data = { 434static struct r8a66597_platdata r8a66597_data = {
@@ -424,6 +458,9 @@ static struct platform_device sh7723_usb_host_device = {
424 }, 458 },
425 .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), 459 .num_resources = ARRAY_SIZE(sh7723_usb_host_resources),
426 .resource = sh7723_usb_host_resources, 460 .resource = sh7723_usb_host_resources,
461 .archdata = {
462 .hwblk_id = HWBLK_USB,
463 },
427}; 464};
428 465
429static struct resource iic_resources[] = { 466static struct resource iic_resources[] = {
@@ -445,6 +482,9 @@ static struct platform_device iic_device = {
445 .id = 0, /* "i2c0" clock */ 482 .id = 0, /* "i2c0" clock */
446 .num_resources = ARRAY_SIZE(iic_resources), 483 .num_resources = ARRAY_SIZE(iic_resources),
447 .resource = iic_resources, 484 .resource = iic_resources,
485 .archdata = {
486 .hwblk_id = HWBLK_IIC,
487 },
448}; 488};
449 489
450static struct platform_device *sh7723_devices[] __initdata = { 490static struct platform_device *sh7723_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index a04edaab9a2..f3851fd757e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <asm/clock.h> 23#include <asm/clock.h>
24#include <asm/mmzone.h> 24#include <asm/mmzone.h>
25#include <cpu/sh7724.h>
25 26
26/* Serial */ 27/* Serial */
27static struct plat_sci_port sci_platform_data[] = { 28static struct plat_sci_port sci_platform_data[] = {
@@ -103,6 +104,9 @@ static struct platform_device rtc_device = {
103 .id = -1, 104 .id = -1,
104 .num_resources = ARRAY_SIZE(rtc_resources), 105 .num_resources = ARRAY_SIZE(rtc_resources),
105 .resource = rtc_resources, 106 .resource = rtc_resources,
107 .archdata = {
108 .hwblk_id = HWBLK_RTC,
109 },
106}; 110};
107 111
108/* I2C0 */ 112/* I2C0 */
@@ -125,6 +129,9 @@ static struct platform_device iic0_device = {
125 .id = 0, /* "i2c0" clock */ 129 .id = 0, /* "i2c0" clock */
126 .num_resources = ARRAY_SIZE(iic0_resources), 130 .num_resources = ARRAY_SIZE(iic0_resources),
127 .resource = iic0_resources, 131 .resource = iic0_resources,
132 .archdata = {
133 .hwblk_id = HWBLK_IIC0,
134 },
128}; 135};
129 136
130/* I2C1 */ 137/* I2C1 */
@@ -147,6 +154,9 @@ static struct platform_device iic1_device = {
147 .id = 1, /* "i2c1" clock */ 154 .id = 1, /* "i2c1" clock */
148 .num_resources = ARRAY_SIZE(iic1_resources), 155 .num_resources = ARRAY_SIZE(iic1_resources),
149 .resource = iic1_resources, 156 .resource = iic1_resources,
157 .archdata = {
158 .hwblk_id = HWBLK_IIC1,
159 },
150}; 160};
151 161
152/* VPU */ 162/* VPU */
@@ -176,6 +186,9 @@ static struct platform_device vpu_device = {
176 }, 186 },
177 .resource = vpu_resources, 187 .resource = vpu_resources,
178 .num_resources = ARRAY_SIZE(vpu_resources), 188 .num_resources = ARRAY_SIZE(vpu_resources),
189 .archdata = {
190 .hwblk_id = HWBLK_VPU,
191 },
179}; 192};
180 193
181/* VEU0 */ 194/* VEU0 */
@@ -205,6 +218,9 @@ static struct platform_device veu0_device = {
205 }, 218 },
206 .resource = veu0_resources, 219 .resource = veu0_resources,
207 .num_resources = ARRAY_SIZE(veu0_resources), 220 .num_resources = ARRAY_SIZE(veu0_resources),
221 .archdata = {
222 .hwblk_id = HWBLK_VEU0,
223 },
208}; 224};
209 225
210/* VEU1 */ 226/* VEU1 */
@@ -234,6 +250,9 @@ static struct platform_device veu1_device = {
234 }, 250 },
235 .resource = veu1_resources, 251 .resource = veu1_resources,
236 .num_resources = ARRAY_SIZE(veu1_resources), 252 .num_resources = ARRAY_SIZE(veu1_resources),
253 .archdata = {
254 .hwblk_id = HWBLK_VEU1,
255 },
237}; 256};
238 257
239static struct sh_timer_config cmt_platform_data = { 258static struct sh_timer_config cmt_platform_data = {
@@ -266,6 +285,9 @@ static struct platform_device cmt_device = {
266 }, 285 },
267 .resource = cmt_resources, 286 .resource = cmt_resources,
268 .num_resources = ARRAY_SIZE(cmt_resources), 287 .num_resources = ARRAY_SIZE(cmt_resources),
288 .archdata = {
289 .hwblk_id = HWBLK_CMT,
290 },
269}; 291};
270 292
271static struct sh_timer_config tmu0_platform_data = { 293static struct sh_timer_config tmu0_platform_data = {
@@ -297,6 +319,9 @@ static struct platform_device tmu0_device = {
297 }, 319 },
298 .resource = tmu0_resources, 320 .resource = tmu0_resources,
299 .num_resources = ARRAY_SIZE(tmu0_resources), 321 .num_resources = ARRAY_SIZE(tmu0_resources),
322 .archdata = {
323 .hwblk_id = HWBLK_TMU0,
324 },
300}; 325};
301 326
302static struct sh_timer_config tmu1_platform_data = { 327static struct sh_timer_config tmu1_platform_data = {
@@ -328,6 +353,9 @@ static struct platform_device tmu1_device = {
328 }, 353 },
329 .resource = tmu1_resources, 354 .resource = tmu1_resources,
330 .num_resources = ARRAY_SIZE(tmu1_resources), 355 .num_resources = ARRAY_SIZE(tmu1_resources),
356 .archdata = {
357 .hwblk_id = HWBLK_TMU0,
358 },
331}; 359};
332 360
333static struct sh_timer_config tmu2_platform_data = { 361static struct sh_timer_config tmu2_platform_data = {
@@ -358,6 +386,9 @@ static struct platform_device tmu2_device = {
358 }, 386 },
359 .resource = tmu2_resources, 387 .resource = tmu2_resources,
360 .num_resources = ARRAY_SIZE(tmu2_resources), 388 .num_resources = ARRAY_SIZE(tmu2_resources),
389 .archdata = {
390 .hwblk_id = HWBLK_TMU0,
391 },
361}; 392};
362 393
363 394
@@ -389,6 +420,9 @@ static struct platform_device tmu3_device = {
389 }, 420 },
390 .resource = tmu3_resources, 421 .resource = tmu3_resources,
391 .num_resources = ARRAY_SIZE(tmu3_resources), 422 .num_resources = ARRAY_SIZE(tmu3_resources),
423 .archdata = {
424 .hwblk_id = HWBLK_TMU1,
425 },
392}; 426};
393 427
394static struct sh_timer_config tmu4_platform_data = { 428static struct sh_timer_config tmu4_platform_data = {
@@ -419,6 +453,9 @@ static struct platform_device tmu4_device = {
419 }, 453 },
420 .resource = tmu4_resources, 454 .resource = tmu4_resources,
421 .num_resources = ARRAY_SIZE(tmu4_resources), 455 .num_resources = ARRAY_SIZE(tmu4_resources),
456 .archdata = {
457 .hwblk_id = HWBLK_TMU1,
458 },
422}; 459};
423 460
424static struct sh_timer_config tmu5_platform_data = { 461static struct sh_timer_config tmu5_platform_data = {
@@ -449,6 +486,9 @@ static struct platform_device tmu5_device = {
449 }, 486 },
450 .resource = tmu5_resources, 487 .resource = tmu5_resources,
451 .num_resources = ARRAY_SIZE(tmu5_resources), 488 .num_resources = ARRAY_SIZE(tmu5_resources),
489 .archdata = {
490 .hwblk_id = HWBLK_TMU1,
491 },
452}; 492};
453 493
454/* JPU */ 494/* JPU */
@@ -478,6 +518,9 @@ static struct platform_device jpu_device = {
478 }, 518 },
479 .resource = jpu_resources, 519 .resource = jpu_resources,
480 .num_resources = ARRAY_SIZE(jpu_resources), 520 .num_resources = ARRAY_SIZE(jpu_resources),
521 .archdata = {
522 .hwblk_id = HWBLK_JPU,
523 },
481}; 524};
482 525
483static struct platform_device *sh7724_devices[] __initdata = { 526static struct platform_device *sh7724_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
new file mode 100644
index 00000000000..c470e15f2e0
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -0,0 +1,513 @@
1/*
2 * SH7757 Setup
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * based on setup-sh7785.c : Copyright (C) 2007 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/platform_device.h>
13#include <linux/init.h>
14#include <linux/serial.h>
15#include <linux/serial_sci.h>
16#include <linux/io.h>
17#include <linux/mm.h>
18#include <linux/sh_timer.h>
19
20static struct sh_timer_config tmu0_platform_data = {
21 .name = "TMU0",
22 .channel_offset = 0x04,
23 .timer_bit = 0,
24 .clk = "peripheral_clk",
25 .clockevent_rating = 200,
26};
27
28static struct resource tmu0_resources[] = {
29 [0] = {
30 .name = "TMU0",
31 .start = 0xfe430008,
32 .end = 0xfe430013,
33 .flags = IORESOURCE_MEM,
34 },
35 [1] = {
36 .start = 28,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41static struct platform_device tmu0_device = {
42 .name = "sh_tmu",
43 .id = 0,
44 .dev = {
45 .platform_data = &tmu0_platform_data,
46 },
47 .resource = tmu0_resources,
48 .num_resources = ARRAY_SIZE(tmu0_resources),
49};
50
51static struct sh_timer_config tmu1_platform_data = {
52 .name = "TMU1",
53 .channel_offset = 0x10,
54 .timer_bit = 1,
55 .clk = "peripheral_clk",
56 .clocksource_rating = 200,
57};
58
59static struct resource tmu1_resources[] = {
60 [0] = {
61 .name = "TMU1",
62 .start = 0xfe430014,
63 .end = 0xfe43001f,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = 29,
68 .flags = IORESOURCE_IRQ,
69 },
70};
71
72static struct platform_device tmu1_device = {
73 .name = "sh_tmu",
74 .id = 1,
75 .dev = {
76 .platform_data = &tmu1_platform_data,
77 },
78 .resource = tmu1_resources,
79 .num_resources = ARRAY_SIZE(tmu1_resources),
80};
81
82static struct plat_sci_port sci_platform_data[] = {
83 {
84 .mapbase = 0xfe4b0000, /* SCIF2 */
85 .flags = UPF_BOOT_AUTOCONF,
86 .type = PORT_SCIF,
87 .irqs = { 40, 40, 40, 40 },
88 }, {
89 .mapbase = 0xfe4c0000, /* SCIF3 */
90 .flags = UPF_BOOT_AUTOCONF,
91 .type = PORT_SCIF,
92 .irqs = { 76, 76, 76, 76 },
93 }, {
94 .mapbase = 0xfe4d0000, /* SCIF4 */
95 .flags = UPF_BOOT_AUTOCONF,
96 .type = PORT_SCIF,
97 .irqs = { 104, 104, 104, 104 },
98 }, {
99 .flags = 0,
100 }
101};
102
103static struct platform_device sci_device = {
104 .name = "sh-sci",
105 .id = -1,
106 .dev = {
107 .platform_data = sci_platform_data,
108 },
109};
110
111static struct platform_device *sh7757_devices[] __initdata = {
112 &tmu0_device,
113 &tmu1_device,
114 &sci_device,
115};
116
117static int __init sh7757_devices_setup(void)
118{
119 return platform_add_devices(sh7757_devices,
120 ARRAY_SIZE(sh7757_devices));
121}
122arch_initcall(sh7757_devices_setup);
123
124enum {
125 UNUSED = 0,
126
127 /* interrupt sources */
128
129 IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
130 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
131 IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
132 IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
133
134 IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
135 IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
136 IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
137 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
138 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
139
140 SDHI,
141 DVC,
142 IRQ8, IRQ9, IRQ10,
143 WDT0,
144 TMU0, TMU1, TMU2, TMU2_TICPI,
145 HUDI,
146
147 ARC4,
148 DMAC0,
149 IRQ11,
150 SCIF2,
151 DMAC1_6,
152 USB0,
153 IRQ12,
154 JMC,
155 SPI1,
156 IRQ13, IRQ14,
157 USB1,
158 TMR01, TMR23, TMR45,
159 WDT1,
160 FRT,
161 LPC,
162 SCIF0, SCIF1, SCIF3,
163 PECI0I, PECI1I, PECI2I,
164 IRQ15,
165 ETHERC,
166 SPI0,
167 ADC1,
168 DMAC1_8,
169 SIM,
170 TMU3, TMU4, TMU5,
171 ADC0,
172 SCIF4,
173 IIC0_0, IIC0_1, IIC0_2, IIC0_3,
174 IIC1_0, IIC1_1, IIC1_2, IIC1_3,
175 IIC2_0, IIC2_1, IIC2_2, IIC2_3,
176 IIC3_0, IIC3_1, IIC3_2, IIC3_3,
177 IIC4_0, IIC4_1, IIC4_2, IIC4_3,
178 IIC5_0, IIC5_1, IIC5_2, IIC5_3,
179 IIC6_0, IIC6_1, IIC6_2, IIC6_3,
180 IIC7_0, IIC7_1, IIC7_2, IIC7_3,
181 IIC8_0, IIC8_1, IIC8_2, IIC8_3,
182 IIC9_0, IIC9_1, IIC9_2, IIC9_3,
183 PCIINTA,
184 PCIE,
185 SGPIO,
186
187 /* interrupt groups */
188
189 TMU012, TMU345,
190};
191
192static struct intc_vect vectors[] __initdata = {
193 INTC_VECT(SDHI, 0x480), INTC_VECT(SDHI, 0x04a0),
194 INTC_VECT(SDHI, 0x4c0),
195 INTC_VECT(DVC, 0x4e0),
196 INTC_VECT(IRQ8, 0x500), INTC_VECT(IRQ9, 0x520),
197 INTC_VECT(IRQ10, 0x540),
198 INTC_VECT(WDT0, 0x560),
199 INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
200 INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
201 INTC_VECT(HUDI, 0x600),
202 INTC_VECT(ARC4, 0x620),
203 INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660),
204 INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0),
205 INTC_VECT(DMAC0, 0x6c0),
206 INTC_VECT(IRQ11, 0x6e0),
207 INTC_VECT(SCIF2, 0x700), INTC_VECT(SCIF2, 0x720),
208 INTC_VECT(SCIF2, 0x740), INTC_VECT(SCIF2, 0x760),
209 INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0),
210 INTC_VECT(DMAC1_6, 0x7c0), INTC_VECT(DMAC1_6, 0x7e0),
211 INTC_VECT(USB0, 0x840),
212 INTC_VECT(IRQ12, 0x880),
213 INTC_VECT(JMC, 0x8a0),
214 INTC_VECT(SPI1, 0x8c0),
215 INTC_VECT(IRQ13, 0x8e0), INTC_VECT(IRQ14, 0x900),
216 INTC_VECT(USB1, 0x920),
217 INTC_VECT(TMR01, 0xa00), INTC_VECT(TMR23, 0xa20),
218 INTC_VECT(TMR45, 0xa40),
219 INTC_VECT(WDT1, 0xa60),
220 INTC_VECT(FRT, 0xa80),
221 INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0),
222 INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00),
223 INTC_VECT(LPC, 0xb20),
224 INTC_VECT(SCIF0, 0xb40), INTC_VECT(SCIF1, 0xb60),
225 INTC_VECT(SCIF3, 0xb80), INTC_VECT(SCIF3, 0xba0),
226 INTC_VECT(SCIF3, 0xbc0), INTC_VECT(SCIF3, 0xbe0),
227 INTC_VECT(PECI0I, 0xc00), INTC_VECT(PECI1I, 0xc20),
228 INTC_VECT(PECI2I, 0xc40),
229 INTC_VECT(IRQ15, 0xc60),
230 INTC_VECT(ETHERC, 0xc80), INTC_VECT(ETHERC, 0xca0),
231 INTC_VECT(SPI0, 0xcc0),
232 INTC_VECT(ADC1, 0xce0),
233 INTC_VECT(DMAC1_8, 0xd00), INTC_VECT(DMAC1_8, 0xd20),
234 INTC_VECT(DMAC1_8, 0xd40), INTC_VECT(DMAC1_8, 0xd60),
235 INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
236 INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
237 INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
238 INTC_VECT(TMU5, 0xe40),
239 INTC_VECT(ADC0, 0xe60),
240 INTC_VECT(SCIF4, 0xf00), INTC_VECT(SCIF4, 0xf20),
241 INTC_VECT(SCIF4, 0xf40), INTC_VECT(SCIF4, 0xf60),
242 INTC_VECT(IIC0_0, 0x1400), INTC_VECT(IIC0_1, 0x1420),
243 INTC_VECT(IIC0_2, 0x1440), INTC_VECT(IIC0_3, 0x1460),
244 INTC_VECT(IIC1_0, 0x1480), INTC_VECT(IIC1_1, 0x14e0),
245 INTC_VECT(IIC1_2, 0x1500), INTC_VECT(IIC1_3, 0x1520),
246 INTC_VECT(IIC2_0, 0x1540), INTC_VECT(IIC2_1, 0x1560),
247 INTC_VECT(IIC2_2, 0x1580), INTC_VECT(IIC2_3, 0x1600),
248 INTC_VECT(IIC3_0, 0x1620), INTC_VECT(IIC3_1, 0x1640),
249 INTC_VECT(IIC3_2, 0x16e0), INTC_VECT(IIC3_3, 0x1700),
250 INTC_VECT(IIC4_0, 0x17c0), INTC_VECT(IIC4_1, 0x1800),
251 INTC_VECT(IIC4_2, 0x1820), INTC_VECT(IIC4_3, 0x1840),
252 INTC_VECT(IIC5_0, 0x1860), INTC_VECT(IIC5_1, 0x1880),
253 INTC_VECT(IIC5_2, 0x18a0), INTC_VECT(IIC5_3, 0x18c0),
254 INTC_VECT(IIC6_0, 0x18e0), INTC_VECT(IIC6_1, 0x1900),
255 INTC_VECT(IIC6_2, 0x1920), INTC_VECT(IIC6_3, 0x1980),
256 INTC_VECT(IIC7_0, 0x19a0), INTC_VECT(IIC7_1, 0x1a00),
257 INTC_VECT(IIC7_2, 0x1a20), INTC_VECT(IIC7_3, 0x1a40),
258 INTC_VECT(IIC8_0, 0x1a60), INTC_VECT(IIC8_1, 0x1a80),
259 INTC_VECT(IIC8_2, 0x1aa0), INTC_VECT(IIC8_3, 0x1b40),
260 INTC_VECT(IIC9_0, 0x1b60), INTC_VECT(IIC9_1, 0x1b80),
261 INTC_VECT(IIC9_2, 0x1c00), INTC_VECT(IIC9_3, 0x1c20),
262 INTC_VECT(PCIINTA, 0x1ce0),
263 INTC_VECT(PCIE, 0x1e00),
264 INTC_VECT(SGPIO, 0x1f80),
265 INTC_VECT(SGPIO, 0x1fa0),
266};
267
268static struct intc_group groups[] __initdata = {
269 INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
270 INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
271};
272
273static struct intc_mask_reg mask_registers[] __initdata = {
274 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
275 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
276
277 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
278 { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
279 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
280 IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
281 IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0,
282 IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
283 IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
284 IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
285 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
286
287 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
288 { 0, 0, 0, 0, 0, 0, 0, 0,
289 0, DMAC1_8, 0, PECI0I, LPC, FRT, WDT1, TMR45,
290 TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0,
291 HUDI, 0, WDT0, SCIF3, SCIF2, SDHI, TMU345, TMU012
292 } },
293
294 { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */
295 { IRQ15, IRQ14, IRQ13, IRQ12, IRQ11, IRQ10, SCIF4, ETHERC,
296 IRQ9, IRQ8, SCIF1, SCIF0, USB0, 0, 0, USB1,
297 ADC1, 0, DMAC1_6, ADC0, SPI0, SIM, PECI2I, PECI1I,
298 ARC4, 0, SPI1, JMC, 0, 0, 0, DVC
299 } },
300
301 { 0xffd10038, 0xffd1003c, 32, /* INT2MSKR2 / INT2MSKCR2 */
302 { IIC4_1, IIC4_2, IIC5_0, 0, 0, 0, SGPIO, 0,
303 0, 0, 0, IIC9_2, IIC8_2, IIC8_1, IIC8_0, IIC7_3,
304 IIC7_2, IIC7_1, IIC6_3, IIC0_0, IIC0_1, IIC0_2, IIC0_3, IIC3_1,
305 IIC2_3, 0, IIC2_1, IIC9_1, IIC3_3, IIC1_0, PCIE, IIC2_2
306 } },
307
308 { 0xffd100d0, 0xff1400d4, 32, /* INT2MSKR3 / INT2MSKCR4 */
309 { 0, IIC6_1, IIC6_0, IIC5_1, IIC3_2, IIC2_0, 0, 0,
310 IIC1_3, IIC1_2, IIC9_0, IIC8_3, IIC4_3, IIC7_0, 0, IIC6_2,
311 PCIINTA, 0, IIC4_0, 0, 0, 0, 0, IIC9_3,
312 IIC3_0, 0, IIC5_3, IIC5_2, 0, 0, 0, IIC1_1
313 } },
314};
315
316#define INTPRI 0xffd00010
317#define INT2PRI0 0xffd40000
318#define INT2PRI1 0xffd40004
319#define INT2PRI2 0xffd40008
320#define INT2PRI3 0xffd4000c
321#define INT2PRI4 0xffd40010
322#define INT2PRI5 0xffd40014
323#define INT2PRI6 0xffd40018
324#define INT2PRI7 0xffd4001c
325#define INT2PRI8 0xffd400a0
326#define INT2PRI9 0xffd400a4
327#define INT2PRI10 0xffd400a8
328#define INT2PRI11 0xffd400ac
329#define INT2PRI12 0xffd400b0
330#define INT2PRI13 0xffd400b4
331#define INT2PRI14 0xffd400b8
332#define INT2PRI15 0xffd400bc
333#define INT2PRI16 0xffd10000
334#define INT2PRI17 0xffd10004
335#define INT2PRI18 0xffd10008
336#define INT2PRI19 0xffd1000c
337#define INT2PRI20 0xffd10010
338#define INT2PRI21 0xffd10014
339#define INT2PRI22 0xffd10018
340#define INT2PRI23 0xffd1001c
341#define INT2PRI24 0xffd100a0
342#define INT2PRI25 0xffd100a4
343#define INT2PRI26 0xffd100a8
344#define INT2PRI27 0xffd100ac
345#define INT2PRI28 0xffd100b0
346#define INT2PRI29 0xffd100b4
347#define INT2PRI30 0xffd100b8
348#define INT2PRI31 0xffd100bc
349
350static struct intc_prio_reg prio_registers[] __initdata = {
351 { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3,
352 IRQ4, IRQ5, IRQ6, IRQ7 } },
353
354 { INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } },
355 { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },
356 { INT2PRI2, 0, 32, 8, { SCIF2, SCIF3, WDT0, IRQ8 } },
357 { INT2PRI3, 0, 32, 8, { HUDI, DMAC0, ADC0, IRQ9 } },
358 { INT2PRI4, 0, 32, 8, { IRQ10, 0, TMR01, TMR23 } },
359 { INT2PRI5, 0, 32, 8, { TMR45, WDT1, FRT, LPC } },
360 { INT2PRI6, 0, 32, 8, { PECI0I, ETHERC, DMAC1_8, 0 } },
361 { INT2PRI7, 0, 32, 8, { SCIF4, 0, IRQ11, IRQ12 } },
362 { INT2PRI8, 0, 32, 8, { 0, 0, 0, DVC } },
363 { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } },
364 { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2I, PECI1I } },
365 { INT2PRI11, 0, 32, 8, { ADC1, IRQ13, DMAC1_6, IRQ14 } },
366 { INT2PRI12, 0, 32, 8, { USB0, 0, IRQ15, USB1 } },
367 { INT2PRI13, 0, 32, 8, { 0, 0, SCIF1, SCIF0 } },
368
369 { INT2PRI16, 0, 32, 8, { IIC2_2, 0, 0, 0 } },
370 { INT2PRI17, 0, 32, 8, { PCIE, 0, 0, IIC1_0 } },
371 { INT2PRI18, 0, 32, 8, { IIC3_3, IIC9_1, IIC2_1, IIC1_2 } },
372 { INT2PRI19, 0, 32, 8, { IIC2_3, IIC3_1, 0, IIC1_3 } },
373 { INT2PRI20, 0, 32, 8, { IIC2_0, IIC6_3, IIC7_1, IIC7_2 } },
374 { INT2PRI21, 0, 32, 8, { IIC7_3, IIC8_0, IIC8_1, IIC8_2 } },
375 { INT2PRI22, 0, 32, 8, { IIC9_2, 0, 0, 0 } },
376 { INT2PRI23, 0, 32, 8, { 0, SGPIO, IIC3_2, IIC5_1 } },
377 { INT2PRI24, 0, 32, 8, { 0, 0, 0, IIC1_1 } },
378 { INT2PRI25, 0, 32, 8, { IIC3_0, 0, IIC5_3, IIC5_2 } },
379 { INT2PRI26, 0, 32, 8, { 0, 0, 0, IIC9_3 } },
380 { INT2PRI27, 0, 32, 8, { PCIINTA, IIC6_0, IIC4_0, IIC6_1 } },
381 { INT2PRI28, 0, 32, 8, { IIC4_3, IIC7_0, 0, IIC6_2 } },
382 { INT2PRI29, 0, 32, 8, { 0, 0, IIC9_0, IIC8_3 } },
383 { INT2PRI30, 0, 32, 8, { IIC4_1, IIC4_2, IIC5_0, 0 } },
384 { INT2PRI31, 0, 32, 8, { IIC0_0, IIC0_1, IIC0_2, IIC0_3 } },
385};
386
387static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
388 mask_registers, prio_registers, NULL);
389
390/* Support for external interrupt pins in IRQ mode */
391static struct intc_vect vectors_irq0123[] __initdata = {
392 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
393 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
394};
395
396static struct intc_vect vectors_irq4567[] __initdata = {
397 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
398 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200),
399};
400
401static struct intc_sense_reg sense_registers[] __initdata = {
402 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
403 IRQ4, IRQ5, IRQ6, IRQ7 } },
404};
405
406static struct intc_mask_reg ack_registers[] __initdata = {
407 { 0xffd00024, 0, 32, /* INTREQ */
408 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
409};
410
411static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7757-irq0123",
412 vectors_irq0123, NULL, mask_registers,
413 prio_registers, sense_registers, ack_registers);
414
415static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7757-irq4567",
416 vectors_irq4567, NULL, mask_registers,
417 prio_registers, sense_registers, ack_registers);
418
419/* External interrupt pins in IRL mode */
420static struct intc_vect vectors_irl0123[] __initdata = {
421 INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
422 INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
423 INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
424 INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
425 INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
426 INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
427 INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
428 INTC_VECT(IRL0_HHHL, 0x3c0),
429};
430
431static struct intc_vect vectors_irl4567[] __initdata = {
432 INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20),
433 INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60),
434 INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0),
435 INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0),
436 INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20),
437 INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60),
438 INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0),
439 INTC_VECT(IRL4_HHHL, 0xcc0),
440};
441
442static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
443 NULL, mask_registers, NULL, NULL);
444
445static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
446 NULL, mask_registers, NULL, NULL);
447
448#define INTC_ICR0 0xffd00000
449#define INTC_INTMSK0 0xffd00044
450#define INTC_INTMSK1 0xffd00048
451#define INTC_INTMSK2 0xffd40080
452#define INTC_INTMSKCLR1 0xffd00068
453#define INTC_INTMSKCLR2 0xffd40084
454
455void __init plat_irq_setup(void)
456{
457 /* disable IRQ3-0 + IRQ7-4 */
458 ctrl_outl(0xff000000, INTC_INTMSK0);
459
460 /* disable IRL3-0 + IRL7-4 */
461 ctrl_outl(0xc0000000, INTC_INTMSK1);
462 ctrl_outl(0xfffefffe, INTC_INTMSK2);
463
464 /* select IRL mode for IRL3-0 + IRL7-4 */
465 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
466
467 /* disable holding function, ie enable "SH-4 Mode" */
468 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
469
470 register_intc_controller(&intc_desc);
471}
472
473void __init plat_irq_setup_pins(int mode)
474{
475 switch (mode) {
476 case IRQ_MODE_IRQ7654:
477 /* select IRQ mode for IRL7-4 */
478 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
479 register_intc_controller(&intc_desc_irq4567);
480 break;
481 case IRQ_MODE_IRQ3210:
482 /* select IRQ mode for IRL3-0 */
483 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
484 register_intc_controller(&intc_desc_irq0123);
485 break;
486 case IRQ_MODE_IRL7654:
487 /* enable IRL7-4 but don't provide any masking */
488 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
489 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
490 break;
491 case IRQ_MODE_IRL3210:
492 /* enable IRL0-3 but don't provide any masking */
493 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
494 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
495 break;
496 case IRQ_MODE_IRL7654_MASK:
497 /* enable IRL7-4 and mask using cpu intc controller */
498 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
499 register_intc_controller(&intc_desc_irl4567);
500 break;
501 case IRQ_MODE_IRL3210_MASK:
502 /* enable IRL0-3 and mask using cpu intc controller */
503 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
504 register_intc_controller(&intc_desc_irl0123);
505 break;
506 default:
507 BUG();
508 }
509}
510
511void __init plat_mem_setup(void)
512{
513}
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
index e8a5111e848..a39f88ea1a8 100644
--- a/arch/sh/kernel/cpu/shmobile/Makefile
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -5,3 +5,4 @@
5# Power Management & Sleep mode 5# Power Management & Sleep mode
6obj-$(CONFIG_PM) += pm.o sleep.o 6obj-$(CONFIG_PM) += pm.o sleep.o
7obj-$(CONFIG_CPU_IDLE) += cpuidle.o 7obj-$(CONFIG_CPU_IDLE) += cpuidle.o
8obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
new file mode 100644
index 00000000000..7c615b17e20
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -0,0 +1,303 @@
1/*
2 * arch/sh/kernel/cpu/shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile
5 *
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <linux/pm_runtime.h>
16#include <linux/platform_device.h>
17#include <linux/mutex.h>
18#include <asm/hwblk.h>
19
20static DEFINE_SPINLOCK(hwblk_lock);
21static LIST_HEAD(hwblk_idle_list);
22static struct work_struct hwblk_work;
23
24extern struct hwblk_info *hwblk_info;
25
26static void platform_pm_runtime_not_idle(struct platform_device *pdev)
27{
28 unsigned long flags;
29
30 /* remove device from idle list */
31 spin_lock_irqsave(&hwblk_lock, flags);
32 if (test_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags)) {
33 list_del(&pdev->archdata.entry);
34 __clear_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
35 }
36 spin_unlock_irqrestore(&hwblk_lock, flags);
37}
38
39static int __platform_pm_runtime_resume(struct platform_device *pdev)
40{
41 struct device *d = &pdev->dev;
42 struct pdev_archdata *ad = &pdev->archdata;
43 int hwblk = ad->hwblk_id;
44 int ret = -ENOSYS;
45
46 dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
47
48 if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) {
49 hwblk_enable(hwblk_info, hwblk);
50 ret = 0;
51
52 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
53 ret = d->driver->pm->runtime_resume(d);
54 if (!ret)
55 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
56 else
57 hwblk_disable(hwblk_info, hwblk);
58 }
59 }
60
61 dev_dbg(d, "__platform_pm_runtime_resume() [%d] - returns %d\n",
62 hwblk, ret);
63
64 return ret;
65}
66
67static int __platform_pm_runtime_suspend(struct platform_device *pdev)
68{
69 struct device *d = &pdev->dev;
70 struct pdev_archdata *ad = &pdev->archdata;
71 int hwblk = ad->hwblk_id;
72 int ret = -ENOSYS;
73
74 dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
75
76 if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) {
77 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
78
79 hwblk_enable(hwblk_info, hwblk);
80 ret = d->driver->pm->runtime_suspend(d);
81 hwblk_disable(hwblk_info, hwblk);
82
83 if (!ret) {
84 set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
85 platform_pm_runtime_not_idle(pdev);
86 hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
87 }
88 }
89
90 dev_dbg(d, "__platform_pm_runtime_suspend() [%d] - returns %d\n",
91 hwblk, ret);
92
93 return ret;
94}
95
96static void platform_pm_runtime_work(struct work_struct *work)
97{
98 struct platform_device *pdev;
99 unsigned long flags;
100 int ret;
101
102 /* go through the idle list and suspend one device at a time */
103 do {
104 spin_lock_irqsave(&hwblk_lock, flags);
105 if (list_empty(&hwblk_idle_list))
106 pdev = NULL;
107 else
108 pdev = list_first_entry(&hwblk_idle_list,
109 struct platform_device,
110 archdata.entry);
111 spin_unlock_irqrestore(&hwblk_lock, flags);
112
113 if (pdev) {
114 mutex_lock(&pdev->archdata.mutex);
115 ret = __platform_pm_runtime_suspend(pdev);
116
117 /* at this point the platform device may be:
118 * suspended: ret = 0, FLAG_SUSP set, clock stopped
119 * failed: ret < 0, FLAG_IDLE set, clock stopped
120 */
121 mutex_unlock(&pdev->archdata.mutex);
122 } else {
123 ret = -ENODEV;
124 }
125 } while (!ret);
126}
127
128/* this function gets called from cpuidle context when all devices in the
129 * main power domain are unused but some are counted as idle, ie the hwblk
130 * counter values are (HWBLK_CNT_USAGE == 0) && (HWBLK_CNT_IDLE != 0)
131 */
132void platform_pm_runtime_suspend_idle(void)
133{
134 queue_work(pm_wq, &hwblk_work);
135}
136
137int platform_pm_runtime_suspend(struct device *dev)
138{
139 struct platform_device *pdev = to_platform_device(dev);
140 struct pdev_archdata *ad = &pdev->archdata;
141 unsigned long flags;
142 int hwblk = ad->hwblk_id;
143 int ret = 0;
144
145 dev_dbg(dev, "platform_pm_runtime_suspend() [%d]\n", hwblk);
146
147 /* ignore off-chip platform devices */
148 if (!hwblk)
149 goto out;
150
151 /* interrupt context not allowed */
152 might_sleep();
153
154 /* catch misconfigured drivers not starting with resume */
155 if (test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags)) {
156 ret = -EINVAL;
157 goto out;
158 }
159
160 /* serialize */
161 mutex_lock(&ad->mutex);
162
163 /* disable clock */
164 hwblk_disable(hwblk_info, hwblk);
165
166 /* put device on idle list */
167 spin_lock_irqsave(&hwblk_lock, flags);
168 list_add_tail(&pdev->archdata.entry, &hwblk_idle_list);
169 __set_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
170 spin_unlock_irqrestore(&hwblk_lock, flags);
171
172 /* increase idle count */
173 hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_IDLE);
174
175 /* at this point the platform device is:
176 * idle: ret = 0, FLAG_IDLE set, clock stopped
177 */
178 mutex_unlock(&ad->mutex);
179
180out:
181 dev_dbg(dev, "platform_pm_runtime_suspend() [%d] returns %d\n",
182 hwblk, ret);
183
184 return ret;
185}
186
187int platform_pm_runtime_resume(struct device *dev)
188{
189 struct platform_device *pdev = to_platform_device(dev);
190 struct pdev_archdata *ad = &pdev->archdata;
191 int hwblk = ad->hwblk_id;
192 int ret = 0;
193
194 dev_dbg(dev, "platform_pm_runtime_resume() [%d]\n", hwblk);
195
196 /* ignore off-chip platform devices */
197 if (!hwblk)
198 goto out;
199
200 /* interrupt context not allowed */
201 might_sleep();
202
203 /* serialize */
204 mutex_lock(&ad->mutex);
205
206 /* make sure device is removed from idle list */
207 platform_pm_runtime_not_idle(pdev);
208
209 /* decrease idle count */
210 if (!test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags) &&
211 !test_bit(PDEV_ARCHDATA_FLAG_SUSP, &pdev->archdata.flags))
212 hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
213
214 /* resume the device if needed */
215 ret = __platform_pm_runtime_resume(pdev);
216
217 /* the driver has been initialized now, so clear the init flag */
218 clear_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
219
220 /* at this point the platform device may be:
221 * resumed: ret = 0, flags = 0, clock started
222 * failed: ret < 0, FLAG_SUSP set, clock stopped
223 */
224 mutex_unlock(&ad->mutex);
225out:
226 dev_dbg(dev, "platform_pm_runtime_resume() [%d] returns %d\n",
227 hwblk, ret);
228
229 return ret;
230}
231
232int platform_pm_runtime_idle(struct device *dev)
233{
234 struct platform_device *pdev = to_platform_device(dev);
235 int hwblk = pdev->archdata.hwblk_id;
236 int ret = 0;
237
238 dev_dbg(dev, "platform_pm_runtime_idle() [%d]\n", hwblk);
239
240 /* ignore off-chip platform devices */
241 if (!hwblk)
242 goto out;
243
244 /* interrupt context not allowed, use pm_runtime_put()! */
245 might_sleep();
246
247 /* suspend synchronously to disable clocks immediately */
248 ret = pm_runtime_suspend(dev);
249out:
250 dev_dbg(dev, "platform_pm_runtime_idle() [%d] done!\n", hwblk);
251 return ret;
252}
253
254static int platform_bus_notify(struct notifier_block *nb,
255 unsigned long action, void *data)
256{
257 struct device *dev = data;
258 struct platform_device *pdev = to_platform_device(dev);
259 int hwblk = pdev->archdata.hwblk_id;
260
261 /* ignore off-chip platform devices */
262 if (!hwblk)
263 return 0;
264
265 switch (action) {
266 case BUS_NOTIFY_ADD_DEVICE:
267 INIT_LIST_HEAD(&pdev->archdata.entry);
268 mutex_init(&pdev->archdata.mutex);
269 /* platform devices without drivers should be disabled */
270 hwblk_enable(hwblk_info, hwblk);
271 hwblk_disable(hwblk_info, hwblk);
272 /* make sure driver re-inits itself once */
273 __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
274 break;
275 /* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */
276 case BUS_NOTIFY_BOUND_DRIVER:
277 /* keep track of number of devices in use per hwblk */
278 hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
279 break;
280 case BUS_NOTIFY_UNBOUND_DRIVER:
281 /* keep track of number of devices in use per hwblk */
282 hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
283 /* make sure driver re-inits itself once */
284 __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
285 break;
286 case BUS_NOTIFY_DEL_DEVICE:
287 break;
288 }
289 return 0;
290}
291
292static struct notifier_block platform_bus_notifier = {
293 .notifier_call = platform_bus_notify
294};
295
296static int __init sh_pm_runtime_init(void)
297{
298 INIT_WORK(&hwblk_work, platform_pm_runtime_work);
299
300 bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
301 return 0;
302}
303core_initcall(sh_pm_runtime_init);
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index 5fd6e604816..bc4d8d75332 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -11,12 +11,14 @@
11 * 11 *
12 * TODO: 12 * TODO:
13 * - DWARF64 doesn't work. 13 * - DWARF64 doesn't work.
14 * - Registers with DWARF_VAL_OFFSET rules aren't handled properly.
14 */ 15 */
15 16
16/* #define DEBUG */ 17/* #define DEBUG */
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/io.h> 19#include <linux/io.h>
19#include <linux/list.h> 20#include <linux/list.h>
21#include <linux/mempool.h>
20#include <linux/mm.h> 22#include <linux/mm.h>
21#include <asm/dwarf.h> 23#include <asm/dwarf.h>
22#include <asm/unwinder.h> 24#include <asm/unwinder.h>
@@ -25,55 +27,89 @@
25#include <asm/dwarf.h> 27#include <asm/dwarf.h>
26#include <asm/stacktrace.h> 28#include <asm/stacktrace.h>
27 29
30/* Reserve enough memory for two stack frames */
31#define DWARF_FRAME_MIN_REQ 2
32/* ... with 4 registers per frame. */
33#define DWARF_REG_MIN_REQ (DWARF_FRAME_MIN_REQ * 4)
34
35static struct kmem_cache *dwarf_frame_cachep;
36static mempool_t *dwarf_frame_pool;
37
38static struct kmem_cache *dwarf_reg_cachep;
39static mempool_t *dwarf_reg_pool;
40
28static LIST_HEAD(dwarf_cie_list); 41static LIST_HEAD(dwarf_cie_list);
29DEFINE_SPINLOCK(dwarf_cie_lock); 42static DEFINE_SPINLOCK(dwarf_cie_lock);
30 43
31static LIST_HEAD(dwarf_fde_list); 44static LIST_HEAD(dwarf_fde_list);
32DEFINE_SPINLOCK(dwarf_fde_lock); 45static DEFINE_SPINLOCK(dwarf_fde_lock);
33 46
34static struct dwarf_cie *cached_cie; 47static struct dwarf_cie *cached_cie;
35 48
36/* 49/**
37 * Figure out whether we need to allocate some dwarf registers. If dwarf 50 * dwarf_frame_alloc_reg - allocate memory for a DWARF register
38 * registers have already been allocated then we may need to realloc 51 * @frame: the DWARF frame whose list of registers we insert on
39 * them. "reg" is a register number that we need to be able to access 52 * @reg_num: the register number
40 * after this call. 53 *
54 * Allocate space for, and initialise, a dwarf reg from
55 * dwarf_reg_pool and insert it onto the (unsorted) linked-list of
56 * dwarf registers for @frame.
41 * 57 *
42 * Register numbers start at zero, therefore we need to allocate space 58 * Return the initialised DWARF reg.
43 * for "reg" + 1 registers.
44 */ 59 */
45static void dwarf_frame_alloc_regs(struct dwarf_frame *frame, 60static struct dwarf_reg *dwarf_frame_alloc_reg(struct dwarf_frame *frame,
46 unsigned int reg) 61 unsigned int reg_num)
47{ 62{
48 struct dwarf_reg *regs; 63 struct dwarf_reg *reg;
49 unsigned int num_regs = reg + 1;
50 size_t new_size;
51 size_t old_size;
52
53 new_size = num_regs * sizeof(*regs);
54 old_size = frame->num_regs * sizeof(*regs);
55 64
56 /* Fast path: don't allocate any regs if we've already got enough. */ 65 reg = mempool_alloc(dwarf_reg_pool, GFP_ATOMIC);
57 if (frame->num_regs >= num_regs) 66 if (!reg) {
58 return; 67 printk(KERN_WARNING "Unable to allocate a DWARF register\n");
59
60 regs = kzalloc(new_size, GFP_ATOMIC);
61 if (!regs) {
62 printk(KERN_WARNING "Unable to allocate DWARF registers\n");
63 /* 68 /*
64 * Let's just bomb hard here, we have no way to 69 * Let's just bomb hard here, we have no way to
65 * gracefully recover. 70 * gracefully recover.
66 */ 71 */
67 BUG(); 72 UNWINDER_BUG();
73 }
74
75 reg->number = reg_num;
76 reg->addr = 0;
77 reg->flags = 0;
78
79 list_add(&reg->link, &frame->reg_list);
80
81 return reg;
82}
83
84static void dwarf_frame_free_regs(struct dwarf_frame *frame)
85{
86 struct dwarf_reg *reg, *n;
87
88 list_for_each_entry_safe(reg, n, &frame->reg_list, link) {
89 list_del(&reg->link);
90 mempool_free(reg, dwarf_reg_pool);
68 } 91 }
92}
93
94/**
95 * dwarf_frame_reg - return a DWARF register
96 * @frame: the DWARF frame to search in for @reg_num
97 * @reg_num: the register number to search for
98 *
99 * Lookup and return the dwarf reg @reg_num for this frame. Return
100 * NULL if @reg_num is an register invalid number.
101 */
102static struct dwarf_reg *dwarf_frame_reg(struct dwarf_frame *frame,
103 unsigned int reg_num)
104{
105 struct dwarf_reg *reg;
69 106
70 if (frame->regs) { 107 list_for_each_entry(reg, &frame->reg_list, link) {
71 memcpy(regs, frame->regs, old_size); 108 if (reg->number == reg_num)
72 kfree(frame->regs); 109 return reg;
73 } 110 }
74 111
75 frame->regs = regs; 112 return NULL;
76 frame->num_regs = num_regs;
77} 113}
78 114
79/** 115/**
@@ -196,7 +232,7 @@ static int dwarf_read_encoded_value(char *addr, unsigned long *val,
196 break; 232 break;
197 default: 233 default:
198 pr_debug("encoding=0x%x\n", (encoding & 0x70)); 234 pr_debug("encoding=0x%x\n", (encoding & 0x70));
199 BUG(); 235 UNWINDER_BUG();
200 } 236 }
201 237
202 if ((encoding & 0x07) == 0x00) 238 if ((encoding & 0x07) == 0x00)
@@ -211,7 +247,7 @@ static int dwarf_read_encoded_value(char *addr, unsigned long *val,
211 break; 247 break;
212 default: 248 default:
213 pr_debug("encoding=0x%x\n", encoding); 249 pr_debug("encoding=0x%x\n", encoding);
214 BUG(); 250 UNWINDER_BUG();
215 } 251 }
216 252
217 return count; 253 return count;
@@ -264,7 +300,7 @@ static inline int dwarf_entry_len(char *addr, unsigned long *len)
264 */ 300 */
265static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr) 301static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
266{ 302{
267 struct dwarf_cie *cie, *n; 303 struct dwarf_cie *cie;
268 unsigned long flags; 304 unsigned long flags;
269 305
270 spin_lock_irqsave(&dwarf_cie_lock, flags); 306 spin_lock_irqsave(&dwarf_cie_lock, flags);
@@ -278,7 +314,7 @@ static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
278 goto out; 314 goto out;
279 } 315 }
280 316
281 list_for_each_entry_safe(cie, n, &dwarf_cie_list, link) { 317 list_for_each_entry(cie, &dwarf_cie_list, link) {
282 if (cie->cie_pointer == cie_ptr) { 318 if (cie->cie_pointer == cie_ptr) {
283 cached_cie = cie; 319 cached_cie = cie;
284 break; 320 break;
@@ -299,11 +335,12 @@ out:
299 */ 335 */
300struct dwarf_fde *dwarf_lookup_fde(unsigned long pc) 336struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
301{ 337{
338 struct dwarf_fde *fde;
302 unsigned long flags; 339 unsigned long flags;
303 struct dwarf_fde *fde, *n;
304 340
305 spin_lock_irqsave(&dwarf_fde_lock, flags); 341 spin_lock_irqsave(&dwarf_fde_lock, flags);
306 list_for_each_entry_safe(fde, n, &dwarf_fde_list, link) { 342
343 list_for_each_entry(fde, &dwarf_fde_list, link) {
307 unsigned long start, end; 344 unsigned long start, end;
308 345
309 start = fde->initial_location; 346 start = fde->initial_location;
@@ -346,6 +383,7 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
346 unsigned char insn; 383 unsigned char insn;
347 unsigned char *current_insn; 384 unsigned char *current_insn;
348 unsigned int count, delta, reg, expr_len, offset; 385 unsigned int count, delta, reg, expr_len, offset;
386 struct dwarf_reg *regp;
349 387
350 current_insn = insn_start; 388 current_insn = insn_start;
351 389
@@ -368,9 +406,9 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
368 count = dwarf_read_uleb128(current_insn, &offset); 406 count = dwarf_read_uleb128(current_insn, &offset);
369 current_insn += count; 407 current_insn += count;
370 offset *= cie->data_alignment_factor; 408 offset *= cie->data_alignment_factor;
371 dwarf_frame_alloc_regs(frame, reg); 409 regp = dwarf_frame_alloc_reg(frame, reg);
372 frame->regs[reg].addr = offset; 410 regp->addr = offset;
373 frame->regs[reg].flags |= DWARF_REG_OFFSET; 411 regp->flags |= DWARF_REG_OFFSET;
374 continue; 412 continue;
375 /* NOTREACHED */ 413 /* NOTREACHED */
376 case DW_CFA_restore: 414 case DW_CFA_restore:
@@ -414,6 +452,8 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
414 case DW_CFA_undefined: 452 case DW_CFA_undefined:
415 count = dwarf_read_uleb128(current_insn, &reg); 453 count = dwarf_read_uleb128(current_insn, &reg);
416 current_insn += count; 454 current_insn += count;
455 regp = dwarf_frame_alloc_reg(frame, reg);
456 regp->flags |= DWARF_UNDEFINED;
417 break; 457 break;
418 case DW_CFA_def_cfa: 458 case DW_CFA_def_cfa:
419 count = dwarf_read_uleb128(current_insn, 459 count = dwarf_read_uleb128(current_insn,
@@ -452,17 +492,18 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
452 count = dwarf_read_leb128(current_insn, &offset); 492 count = dwarf_read_leb128(current_insn, &offset);
453 current_insn += count; 493 current_insn += count;
454 offset *= cie->data_alignment_factor; 494 offset *= cie->data_alignment_factor;
455 dwarf_frame_alloc_regs(frame, reg); 495 regp = dwarf_frame_alloc_reg(frame, reg);
456 frame->regs[reg].flags |= DWARF_REG_OFFSET; 496 regp->flags |= DWARF_REG_OFFSET;
457 frame->regs[reg].addr = offset; 497 regp->addr = offset;
458 break; 498 break;
459 case DW_CFA_val_offset: 499 case DW_CFA_val_offset:
460 count = dwarf_read_uleb128(current_insn, &reg); 500 count = dwarf_read_uleb128(current_insn, &reg);
461 current_insn += count; 501 current_insn += count;
462 count = dwarf_read_leb128(current_insn, &offset); 502 count = dwarf_read_leb128(current_insn, &offset);
463 offset *= cie->data_alignment_factor; 503 offset *= cie->data_alignment_factor;
464 frame->regs[reg].flags |= DWARF_REG_OFFSET; 504 regp = dwarf_frame_alloc_reg(frame, reg);
465 frame->regs[reg].addr = offset; 505 regp->flags |= DWARF_VAL_OFFSET;
506 regp->addr = offset;
466 break; 507 break;
467 case DW_CFA_GNU_args_size: 508 case DW_CFA_GNU_args_size:
468 count = dwarf_read_uleb128(current_insn, &offset); 509 count = dwarf_read_uleb128(current_insn, &offset);
@@ -473,12 +514,14 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
473 current_insn += count; 514 current_insn += count;
474 count = dwarf_read_uleb128(current_insn, &offset); 515 count = dwarf_read_uleb128(current_insn, &offset);
475 offset *= cie->data_alignment_factor; 516 offset *= cie->data_alignment_factor;
476 dwarf_frame_alloc_regs(frame, reg); 517
477 frame->regs[reg].flags |= DWARF_REG_OFFSET; 518 regp = dwarf_frame_alloc_reg(frame, reg);
478 frame->regs[reg].addr = -offset; 519 regp->flags |= DWARF_REG_OFFSET;
520 regp->addr = -offset;
479 break; 521 break;
480 default: 522 default:
481 pr_debug("unhandled DWARF instruction 0x%x\n", insn); 523 pr_debug("unhandled DWARF instruction 0x%x\n", insn);
524 UNWINDER_BUG();
482 break; 525 break;
483 } 526 }
484 } 527 }
@@ -495,14 +538,14 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
495 * on the callstack. Each of the lower (older) stack frames are 538 * on the callstack. Each of the lower (older) stack frames are
496 * linked via the "prev" member. 539 * linked via the "prev" member.
497 */ 540 */
498struct dwarf_frame *dwarf_unwind_stack(unsigned long pc, 541struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
499 struct dwarf_frame *prev) 542 struct dwarf_frame *prev)
500{ 543{
501 struct dwarf_frame *frame; 544 struct dwarf_frame *frame;
502 struct dwarf_cie *cie; 545 struct dwarf_cie *cie;
503 struct dwarf_fde *fde; 546 struct dwarf_fde *fde;
547 struct dwarf_reg *reg;
504 unsigned long addr; 548 unsigned long addr;
505 int i, offset;
506 549
507 /* 550 /*
508 * If this is the first invocation of this recursive function we 551 * If this is the first invocation of this recursive function we
@@ -515,11 +558,16 @@ struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
515 if (!pc && !prev) 558 if (!pc && !prev)
516 pc = (unsigned long)current_text_addr(); 559 pc = (unsigned long)current_text_addr();
517 560
518 frame = kzalloc(sizeof(*frame), GFP_ATOMIC); 561 frame = mempool_alloc(dwarf_frame_pool, GFP_ATOMIC);
519 if (!frame) 562 if (!frame) {
520 return NULL; 563 printk(KERN_ERR "Unable to allocate a dwarf frame\n");
564 UNWINDER_BUG();
565 }
521 566
567 INIT_LIST_HEAD(&frame->reg_list);
568 frame->flags = 0;
522 frame->prev = prev; 569 frame->prev = prev;
570 frame->return_addr = 0;
523 571
524 fde = dwarf_lookup_fde(pc); 572 fde = dwarf_lookup_fde(pc);
525 if (!fde) { 573 if (!fde) {
@@ -539,7 +587,7 @@ struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
539 * case above, which sucks because we could print a 587 * case above, which sucks because we could print a
540 * warning here. 588 * warning here.
541 */ 589 */
542 return NULL; 590 goto bail;
543 } 591 }
544 592
545 cie = dwarf_lookup_cie(fde->cie_pointer); 593 cie = dwarf_lookup_cie(fde->cie_pointer);
@@ -559,10 +607,11 @@ struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
559 switch (frame->flags) { 607 switch (frame->flags) {
560 case DWARF_FRAME_CFA_REG_OFFSET: 608 case DWARF_FRAME_CFA_REG_OFFSET:
561 if (prev) { 609 if (prev) {
562 BUG_ON(!prev->regs[frame->cfa_register].flags); 610 reg = dwarf_frame_reg(prev, frame->cfa_register);
611 UNWINDER_BUG_ON(!reg);
612 UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
563 613
564 addr = prev->cfa; 614 addr = prev->cfa + reg->addr;
565 addr += prev->regs[frame->cfa_register].addr;
566 frame->cfa = __raw_readl(addr); 615 frame->cfa = __raw_readl(addr);
567 616
568 } else { 617 } else {
@@ -579,27 +628,30 @@ struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
579 frame->cfa += frame->cfa_offset; 628 frame->cfa += frame->cfa_offset;
580 break; 629 break;
581 default: 630 default:
582 BUG(); 631 UNWINDER_BUG();
583 } 632 }
584 633
585 /* If we haven't seen the return address reg, we're screwed. */ 634 reg = dwarf_frame_reg(frame, DWARF_ARCH_RA_REG);
586 BUG_ON(!frame->regs[DWARF_ARCH_RA_REG].flags);
587
588 for (i = 0; i <= frame->num_regs; i++) {
589 struct dwarf_reg *reg = &frame->regs[i];
590 635
591 if (!reg->flags) 636 /*
592 continue; 637 * If we haven't seen the return address register or the return
638 * address column is undefined then we must assume that this is
639 * the end of the callstack.
640 */
641 if (!reg || reg->flags == DWARF_UNDEFINED)
642 goto bail;
593 643
594 offset = reg->addr; 644 UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
595 offset += frame->cfa;
596 }
597 645
598 addr = frame->cfa + frame->regs[DWARF_ARCH_RA_REG].addr; 646 addr = frame->cfa + reg->addr;
599 frame->return_addr = __raw_readl(addr); 647 frame->return_addr = __raw_readl(addr);
600 648
601 frame->next = dwarf_unwind_stack(frame->return_addr, frame);
602 return frame; 649 return frame;
650
651bail:
652 dwarf_frame_free_regs(frame);
653 mempool_free(frame, dwarf_frame_pool);
654 return NULL;
603} 655}
604 656
605static int dwarf_parse_cie(void *entry, void *p, unsigned long len, 657static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
@@ -624,7 +676,7 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
624 cie->cie_pointer = (unsigned long)entry; 676 cie->cie_pointer = (unsigned long)entry;
625 677
626 cie->version = *(char *)p++; 678 cie->version = *(char *)p++;
627 BUG_ON(cie->version != 1); 679 UNWINDER_BUG_ON(cie->version != 1);
628 680
629 cie->augmentation = p; 681 cie->augmentation = p;
630 p += strlen(cie->augmentation) + 1; 682 p += strlen(cie->augmentation) + 1;
@@ -654,7 +706,7 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
654 count = dwarf_read_uleb128(p, &length); 706 count = dwarf_read_uleb128(p, &length);
655 p += count; 707 p += count;
656 708
657 BUG_ON((unsigned char *)p > end); 709 UNWINDER_BUG_ON((unsigned char *)p > end);
658 710
659 cie->initial_instructions = p + length; 711 cie->initial_instructions = p + length;
660 cie->augmentation++; 712 cie->augmentation++;
@@ -682,16 +734,16 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
682 * routine in the CIE 734 * routine in the CIE
683 * augmentation. 735 * augmentation.
684 */ 736 */
685 BUG(); 737 UNWINDER_BUG();
686 } else if (*cie->augmentation == 'S') { 738 } else if (*cie->augmentation == 'S') {
687 BUG(); 739 UNWINDER_BUG();
688 } else { 740 } else {
689 /* 741 /*
690 * Unknown augmentation. Assume 742 * Unknown augmentation. Assume
691 * 'z' augmentation. 743 * 'z' augmentation.
692 */ 744 */
693 p = cie->initial_instructions; 745 p = cie->initial_instructions;
694 BUG_ON(!p); 746 UNWINDER_BUG_ON(!p);
695 break; 747 break;
696 } 748 }
697 } 749 }
@@ -708,7 +760,8 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
708} 760}
709 761
710static int dwarf_parse_fde(void *entry, u32 entry_type, 762static int dwarf_parse_fde(void *entry, u32 entry_type,
711 void *start, unsigned long len) 763 void *start, unsigned long len,
764 unsigned char *end)
712{ 765{
713 struct dwarf_fde *fde; 766 struct dwarf_fde *fde;
714 struct dwarf_cie *cie; 767 struct dwarf_cie *cie;
@@ -755,7 +808,7 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
755 808
756 /* Call frame instructions. */ 809 /* Call frame instructions. */
757 fde->instructions = p; 810 fde->instructions = p;
758 fde->end = start + len; 811 fde->end = end;
759 812
760 /* Add to list. */ 813 /* Add to list. */
761 spin_lock_irqsave(&dwarf_fde_lock, flags); 814 spin_lock_irqsave(&dwarf_fde_lock, flags);
@@ -765,17 +818,33 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
765 return 0; 818 return 0;
766} 819}
767 820
768static void dwarf_unwinder_dump(struct task_struct *task, struct pt_regs *regs, 821static void dwarf_unwinder_dump(struct task_struct *task,
822 struct pt_regs *regs,
769 unsigned long *sp, 823 unsigned long *sp,
770 const struct stacktrace_ops *ops, void *data) 824 const struct stacktrace_ops *ops,
825 void *data)
771{ 826{
772 struct dwarf_frame *frame; 827 struct dwarf_frame *frame, *_frame;
828 unsigned long return_addr;
773 829
774 frame = dwarf_unwind_stack(0, NULL); 830 _frame = NULL;
831 return_addr = 0;
832
833 while (1) {
834 frame = dwarf_unwind_stack(return_addr, _frame);
835
836 if (_frame) {
837 dwarf_frame_free_regs(_frame);
838 mempool_free(_frame, dwarf_frame_pool);
839 }
840
841 _frame = frame;
842
843 if (!frame || !frame->return_addr)
844 break;
775 845
776 while (frame && frame->return_addr) { 846 return_addr = frame->return_addr;
777 ops->address(data, frame->return_addr, 1); 847 ops->address(data, return_addr, 1);
778 frame = frame->next;
779 } 848 }
780} 849}
781 850
@@ -787,24 +856,22 @@ static struct unwinder dwarf_unwinder = {
787 856
788static void dwarf_unwinder_cleanup(void) 857static void dwarf_unwinder_cleanup(void)
789{ 858{
790 struct dwarf_cie *cie, *m; 859 struct dwarf_cie *cie;
791 struct dwarf_fde *fde, *n; 860 struct dwarf_fde *fde;
792 unsigned long flags;
793 861
794 /* 862 /*
795 * Deallocate all the memory allocated for the DWARF unwinder. 863 * Deallocate all the memory allocated for the DWARF unwinder.
796 * Traverse all the FDE/CIE lists and remove and free all the 864 * Traverse all the FDE/CIE lists and remove and free all the
797 * memory associated with those data structures. 865 * memory associated with those data structures.
798 */ 866 */
799 spin_lock_irqsave(&dwarf_cie_lock, flags); 867 list_for_each_entry(cie, &dwarf_cie_list, link)
800 list_for_each_entry_safe(cie, m, &dwarf_cie_list, link)
801 kfree(cie); 868 kfree(cie);
802 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
803 869
804 spin_lock_irqsave(&dwarf_fde_lock, flags); 870 list_for_each_entry(fde, &dwarf_fde_list, link)
805 list_for_each_entry_safe(fde, n, &dwarf_fde_list, link)
806 kfree(fde); 871 kfree(fde);
807 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 872
873 kmem_cache_destroy(dwarf_reg_cachep);
874 kmem_cache_destroy(dwarf_frame_cachep);
808} 875}
809 876
810/** 877/**
@@ -816,11 +883,11 @@ static void dwarf_unwinder_cleanup(void)
816 * easy to lookup the FDE for a given PC, so we build a list of FDE 883 * easy to lookup the FDE for a given PC, so we build a list of FDE
817 * and CIE entries that make it easier. 884 * and CIE entries that make it easier.
818 */ 885 */
819void dwarf_unwinder_init(void) 886static int __init dwarf_unwinder_init(void)
820{ 887{
821 u32 entry_type; 888 u32 entry_type;
822 void *p, *entry; 889 void *p, *entry;
823 int count, err; 890 int count, err = 0;
824 unsigned long len; 891 unsigned long len;
825 unsigned int c_entries, f_entries; 892 unsigned int c_entries, f_entries;
826 unsigned char *end; 893 unsigned char *end;
@@ -831,6 +898,24 @@ void dwarf_unwinder_init(void)
831 f_entries = 0; 898 f_entries = 0;
832 entry = &__start_eh_frame; 899 entry = &__start_eh_frame;
833 900
901 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
902 sizeof(struct dwarf_frame), 0,
903 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
904
905 dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
906 sizeof(struct dwarf_reg), 0,
907 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
908
909 dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
910 mempool_alloc_slab,
911 mempool_free_slab,
912 dwarf_frame_cachep);
913
914 dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
915 mempool_alloc_slab,
916 mempool_free_slab,
917 dwarf_reg_cachep);
918
834 while ((char *)entry < __stop_eh_frame) { 919 while ((char *)entry < __stop_eh_frame) {
835 p = entry; 920 p = entry;
836 921
@@ -860,7 +945,7 @@ void dwarf_unwinder_init(void)
860 else 945 else
861 c_entries++; 946 c_entries++;
862 } else { 947 } else {
863 err = dwarf_parse_fde(entry, entry_type, p, len); 948 err = dwarf_parse_fde(entry, entry_type, p, len, end);
864 if (err < 0) 949 if (err < 0)
865 goto out; 950 goto out;
866 else 951 else
@@ -877,9 +962,11 @@ void dwarf_unwinder_init(void)
877 if (err) 962 if (err)
878 goto out; 963 goto out;
879 964
880 return; 965 return 0;
881 966
882out: 967out:
883 printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err); 968 printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err);
884 dwarf_unwinder_cleanup(); 969 dwarf_unwinder_cleanup();
970 return -EINVAL;
885} 971}
972early_initcall(dwarf_unwinder_init);
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 700477601c6..68d9223b145 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -98,8 +98,9 @@ need_resched:
98 98
99 mov #OFF_SR, r0 99 mov #OFF_SR, r0
100 mov.l @(r0,r15), r0 ! get status register 100 mov.l @(r0,r15), r0 ! get status register
101 and #0xf0, r0 ! interrupts off (exception path)? 101 shlr r0
102 cmp/eq #0xf0, r0 102 and #(0xf0>>1), r0 ! interrupts off (exception path)?
103 cmp/eq #(0xf0>>1), r0
103 bt noresched 104 bt noresched
104 mov.l 3f, r0 105 mov.l 3f, r0
105 jsr @r0 ! call preempt_schedule_irq 106 jsr @r0 ! call preempt_schedule_irq
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 6647dfcb781..a3dcc6d5d25 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -283,8 +283,6 @@ static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
283 return NULL; 283 return NULL;
284} 284}
285 285
286#define FTRACE_SYSCALL_MAX (NR_syscalls - 1)
287
288struct syscall_metadata *syscall_nr_to_meta(int nr) 286struct syscall_metadata *syscall_nr_to_meta(int nr)
289{ 287{
290 if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0) 288 if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c
index 4f85fffaa55..4770c241c67 100644
--- a/arch/sh/kernel/io.c
+++ b/arch/sh/kernel/io.c
@@ -1,12 +1,9 @@
1/* 1/*
2 * linux/arch/sh/kernel/io.c 2 * arch/sh/kernel/io.c - Machine independent I/O functions.
3 * 3 *
4 * Copyright (C) 2000 Stuart Menefy 4 * Copyright (C) 2000 - 2009 Stuart Menefy
5 * Copyright (C) 2005 Paul Mundt 5 * Copyright (C) 2005 Paul Mundt
6 * 6 *
7 * Provide real functions which expand to whatever the header file defined.
8 * Also definitions of machine independent IO functions.
9 *
10 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
12 * for more details. 9 * for more details.
@@ -18,33 +15,87 @@
18 15
19/* 16/*
20 * Copy data from IO memory space to "real" memory space. 17 * Copy data from IO memory space to "real" memory space.
21 * This needs to be optimized.
22 */ 18 */
23void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned long count) 19void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned long count)
24{ 20{
25 unsigned char *p = to; 21 /*
26 while (count) { 22 * Would it be worthwhile doing byte and long transfers first
27 count--; 23 * to try and get aligned?
28 *p = readb(from); 24 */
29 p++; 25#ifdef CONFIG_CPU_SH4
30 from++; 26 if ((count >= 0x20) &&
31 } 27 (((u32)to & 0x1f) == 0) && (((u32)from & 0x3) == 0)) {
28 int tmp2, tmp3, tmp4, tmp5, tmp6;
29
30 __asm__ __volatile__(
31 "1: \n\t"
32 "mov.l @%7+, r0 \n\t"
33 "mov.l @%7+, %2 \n\t"
34 "movca.l r0, @%0 \n\t"
35 "mov.l @%7+, %3 \n\t"
36 "mov.l @%7+, %4 \n\t"
37 "mov.l @%7+, %5 \n\t"
38 "mov.l @%7+, %6 \n\t"
39 "mov.l @%7+, r7 \n\t"
40 "mov.l @%7+, r0 \n\t"
41 "mov.l %2, @(0x04,%0) \n\t"
42 "mov #0x20, %2 \n\t"
43 "mov.l %3, @(0x08,%0) \n\t"
44 "sub %2, %1 \n\t"
45 "mov.l %4, @(0x0c,%0) \n\t"
46 "cmp/hi %1, %2 ! T if 32 > count \n\t"
47 "mov.l %5, @(0x10,%0) \n\t"
48 "mov.l %6, @(0x14,%0) \n\t"
49 "mov.l r7, @(0x18,%0) \n\t"
50 "mov.l r0, @(0x1c,%0) \n\t"
51 "bf.s 1b \n\t"
52 " add #0x20, %0 \n\t"
53 : "=&r" (to), "=&r" (count),
54 "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
55 "=&r" (tmp5), "=&r" (tmp6), "=&r" (from)
56 : "7"(from), "0" (to), "1" (count)
57 : "r0", "r7", "t", "memory");
58 }
59#endif
60
61 if ((((u32)to | (u32)from) & 0x3) == 0) {
62 for (; count > 3; count -= 4) {
63 *(u32 *)to = *(volatile u32 *)from;
64 to += 4;
65 from += 4;
66 }
67 }
68
69 for (; count > 0; count--) {
70 *(u8 *)to = *(volatile u8 *)from;
71 to++;
72 from++;
73 }
74
75 mb();
32} 76}
33EXPORT_SYMBOL(memcpy_fromio); 77EXPORT_SYMBOL(memcpy_fromio);
34 78
35/* 79/*
36 * Copy data from "real" memory space to IO memory space. 80 * Copy data from "real" memory space to IO memory space.
37 * This needs to be optimized.
38 */ 81 */
39void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count) 82void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count)
40{ 83{
41 const unsigned char *p = from; 84 if ((((u32)to | (u32)from) & 0x3) == 0) {
42 while (count) { 85 for ( ; count > 3; count -= 4) {
43 count--; 86 *(volatile u32 *)to = *(u32 *)from;
44 writeb(*p, to); 87 to += 4;
45 p++; 88 from += 4;
46 to++; 89 }
47 } 90 }
91
92 for (; count > 0; count--) {
93 *(volatile u8 *)to = *(u8 *)from;
94 to++;
95 from++;
96 }
97
98 mb();
48} 99}
49EXPORT_SYMBOL(memcpy_toio); 100EXPORT_SYMBOL(memcpy_toio);
50 101
@@ -62,6 +113,8 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count)
62} 113}
63EXPORT_SYMBOL(memset_io); 114EXPORT_SYMBOL(memset_io);
64 115
116#ifndef CONFIG_GENERIC_IOMAP
117
65void __iomem *ioport_map(unsigned long port, unsigned int nr) 118void __iomem *ioport_map(unsigned long port, unsigned int nr)
66{ 119{
67 void __iomem *ret; 120 void __iomem *ret;
@@ -79,3 +132,5 @@ void ioport_unmap(void __iomem *addr)
79 sh_mv.mv_ioport_unmap(addr); 132 sh_mv.mv_ioport_unmap(addr);
80} 133}
81EXPORT_SYMBOL(ioport_unmap); 134EXPORT_SYMBOL(ioport_unmap);
135
136#endif /* CONFIG_GENERIC_IOMAP */
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index 5a7f554d9ca..4ff50723928 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -73,35 +73,19 @@ u32 generic_inl_p(unsigned long port)
73 73
74void generic_insb(unsigned long port, void *dst, unsigned long count) 74void generic_insb(unsigned long port, void *dst, unsigned long count)
75{ 75{
76 volatile u8 *port_addr; 76 __raw_readsb(__ioport_map(port, 1), dst, count);
77 u8 *buf = dst; 77 dummy_read();
78
79 port_addr = (volatile u8 __force *)__ioport_map(port, 1);
80 while (count--)
81 *buf++ = *port_addr;
82} 78}
83 79
84void generic_insw(unsigned long port, void *dst, unsigned long count) 80void generic_insw(unsigned long port, void *dst, unsigned long count)
85{ 81{
86 volatile u16 *port_addr; 82 __raw_readsw(__ioport_map(port, 2), dst, count);
87 u16 *buf = dst;
88
89 port_addr = (volatile u16 __force *)__ioport_map(port, 2);
90 while (count--)
91 *buf++ = *port_addr;
92
93 dummy_read(); 83 dummy_read();
94} 84}
95 85
96void generic_insl(unsigned long port, void *dst, unsigned long count) 86void generic_insl(unsigned long port, void *dst, unsigned long count)
97{ 87{
98 volatile u32 *port_addr; 88 __raw_readsl(__ioport_map(port, 4), dst, count);
99 u32 *buf = dst;
100
101 port_addr = (volatile u32 __force *)__ioport_map(port, 4);
102 while (count--)
103 *buf++ = *port_addr;
104
105 dummy_read(); 89 dummy_read();
106} 90}
107 91
@@ -145,37 +129,19 @@ void generic_outl_p(u32 b, unsigned long port)
145 */ 129 */
146void generic_outsb(unsigned long port, const void *src, unsigned long count) 130void generic_outsb(unsigned long port, const void *src, unsigned long count)
147{ 131{
148 volatile u8 *port_addr; 132 __raw_writesb(__ioport_map(port, 1), src, count);
149 const u8 *buf = src; 133 dummy_read();
150
151 port_addr = (volatile u8 __force *)__ioport_map(port, 1);
152
153 while (count--)
154 *port_addr = *buf++;
155} 134}
156 135
157void generic_outsw(unsigned long port, const void *src, unsigned long count) 136void generic_outsw(unsigned long port, const void *src, unsigned long count)
158{ 137{
159 volatile u16 *port_addr; 138 __raw_writesw(__ioport_map(port, 2), src, count);
160 const u16 *buf = src;
161
162 port_addr = (volatile u16 __force *)__ioport_map(port, 2);
163
164 while (count--)
165 *port_addr = *buf++;
166
167 dummy_read(); 139 dummy_read();
168} 140}
169 141
170void generic_outsl(unsigned long port, const void *src, unsigned long count) 142void generic_outsl(unsigned long port, const void *src, unsigned long count)
171{ 143{
172 volatile u32 *port_addr; 144 __raw_writesl(__ioport_map(port, 4), src, count);
173 const u32 *buf = src;
174
175 port_addr = (volatile u32 __force *)__ioport_map(port, 4);
176 while (count--)
177 *port_addr = *buf++;
178
179 dummy_read(); 145 dummy_read();
180} 146}
181 147
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index e27a19e1f46..69be603aa2d 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -284,7 +284,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address)
284 return 0; 284 return 0;
285 } 285 }
286 286
287 tmp = handle_unaligned_access(instruction, regs, &trapped_io_access); 287 tmp = handle_unaligned_access(instruction, regs,
288 &trapped_io_access, 1);
288 set_fs(oldfs); 289 set_fs(oldfs);
289 return tmp == 0; 290 return tmp == 0;
290} 291}
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 2bb43dc74f2..d1053392e28 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -14,7 +14,6 @@
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/machvec.h> 15#include <asm/machvec.h>
16#include <asm/uaccess.h> 16#include <asm/uaccess.h>
17#include <asm/dwarf.h>
18#include <asm/thread_info.h> 17#include <asm/thread_info.h>
19#include <cpu/mmu_context.h> 18#include <cpu/mmu_context.h>
20 19
@@ -115,7 +114,7 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
115#endif 114#endif
116 115
117 irq_enter(); 116 irq_enter();
118 irq = irq_demux(intc_evt2irq(irq)); 117 irq = irq_demux(evt2irq(irq));
119 118
120#ifdef CONFIG_IRQSTACKS 119#ifdef CONFIG_IRQSTACKS
121 curctx = (union irq_ctx *)current_thread_info(); 120 curctx = (union irq_ctx *)current_thread_info();
@@ -262,9 +261,6 @@ void __init init_IRQ(void)
262 sh_mv.mv_init_irq(); 261 sh_mv.mv_init_irq();
263 262
264 irq_ctx_init(smp_processor_id()); 263 irq_ctx_init(smp_processor_id());
265
266 /* This needs to be early, but not too early.. */
267 dwarf_unwinder_init();
268} 264}
269 265
270#ifdef CONFIG_SPARSE_IRQ 266#ifdef CONFIG_SPARSE_IRQ
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 305aad742ae..d29de7864f3 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -195,8 +195,6 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
195 regs->gbr = gdb_regs[GDB_GBR]; 195 regs->gbr = gdb_regs[GDB_GBR];
196 regs->mach = gdb_regs[GDB_MACH]; 196 regs->mach = gdb_regs[GDB_MACH];
197 regs->macl = gdb_regs[GDB_MACL]; 197 regs->macl = gdb_regs[GDB_MACL];
198
199 __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR]));
200} 198}
201 199
202void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) 200void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 9fee977f176..0673c4746be 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -32,15 +32,35 @@
32#include <asm/ubc.h> 32#include <asm/ubc.h>
33#include <asm/fpu.h> 33#include <asm/fpu.h>
34#include <asm/syscalls.h> 34#include <asm/syscalls.h>
35#include <asm/watchdog.h>
35 36
36int ubc_usercnt = 0; 37int ubc_usercnt = 0;
37 38
39#ifdef CONFIG_32BIT
40static void watchdog_trigger_immediate(void)
41{
42 sh_wdt_write_cnt(0xFF);
43 sh_wdt_write_csr(0xC2);
44}
45
46void machine_restart(char * __unused)
47{
48 local_irq_disable();
49
50 /* Use watchdog timer to trigger reset */
51 watchdog_trigger_immediate();
52
53 while (1)
54 cpu_sleep();
55}
56#else
38void machine_restart(char * __unused) 57void machine_restart(char * __unused)
39{ 58{
40 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ 59 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
41 asm volatile("ldc %0, sr\n\t" 60 asm volatile("ldc %0, sr\n\t"
42 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); 61 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
43} 62}
63#endif
44 64
45void machine_halt(void) 65void machine_halt(void)
46{ 66{
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index c198eceaee9..f4f58e438a2 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -461,8 +461,10 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
461 */ 461 */
462 ret = -1L; 462 ret = -1L;
463 463
464#ifdef CONFIG_FTRACE_SYSCALLS
464 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE))) 465 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
465 ftrace_syscall_enter(regs); 466 ftrace_syscall_enter(regs);
467#endif
466 468
467 if (unlikely(current->audit_context)) 469 if (unlikely(current->audit_context))
468 audit_syscall_entry(audit_arch(), regs->regs[3], 470 audit_syscall_entry(audit_arch(), regs->regs[3],
@@ -480,8 +482,10 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
480 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), 482 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
481 regs->regs[0]); 483 regs->regs[0]);
482 484
485#ifdef CONFIG_FTRACE_SYSCALLS
483 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE))) 486 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
484 ftrace_syscall_exit(regs); 487 ftrace_syscall_exit(regs);
488#endif
485 489
486 step = test_thread_flag(TIF_SINGLESTEP); 490 step = test_thread_flag(TIF_SINGLESTEP);
487 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) 491 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index dc403e42bca..f9d44f8e0df 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -405,10 +405,14 @@ void __init setup_arch(char **cmdline_p)
405 if (!memory_end) 405 if (!memory_end)
406 memory_end = memory_start + __MEMORY_SIZE; 406 memory_end = memory_start + __MEMORY_SIZE;
407 407
408#ifdef CONFIG_CMDLINE_BOOL 408#ifdef CONFIG_CMDLINE_OVERWRITE
409 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); 409 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
410#else 410#else
411 strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); 411 strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
412#ifdef CONFIG_CMDLINE_EXTEND
413 strlcat(command_line, " ", sizeof(command_line));
414 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
415#endif
412#endif 416#endif
413 417
414 /* Save unparsed command line copy for /proc/cmdline */ 418 /* Save unparsed command line copy for /proc/cmdline */
@@ -482,7 +486,7 @@ static const char *cpu_name[] = {
482 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", 486 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
483 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", 487 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
484 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", 488 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
485 [CPU_SH7786] = "SH7786", 489 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
486 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", 490 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
487 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", 491 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
488 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", 492 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index b5afbec1db5..6010750c90b 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -41,6 +41,16 @@ struct fdpic_func_descriptor {
41}; 41};
42 42
43/* 43/*
44 * The following define adds a 64 byte gap between the signal
45 * stack frame and previous contents of the stack. This allows
46 * frame unwinding in a function epilogue but only if a frame
47 * pointer is used in the function. This is necessary because
48 * current gcc compilers (<4.3) do not generate unwind info on
49 * SH for function epilogues.
50 */
51#define UNWINDGUARD 64
52
53/*
44 * Atomically swap in the new signal mask, and wait for a signal. 54 * Atomically swap in the new signal mask, and wait for a signal.
45 */ 55 */
46asmlinkage int 56asmlinkage int
@@ -327,7 +337,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
327 sp = current->sas_ss_sp + current->sas_ss_size; 337 sp = current->sas_ss_sp + current->sas_ss_size;
328 } 338 }
329 339
330 return (void __user *)((sp - frame_size) & -8ul); 340 return (void __user *)((sp - (frame_size+UNWINDGUARD)) & -8ul);
331} 341}
332 342
333/* These symbols are defined with the addresses in the vsyscall page. 343/* These symbols are defined with the addresses in the vsyscall page.
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 90d00e47264..8aa5d1ceaf1 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -25,6 +25,8 @@
25#include <asm/syscalls.h> 25#include <asm/syscalls.h>
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/unistd.h> 27#include <asm/unistd.h>
28#include <asm/cacheflush.h>
29#include <asm/cachectl.h>
28 30
29static inline long 31static inline long
30do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
@@ -179,6 +181,47 @@ asmlinkage int sys_ipc(uint call, int first, int second,
179 return -EINVAL; 181 return -EINVAL;
180} 182}
181 183
184/* sys_cacheflush -- flush (part of) the processor cache. */
185asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
186{
187 struct vm_area_struct *vma;
188
189 if ((op <= 0) || (op > (CACHEFLUSH_D_PURGE|CACHEFLUSH_I)))
190 return -EINVAL;
191
192 /*
193 * Verify that the specified address region actually belongs
194 * to this process.
195 */
196 if (addr + len < addr)
197 return -EFAULT;
198
199 down_read(&current->mm->mmap_sem);
200 vma = find_vma (current->mm, addr);
201 if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end) {
202 up_read(&current->mm->mmap_sem);
203 return -EFAULT;
204 }
205
206 switch (op & CACHEFLUSH_D_PURGE) {
207 case CACHEFLUSH_D_INVAL:
208 __flush_invalidate_region((void *)addr, len);
209 break;
210 case CACHEFLUSH_D_WB:
211 __flush_wback_region((void *)addr, len);
212 break;
213 case CACHEFLUSH_D_PURGE:
214 __flush_purge_region((void *)addr, len);
215 break;
216 }
217
218 if (op & CACHEFLUSH_I)
219 flush_cache_all();
220
221 up_read(&current->mm->mmap_sem);
222 return 0;
223}
224
182asmlinkage int sys_uname(struct old_utsname __user *name) 225asmlinkage int sys_uname(struct old_utsname __user *name)
183{ 226{
184 int err; 227 int err;
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index f9e21fa2f59..16ba225ede8 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -139,7 +139,7 @@ ENTRY(sys_call_table)
139 .long sys_clone /* 120 */ 139 .long sys_clone /* 120 */
140 .long sys_setdomainname 140 .long sys_setdomainname
141 .long sys_newuname 141 .long sys_newuname
142 .long sys_ni_syscall /* sys_modify_ldt */ 142 .long sys_cacheflush /* x86: sys_modify_ldt */
143 .long sys_adjtimex 143 .long sys_adjtimex
144 .long sys_mprotect /* 125 */ 144 .long sys_mprotect /* 125 */
145 .long sys_sigprocmask 145 .long sys_sigprocmask
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index bf420b616ae..af6fb7410c2 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -143,7 +143,7 @@ sys_call_table:
143 .long sys_clone /* 120 */ 143 .long sys_clone /* 120 */
144 .long sys_setdomainname 144 .long sys_setdomainname
145 .long sys_newuname 145 .long sys_newuname
146 .long sys_ni_syscall /* sys_modify_ldt */ 146 .long sys_cacheflush /* x86: sys_modify_ldt */
147 .long sys_adjtimex 147 .long sys_adjtimex
148 .long sys_mprotect /* 125 */ 148 .long sys_mprotect /* 125 */
149 .long sys_sigprocmask 149 .long sys_sigprocmask
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index b3e0067db35..f69bd968fcc 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -5,18 +5,32 @@
5#include <linux/signal.h> 5#include <linux/signal.h>
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/uaccess.h> 7#include <linux/uaccess.h>
8#include <asm/unwinder.h>
8#include <asm/system.h> 9#include <asm/system.h>
9 10
10#ifdef CONFIG_BUG 11#ifdef CONFIG_BUG
11static void handle_BUG(struct pt_regs *regs) 12void handle_BUG(struct pt_regs *regs)
12{ 13{
14 const struct bug_entry *bug;
15 unsigned long bugaddr = regs->pc;
13 enum bug_trap_type tt; 16 enum bug_trap_type tt;
14 tt = report_bug(regs->pc, regs); 17
18 if (!is_valid_bugaddr(bugaddr))
19 goto invalid;
20
21 bug = find_bug(bugaddr);
22
23 /* Switch unwinders when unwind_stack() is called */
24 if (bug->flags & BUGFLAG_UNWINDER)
25 unwinder_faulted = 1;
26
27 tt = report_bug(bugaddr, regs);
15 if (tt == BUG_TRAP_TYPE_WARN) { 28 if (tt == BUG_TRAP_TYPE_WARN) {
16 regs->pc += instruction_size(regs->pc); 29 regs->pc += instruction_size(bugaddr);
17 return; 30 return;
18 } 31 }
19 32
33invalid:
20 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); 34 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
21} 35}
22 36
@@ -28,8 +42,10 @@ int is_valid_bugaddr(unsigned long addr)
28 return 0; 42 return 0;
29 if (probe_kernel_address((insn_size_t *)addr, opcode)) 43 if (probe_kernel_address((insn_size_t *)addr, opcode))
30 return 0; 44 return 0;
45 if (opcode == TRAPA_BUG_OPCODE)
46 return 1;
31 47
32 return opcode == TRAPA_BUG_OPCODE; 48 return 0;
33} 49}
34#endif 50#endif
35 51
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 563426487c6..583ace55b0d 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -24,6 +24,7 @@
24#include <linux/kdebug.h> 24#include <linux/kdebug.h>
25#include <linux/kexec.h> 25#include <linux/kexec.h>
26#include <linux/limits.h> 26#include <linux/limits.h>
27#include <linux/proc_fs.h>
27#include <asm/system.h> 28#include <asm/system.h>
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
29#include <asm/fpu.h> 30#include <asm/fpu.h>
@@ -44,6 +45,87 @@
44#define TRAP_ILLEGAL_SLOT_INST 13 45#define TRAP_ILLEGAL_SLOT_INST 13
45#endif 46#endif
46 47
48static unsigned long se_user;
49static unsigned long se_sys;
50static unsigned long se_skipped;
51static unsigned long se_half;
52static unsigned long se_word;
53static unsigned long se_dword;
54static unsigned long se_multi;
55/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
56 valid! */
57static int se_usermode = 3;
58/* 0: no warning 1: print a warning message */
59static int se_kernmode_warn = 1;
60
61#ifdef CONFIG_PROC_FS
62static const char *se_usermode_action[] = {
63 "ignored",
64 "warn",
65 "fixup",
66 "fixup+warn",
67 "signal",
68 "signal+warn"
69};
70
71static int
72proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
73 void *data)
74{
75 char *p = page;
76 int len;
77
78 p += sprintf(p, "User:\t\t%lu\n", se_user);
79 p += sprintf(p, "System:\t\t%lu\n", se_sys);
80 p += sprintf(p, "Skipped:\t%lu\n", se_skipped);
81 p += sprintf(p, "Half:\t\t%lu\n", se_half);
82 p += sprintf(p, "Word:\t\t%lu\n", se_word);
83 p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
84 p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
85 p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
86 se_usermode_action[se_usermode]);
87 p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
88 se_kernmode_warn ? "+warn" : "");
89
90 len = (p - page) - off;
91 if (len < 0)
92 len = 0;
93
94 *eof = (len <= count) ? 1 : 0;
95 *start = page + off;
96
97 return len;
98}
99
100static int proc_alignment_write(struct file *file, const char __user *buffer,
101 unsigned long count, void *data)
102{
103 char mode;
104
105 if (count > 0) {
106 if (get_user(mode, buffer))
107 return -EFAULT;
108 if (mode >= '0' && mode <= '5')
109 se_usermode = mode - '0';
110 }
111 return count;
112}
113
114static int proc_alignment_kern_write(struct file *file, const char __user *buffer,
115 unsigned long count, void *data)
116{
117 char mode;
118
119 if (count > 0) {
120 if (get_user(mode, buffer))
121 return -EFAULT;
122 if (mode >= '0' && mode <= '1')
123 se_kernmode_warn = mode - '0';
124 }
125 return count;
126}
127#endif
128
47static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 129static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
48{ 130{
49 unsigned long p; 131 unsigned long p;
@@ -136,6 +218,7 @@ static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
136 regs->pc = fixup->fixup; 218 regs->pc = fixup->fixup;
137 return; 219 return;
138 } 220 }
221
139 die(str, regs, err); 222 die(str, regs, err);
140 } 223 }
141} 224}
@@ -193,6 +276,13 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
193 276
194 count = 1<<(instruction&3); 277 count = 1<<(instruction&3);
195 278
279 switch (count) {
280 case 1: se_half += 1; break;
281 case 2: se_word += 1; break;
282 case 4: se_dword += 1; break;
283 case 8: se_multi += 1; break; /* ??? */
284 }
285
196 ret = -EFAULT; 286 ret = -EFAULT;
197 switch (instruction>>12) { 287 switch (instruction>>12) {
198 case 0: /* mov.[bwl] to/from memory via r0+rn */ 288 case 0: /* mov.[bwl] to/from memory via r0+rn */
@@ -358,15 +448,8 @@ static inline int handle_delayslot(struct pt_regs *regs,
358#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) 448#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
359#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) 449#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
360 450
361/*
362 * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
363 * opcodes..
364 */
365
366static int handle_unaligned_notify_count = 10;
367
368int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 451int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
369 struct mem_access *ma) 452 struct mem_access *ma, int expected)
370{ 453{
371 u_int rm; 454 u_int rm;
372 int ret, index; 455 int ret, index;
@@ -374,15 +457,13 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
374 index = (instruction>>8)&15; /* 0x0F00 */ 457 index = (instruction>>8)&15; /* 0x0F00 */
375 rm = regs->regs[index]; 458 rm = regs->regs[index];
376 459
377 /* shout about the first ten userspace fixups */ 460 /* shout about fixups */
378 if (user_mode(regs) && handle_unaligned_notify_count>0) { 461 if (!expected && printk_ratelimit())
379 handle_unaligned_notify_count--; 462 printk(KERN_NOTICE "Fixing up unaligned %s access "
380
381 printk(KERN_NOTICE "Fixing up unaligned userspace access "
382 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 463 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
464 user_mode(regs) ? "userspace" : "kernel",
383 current->comm, task_pid_nr(current), 465 current->comm, task_pid_nr(current),
384 (void *)regs->pc, instruction); 466 (void *)regs->pc, instruction);
385 }
386 467
387 ret = -EFAULT; 468 ret = -EFAULT;
388 switch (instruction&0xF000) { 469 switch (instruction&0xF000) {
@@ -538,6 +619,36 @@ asmlinkage void do_address_error(struct pt_regs *regs,
538 619
539 local_irq_enable(); 620 local_irq_enable();
540 621
622 se_user += 1;
623
624#ifndef CONFIG_CPU_SH2A
625 set_fs(USER_DS);
626 if (copy_from_user(&instruction, (u16 *)(regs->pc & ~1), 2)) {
627 set_fs(oldfs);
628 goto uspace_segv;
629 }
630 set_fs(oldfs);
631
632 /* shout about userspace fixups */
633 if (se_usermode & 1)
634 printk(KERN_NOTICE "Unaligned userspace access "
635 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
636 current->comm, current->pid, (void *)regs->pc,
637 instruction);
638#endif
639
640 if (se_usermode & 2)
641 goto fixup;
642
643 if (se_usermode & 4)
644 goto uspace_segv;
645 else {
646 /* ignore */
647 regs->pc += instruction_size(instruction);
648 return;
649 }
650
651fixup:
541 /* bad PC is not something we can fix */ 652 /* bad PC is not something we can fix */
542 if (regs->pc & 1) { 653 if (regs->pc & 1) {
543 si_code = BUS_ADRALN; 654 si_code = BUS_ADRALN;
@@ -545,17 +656,8 @@ asmlinkage void do_address_error(struct pt_regs *regs,
545 } 656 }
546 657
547 set_fs(USER_DS); 658 set_fs(USER_DS);
548 if (copy_from_user(&instruction, (void __user *)(regs->pc),
549 sizeof(instruction))) {
550 /* Argh. Fault on the instruction itself.
551 This should never happen non-SMP
552 */
553 set_fs(oldfs);
554 goto uspace_segv;
555 }
556
557 tmp = handle_unaligned_access(instruction, regs, 659 tmp = handle_unaligned_access(instruction, regs,
558 &user_mem_access); 660 &user_mem_access, 0);
559 set_fs(oldfs); 661 set_fs(oldfs);
560 662
561 if (tmp==0) 663 if (tmp==0)
@@ -571,6 +673,14 @@ uspace_segv:
571 info.si_addr = (void __user *)address; 673 info.si_addr = (void __user *)address;
572 force_sig_info(SIGBUS, &info, current); 674 force_sig_info(SIGBUS, &info, current);
573 } else { 675 } else {
676 se_sys += 1;
677
678 if (se_kernmode_warn)
679 printk(KERN_NOTICE "Unaligned kernel access "
680 "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
681 current->comm, current->pid, (void *)regs->pc,
682 instruction);
683
574 if (regs->pc & 1) 684 if (regs->pc & 1)
575 die("unaligned program counter", regs, error_code); 685 die("unaligned program counter", regs, error_code);
576 686
@@ -584,7 +694,8 @@ uspace_segv:
584 die("insn faulting in do_address_error", regs, 0); 694 die("insn faulting in do_address_error", regs, 0);
585 } 695 }
586 696
587 handle_unaligned_access(instruction, regs, &user_mem_access); 697 handle_unaligned_access(instruction, regs,
698 &user_mem_access, 0);
588 set_fs(oldfs); 699 set_fs(oldfs);
589 } 700 }
590} 701}
@@ -880,3 +991,38 @@ void dump_stack(void)
880 show_stack(NULL, NULL); 991 show_stack(NULL, NULL);
881} 992}
882EXPORT_SYMBOL(dump_stack); 993EXPORT_SYMBOL(dump_stack);
994
995#ifdef CONFIG_PROC_FS
996/*
997 * This needs to be done after sysctl_init, otherwise sys/ will be
998 * overwritten. Actually, this shouldn't be in sys/ at all since
999 * it isn't a sysctl, and it doesn't contain sysctl information.
1000 * We now locate it in /proc/cpu/alignment instead.
1001 */
1002static int __init alignment_init(void)
1003{
1004 struct proc_dir_entry *dir, *res;
1005
1006 dir = proc_mkdir("cpu", NULL);
1007 if (!dir)
1008 return -ENOMEM;
1009
1010 res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir);
1011 if (!res)
1012 return -ENOMEM;
1013
1014 res->read_proc = proc_alignment_read;
1015 res->write_proc = proc_alignment_write;
1016
1017 res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
1018 if (!res)
1019 return -ENOMEM;
1020
1021 res->read_proc = proc_alignment_read;
1022 res->write_proc = proc_alignment_kern_write;
1023
1024 return 0;
1025}
1026
1027fs_initcall(alignment_init);
1028#endif
diff --git a/arch/sh/kernel/unwinder.c b/arch/sh/kernel/unwinder.c
index 2b30fa28b44..468889d958f 100644
--- a/arch/sh/kernel/unwinder.c
+++ b/arch/sh/kernel/unwinder.c
@@ -11,6 +11,7 @@
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/list.h> 12#include <linux/list.h>
13#include <linux/spinlock.h> 13#include <linux/spinlock.h>
14#include <linux/module.h>
14#include <asm/unwinder.h> 15#include <asm/unwinder.h>
15#include <asm/atomic.h> 16#include <asm/atomic.h>
16 17
@@ -53,8 +54,6 @@ static struct list_head unwinder_list = {
53 54
54static DEFINE_SPINLOCK(unwinder_lock); 55static DEFINE_SPINLOCK(unwinder_lock);
55 56
56static atomic_t unwinder_running = ATOMIC_INIT(0);
57
58/** 57/**
59 * select_unwinder - Select the best registered stack unwinder. 58 * select_unwinder - Select the best registered stack unwinder.
60 * 59 *
@@ -122,6 +121,8 @@ int unwinder_register(struct unwinder *u)
122 return ret; 121 return ret;
123} 122}
124 123
124int unwinder_faulted = 0;
125
125/* 126/*
126 * Unwind the call stack and pass information to the stacktrace_ops 127 * Unwind the call stack and pass information to the stacktrace_ops
127 * functions. Also handle the case where we need to switch to a new 128 * functions. Also handle the case where we need to switch to a new
@@ -144,19 +145,20 @@ void unwind_stack(struct task_struct *task, struct pt_regs *regs,
144 * Hopefully this will give us a semi-reliable stacktrace so we 145 * Hopefully this will give us a semi-reliable stacktrace so we
145 * can diagnose why curr_unwinder->dump() faulted. 146 * can diagnose why curr_unwinder->dump() faulted.
146 */ 147 */
147 if (atomic_inc_return(&unwinder_running) != 1) { 148 if (unwinder_faulted) {
148 spin_lock_irqsave(&unwinder_lock, flags); 149 spin_lock_irqsave(&unwinder_lock, flags);
149 150
150 if (!list_is_singular(&unwinder_list)) { 151 /* Make sure no one beat us to changing the unwinder */
152 if (unwinder_faulted && !list_is_singular(&unwinder_list)) {
151 list_del(&curr_unwinder->list); 153 list_del(&curr_unwinder->list);
152 curr_unwinder = select_unwinder(); 154 curr_unwinder = select_unwinder();
155
156 unwinder_faulted = 0;
153 } 157 }
154 158
155 spin_unlock_irqrestore(&unwinder_lock, flags); 159 spin_unlock_irqrestore(&unwinder_lock, flags);
156 atomic_dec(&unwinder_running);
157 } 160 }
158 161
159 curr_unwinder->dump(task, regs, sp, ops, data); 162 curr_unwinder->dump(task, regs, sp, ops, data);
160
161 atomic_dec(&unwinder_running);
162} 163}
164EXPORT_SYMBOL_GPL(unwind_stack);
diff --git a/arch/sh/lib/__clear_user.S b/arch/sh/lib/__clear_user.S
index bee9817e055..db1dca7aad1 100644
--- a/arch/sh/lib/__clear_user.S
+++ b/arch/sh/lib/__clear_user.S
@@ -11,7 +11,7 @@
11ENTRY(__clear_user) 11ENTRY(__clear_user)
12 ! 12 !
13 mov #0, r0 13 mov #0, r0
14 mov #0xe0, r1 ! 0xffffffe0 14 mov #0xffffffe0, r1
15 ! 15 !
16 ! r4..(r4+31)&~32 -------- not aligned [ Area 0 ] 16 ! r4..(r4+31)&~32 -------- not aligned [ Area 0 ]
17 ! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ] 17 ! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ]
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index f3ddd2133e6..faa8f86c0db 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -21,13 +21,14 @@ void __delay(unsigned long loops)
21 21
22inline void __const_udelay(unsigned long xloops) 22inline void __const_udelay(unsigned long xloops)
23{ 23{
24 xloops *= 4;
24 __asm__("dmulu.l %0, %2\n\t" 25 __asm__("dmulu.l %0, %2\n\t"
25 "sts mach, %0" 26 "sts mach, %0"
26 : "=r" (xloops) 27 : "=r" (xloops)
27 : "0" (xloops), 28 : "0" (xloops),
28 "r" (HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy) 29 "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4))
29 : "macl", "mach"); 30 : "macl", "mach");
30 __delay(xloops); 31 __delay(++xloops);
31} 32}
32 33
33void __udelay(unsigned long usecs) 34void __udelay(unsigned long usecs)
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 2795618e4f0..64dc1ad5980 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -82,7 +82,7 @@ config 32BIT
82 82
83config PMB_ENABLE 83config PMB_ENABLE
84 bool "Support 32-bit physical addressing through PMB" 84 bool "Support 32-bit physical addressing through PMB"
85 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 85 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
86 select 32BIT 86 select 32BIT
87 default y 87 default y
88 help 88 help
@@ -97,7 +97,7 @@ choice
97 97
98config PMB 98config PMB
99 bool "PMB" 99 bool "PMB"
100 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 100 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
101 select 32BIT 101 select 32BIT
102 help 102 help
103 If you say Y here, physical addressing will be extended to 103 If you say Y here, physical addressing will be extended to
@@ -106,7 +106,8 @@ config PMB
106 106
107config PMB_FIXED 107config PMB_FIXED
108 bool "fixed PMB" 108 bool "fixed PMB"
109 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \ 109 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || \
110 CPU_SUBTYPE_SH7780 || \
110 CPU_SUBTYPE_SH7785) 111 CPU_SUBTYPE_SH7785)
111 select 32BIT 112 select 32BIT
112 help 113 help
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 2775f84d9aa..70fb906419d 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -455,7 +455,49 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
455 * Break the 1, 2 and 4 way variants of this out into separate functions to 455 * Break the 1, 2 and 4 way variants of this out into separate functions to
456 * avoid nearly all the overhead of having the conditional stuff in the function 456 * avoid nearly all the overhead of having the conditional stuff in the function
457 * bodies (+ the 1 and 2 way cases avoid saving any registers too). 457 * bodies (+ the 1 and 2 way cases avoid saving any registers too).
458 *
459 * We want to eliminate unnecessary bus transactions, so this code uses
460 * a non-obvious technique.
461 *
462 * Loop over a cache way sized block of, one cache line at a time. For each
463 * line, use movca.a to cause the current cache line contents to be written
464 * back, but without reading anything from main memory. However this has the
465 * side effect that the cache is now caching that memory location. So follow
466 * this with a cache invalidate to mark the cache line invalid. And do all
467 * this with interrupts disabled, to avoid the cache line being accidently
468 * evicted while it is holding garbage.
469 *
470 * This also breaks in a number of circumstances:
471 * - if there are modifications to the region of memory just above
472 * empty_zero_page (for example because a breakpoint has been placed
473 * there), then these can be lost.
474 *
475 * This is because the the memory address which the cache temporarily
476 * caches in the above description is empty_zero_page. So the
477 * movca.l hits the cache (it is assumed that it misses, or at least
478 * isn't dirty), modifies the line and then invalidates it, losing the
479 * required change.
480 *
481 * - If caches are disabled or configured in write-through mode, then
482 * the movca.l writes garbage directly into memory.
458 */ 483 */
484static void __flush_dcache_segment_writethrough(unsigned long start,
485 unsigned long extent_per_way)
486{
487 unsigned long addr;
488 int i;
489
490 addr = CACHE_OC_ADDRESS_ARRAY | (start & cpu_data->dcache.entry_mask);
491
492 while (extent_per_way) {
493 for (i = 0; i < cpu_data->dcache.ways; i++)
494 __raw_writel(0, addr + cpu_data->dcache.way_incr * i);
495
496 addr += cpu_data->dcache.linesz;
497 extent_per_way -= cpu_data->dcache.linesz;
498 }
499}
500
459static void __flush_dcache_segment_1way(unsigned long start, 501static void __flush_dcache_segment_1way(unsigned long start,
460 unsigned long extent_per_way) 502 unsigned long extent_per_way)
461{ 503{
@@ -655,24 +697,30 @@ extern void __weak sh4__flush_region_init(void);
655 */ 697 */
656void __init sh4_cache_init(void) 698void __init sh4_cache_init(void)
657{ 699{
700 unsigned int wt_enabled = !!(__raw_readl(CCR) & CCR_CACHE_WT);
701
658 printk("PVR=%08x CVR=%08x PRR=%08x\n", 702 printk("PVR=%08x CVR=%08x PRR=%08x\n",
659 ctrl_inl(CCN_PVR), 703 ctrl_inl(CCN_PVR),
660 ctrl_inl(CCN_CVR), 704 ctrl_inl(CCN_CVR),
661 ctrl_inl(CCN_PRR)); 705 ctrl_inl(CCN_PRR));
662 706
663 switch (boot_cpu_data.dcache.ways) { 707 if (wt_enabled)
664 case 1: 708 __flush_dcache_segment_fn = __flush_dcache_segment_writethrough;
665 __flush_dcache_segment_fn = __flush_dcache_segment_1way; 709 else {
666 break; 710 switch (boot_cpu_data.dcache.ways) {
667 case 2: 711 case 1:
668 __flush_dcache_segment_fn = __flush_dcache_segment_2way; 712 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
669 break; 713 break;
670 case 4: 714 case 2:
671 __flush_dcache_segment_fn = __flush_dcache_segment_4way; 715 __flush_dcache_segment_fn = __flush_dcache_segment_2way;
672 break; 716 break;
673 default: 717 case 4:
674 panic("unknown number of cache ways\n"); 718 __flush_dcache_segment_fn = __flush_dcache_segment_4way;
675 break; 719 break;
720 default:
721 panic("unknown number of cache ways\n");
722 break;
723 }
676 } 724 }
677 725
678 local_flush_icache_range = sh4_flush_icache_range; 726 local_flush_icache_range = sh4_flush_icache_range;
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index da2f4186f2c..c3250614e3a 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -57,14 +57,6 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
57 if (is_pci_memory_fixed_range(phys_addr, size)) 57 if (is_pci_memory_fixed_range(phys_addr, size))
58 return (void __iomem *)phys_addr; 58 return (void __iomem *)phys_addr;
59 59
60#if !defined(CONFIG_PMB_FIXED)
61 /*
62 * Don't allow anybody to remap normal RAM that we're using..
63 */
64 if (phys_addr < virt_to_phys(high_memory))
65 return NULL;
66#endif
67
68 /* 60 /*
69 * Mappings have to be page-aligned 61 * Mappings have to be page-aligned
70 */ 62 */
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 7d3c63e707a..8cf550e2570 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -43,9 +43,12 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
43 */ 43 */
44 ctrl_outl(pte.pte_high, MMU_PTEA); 44 ctrl_outl(pte.pte_high, MMU_PTEA);
45#else 45#else
46 if (cpu_data->flags & CPU_HAS_PTEA) 46 if (cpu_data->flags & CPU_HAS_PTEA) {
47 /* TODO: make this look less hacky */ 47 /* The last 3 bits and the first one of pteval contains
48 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA); 48 * the PTEA timing control and space attribute bits
49 */
50 ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
51 }
49#endif 52#endif
50 53
51 /* Set PTEL register */ 54 /* Set PTEL register */
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 09eef360dde..6639b25d8d5 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -53,7 +53,9 @@ RSK7203 SH_RSK7203
53AP325RXA SH_AP325RXA 53AP325RXA SH_AP325RXA
54SH7763RDP SH_SH7763RDP 54SH7763RDP SH_SH7763RDP
55SH7785LCR SH_SH7785LCR 55SH7785LCR SH_SH7785LCR
56SH7785LCR_PT SH_SH7785LCR_PT
56URQUELL SH_URQUELL 57URQUELL SH_URQUELL
57ESPT SH_ESPT 58ESPT SH_ESPT
58POLARIS SH_POLARIS 59POLARIS SH_POLARIS
59KFR2R09 SH_KFR2R09 60KFR2R09 SH_KFR2R09
61ECOVEC SH_ECOVEC
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 10:34:18 -0500