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-rw-r--r--arch/sh/mach-sim/setup.c126
1 files changed, 0 insertions, 126 deletions
diff --git a/arch/sh/mach-sim/setup.c b/arch/sh/mach-sim/setup.c
deleted file mode 100644
index e3386ec1ce1..00000000000
--- a/arch/sh/mach-sim/setup.c
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@@ -1,126 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-sim/setup.c
7 *
8 * ST50 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name.
16 */
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <asm/platform.h>
20#include <asm/irq.h>
21
22/*
23 * Platform Dependent Interrupt Priorities.
24 */
25
26/* Using defaults defined in irq.h */
27#define RES NO_PRIORITY /* Disabled */
28#define IR0 IRL0_PRIORITY /* IRLs */
29#define IR1 IRL1_PRIORITY
30#define IR2 IRL2_PRIORITY
31#define IR3 IRL3_PRIORITY
32#define PCA INTA_PRIORITY /* PCI Ints */
33#define PCB INTB_PRIORITY
34#define PCC INTC_PRIORITY
35#define PCD INTD_PRIORITY
36#define SER TOP_PRIORITY
37#define ERR TOP_PRIORITY
38#define PW0 TOP_PRIORITY
39#define PW1 TOP_PRIORITY
40#define PW2 TOP_PRIORITY
41#define PW3 TOP_PRIORITY
42#define DM0 NO_PRIORITY /* DMA Ints */
43#define DM1 NO_PRIORITY
44#define DM2 NO_PRIORITY
45#define DM3 NO_PRIORITY
46#define DAE NO_PRIORITY
47#define TU0 TIMER_PRIORITY /* TMU Ints */
48#define TU1 NO_PRIORITY
49#define TU2 NO_PRIORITY
50#define TI2 NO_PRIORITY
51#define ATI NO_PRIORITY /* RTC Ints */
52#define PRI NO_PRIORITY
53#define CUI RTC_PRIORITY
54#define ERI SCIF_PRIORITY /* SCIF Ints */
55#define RXI SCIF_PRIORITY
56#define BRI SCIF_PRIORITY
57#define TXI SCIF_PRIORITY
58#define ITI TOP_PRIORITY /* WDT Ints */
59
60/*
61 * Platform dependent structures: maps and parms block.
62 */
63struct resource io_resources[] = {
64 /* Nothing yet .. */
65};
66
67struct resource kram_resources[] = {
68 /* These must be last in the array */
69 { .name = "Kernel code", .start = 0, .end = 0 },
70 /* These must be last in the array */
71 { .name = "Kernel data", .start = 0, .end = 0 }
72};
73
74struct resource xram_resources[] = {
75 /* Nothing yet .. */
76};
77
78struct resource rom_resources[] = {
79 /* Nothing yet .. */
80};
81
82struct sh64_platform platform_parms = {
83 .readonly_rootfs = 1,
84 .initial_root_dev = 0x0100,
85 .loader_type = 1,
86 .io_res_p = io_resources,
87 .io_res_count = ARRAY_SIZE(io_resources),
88 .kram_res_p = kram_resources,
89 .kram_res_count = ARRAY_SIZE(kram_resources),
90 .xram_res_p = xram_resources,
91 .xram_res_count = ARRAY_SIZE(xram_resources),
92 .rom_res_p = rom_resources,
93 .rom_res_count = ARRAY_SIZE(rom_resources),
94};
95
96int platform_int_priority[NR_IRQS] = {
97 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
98 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
99 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
100 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
101 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
102 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
104 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
105};
106
107void __init platform_setup(void)
108{
109 /* Simulator platform leaves the decision to head.S */
110 platform_parms.fpu_flags = fpu_in_use;
111}
112
113void __init platform_monitor(void)
114{
115 /* Nothing yet .. */
116}
117
118void __init platform_reserve(void)
119{
120 /* Nothing yet .. */
121}
122
123const char *get_system_type(void)
124{
125 return "SH-5 Simulator";
126}