3 files changed, 26 insertions, 26 deletions

diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index 760a7af7fdb..b2c363ef38a 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -28,30 +28,6 @@
 #include <asm/ppc-pci.h>
 #include <asm/atomic.h>
 
-/*
- * The list of OF IDs below is used for matching bus types in the
- * system whose devices are to be exposed as of_platform_devices.
- *
- * This is the default list valid for most platforms. This file provides
- * functions who can take an explicit list if necessary though
- *
- * The search is always performed recursively looking for children of
- * the provided device_node and recursively if such a children matches
- * a bus type in the list
- */
-
-const struct of_device_id of_default_bus_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .type = "spider", },
-        { .type = "axon", },
-        { .type = "plb5", },
-        { .type = "plb4", },
-        { .type = "opb", },
-        { .type = "ebc", },
-        {},
-};
-
 #ifdef CONFIG_PPC_OF_PLATFORM_PCI
 
 /* The probing of PCI controllers from of_platform is currently
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index c5ce02e84c8..1b574904275 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -61,12 +61,24 @@ static void qpace_progress(char *s, unsigned short hex)
         printk("*** %04x : %s\n", hex, s ? s : "");
 }
 
+static const struct of_device_id qpace_bus_ids[] __initdata = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .type = "spider", },
+        { .type = "axon", },
+        { .type = "plb5", },
+        { .type = "plb4", },
+        { .type = "opb", },
+        { .type = "ebc", },
+        {},
+};
+
 static int __init qpace_publish_devices(void)
 {
         int node;
 
         /* Publish OF platform devices for southbridge IOs */
-        of_platform_bus_probe(NULL, NULL, NULL);
+        of_platform_bus_probe(NULL, qpace_bus_ids, NULL);
 
         /* There is no device for the MIC memory controller, thus we create
          * a platform device for it to attach the EDAC driver to.
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 50385db586b..691995761b3 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -141,6 +141,18 @@ static int __devinit cell_setup_phb(struct pci_controller *phb)
         return 0;
 }
 
+static const struct of_device_id cell_bus_ids[] __initdata = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .type = "spider", },
+        { .type = "axon", },
+        { .type = "plb5", },
+        { .type = "plb4", },
+        { .type = "opb", },
+        { .type = "ebc", },
+        {},
+};
+
 static int __init cell_publish_devices(void)
 {
         struct device_node *root = of_find_node_by_path("/");
@@ -148,7 +160,7 @@ static int __init cell_publish_devices(void)
         int node;
 
         /* Publish OF platform devices for southbridge IOs */
-        of_platform_bus_probe(NULL, NULL, NULL);
+        of_platform_bus_probe(NULL, cell_bus_ids, NULL);
 
         /* On spider based blades, we need to manually create the OF
          * platform devices for the PCI host bridges