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-rw-r--r--arch/powerpc/sysdev/Makefile1
-rw-r--r--arch/powerpc/sysdev/cpm1.c112
-rw-r--r--arch/powerpc/sysdev/cpm2.c103
-rw-r--r--arch/powerpc/sysdev/cpm_common.c3
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c129
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c611
-rw-r--r--arch/powerpc/sysdev/fsl_soc.h1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c13
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_io.c5
9 files changed, 176 insertions, 802 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 851a0be7194..6d386d0071a 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
12obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o 12obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
13obj-$(CONFIG_FSL_SOC) += fsl_soc.o 13obj-$(CONFIG_FSL_SOC) += fsl_soc.o
14obj-$(CONFIG_FSL_PCI) += fsl_pci.o 14obj-$(CONFIG_FSL_PCI) += fsl_pci.o
15obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
15obj-$(CONFIG_RAPIDIO) += fsl_rio.o 16obj-$(CONFIG_RAPIDIO) += fsl_rio.o
16obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 17obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
17obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ 18obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 3eceeb5f3ee..58292a086c1 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -44,9 +44,6 @@
44 44
45#define CPM_MAP_SIZE (0x4000) 45#define CPM_MAP_SIZE (0x4000)
46 46
47#ifndef CONFIG_PPC_CPM_NEW_BINDING
48static void m8xx_cpm_dpinit(void);
49#endif
50cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */ 47cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
51immap_t __iomem *mpc8xx_immr; 48immap_t __iomem *mpc8xx_immr;
52static cpic8xx_t __iomem *cpic_reg; 49static cpic8xx_t __iomem *cpic_reg;
@@ -229,12 +226,7 @@ void __init cpm_reset(void)
229 out_be32(&siu_conf->sc_sdcr, 1); 226 out_be32(&siu_conf->sc_sdcr, 1);
230 immr_unmap(siu_conf); 227 immr_unmap(siu_conf);
231 228
232#ifdef CONFIG_PPC_CPM_NEW_BINDING
233 cpm_muram_init(); 229 cpm_muram_init();
234#else
235 /* Reclaim the DP memory for our use. */
236 m8xx_cpm_dpinit();
237#endif
238} 230}
239 231
240static DEFINE_SPINLOCK(cmd_lock); 232static DEFINE_SPINLOCK(cmd_lock);
@@ -293,110 +285,6 @@ cpm_setbrg(uint brg, uint rate)
293 CPM_BRG_EN | CPM_BRG_DIV16); 285 CPM_BRG_EN | CPM_BRG_DIV16);
294} 286}
295 287
296#ifndef CONFIG_PPC_CPM_NEW_BINDING
297/*
298 * dpalloc / dpfree bits.
299 */
300static spinlock_t cpm_dpmem_lock;
301/*
302 * 16 blocks should be enough to satisfy all requests
303 * until the memory subsystem goes up...
304 */
305static rh_block_t cpm_boot_dpmem_rh_block[16];
306static rh_info_t cpm_dpmem_info;
307
308#define CPM_DPMEM_ALIGNMENT 8
309static u8 __iomem *dpram_vbase;
310static phys_addr_t dpram_pbase;
311
312static void m8xx_cpm_dpinit(void)
313{
314 spin_lock_init(&cpm_dpmem_lock);
315
316 dpram_vbase = cpmp->cp_dpmem;
317 dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem);
318
319 /* Initialize the info header */
320 rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
321 sizeof(cpm_boot_dpmem_rh_block) /
322 sizeof(cpm_boot_dpmem_rh_block[0]),
323 cpm_boot_dpmem_rh_block);
324
325 /*
326 * Attach the usable dpmem area.
327 * XXX: This is actually crap. CPM_DATAONLY_BASE and
328 * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
329 * with the processor and the microcode patches applied / activated.
330 * But the following should be at least safe.
331 */
332 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
333}
334
335/*
336 * Allocate the requested size worth of DP memory.
337 * This function returns an offset into the DPRAM area.
338 * Use cpm_dpram_addr() to get the virtual address of the area.
339 */
340unsigned long cpm_dpalloc(uint size, uint align)
341{
342 unsigned long start;
343 unsigned long flags;
344
345 spin_lock_irqsave(&cpm_dpmem_lock, flags);
346 cpm_dpmem_info.alignment = align;
347 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
348 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
349
350 return (uint)start;
351}
352EXPORT_SYMBOL(cpm_dpalloc);
353
354int cpm_dpfree(unsigned long offset)
355{
356 int ret;
357 unsigned long flags;
358
359 spin_lock_irqsave(&cpm_dpmem_lock, flags);
360 ret = rh_free(&cpm_dpmem_info, offset);
361 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
362
363 return ret;
364}
365EXPORT_SYMBOL(cpm_dpfree);
366
367unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
368{
369 unsigned long start;
370 unsigned long flags;
371
372 spin_lock_irqsave(&cpm_dpmem_lock, flags);
373 cpm_dpmem_info.alignment = align;
374 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
375 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
376
377 return start;
378}
379EXPORT_SYMBOL(cpm_dpalloc_fixed);
380
381void cpm_dpdump(void)
382{
383 rh_dump(&cpm_dpmem_info);
384}
385EXPORT_SYMBOL(cpm_dpdump);
386
387void *cpm_dpram_addr(unsigned long offset)
388{
389 return (void *)(dpram_vbase + offset);
390}
391EXPORT_SYMBOL(cpm_dpram_addr);
392
393uint cpm_dpram_phys(u8 *addr)
394{
395 return (dpram_pbase + (uint)(addr - dpram_vbase));
396}
397EXPORT_SYMBOL(cpm_dpram_phys);
398#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
399
400struct cpm_ioport16 { 288struct cpm_ioport16 {
401 __be16 dir, par, odr_sor, dat, intr; 289 __be16 dir, par, odr_sor, dat, intr;
402 __be16 res[3]; 290 __be16 res[3];
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index fa70ee31349..5a6c5dfc53e 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -46,10 +46,6 @@
46 46
47#include <sysdev/fsl_soc.h> 47#include <sysdev/fsl_soc.h>
48 48
49#ifndef CONFIG_PPC_CPM_NEW_BINDING
50static void cpm2_dpinit(void);
51#endif
52
53cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */ 49cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
54 50
55/* We allocate this here because it is used almost exclusively for 51/* We allocate this here because it is used almost exclusively for
@@ -71,15 +67,17 @@ void __init cpm2_reset(void)
71 67
72 /* Reclaim the DP memory for our use. 68 /* Reclaim the DP memory for our use.
73 */ 69 */
74#ifdef CONFIG_PPC_CPM_NEW_BINDING
75 cpm_muram_init(); 70 cpm_muram_init();
76#else
77 cpm2_dpinit();
78#endif
79 71
80 /* Tell everyone where the comm processor resides. 72 /* Tell everyone where the comm processor resides.
81 */ 73 */
82 cpmp = &cpm2_immr->im_cpm; 74 cpmp = &cpm2_immr->im_cpm;
75
76#ifndef CONFIG_PPC_EARLY_DEBUG_CPM
77 /* Reset the CPM.
78 */
79 cpm_command(CPM_CR_RST, 0);
80#endif
83} 81}
84 82
85static DEFINE_SPINLOCK(cmd_lock); 83static DEFINE_SPINLOCK(cmd_lock);
@@ -347,95 +345,6 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
347 return ret; 345 return ret;
348} 346}
349 347
350#ifndef CONFIG_PPC_CPM_NEW_BINDING
351/*
352 * dpalloc / dpfree bits.
353 */
354static spinlock_t cpm_dpmem_lock;
355/* 16 blocks should be enough to satisfy all requests
356 * until the memory subsystem goes up... */
357static rh_block_t cpm_boot_dpmem_rh_block[16];
358static rh_info_t cpm_dpmem_info;
359static u8 __iomem *im_dprambase;
360
361static void cpm2_dpinit(void)
362{
363 spin_lock_init(&cpm_dpmem_lock);
364
365 /* initialize the info header */
366 rh_init(&cpm_dpmem_info, 1,
367 sizeof(cpm_boot_dpmem_rh_block) /
368 sizeof(cpm_boot_dpmem_rh_block[0]),
369 cpm_boot_dpmem_rh_block);
370
371 im_dprambase = cpm2_immr;
372
373 /* Attach the usable dpmem area */
374 /* XXX: This is actually crap. CPM_DATAONLY_BASE and
375 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
376 * varies with the processor and the microcode patches activated.
377 * But the following should be at least safe.
378 */
379 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
380}
381
382/* This function returns an index into the DPRAM area.
383 */
384unsigned long cpm_dpalloc(uint size, uint align)
385{
386 unsigned long start;
387 unsigned long flags;
388
389 spin_lock_irqsave(&cpm_dpmem_lock, flags);
390 cpm_dpmem_info.alignment = align;
391 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
392 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
393
394 return (uint)start;
395}
396EXPORT_SYMBOL(cpm_dpalloc);
397
398int cpm_dpfree(unsigned long offset)
399{
400 int ret;
401 unsigned long flags;
402
403 spin_lock_irqsave(&cpm_dpmem_lock, flags);
404 ret = rh_free(&cpm_dpmem_info, offset);
405 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
406
407 return ret;
408}
409EXPORT_SYMBOL(cpm_dpfree);
410
411/* not sure if this is ever needed */
412unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
413{
414 unsigned long start;
415 unsigned long flags;
416
417 spin_lock_irqsave(&cpm_dpmem_lock, flags);
418 cpm_dpmem_info.alignment = align;
419 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
420 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
421
422 return start;
423}
424EXPORT_SYMBOL(cpm_dpalloc_fixed);
425
426void cpm_dpdump(void)
427{
428 rh_dump(&cpm_dpmem_info);
429}
430EXPORT_SYMBOL(cpm_dpdump);
431
432void *cpm_dpram_addr(unsigned long offset)
433{
434 return (void *)(im_dprambase + offset);
435}
436EXPORT_SYMBOL(cpm_dpram_addr);
437#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
438
439struct cpm2_ioports { 348struct cpm2_ioports {
440 u32 dir, par, sor, odr, dat; 349 u32 dir, par, sor, odr, dat;
441 u32 res[3]; 350 u32 res[3];
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 165981c8778..cb7df2dce44 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -58,7 +58,6 @@ void __init udbg_init_cpm(void)
58} 58}
59#endif 59#endif
60 60
61#ifdef CONFIG_PPC_CPM_NEW_BINDING
62static spinlock_t cpm_muram_lock; 61static spinlock_t cpm_muram_lock;
63static rh_block_t cpm_boot_muram_rh_block[16]; 62static rh_block_t cpm_boot_muram_rh_block[16];
64static rh_info_t cpm_muram_info; 63static rh_info_t cpm_muram_info;
@@ -199,5 +198,3 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
199 return muram_pbase + ((u8 __iomem *)addr - muram_vbase); 198 return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
200} 199}
201EXPORT_SYMBOL(cpm_muram_dma); 200EXPORT_SYMBOL(cpm_muram_dma);
202
203#endif /* CONFIG_PPC_CPM_NEW_BINDING */
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
new file mode 100644
index 00000000000..422c8faef59
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -0,0 +1,129 @@
1/*
2 * Freescale LBC and UPM routines.
3 *
4 * Copyright (c) 2007-2008 MontaVista Software, Inc.
5 *
6 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/of.h>
16#include <asm/fsl_lbc.h>
17
18spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
19
20struct fsl_lbc_regs __iomem *fsl_lbc_regs;
21EXPORT_SYMBOL(fsl_lbc_regs);
22
23static char __initdata *compat_lbc[] = {
24 "fsl,pq2-localbus",
25 "fsl,pq2pro-localbus",
26 "fsl,pq3-localbus",
27 "fsl,elbc",
28};
29
30static int __init fsl_lbc_init(void)
31{
32 struct device_node *lbus;
33 int i;
34
35 for (i = 0; i < ARRAY_SIZE(compat_lbc); i++) {
36 lbus = of_find_compatible_node(NULL, NULL, compat_lbc[i]);
37 if (lbus)
38 goto found;
39 }
40 return -ENODEV;
41
42found:
43 fsl_lbc_regs = of_iomap(lbus, 0);
44 of_node_put(lbus);
45 if (!fsl_lbc_regs)
46 return -ENOMEM;
47 return 0;
48}
49arch_initcall(fsl_lbc_init);
50
51/**
52 * fsl_lbc_find - find Localbus bank
53 * @addr_base: base address of the memory bank
54 *
55 * This function walks LBC banks comparing "Base address" field of the BR
56 * registers with the supplied addr_base argument. When bases match this
57 * function returns bank number (starting with 0), otherwise it returns
58 * appropriate errno value.
59 */
60int fsl_lbc_find(phys_addr_t addr_base)
61{
62 int i;
63
64 if (!fsl_lbc_regs)
65 return -ENODEV;
66
67 for (i = 0; i < ARRAY_SIZE(fsl_lbc_regs->bank); i++) {
68 __be32 br = in_be32(&fsl_lbc_regs->bank[i].br);
69 __be32 or = in_be32(&fsl_lbc_regs->bank[i].or);
70
71 if (br & BR_V && (br & or & BR_BA) == addr_base)
72 return i;
73 }
74
75 return -ENOENT;
76}
77EXPORT_SYMBOL(fsl_lbc_find);
78
79/**
80 * fsl_upm_find - find pre-programmed UPM via base address
81 * @addr_base: base address of the memory bank controlled by the UPM
82 * @upm: pointer to the allocated fsl_upm structure
83 *
84 * This function fills fsl_upm structure so you can use it with the rest of
85 * UPM API. On success this function returns 0, otherwise it returns
86 * appropriate errno value.
87 */
88int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
89{
90 int bank;
91 __be32 br;
92
93 bank = fsl_lbc_find(addr_base);
94 if (bank < 0)
95 return bank;
96
97 br = in_be32(&fsl_lbc_regs->bank[bank].br);
98
99 switch (br & BR_MSEL) {
100 case BR_MS_UPMA:
101 upm->mxmr = &fsl_lbc_regs->mamr;
102 break;
103 case BR_MS_UPMB:
104 upm->mxmr = &fsl_lbc_regs->mbmr;
105 break;
106 case BR_MS_UPMC:
107 upm->mxmr = &fsl_lbc_regs->mcmr;
108 break;
109 default:
110 return -EINVAL;
111 }
112
113 switch (br & BR_PS) {
114 case BR_PS_8:
115 upm->width = 8;
116 break;
117 case BR_PS_16:
118 upm->width = 16;
119 break;
120 case BR_PS_32:
121 upm->width = 32;
122 break;
123 default:
124 return -EINVAL;
125 }
126
127 return 0;
128}
129EXPORT_SYMBOL(fsl_upm_find);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 2c5388ce902..b6d6bdae95f 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -75,6 +75,33 @@ phys_addr_t get_immrbase(void)
75 75
76EXPORT_SYMBOL(get_immrbase); 76EXPORT_SYMBOL(get_immrbase);
77 77
78static u32 sysfreq = -1;
79
80u32 fsl_get_sys_freq(void)
81{
82 struct device_node *soc;
83 const u32 *prop;
84 int size;
85
86 if (sysfreq != -1)
87 return sysfreq;
88
89 soc = of_find_node_by_type(NULL, "soc");
90 if (!soc)
91 return -1;
92
93 prop = of_get_property(soc, "clock-frequency", &size);
94 if (!prop || size != sizeof(*prop) || *prop == 0)
95 prop = of_get_property(soc, "bus-frequency", &size);
96
97 if (prop && size == sizeof(*prop))
98 sysfreq = *prop;
99
100 of_node_put(soc);
101 return sysfreq;
102}
103EXPORT_SYMBOL(fsl_get_sys_freq);
104
78#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) 105#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
79 106
80static u32 brgfreq = -1; 107static u32 brgfreq = -1;
@@ -516,9 +543,9 @@ arch_initcall(fsl_i2c_of_init);
516static int __init mpc83xx_wdt_init(void) 543static int __init mpc83xx_wdt_init(void)
517{ 544{
518 struct resource r; 545 struct resource r;
519 struct device_node *soc, *np; 546 struct device_node *np;
520 struct platform_device *dev; 547 struct platform_device *dev;
521 const unsigned int *freq; 548 u32 freq = fsl_get_sys_freq();
522 int ret; 549 int ret;
523 550
524 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); 551 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
@@ -528,19 +555,6 @@ static int __init mpc83xx_wdt_init(void)
528 goto nodev; 555 goto nodev;
529 } 556 }
530 557
531 soc = of_find_node_by_type(NULL, "soc");
532
533 if (!soc) {
534 ret = -ENODEV;
535 goto nosoc;
536 }
537
538 freq = of_get_property(soc, "bus-frequency", NULL);
539 if (!freq) {
540 ret = -ENODEV;
541 goto err;
542 }
543
544 memset(&r, 0, sizeof(r)); 558 memset(&r, 0, sizeof(r));
545 559
546 ret = of_address_to_resource(np, 0, &r); 560 ret = of_address_to_resource(np, 0, &r);
@@ -553,20 +567,16 @@ static int __init mpc83xx_wdt_init(void)
553 goto err; 567 goto err;
554 } 568 }
555 569
556 ret = platform_device_add_data(dev, freq, sizeof(int)); 570 ret = platform_device_add_data(dev, &freq, sizeof(freq));
557 if (ret) 571 if (ret)
558 goto unreg; 572 goto unreg;
559 573
560 of_node_put(soc);
561 of_node_put(np); 574 of_node_put(np);
562
563 return 0; 575 return 0;
564 576
565unreg: 577unreg:
566 platform_device_unregister(dev); 578 platform_device_unregister(dev);
567err: 579err:
568 of_node_put(soc);
569nosoc:
570 of_node_put(np); 580 of_node_put(np);
571nodev: 581nodev:
572 return ret; 582 return ret;
@@ -735,547 +745,6 @@ err:
735 745
736arch_initcall(fsl_usb_of_init); 746arch_initcall(fsl_usb_of_init);
737 747
738#ifndef CONFIG_PPC_CPM_NEW_BINDING
739#ifdef CONFIG_CPM2
740
741extern void init_scc_ioports(struct fs_uart_platform_info*);
742
743static const char fcc_regs[] = "fcc_regs";
744static const char fcc_regs_c[] = "fcc_regs_c";
745static const char fcc_pram[] = "fcc_pram";
746static char bus_id[9][BUS_ID_SIZE];
747
748static int __init fs_enet_of_init(void)
749{
750 struct device_node *np;
751 unsigned int i;
752 struct platform_device *fs_enet_dev;
753 struct resource res;
754 int ret;
755
756 for (np = NULL, i = 0;
757 (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
758 i++) {
759 struct resource r[4];
760 struct device_node *phy, *mdio;
761 struct fs_platform_info fs_enet_data;
762 const unsigned int *id, *phy_addr, *phy_irq;
763 const void *mac_addr;
764 const phandle *ph;
765 const char *model;
766
767 memset(r, 0, sizeof(r));
768 memset(&fs_enet_data, 0, sizeof(fs_enet_data));
769
770 ret = of_address_to_resource(np, 0, &r[0]);
771 if (ret)
772 goto err;
773 r[0].name = fcc_regs;
774
775 ret = of_address_to_resource(np, 1, &r[1]);
776 if (ret)
777 goto err;
778 r[1].name = fcc_pram;
779
780 ret = of_address_to_resource(np, 2, &r[2]);
781 if (ret)
782 goto err;
783 r[2].name = fcc_regs_c;
784 fs_enet_data.fcc_regs_c = r[2].start;
785
786 of_irq_to_resource(np, 0, &r[3]);
787
788 fs_enet_dev =
789 platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
790
791 if (IS_ERR(fs_enet_dev)) {
792 ret = PTR_ERR(fs_enet_dev);
793 goto err;
794 }
795
796 model = of_get_property(np, "model", NULL);
797 if (model == NULL) {
798 ret = -ENODEV;
799 goto unreg;
800 }
801
802 mac_addr = of_get_mac_address(np);
803 if (mac_addr)
804 memcpy(fs_enet_data.macaddr, mac_addr, 6);
805
806 ph = of_get_property(np, "phy-handle", NULL);
807 phy = of_find_node_by_phandle(*ph);
808
809 if (phy == NULL) {
810 ret = -ENODEV;
811 goto unreg;
812 }
813
814 phy_addr = of_get_property(phy, "reg", NULL);
815 fs_enet_data.phy_addr = *phy_addr;
816
817 phy_irq = of_get_property(phy, "interrupts", NULL);
818
819 id = of_get_property(np, "device-id", NULL);
820 fs_enet_data.fs_no = *id;
821 strcpy(fs_enet_data.fs_type, model);
822
823 mdio = of_get_parent(phy);
824 ret = of_address_to_resource(mdio, 0, &res);
825 if (ret) {
826 of_node_put(phy);
827 of_node_put(mdio);
828 goto unreg;
829 }
830
831 fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
832 "rx-clock", NULL));
833 fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
834 "tx-clock", NULL));
835
836 if (strstr(model, "FCC")) {
837 int fcc_index = *id - 1;
838 const unsigned char *mdio_bb_prop;
839
840 fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
841 fs_enet_data.rx_ring = 32;
842 fs_enet_data.tx_ring = 32;
843 fs_enet_data.rx_copybreak = 240;
844 fs_enet_data.use_napi = 0;
845 fs_enet_data.napi_weight = 17;
846 fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
847 fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
848 fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
849
850 snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
851 (u32)res.start, fs_enet_data.phy_addr);
852 fs_enet_data.bus_id = (char*)&bus_id[(*id)];
853 fs_enet_data.init_ioports = init_fcc_ioports;
854
855 mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
856 if (mdio_bb_prop) {
857 struct platform_device *fs_enet_mdio_bb_dev;
858 struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
859
860 fs_enet_mdio_bb_dev =
861 platform_device_register_simple("fsl-bb-mdio",
862 i, NULL, 0);
863 memset(&fs_enet_mdio_bb_data, 0,
864 sizeof(struct fs_mii_bb_platform_info));
865 fs_enet_mdio_bb_data.mdio_dat.bit =
866 mdio_bb_prop[0];
867 fs_enet_mdio_bb_data.mdio_dir.bit =
868 mdio_bb_prop[1];
869 fs_enet_mdio_bb_data.mdc_dat.bit =
870 mdio_bb_prop[2];
871 fs_enet_mdio_bb_data.mdio_port =
872 mdio_bb_prop[3];
873 fs_enet_mdio_bb_data.mdc_port =
874 mdio_bb_prop[4];
875 fs_enet_mdio_bb_data.delay =
876 mdio_bb_prop[5];
877
878 fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
879 fs_enet_mdio_bb_data.irq[1] = -1;
880 fs_enet_mdio_bb_data.irq[2] = -1;
881 fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
882 fs_enet_mdio_bb_data.irq[31] = -1;
883
884 fs_enet_mdio_bb_data.mdio_dat.offset =
885 (u32)&cpm2_immr->im_ioport.iop_pdatc;
886 fs_enet_mdio_bb_data.mdio_dir.offset =
887 (u32)&cpm2_immr->im_ioport.iop_pdirc;
888 fs_enet_mdio_bb_data.mdc_dat.offset =
889 (u32)&cpm2_immr->im_ioport.iop_pdatc;
890
891 ret = platform_device_add_data(
892 fs_enet_mdio_bb_dev,
893 &fs_enet_mdio_bb_data,
894 sizeof(struct fs_mii_bb_platform_info));
895 if (ret)
896 goto unreg;
897 }
898
899 of_node_put(phy);
900 of_node_put(mdio);
901
902 ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
903 sizeof(struct
904 fs_platform_info));
905 if (ret)
906 goto unreg;
907 }
908 }
909 return 0;
910
911unreg:
912 platform_device_unregister(fs_enet_dev);
913err:
914 return ret;
915}
916
917arch_initcall(fs_enet_of_init);
918
919static const char scc_regs[] = "regs";
920static const char scc_pram[] = "pram";
921
922static int __init cpm_uart_of_init(void)
923{
924 struct device_node *np;
925 unsigned int i;
926 struct platform_device *cpm_uart_dev;
927 int ret;
928
929 for (np = NULL, i = 0;
930 (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
931 i++) {
932 struct resource r[3];
933 struct fs_uart_platform_info cpm_uart_data;
934 const int *id;
935 const char *model;
936
937 memset(r, 0, sizeof(r));
938 memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
939
940 ret = of_address_to_resource(np, 0, &r[0]);
941 if (ret)
942 goto err;
943
944 r[0].name = scc_regs;
945
946 ret = of_address_to_resource(np, 1, &r[1]);
947 if (ret)
948 goto err;
949 r[1].name = scc_pram;
950
951 of_irq_to_resource(np, 0, &r[2]);
952
953 cpm_uart_dev =
954 platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
955
956 if (IS_ERR(cpm_uart_dev)) {
957 ret = PTR_ERR(cpm_uart_dev);
958 goto err;
959 }
960
961 id = of_get_property(np, "device-id", NULL);
962 cpm_uart_data.fs_no = *id;
963
964 model = of_get_property(np, "model", NULL);
965 strcpy(cpm_uart_data.fs_type, model);
966
967 cpm_uart_data.uart_clk = ppc_proc_freq;
968
969 cpm_uart_data.tx_num_fifo = 4;
970 cpm_uart_data.tx_buf_size = 32;
971 cpm_uart_data.rx_num_fifo = 4;
972 cpm_uart_data.rx_buf_size = 32;
973 cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
974 "rx-clock", NULL));
975 cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
976 "tx-clock", NULL));
977
978 ret =
979 platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
980 sizeof(struct
981 fs_uart_platform_info));
982 if (ret)
983 goto unreg;
984 }
985
986 return 0;
987
988unreg:
989 platform_device_unregister(cpm_uart_dev);
990err:
991 return ret;
992}
993
994arch_initcall(cpm_uart_of_init);
995#endif /* CONFIG_CPM2 */
996
997#ifdef CONFIG_8xx
998
999extern void init_scc_ioports(struct fs_platform_info*);
1000extern int platform_device_skip(const char *model, int id);
1001
1002static int __init fs_enet_mdio_of_init(void)
1003{
1004 struct device_node *np;
1005 unsigned int i;
1006 struct platform_device *mdio_dev;
1007 struct resource res;
1008 int ret;
1009
1010 for (np = NULL, i = 0;
1011 (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
1012 i++) {
1013 struct fs_mii_fec_platform_info mdio_data;
1014
1015 memset(&res, 0, sizeof(res));
1016 memset(&mdio_data, 0, sizeof(mdio_data));
1017
1018 ret = of_address_to_resource(np, 0, &res);
1019 if (ret)
1020 goto err;
1021
1022 mdio_dev =
1023 platform_device_register_simple("fsl-cpm-fec-mdio",
1024 res.start, &res, 1);
1025 if (IS_ERR(mdio_dev)) {
1026 ret = PTR_ERR(mdio_dev);
1027 goto err;
1028 }
1029
1030 mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
1031
1032 ret =
1033 platform_device_add_data(mdio_dev, &mdio_data,
1034 sizeof(struct fs_mii_fec_platform_info));
1035 if (ret)
1036 goto unreg;
1037 }
1038 return 0;
1039
1040unreg:
1041 platform_device_unregister(mdio_dev);
1042err:
1043 return ret;
1044}
1045
1046arch_initcall(fs_enet_mdio_of_init);
1047
1048static const char *enet_regs = "regs";
1049static const char *enet_pram = "pram";
1050static const char *enet_irq = "interrupt";
1051static char bus_id[9][BUS_ID_SIZE];
1052
1053static int __init fs_enet_of_init(void)
1054{
1055 struct device_node *np;
1056 unsigned int i;
1057 struct platform_device *fs_enet_dev = NULL;
1058 struct resource res;
1059 int ret;
1060
1061 for (np = NULL, i = 0;
1062 (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
1063 i++) {
1064 struct resource r[4];
1065 struct device_node *phy = NULL, *mdio = NULL;
1066 struct fs_platform_info fs_enet_data;
1067 const unsigned int *id;
1068 const unsigned int *phy_addr;
1069 const void *mac_addr;
1070 const phandle *ph;
1071 const char *model;
1072
1073 memset(r, 0, sizeof(r));
1074 memset(&fs_enet_data, 0, sizeof(fs_enet_data));
1075
1076 model = of_get_property(np, "model", NULL);
1077 if (model == NULL) {
1078 ret = -ENODEV;
1079 goto unreg;
1080 }
1081
1082 id = of_get_property(np, "device-id", NULL);
1083 fs_enet_data.fs_no = *id;
1084
1085 if (platform_device_skip(model, *id))
1086 continue;
1087
1088 ret = of_address_to_resource(np, 0, &r[0]);
1089 if (ret)
1090 goto err;
1091 r[0].name = enet_regs;
1092
1093 mac_addr = of_get_mac_address(np);
1094 if (mac_addr)
1095 memcpy(fs_enet_data.macaddr, mac_addr, 6);
1096
1097 ph = of_get_property(np, "phy-handle", NULL);
1098 if (ph != NULL)
1099 phy = of_find_node_by_phandle(*ph);
1100
1101 if (phy != NULL) {
1102 phy_addr = of_get_property(phy, "reg", NULL);
1103 fs_enet_data.phy_addr = *phy_addr;
1104 fs_enet_data.has_phy = 1;
1105
1106 mdio = of_get_parent(phy);
1107 ret = of_address_to_resource(mdio, 0, &res);
1108 if (ret) {
1109 of_node_put(phy);
1110 of_node_put(mdio);
1111 goto unreg;
1112 }
1113 }
1114
1115 model = of_get_property(np, "model", NULL);
1116 strcpy(fs_enet_data.fs_type, model);
1117
1118 if (strstr(model, "FEC")) {
1119 r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
1120 r[1].flags = IORESOURCE_IRQ;
1121 r[1].name = enet_irq;
1122
1123 fs_enet_dev =
1124 platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
1125
1126 if (IS_ERR(fs_enet_dev)) {
1127 ret = PTR_ERR(fs_enet_dev);
1128 goto err;
1129 }
1130
1131 fs_enet_data.rx_ring = 128;
1132 fs_enet_data.tx_ring = 16;
1133 fs_enet_data.rx_copybreak = 240;
1134 fs_enet_data.use_napi = 1;
1135 fs_enet_data.napi_weight = 17;
1136
1137 snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
1138 (u32)res.start, fs_enet_data.phy_addr);
1139 fs_enet_data.bus_id = (char*)&bus_id[i];
1140 fs_enet_data.init_ioports = init_fec_ioports;
1141 }
1142 if (strstr(model, "SCC")) {
1143 ret = of_address_to_resource(np, 1, &r[1]);
1144 if (ret)
1145 goto err;
1146 r[1].name = enet_pram;
1147
1148 r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
1149 r[2].flags = IORESOURCE_IRQ;
1150 r[2].name = enet_irq;
1151
1152 fs_enet_dev =
1153 platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
1154
1155 if (IS_ERR(fs_enet_dev)) {
1156 ret = PTR_ERR(fs_enet_dev);
1157 goto err;
1158 }
1159
1160 fs_enet_data.rx_ring = 64;
1161 fs_enet_data.tx_ring = 8;
1162 fs_enet_data.rx_copybreak = 240;
1163 fs_enet_data.use_napi = 1;
1164 fs_enet_data.napi_weight = 17;
1165
1166 snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
1167 fs_enet_data.bus_id = (char*)&bus_id[i];
1168 fs_enet_data.init_ioports = init_scc_ioports;
1169 }
1170
1171 of_node_put(phy);
1172 of_node_put(mdio);
1173
1174 ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
1175 sizeof(struct
1176 fs_platform_info));
1177 if (ret)
1178 goto unreg;
1179 }
1180 return 0;
1181
1182unreg:
1183 platform_device_unregister(fs_enet_dev);
1184err:
1185 return ret;
1186}
1187
1188arch_initcall(fs_enet_of_init);
1189
1190static int __init fsl_pcmcia_of_init(void)
1191{
1192 struct device_node *np;
1193 /*
1194 * Register all the devices which type is "pcmcia"
1195 */
1196 for_each_compatible_node(np, "pcmcia", "fsl,pq-pcmcia")
1197 of_platform_device_create(np, "m8xx-pcmcia", NULL);
1198 return 0;
1199}
1200
1201arch_initcall(fsl_pcmcia_of_init);
1202
1203static const char *smc_regs = "regs";
1204static const char *smc_pram = "pram";
1205
1206static int __init cpm_smc_uart_of_init(void)
1207{
1208 struct device_node *np;
1209 unsigned int i;
1210 struct platform_device *cpm_uart_dev;
1211 int ret;
1212
1213 for (np = NULL, i = 0;
1214 (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
1215 i++) {
1216 struct resource r[3];
1217 struct fs_uart_platform_info cpm_uart_data;
1218 const int *id;
1219 const char *model;
1220
1221 memset(r, 0, sizeof(r));
1222 memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
1223
1224 ret = of_address_to_resource(np, 0, &r[0]);
1225 if (ret)
1226 goto err;
1227
1228 r[0].name = smc_regs;
1229
1230 ret = of_address_to_resource(np, 1, &r[1]);
1231 if (ret)
1232 goto err;
1233 r[1].name = smc_pram;
1234
1235 r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
1236 r[2].flags = IORESOURCE_IRQ;
1237
1238 cpm_uart_dev =
1239 platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
1240
1241 if (IS_ERR(cpm_uart_dev)) {
1242 ret = PTR_ERR(cpm_uart_dev);
1243 goto err;
1244 }
1245
1246 model = of_get_property(np, "model", NULL);
1247 strcpy(cpm_uart_data.fs_type, model);
1248
1249 id = of_get_property(np, "device-id", NULL);
1250 cpm_uart_data.fs_no = *id;
1251 cpm_uart_data.uart_clk = ppc_proc_freq;
1252
1253 cpm_uart_data.tx_num_fifo = 4;
1254 cpm_uart_data.tx_buf_size = 32;
1255 cpm_uart_data.rx_num_fifo = 4;
1256 cpm_uart_data.rx_buf_size = 32;
1257
1258 ret =
1259 platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
1260 sizeof(struct
1261 fs_uart_platform_info));
1262 if (ret)
1263 goto unreg;
1264 }
1265
1266 return 0;
1267
1268unreg:
1269 platform_device_unregister(cpm_uart_dev);
1270err:
1271 return ret;
1272}
1273
1274arch_initcall(cpm_smc_uart_of_init);
1275
1276#endif /* CONFIG_8xx */
1277#endif /* CONFIG_PPC_CPM_NEW_BINDING */
1278
1279static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, 748static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
1280 struct spi_board_info *board_infos, 749 struct spi_board_info *board_infos,
1281 unsigned int num_board_infos, 750 unsigned int num_board_infos,
@@ -1371,25 +840,9 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
1371 sysclk = get_brgfreq(); 840 sysclk = get_brgfreq();
1372#endif 841#endif
1373 if (sysclk == -1) { 842 if (sysclk == -1) {
1374 struct device_node *np; 843 sysclk = fsl_get_sys_freq();
1375 const u32 *freq; 844 if (sysclk == -1)
1376 int size;
1377
1378 np = of_find_node_by_type(NULL, "soc");
1379 if (!np)
1380 return -ENODEV; 845 return -ENODEV;
1381
1382 freq = of_get_property(np, "clock-frequency", &size);
1383 if (!freq || size != sizeof(*freq) || *freq == 0) {
1384 freq = of_get_property(np, "bus-frequency", &size);
1385 if (!freq || size != sizeof(*freq) || *freq == 0) {
1386 of_node_put(np);
1387 return -ENODEV;
1388 }
1389 }
1390
1391 sysclk = *freq;
1392 of_node_put(np);
1393 } 846 }
1394 847
1395 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, 848 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 63e7db30a4c..74c4a9657b3 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -7,6 +7,7 @@
7extern phys_addr_t get_immrbase(void); 7extern phys_addr_t get_immrbase(void);
8extern u32 get_brgfreq(void); 8extern u32 get_brgfreq(void);
9extern u32 get_baudrate(void); 9extern u32 get_baudrate(void);
10extern u32 fsl_get_sys_freq(void);
10 11
11struct spi_board_info; 12struct spi_board_info;
12 13
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index cc81fd1141b..cff550eec7e 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -55,7 +55,7 @@ struct qe_snum {
55/* We allocate this here because it is used almost exclusively for 55/* We allocate this here because it is used almost exclusively for
56 * the communication processor devices. 56 * the communication processor devices.
57 */ 57 */
58struct qe_immap *qe_immr = NULL; 58struct qe_immap __iomem *qe_immr;
59EXPORT_SYMBOL(qe_immr); 59EXPORT_SYMBOL(qe_immr);
60 60
61static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */ 61static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */
@@ -156,7 +156,7 @@ EXPORT_SYMBOL(qe_issue_cmd);
156 */ 156 */
157static unsigned int brg_clk = 0; 157static unsigned int brg_clk = 0;
158 158
159unsigned int get_brg_clk(void) 159unsigned int qe_get_brg_clk(void)
160{ 160{
161 struct device_node *qe; 161 struct device_node *qe;
162 unsigned int size; 162 unsigned int size;
@@ -180,6 +180,7 @@ unsigned int get_brg_clk(void)
180 180
181 return brg_clk; 181 return brg_clk;
182} 182}
183EXPORT_SYMBOL(qe_get_brg_clk);
183 184
184/* Program the BRG to the given sampling rate and multiplier 185/* Program the BRG to the given sampling rate and multiplier
185 * 186 *
@@ -197,7 +198,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
197 if ((brg < QE_BRG1) || (brg > QE_BRG16)) 198 if ((brg < QE_BRG1) || (brg > QE_BRG16))
198 return -EINVAL; 199 return -EINVAL;
199 200
200 divisor = get_brg_clk() / (rate * multiplier); 201 divisor = qe_get_brg_clk() / (rate * multiplier);
201 202
202 if (divisor > QE_BRGC_DIVISOR_MAX + 1) { 203 if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
203 div16 = QE_BRGC_DIV16; 204 div16 = QE_BRGC_DIV16;
@@ -415,12 +416,6 @@ void qe_muram_dump(void)
415} 416}
416EXPORT_SYMBOL(qe_muram_dump); 417EXPORT_SYMBOL(qe_muram_dump);
417 418
418void *qe_muram_addr(unsigned long offset)
419{
420 return (void *)&qe_immr->muram[offset];
421}
422EXPORT_SYMBOL(qe_muram_addr);
423
424/* The maximum number of RISCs we support */ 419/* The maximum number of RISCs we support */
425#define MAX_QE_RISC 2 420#define MAX_QE_RISC 2
426 421
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index 736c1fcc950..93916a48afe 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -22,6 +22,7 @@
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23 23
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/qe.h>
25#include <asm/prom.h> 26#include <asm/prom.h>
26#include <sysdev/fsl_soc.h> 27#include <sysdev/fsl_soc.h>
27 28
@@ -41,7 +42,7 @@ struct port_regs {
41#endif 42#endif
42}; 43};
43 44
44static struct port_regs *par_io = NULL; 45static struct port_regs __iomem *par_io;
45static int num_par_io_ports = 0; 46static int num_par_io_ports = 0;
46 47
47int par_io_init(struct device_node *np) 48int par_io_init(struct device_node *np)
@@ -165,7 +166,7 @@ int par_io_of_config(struct device_node *np)
165 } 166 }
166 167
167 ph = of_get_property(np, "pio-handle", NULL); 168 ph = of_get_property(np, "pio-handle", NULL);
168 if (ph == 0) { 169 if (ph == NULL) {
169 printk(KERN_ERR "pio-handle not available \n"); 170 printk(KERN_ERR "pio-handle not available \n");
170 return -1; 171 return -1;
171 } 172 }
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-15 21:02:30 -0500