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Diffstat (limited to 'arch/powerpc/platforms/chrp/pci.c')
-rw-r--r--arch/powerpc/platforms/chrp/pci.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index e43465d34d2..0340a342f77 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -317,8 +317,12 @@ chrp_find_bridges(void)
317/* SL82C105 IDE Control/Status Register */ 317/* SL82C105 IDE Control/Status Register */
318#define SL82C105_IDECSR 0x40 318#define SL82C105_IDECSR 0x40
319 319
320/* Fixup for Winbond ATA quirk, required for briq */ 320/* Fixup for Winbond ATA quirk, required for briq mostly because the
321void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105) 321 * 8259 is configured for level sensitive IRQ 14 and so wants the
322 * ATA controller to be set to fully native mode or bad things
323 * will happen.
324 */
325static void __devinit chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
322{ 326{
323 u8 progif; 327 u8 progif;
324 328
@@ -334,10 +338,15 @@ void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
334 sl82c105->class |= 0x05; 338 sl82c105->class |= 0x05;
335 /* Disable SL82C105 second port */ 339 /* Disable SL82C105 second port */
336 pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003); 340 pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003);
341 /* Clear IO BARs, they will be reassigned */
342 pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_0, 0);
343 pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_1, 0);
344 pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_2, 0);
345 pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_3, 0);
337 } 346 }
338} 347}
339DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, 348DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
340 chrp_pci_fixup_winbond_ata); 349 chrp_pci_fixup_winbond_ata);
341 350
342/* Pegasos2 firmware version 20040810 configures the built-in IDE controller 351/* Pegasos2 firmware version 20040810 configures the built-in IDE controller
343 * in legacy mode, but sets the PCI registers to PCI native mode. 352 * in legacy mode, but sets the PCI registers to PCI native mode.
@@ -345,7 +354,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
345 * mode as well. The same fixup must be done to the class-code property in 354 * mode as well. The same fixup must be done to the class-code property in
346 * the IDE node /pci@80000000/ide@C,1 355 * the IDE node /pci@80000000/ide@C,1
347 */ 356 */
348static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide) 357static void __devinit chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
349{ 358{
350 u8 progif; 359 u8 progif;
351 struct pci_dev *viaisa; 360 struct pci_dev *viaisa;
@@ -366,4 +375,4 @@ static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
366 375
367 pci_dev_put(viaisa); 376 pci_dev_put(viaisa);
368} 377}
369DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata); 378DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata);