1 files changed, 105 insertions, 104 deletions
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 639ce8a709a..0cc16ab305d 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -1,7 +1,7 @@
 /*
 * MPC8560 ADS Device Tree Source
 *
- * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2006, 2008 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -9,6 +9,7 @@
 * option) any later version.
 */
+/dts-v1/;
 / {
        model = "MPC8560ADS";
@@ -32,74 +33,74 @@
                PowerPC,8560@0 {
                        device_type = "cpu";
-                        reg = <0>;
+                        reg = <0x0>;
-                        d-cache-line-size = <20>;       // 32 bytes
+                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <20>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <8000>;          // L1, 32K
+                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <8000>;          // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <04ead9a0>;
+                        timebase-frequency = <82500000>;
-                        bus-frequency = <13ab6680>;
+                        bus-frequency = <330000000>;
-                        clock-frequency = <312c8040>;
+                        clock-frequency = <825000000>;
                };
        };
        memory {
                device_type = "memory";
-                reg = <00000000 10000000>;
+                reg = <0x0 0x10000000>;
        };
        soc8560@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
                device_type = "soc";
-                ranges = <0 e0000000 00100000>;
+                ranges = <0x0 0xe0000000 0x100000>;
-                reg = <e0000000 00000200>;
+                reg = <0xe0000000 0x200>;
-                bus-frequency = <13ab6680>;
+                bus-frequency = <330000000>;
                memory-controller@2000 {
                        compatible = "fsl,8540-memory-controller";
-                        reg = <2000 1000>;
+                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
-                        interrupts = <12 2>;
+                        interrupts = <18 2>;
                };
                l2-cache-controller@20000 {
                        compatible = "fsl,8540-l2-cache-controller";
-                        reg = <20000 1000>;
+                        reg = <0x20000 0x1000>;
-                        cache-line-size = <20>; // 32 bytes
+                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <40000>;   // L2, 256K
+                        cache-size = <0x40000>; // L2, 256K
                        interrupt-parent = <&mpic>;
-                        interrupts = <10 2>;
+                        interrupts = <16 2>;
                };
                mdio@24520 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "fsl,gianfar-mdio";
-                        reg = <24520 20>;
+                        reg = <0x24520 0x20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
                                interrupts = <5 1>;
-                                reg = <0>;
+                                reg = <0x0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
                                interrupts = <5 1>;
-                                reg = <1>;
+                                reg = <0x1>;
                                device_type = "ethernet-phy";
                        };
                        phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
                                interrupts = <7 1>;
-                                reg = <2>;
+                                reg = <0x2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
                                interrupts = <7 1>;
-                                reg = <3>;
+                                reg = <0x3>;
                                device_type = "ethernet-phy";
                        };
                };
@@ -109,9 +110,9 @@
                        device_type = "network";
                        model = "TSEC";
                        compatible = "gianfar";
-                        reg = <24000 1000>;
+                        reg = <0x24000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <1d 2 1e 2 22 2>;
+                        interrupts = <29 2 30 2 34 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -121,9 +122,9 @@
                        device_type = "network";
                        model = "TSEC";
                        compatible = "gianfar";
-                        reg = <25000 1000>;
+                        reg = <0x25000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <23 2 24 2 28 2>;
+                        interrupts = <35 2 36 2 40 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -132,7 +133,7 @@
                        interrupt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
-                        reg = <40000 40000>;
+                        reg = <0x40000 0x40000>;
                        device_type = "open-pic";
                };
@@ -140,17 +141,17 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
-                        reg = <919c0 30>;
+                        reg = <0x919c0 0x30>;
                        ranges;
                        muram@80000 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                                ranges = <0 80000 10000>;
+                                ranges = <0x0 0x80000 0x10000>;
                                data@0 {
                                        compatible = "fsl,cpm-muram-data";
-                                        reg = <0 4000 9000 2000>;
+                                        reg = <0x0 0x4000 0x9000 0x2000>;
                                };
                        };
@@ -158,17 +159,17 @@
                                compatible = "fsl,mpc8560-brg",
                                             "fsl,cpm2-brg",
                                             "fsl,cpm-brg";
-                                reg = <919f0 10 915f0 10>;
+                                reg = <0x919f0 0x10 0x915f0 0x10>;
-                                clock-frequency = <d#165000000>;
+                                clock-frequency = <165000000>;
                        };
                        cpmpic: pic@90c00 {
                                interrupt-controller;
                                #address-cells = <0>;
                                #interrupt-cells = <2>;
-                                interrupts = <2e 2>;
+                                interrupts = <46 2>;
                                interrupt-parent = <&mpic>;
-                                reg = <90c00 80>;
+                                reg = <0x90c00 0x80>;
                                compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
                        };
@@ -176,11 +177,11 @@
                                device_type = "serial";
                                compatible = "fsl,mpc8560-scc-uart",
                                             "fsl,cpm2-scc-uart";
-                                reg = <91a00 20 88000 100>;
+                                reg = <0x91a00 0x20 0x88000 0x100>;
                                fsl,cpm-brg = <1>;
-                                fsl,cpm-command = <00800000>;
+                                fsl,cpm-command = <0x800000>;
-                                current-speed = <1c200>;
+                                current-speed = <115200>;
-                                interrupts = <28 8>;
+                                interrupts = <40 8>;
                                interrupt-parent = <&cpmpic>;
                        };
@@ -188,11 +189,11 @@
                                device_type = "serial";
                                compatible = "fsl,mpc8560-scc-uart",
                                             "fsl,cpm2-scc-uart";
-                                reg = <91a20 20 88100 100>;
+                                reg = <0x91a20 0x20 0x88100 0x100>;
                                fsl,cpm-brg = <2>;
-                                fsl,cpm-command = <04a00000>;
+                                fsl,cpm-command = <0x4a00000>;
-                                current-speed = <1c200>;
+                                current-speed = <115200>;
-                                interrupts = <29 8>;
+                                interrupts = <41 8>;
                                interrupt-parent = <&cpmpic>;
                        };
@@ -200,10 +201,10 @@
                                device_type = "network";
                                compatible = "fsl,mpc8560-fcc-enet",
                                             "fsl,cpm2-fcc-enet";
-                                reg = <91320 20 88500 100 913b0 1>;
+                                reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
                                local-mac-address = [ 00 00 00 00 00 00 ];
-                                fsl,cpm-command = <16200300>;
+                                fsl,cpm-command = <0x16200300>;
-                                interrupts = <21 8>;
+                                interrupts = <33 8>;
                                interrupt-parent = <&cpmpic>;
                                phy-handle = <&phy2>;
                        };
@@ -212,10 +213,10 @@
                                device_type = "network";
                                compatible = "fsl,mpc8560-fcc-enet",
                                             "fsl,cpm2-fcc-enet";
-                                reg = <91340 20 88600 100 913d0 1>;
+                                reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
                                local-mac-address = [ 00 00 00 00 00 00 ];
-                                fsl,cpm-command = <1a400300>;
+                                fsl,cpm-command = <0x1a400300>;
-                                interrupts = <22 8>;
+                                interrupts = <34 8>;
                                interrupt-parent = <&cpmpic>;
                                phy-handle = <&phy3>;
                        };
@@ -229,87 +230,87 @@
                #address-cells = <3>;
                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
                device_type = "pci";
-                reg = <e0008000 1000>;
+                reg = <0xe0008000 0x1000>;
-                clock-frequency = <3f940aa>;
+                clock-frequency = <66666666>;
-                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <
                                /* IDSEL 0x2 */
-                                 1000 0 0 1 &mpic 1 1
+                                 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
-                                 1000 0 0 2 &mpic 2 1
+                                 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
-                                 1000 0 0 3 &mpic 3 1
+                                 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
-                                 1000 0 0 4 &mpic 4 1
+                                 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
                                /* IDSEL 0x3 */
-                                 1800 0 0 1 &mpic 4 1
+                                 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
-                                 1800 0 0 2 &mpic 1 1
+                                 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
-                                 1800 0 0 3 &mpic 2 1
+                                 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
-                                 1800 0 0 4 &mpic 3 1
+                                 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
                                /* IDSEL 0x4 */
-                                 2000 0 0 1 &mpic 3 1
+                                 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
-                                 2000 0 0 2 &mpic 4 1
+                                 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
-                                 2000 0 0 3 &mpic 1 1
+                                 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
-                                 2000 0 0 4 &mpic 2 1
+                                 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
                                /* IDSEL 0x5  */
-                                 2800 0 0 1 &mpic 2 1
+                                 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
-                                 2800 0 0 2 &mpic 3 1
+                                 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
-                                 2800 0 0 3 &mpic 4 1
+                                 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
-                                 2800 0 0 4 &mpic 1 1
+                                 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
                                /* IDSEL 12 */
-                                 6000 0 0 1 &mpic 1 1
+                                 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
-                                 6000 0 0 2 &mpic 2 1
+                                 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
-                                 6000 0 0 3 &mpic 3 1
+                                 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
-                                 6000 0 0 4 &mpic 4 1
+                                 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
                                /* IDSEL 13 */
-                                 6800 0 0 1 &mpic 4 1
+                                 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
-                                 6800 0 0 2 &mpic 1 1
+                                 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
-                                 6800 0 0 3 &mpic 2 1
+                                 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
-                                 6800 0 0 4 &mpic 3 1
+                                 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
                                /* IDSEL 14*/
-                                 7000 0 0 1 &mpic 3 1
+                                 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
-                                 7000 0 0 2 &mpic 4 1
+                                 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
-                                 7000 0 0 3 &mpic 1 1
+                                 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
-                                 7000 0 0 4 &mpic 2 1
+                                 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
                                /* IDSEL 15 */
-                                 7800 0 0 1 &mpic 2 1
+                                 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
-                                 7800 0 0 2 &mpic 3 1
+                                 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
-                                 7800 0 0 3 &mpic 4 1
+                                 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
-                                 7800 0 0 4 &mpic 1 1
+                                 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
                                /* IDSEL 18 */
-                                 9000 0 0 1 &mpic 1 1
+                                 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
-                                 9000 0 0 2 &mpic 2 1
+                                 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
-                                 9000 0 0 3 &mpic 3 1
+                                 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
-                                 9000 0 0 4 &mpic 4 1
+                                 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
                                /* IDSEL 19 */
-                                 9800 0 0 1 &mpic 4 1
+                                 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
-                                 9800 0 0 2 &mpic 1 1
+                                 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
-                                 9800 0 0 3 &mpic 2 1
+                                 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
-                                 9800 0 0 4 &mpic 3 1
+                                 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
                                /* IDSEL 20 */
-                                 a000 0 0 1 &mpic 3 1
+                                 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
-                                 a000 0 0 2 &mpic 4 1
+                                 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
-                                 a000 0 0 3 &mpic 1 1
+                                 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
-                                 a000 0 0 4 &mpic 2 1
+                                 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
                                /* IDSEL 21 */
-                                 a800 0 0 1 &mpic 2 1
+                                 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
-                                 a800 0 0 2 &mpic 3 1
+                                 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
-                                 a800 0 0 3 &mpic 4 1
+                                 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
-                                 a800 0 0 4 &mpic 1 1>;
+                                 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
                interrupt-parent = <&mpic>;
-                interrupts = <18 2>;
+                interrupts = <24 2>;
                bus-range = <0 0>;
-                ranges = <02000000 0 80000000 80000000 0 20000000
+                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          01000000 0 00000000 e2000000 0 01000000>;
+                          0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
        };
 };

diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 639ce8a709a..0cc16ab305d 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -1,7 +1,7 @@
1	/*	1	/*
2	* MPC8560 ADS Device Tree Source	2	* MPC8560 ADS Device Tree Source
3	*	3	*
4	* Copyright 2006 Freescale Semiconductor Inc.	4	* Copyright 2006, 2008 Freescale Semiconductor Inc.
5	*	5	*
6	* This program is free software; you can redistribute it and/or modify it	6	* This program is free software; you can redistribute it and/or modify it
7	* under the terms of the GNU General Public License as published by the	7	* under the terms of the GNU General Public License as published by the
@@ -9,6 +9,7 @@
9	* option) any later version.	9	* option) any later version.
10	*/	10	*/
11		11
		12	/dts-v1/;
12		13
13	/ {	14	/ {
14	model = "MPC8560ADS";	15	model = "MPC8560ADS";
@@ -32,74 +33,74 @@
32		33
33	PowerPC,8560@0 {	34	PowerPC,8560@0 {
34	device_type = "cpu";	35	device_type = "cpu";
35	reg = <0>;	36	reg = <0x0>;
36	d-cache-line-size = <20>; // 32 bytes	37	d-cache-line-size = <32>; // 32 bytes
37	i-cache-line-size = <20>; // 32 bytes	38	i-cache-line-size = <32>; // 32 bytes
38	d-cache-size = <8000>; // L1, 32K	39	d-cache-size = <0x8000>; // L1, 32K
39	i-cache-size = <8000>; // L1, 32K	40	i-cache-size = <0x8000>; // L1, 32K
40	timebase-frequency = <04ead9a0>;	41	timebase-frequency = <82500000>;
41	bus-frequency = <13ab6680>;	42	bus-frequency = <330000000>;
42	clock-frequency = <312c8040>;	43	clock-frequency = <825000000>;
43	};	44	};
44	};	45	};
45		46
46	memory {	47	memory {
47	device_type = "memory";	48	device_type = "memory";
48	reg = <00000000 10000000>;	49	reg = <0x0 0x10000000>;
49	};	50	};
50		51
51	soc8560@e0000000 {	52	soc8560@e0000000 {
52	#address-cells = <1>;	53	#address-cells = <1>;
53	#size-cells = <1>;	54	#size-cells = <1>;
54	device_type = "soc";	55	device_type = "soc";
55	ranges = <0 e0000000 00100000>;	56	ranges = <0x0 0xe0000000 0x100000>;
56	reg = <e0000000 00000200>;	57	reg = <0xe0000000 0x200>;
57	bus-frequency = <13ab6680>;	58	bus-frequency = <330000000>;
58		59
59	memory-controller@2000 {	60	memory-controller@2000 {
60	compatible = "fsl,8540-memory-controller";	61	compatible = "fsl,8540-memory-controller";
61	reg = <2000 1000>;	62	reg = <0x2000 0x1000>;
62	interrupt-parent = <&mpic>;	63	interrupt-parent = <&mpic>;
63	interrupts = <12 2>;	64	interrupts = <18 2>;
64	};	65	};
65		66
66	l2-cache-controller@20000 {	67	l2-cache-controller@20000 {
67	compatible = "fsl,8540-l2-cache-controller";	68	compatible = "fsl,8540-l2-cache-controller";
68	reg = <20000 1000>;	69	reg = <0x20000 0x1000>;
69	cache-line-size = <20>; // 32 bytes	70	cache-line-size = <32>; // 32 bytes
70	cache-size = <40000>; // L2, 256K	71	cache-size = <0x40000>; // L2, 256K
71	interrupt-parent = <&mpic>;	72	interrupt-parent = <&mpic>;
72	interrupts = <10 2>;	73	interrupts = <16 2>;
73	};	74	};
74		75
75	mdio@24520 {	76	mdio@24520 {
76	#address-cells = <1>;	77	#address-cells = <1>;
77	#size-cells = <0>;	78	#size-cells = <0>;
78	compatible = "fsl,gianfar-mdio";	79	compatible = "fsl,gianfar-mdio";
79	reg = <24520 20>;	80	reg = <0x24520 0x20>;
80		81
81	phy0: ethernet-phy@0 {	82	phy0: ethernet-phy@0 {
82	interrupt-parent = <&mpic>;	83	interrupt-parent = <&mpic>;
83	interrupts = <5 1>;	84	interrupts = <5 1>;
84	reg = <0>;	85	reg = <0x0>;
85	device_type = "ethernet-phy";	86	device_type = "ethernet-phy";
86	};	87	};
87	phy1: ethernet-phy@1 {	88	phy1: ethernet-phy@1 {
88	interrupt-parent = <&mpic>;	89	interrupt-parent = <&mpic>;
89	interrupts = <5 1>;	90	interrupts = <5 1>;
90	reg = <1>;	91	reg = <0x1>;
91	device_type = "ethernet-phy";	92	device_type = "ethernet-phy";
92	};	93	};
93	phy2: ethernet-phy@2 {	94	phy2: ethernet-phy@2 {
94	interrupt-parent = <&mpic>;	95	interrupt-parent = <&mpic>;
95	interrupts = <7 1>;	96	interrupts = <7 1>;
96	reg = <2>;	97	reg = <0x2>;
97	device_type = "ethernet-phy";	98	device_type = "ethernet-phy";
98	};	99	};
99	phy3: ethernet-phy@3 {	100	phy3: ethernet-phy@3 {
100	interrupt-parent = <&mpic>;	101	interrupt-parent = <&mpic>;
101	interrupts = <7 1>;	102	interrupts = <7 1>;
102	reg = <3>;	103	reg = <0x3>;
103	device_type = "ethernet-phy";	104	device_type = "ethernet-phy";
104	};	105	};
105	};	106	};
@@ -109,9 +110,9 @@
109	device_type = "network";	110	device_type = "network";
110	model = "TSEC";	111	model = "TSEC";
111	compatible = "gianfar";	112	compatible = "gianfar";
112	reg = <24000 1000>;	113	reg = <0x24000 0x1000>;
113	local-mac-address = [ 00 00 00 00 00 00 ];	114	local-mac-address = [ 00 00 00 00 00 00 ];
114	interrupts = <1d 2 1e 2 22 2>;	115	interrupts = <29 2 30 2 34 2>;
115	interrupt-parent = <&mpic>;	116	interrupt-parent = <&mpic>;
116	phy-handle = <&phy0>;	117	phy-handle = <&phy0>;
117	};	118	};
@@ -121,9 +122,9 @@
121	device_type = "network";	122	device_type = "network";
122	model = "TSEC";	123	model = "TSEC";
123	compatible = "gianfar";	124	compatible = "gianfar";
124	reg = <25000 1000>;	125	reg = <0x25000 0x1000>;
125	local-mac-address = [ 00 00 00 00 00 00 ];	126	local-mac-address = [ 00 00 00 00 00 00 ];
126	interrupts = <23 2 24 2 28 2>;	127	interrupts = <35 2 36 2 40 2>;
127	interrupt-parent = <&mpic>;	128	interrupt-parent = <&mpic>;
128	phy-handle = <&phy1>;	129	phy-handle = <&phy1>;
129	};	130	};
@@ -132,7 +133,7 @@
132	interrupt-controller;	133	interrupt-controller;
133	#address-cells = <0>;	134	#address-cells = <0>;
134	#interrupt-cells = <2>;	135	#interrupt-cells = <2>;
135	reg = <40000 40000>;	136	reg = <0x40000 0x40000>;
136	device_type = "open-pic";	137	device_type = "open-pic";
137	};	138	};
138		139
@@ -140,17 +141,17 @@
140	#address-cells = <1>;	141	#address-cells = <1>;
141	#size-cells = <1>;	142	#size-cells = <1>;
142	compatible = "fsl,mpc8560-cpm", "fsl,cpm2";	143	compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
143	reg = <919c0 30>;	144	reg = <0x919c0 0x30>;
144	ranges;	145	ranges;
145		146
146	muram@80000 {	147	muram@80000 {
147	#address-cells = <1>;	148	#address-cells = <1>;
148	#size-cells = <1>;	149	#size-cells = <1>;
149	ranges = <0 80000 10000>;	150	ranges = <0x0 0x80000 0x10000>;
150		151
151	data@0 {	152	data@0 {
152	compatible = "fsl,cpm-muram-data";	153	compatible = "fsl,cpm-muram-data";
153	reg = <0 4000 9000 2000>;	154	reg = <0x0 0x4000 0x9000 0x2000>;
154	};	155	};
155	};	156	};
156		157
@@ -158,17 +159,17 @@
158	compatible = "fsl,mpc8560-brg",	159	compatible = "fsl,mpc8560-brg",
159	"fsl,cpm2-brg",	160	"fsl,cpm2-brg",
160	"fsl,cpm-brg";	161	"fsl,cpm-brg";
161	reg = <919f0 10 915f0 10>;	162	reg = <0x919f0 0x10 0x915f0 0x10>;
162	clock-frequency = <d#165000000>;	163	clock-frequency = <165000000>;
163	};	164	};
164		165
165	cpmpic: pic@90c00 {	166	cpmpic: pic@90c00 {
166	interrupt-controller;	167	interrupt-controller;
167	#address-cells = <0>;	168	#address-cells = <0>;
168	#interrupt-cells = <2>;	169	#interrupt-cells = <2>;
169	interrupts = <2e 2>;	170	interrupts = <46 2>;
170	interrupt-parent = <&mpic>;	171	interrupt-parent = <&mpic>;
171	reg = <90c00 80>;	172	reg = <0x90c00 0x80>;
172	compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";	173	compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
173	};	174	};
174		175
@@ -176,11 +177,11 @@
176	device_type = "serial";	177	device_type = "serial";
177	compatible = "fsl,mpc8560-scc-uart",	178	compatible = "fsl,mpc8560-scc-uart",
178	"fsl,cpm2-scc-uart";	179	"fsl,cpm2-scc-uart";
179	reg = <91a00 20 88000 100>;	180	reg = <0x91a00 0x20 0x88000 0x100>;
180	fsl,cpm-brg = <1>;	181	fsl,cpm-brg = <1>;
181	fsl,cpm-command = <00800000>;	182	fsl,cpm-command = <0x800000>;
182	current-speed = <1c200>;	183	current-speed = <115200>;
183	interrupts = <28 8>;	184	interrupts = <40 8>;
184	interrupt-parent = <&cpmpic>;	185	interrupt-parent = <&cpmpic>;
185	};	186	};
186		187
@@ -188,11 +189,11 @@
188	device_type = "serial";	189	device_type = "serial";
189	compatible = "fsl,mpc8560-scc-uart",	190	compatible = "fsl,mpc8560-scc-uart",
190	"fsl,cpm2-scc-uart";	191	"fsl,cpm2-scc-uart";
191	reg = <91a20 20 88100 100>;	192	reg = <0x91a20 0x20 0x88100 0x100>;
192	fsl,cpm-brg = <2>;	193	fsl,cpm-brg = <2>;
193	fsl,cpm-command = <04a00000>;	194	fsl,cpm-command = <0x4a00000>;
194	current-speed = <1c200>;	195	current-speed = <115200>;
195	interrupts = <29 8>;	196	interrupts = <41 8>;
196	interrupt-parent = <&cpmpic>;	197	interrupt-parent = <&cpmpic>;
197	};	198	};
198		199
@@ -200,10 +201,10 @@
200	device_type = "network";	201	device_type = "network";
201	compatible = "fsl,mpc8560-fcc-enet",	202	compatible = "fsl,mpc8560-fcc-enet",
202	"fsl,cpm2-fcc-enet";	203	"fsl,cpm2-fcc-enet";
203	reg = <91320 20 88500 100 913b0 1>;	204	reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
204	local-mac-address = [ 00 00 00 00 00 00 ];	205	local-mac-address = [ 00 00 00 00 00 00 ];
205	fsl,cpm-command = <16200300>;	206	fsl,cpm-command = <0x16200300>;
206	interrupts = <21 8>;	207	interrupts = <33 8>;
207	interrupt-parent = <&cpmpic>;	208	interrupt-parent = <&cpmpic>;
208	phy-handle = <&phy2>;	209	phy-handle = <&phy2>;
209	};	210	};
@@ -212,10 +213,10 @@
212	device_type = "network";	213	device_type = "network";
213	compatible = "fsl,mpc8560-fcc-enet",	214	compatible = "fsl,mpc8560-fcc-enet",
214	"fsl,cpm2-fcc-enet";	215	"fsl,cpm2-fcc-enet";
215	reg = <91340 20 88600 100 913d0 1>;	216	reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
216	local-mac-address = [ 00 00 00 00 00 00 ];	217	local-mac-address = [ 00 00 00 00 00 00 ];
217	fsl,cpm-command = <1a400300>;	218	fsl,cpm-command = <0x1a400300>;
218	interrupts = <22 8>;	219	interrupts = <34 8>;
219	interrupt-parent = <&cpmpic>;	220	interrupt-parent = <&cpmpic>;
220	phy-handle = <&phy3>;	221	phy-handle = <&phy3>;
221	};	222	};
@@ -229,87 +230,87 @@
229	#address-cells = <3>;	230	#address-cells = <3>;
230	compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";	231	compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
231	device_type = "pci";	232	device_type = "pci";
232	reg = <e0008000 1000>;	233	reg = <0xe0008000 0x1000>;
233	clock-frequency = <3f940aa>;	234	clock-frequency = <66666666>;
234	interrupt-map-mask = <f800 0 0 7>;	235	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
235	interrupt-map = <	236	interrupt-map = <
236		237
237	/* IDSEL 0x2 */	238	/* IDSEL 0x2 */
238	1000 0 0 1 &mpic 1 1	239	0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
239	1000 0 0 2 &mpic 2 1	240	0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
240	1000 0 0 3 &mpic 3 1	241	0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
241	1000 0 0 4 &mpic 4 1	242	0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
242		243
243	/* IDSEL 0x3 */	244	/* IDSEL 0x3 */
244	1800 0 0 1 &mpic 4 1	245	0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
245	1800 0 0 2 &mpic 1 1	246	0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
246	1800 0 0 3 &mpic 2 1	247	0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
247	1800 0 0 4 &mpic 3 1	248	0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
248		249
249	/* IDSEL 0x4 */	250	/* IDSEL 0x4 */
250	2000 0 0 1 &mpic 3 1	251	0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
251	2000 0 0 2 &mpic 4 1	252	0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
252	2000 0 0 3 &mpic 1 1	253	0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
253	2000 0 0 4 &mpic 2 1	254	0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
254		255
255	/* IDSEL 0x5 */	256	/* IDSEL 0x5 */
256	2800 0 0 1 &mpic 2 1	257	0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
257	2800 0 0 2 &mpic 3 1	258	0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
258	2800 0 0 3 &mpic 4 1	259	0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
259	2800 0 0 4 &mpic 1 1	260	0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
260		261
261	/* IDSEL 12 */	262	/* IDSEL 12 */
262	6000 0 0 1 &mpic 1 1	263	0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
263	6000 0 0 2 &mpic 2 1	264	0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
264	6000 0 0 3 &mpic 3 1	265	0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
265	6000 0 0 4 &mpic 4 1	266	0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
266		267
267	/* IDSEL 13 */	268	/* IDSEL 13 */
268	6800 0 0 1 &mpic 4 1	269	0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
269	6800 0 0 2 &mpic 1 1	270	0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
270	6800 0 0 3 &mpic 2 1	271	0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
271	6800 0 0 4 &mpic 3 1	272	0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
272		273
273	/* IDSEL 14*/	274	/* IDSEL 14*/
274	7000 0 0 1 &mpic 3 1	275	0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
275	7000 0 0 2 &mpic 4 1	276	0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
276	7000 0 0 3 &mpic 1 1	277	0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
277	7000 0 0 4 &mpic 2 1	278	0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
278		279
279	/* IDSEL 15 */	280	/* IDSEL 15 */
280	7800 0 0 1 &mpic 2 1	281	0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
281	7800 0 0 2 &mpic 3 1	282	0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
282	7800 0 0 3 &mpic 4 1	283	0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
283	7800 0 0 4 &mpic 1 1	284	0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
284		285
285	/* IDSEL 18 */	286	/* IDSEL 18 */
286	9000 0 0 1 &mpic 1 1	287	0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
287	9000 0 0 2 &mpic 2 1	288	0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
288	9000 0 0 3 &mpic 3 1	289	0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
289	9000 0 0 4 &mpic 4 1	290	0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
290		291
291	/* IDSEL 19 */	292	/* IDSEL 19 */
292	9800 0 0 1 &mpic 4 1	293	0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
293	9800 0 0 2 &mpic 1 1	294	0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
294	9800 0 0 3 &mpic 2 1	295	0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
295	9800 0 0 4 &mpic 3 1	296	0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
296		297
297	/* IDSEL 20 */	298	/* IDSEL 20 */
298	a000 0 0 1 &mpic 3 1	299	0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
299	a000 0 0 2 &mpic 4 1	300	0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
300	a000 0 0 3 &mpic 1 1	301	0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
301	a000 0 0 4 &mpic 2 1	302	0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
302		303
303	/* IDSEL 21 */	304	/* IDSEL 21 */
304	a800 0 0 1 &mpic 2 1	305	0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
305	a800 0 0 2 &mpic 3 1	306	0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
306	a800 0 0 3 &mpic 4 1	307	0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
307	a800 0 0 4 &mpic 1 1>;	308	0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
308		309
309	interrupt-parent = <&mpic>;	310	interrupt-parent = <&mpic>;
310	interrupts = <18 2>;	311	interrupts = <24 2>;
311	bus-range = <0 0>;	312	bus-range = <0 0>;
312	ranges = <02000000 0 80000000 80000000 0 20000000	313	ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
313	01000000 0 00000000 e2000000 0 01000000>;	314	0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
314	};	315	};
315	};	316	};