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-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts265
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diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 00000000000..c117a6a3a8e
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+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,265 @@
1/*
2 * MPC8378E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8378emds";
16 compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8378@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <0x20>;
36 i-cache-line-size = <0x20>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <0xe 0x8>;
70 interrupt-parent = < &ipic >;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <0xf 0x8>;
81 interrupt-parent = < &ipic >;
82 dfsrr;
83 };
84
85 spi@7000 {
86 compatible = "fsl_spi";
87 reg = <0x7000 0x1000>;
88 interrupts = <0x10 0x8>;
89 interrupt-parent = < &ipic >;
90 mode = "cpu";
91 };
92
93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94 usb@23000 {
95 compatible = "fsl-usb2-dr";
96 reg = <0x23000 0x1000>;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 interrupt-parent = < &ipic >;
100 interrupts = <0x26 0x8>;
101 phy_type = "utmi_wide";
102 };
103
104 mdio@24520 {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 compatible = "fsl,gianfar-mdio";
108 reg = <0x24520 0x20>;
109 phy2: ethernet-phy@2 {
110 interrupt-parent = < &ipic >;
111 interrupts = <0x11 0x8>;
112 reg = <2>;
113 device_type = "ethernet-phy";
114 };
115 phy3: ethernet-phy@3 {
116 interrupt-parent = < &ipic >;
117 interrupts = <0x12 0x8>;
118 reg = <3>;
119 device_type = "ethernet-phy";
120 };
121 };
122
123 enet0: ethernet@24000 {
124 cell-index = <0>;
125 device_type = "network";
126 model = "eTSEC";
127 compatible = "gianfar";
128 reg = <0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
131 phy-connection-type = "mii";
132 interrupt-parent = < &ipic >;
133 phy-handle = < &phy2 >;
134 };
135
136 enet1: ethernet@25000 {
137 cell-index = <1>;
138 device_type = "network";
139 model = "eTSEC";
140 compatible = "gianfar";
141 reg = <0x25000 0x1000>;
142 local-mac-address = [ 00 00 00 00 00 00 ];
143 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
144 phy-connection-type = "mii";
145 interrupt-parent = < &ipic >;
146 phy-handle = < &phy3 >;
147 };
148
149 serial0: serial@4500 {
150 cell-index = <0>;
151 device_type = "serial";
152 compatible = "ns16550";
153 reg = <0x4500 0x100>;
154 clock-frequency = <0>;
155 interrupts = <0x9 0x8>;
156 interrupt-parent = < &ipic >;
157 };
158
159 serial1: serial@4600 {
160 cell-index = <1>;
161 device_type = "serial";
162 compatible = "ns16550";
163 reg = <0x4600 0x100>;
164 clock-frequency = <0>;
165 interrupts = <0xa 0x8>;
166 interrupt-parent = < &ipic >;
167 };
168
169 crypto@30000 {
170 model = "SEC3";
171 compatible = "talitos";
172 reg = <0x30000 0x10000>;
173 interrupts = <0xb 0x8>;
174 interrupt-parent = < &ipic >;
175 /* Rev. 3.0 geometry */
176 num-channels = <4>;
177 channel-fifo-len = <0x18>;
178 exec-units-mask = <0x000001fe>;
179 descriptor-types-mask = <0x03ab0ebf>;
180 };
181
182 sdhc@2e000 {
183 model = "eSDHC";
184 compatible = "fsl,esdhc";
185 reg = <0x2e000 0x1000>;
186 interrupts = <0x2a 0x8>;
187 interrupt-parent = < &ipic >;
188 };
189
190 /* IPIC
191 * interrupts cell = <intr #, sense>
192 * sense values match linux IORESOURCE_IRQ_* defines:
193 * sense == 8: Level, low assertion
194 * sense == 2: Edge, high-to-low change
195 */
196 ipic: pic@700 {
197 compatible = "fsl,ipic";
198 interrupt-controller;
199 #address-cells = <0>;
200 #interrupt-cells = <2>;
201 reg = <0x700 0x100>;
202 };
203 };
204
205 pci0: pci@e0008500 {
206 cell-index = <0>;
207 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
208 interrupt-map = <
209
210 /* IDSEL 0x11 */
211 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
212 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
213 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
214 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
215
216 /* IDSEL 0x12 */
217 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
218 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
219 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
220 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
221
222 /* IDSEL 0x13 */
223 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
224 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
225 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
226 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
227
228 /* IDSEL 0x15 */
229 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
230 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
231 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
232 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
233
234 /* IDSEL 0x16 */
235 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
236 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
237 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
238 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
239
240 /* IDSEL 0x17 */
241 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
242 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
243 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
244 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
245
246 /* IDSEL 0x18 */
247 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
248 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
249 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
250 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
251 interrupt-parent = < &ipic >;
252 interrupts = <0x42 0x8>;
253 bus-range = <0 0>;
254 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
255 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
256 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
257 clock-frequency = <0>;
258 #interrupt-cells = <1>;
259 #size-cells = <2>;
260 #address-cells = <3>;
261 reg = <0xe0008500 0x100>;
262 compatible = "fsl,mpc8349-pci";
263 device_type = "pci";
264 };
265};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-25 07:25:27 -0500