21 files changed, 106 insertions, 140 deletions

diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index e1333d7319e..ff448233dab 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -53,6 +53,23 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 #define ELF_ET_DYN_BASE         (TASK32_SIZE / 3 * 2)
 
 #include <asm/processor.h>
+
+/*
+ * When this file is selected, we are definitely running a 64bit kernel.
+ * So using the right regs define in asm/reg.h
+ */
+#define WANT_COMPAT_REG_H
+
+/* These MUST be defined before elf.h gets included */
+extern void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
+#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
+#define ELF_CORE_COPY_TASK_REGS(_tsk, _dest)                            \
+({                                                                      \
+        int __res = 1;                                                  \
+        elf32_core_copy_regs(*(_dest), task_pt_regs(_tsk));             \
+        __res;                                                          \
+})
+
 #include <linux/module.h>
 #include <linux/elfcore.h>
 #include <linux/compat.h>
@@ -110,9 +127,6 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
         value->tv_usec = rem / NSEC_PER_USEC;
 }
 
-#undef ELF_CORE_COPY_REGS
-#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
-
 void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
 {
         int i;
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index 1ada45ea070..6996da4d74a 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -1,7 +1,7 @@
 /*
  *  DS1287 clockevent driver
  *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index e9b787feedc..92351e00ae0 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -1,7 +1,7 @@
 /*
  *  GT641xx clockevent routines.
  *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
index b551f48d3a0..23da108506b 100644
--- a/arch/mips/kernel/csrc-ioasic.c
+++ b/arch/mips/kernel/csrc-ioasic.c
@@ -1,7 +1,7 @@
 /*
  *  DEC I/O ASIC's counter clocksource
  *
- *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 492a0a8d70f..531ce7b1612 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -188,7 +188,8 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 
         MTC0            zero, CP0_CONTEXT       # clear context register
         PTR_LA          $28, init_thread_union
-        PTR_LI          sp, _THREAD_SIZE - 32
+        /* Set the SP after an empty pt_regs.  */
+        PTR_LI          sp, _THREAD_SIZE - 32 - PT_SIZE
         PTR_ADDU        sp, $28
         set_saved_sp    sp, t0, t1
         PTR_SUBU        sp, 4 * SZREG           # init stack pointer
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 39000f103f2..d2072cd3859 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -107,9 +107,7 @@ static unsigned int gic_irq_startup(unsigned int irq)
 {
         pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
         irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
+        GIC_SET_INTR_MASK(irq, 1);
         return 0;
 }
 
@@ -120,8 +118,7 @@ static void gic_irq_ack(unsigned int irq)
 #endif
         pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
         irq -= _irqbase;
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
+        GIC_CLR_INTR_MASK(irq, 1);
 
         if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) {
                 if (!gic_wedgeb2bok)
@@ -138,18 +135,14 @@ static void gic_mask_irq(unsigned int irq)
 {
         pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
         irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
+        GIC_CLR_INTR_MASK(irq, 1);
 }
 
 static void gic_unmask_irq(unsigned int irq)
 {
         pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
         irq -= _irqbase;
-        /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
-        GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
-                 1 << (irq % 32));
+        GIC_SET_INTR_MASK(irq, 1);
 }
 
 #ifdef CONFIG_SMP
@@ -254,6 +247,10 @@ static void __init gic_basic_init(void)
                 if (cpu == X)
                         continue;
 
+                if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 &&
+                                        _intrmap[i].ipiflag == 0)
+                        continue;
+
                 setup_intr(_intrmap[i].intrnum,
                                 _intrmap[i].cpunum,
                                 _intrmap[i].pin,
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
index 1b81b131f43..ebcc5f7ad9c 100644
--- a/arch/mips/kernel/irq-gt641xx.c
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -1,7 +1,7 @@
 /*
  *  GT641xx IRQ routines.
  *
- *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *  Copyright (C) 2007  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c
index a4d1462c27f..9b78029bea7 100644
--- a/arch/mips/kernel/irq_txx9.c
+++ b/arch/mips/kernel/irq_txx9.c
@@ -1,6 +1,4 @@
 /*
- * linux/arch/mips/kernel/irq_txx9.c
- *
  * Based on linux/arch/mips/jmr3927/rbhma3100/irq.c,
  *          linux/arch/mips/tx4927/common/tx4927_irq.c,
  *          linux/arch/mips/tx4938/common/irq.c
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index 3e9100dcc12..6f51dda87fc 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -98,7 +98,8 @@ static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v)
 static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
 {
         if (v % 4) {
-                printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
+                pr_err("module %s: dangerous R_MIPS_26 REL relocation\n",
+                       me->name);
                 return -ENOEXEC;
         }
 
@@ -118,7 +119,8 @@ static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
 static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v)
 {
         if (v % 4) {
-                printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
+                pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n",
+                       me->name);
                 return -ENOEXEC;
         }
 
@@ -222,7 +224,7 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
         return 0;
 
 out_danger:
-        printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
+        pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
 
         return -ENOEXEC;
 }
@@ -301,7 +303,7 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
                 /* This is the symbol it is referring to */
                 sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                         + ELF_MIPS_R_SYM(rel[i]);
-                if (!sym->st_value) {
+                if (IS_ERR_VALUE(sym->st_value)) {
                         /* Ignore unresolved weak symbol */
                         if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
                                 continue;
@@ -341,7 +343,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
                 /* This is the symbol it is referring to */
                 sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                         + ELF_MIPS_R_SYM(rel[i]);
-                if (!sym->st_value) {
+                if (IS_ERR_VALUE(sym->st_value)) {
                         /* Ignore unresolved weak symbol */
                         if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
                                 continue;
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index e0a4ac18fa0..26109c4d517 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -1,6 +1,4 @@
 /*
- *  linux/arch/mips/kernel/proc.c
- *
  *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
  *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
  *  Copyright (C) 2004  Maciej W. Rozycki
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index c09d681b718..f3d73e1831c 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -115,7 +115,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 {
         struct thread_info *ti = task_thread_info(p);
         struct pt_regs *childregs;
-        long childksp;
+        unsigned long childksp;
         p->set_child_tid = p->clear_child_tid = NULL;
 
         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
@@ -132,6 +132,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 
         /* set up new TSS. */
         childregs = (struct pt_regs *) childksp - 1;
+        /*  Put the stack after the struct pt_regs.  */
+        childksp = (unsigned long) childregs;
         *childregs = *regs;
         childregs->regs[7] = 0; /* Clear error flag */
 
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index c4f9ac17474..32644b4a071 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -22,7 +22,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/smp.h>
-#include <linux/smp_lock.h>
 #include <linux/user.h>
 #include <linux/security.h>
 
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 0b31b9bda04..b5708212353 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -652,6 +652,9 @@ einval:	li	v0, -ENOSYS
         sys     sys_inotify_init1       1
         sys     sys_preadv              6       /* 4330 */
         sys     sys_pwritev             6
+        sys     sys_rt_tgsigqueueinfo   4
+        sys     sys_perf_counter_open   5
+        sys     sys_accept4             4
         .endm
 
         /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index c647fd6e722..3d866f24e06 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -489,4 +489,7 @@ sys_call_table:
         PTR     sys_inotify_init1
         PTR     sys_preadv
         PTR     sys_pwritev                     /* 5390 */
+        PTR     sys_rt_tgsigqueueinfo
+        PTR     sys_perf_counter_open
+        PTR     sys_accept4
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 93cc672f452..e855b118a07 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -415,4 +415,7 @@ EXPORT(sysn32_call_table)
         PTR     sys_inotify_init1
         PTR     sys_preadv
         PTR     sys_pwritev
+        PTR     compat_sys_rt_tgsigqueueinfo    /* 5295 */
+        PTR     sys_perf_counter_open
+        PTR     sys_accept4
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index a5598b2339d..0c49f1a660b 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -535,4 +535,7 @@ sys_call_table:
         PTR     sys_inotify_init1
         PTR     compat_sys_preadv               /* 4330 */
         PTR     compat_sys_pwritev
+        PTR     compat_sys_rt_tgsigqueueinfo
+        PTR     sys_perf_counter_open
+        PTR     sys_accept4
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index 653be061b9e..ad0ff5dc4d5 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -37,80 +37,24 @@
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/mips_mt.h>
-
-/*
- * Crude manipulation of the CPU masks to control which
- * which CPU's are brought online during initialisation
- *
- * Beware... this needs to be called after CPU discovery
- * but before CPU bringup
- */
-static int __init allowcpus(char *str)
-{
-        cpumask_t cpu_allow_map;
-        char buf[256];
-        int len;
-
-        cpus_clear(cpu_allow_map);
-        if (cpulist_parse(str, &cpu_allow_map) == 0) {
-                cpu_set(0, cpu_allow_map);
-                cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
-                len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
-                buf[len] = '\0';
-                pr_debug("Allowable CPUs: %s\n", buf);
-                return 1;
-        } else
-                return 0;
-}
-__setup("allowcpus=", allowcpus);
+#include <asm/amon.h>
+#include <asm/gic.h>
 
 static void ipi_call_function(unsigned int cpu)
 {
-        unsigned int action = 0;
-
         pr_debug("CPU%d: %s cpu %d status %08x\n",
                  smp_processor_id(), __func__, cpu, read_c0_status());
 
-        switch (cpu) {
-        case 0:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE0;
-                break;
-        case 1:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE1;
-                break;
-        case 2:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE2;
-                break;
-        case 3:
-                action = GIC_IPI_EXT_INTR_CALLFNC_VPE3;
-                break;
-        }
-        gic_send_ipi(action);
+        gic_send_ipi(plat_ipi_call_int_xlate(cpu));
 }
 
 
 static void ipi_resched(unsigned int cpu)
 {
-        unsigned int action = 0;
-
         pr_debug("CPU%d: %s cpu %d status %08x\n",
                  smp_processor_id(), __func__, cpu, read_c0_status());
 
-        switch (cpu) {
-        case 0:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE0;
-                break;
-        case 1:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE1;
-                break;
-        case 2:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE2;
-                break;
-        case 3:
-                action = GIC_IPI_EXT_INTR_RESCHED_VPE3;
-                break;
-        }
-        gic_send_ipi(action);
+        gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
 }
 
 /*
@@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle)
                            (unsigned long)(gp + sizeof(struct thread_info)));
 #endif
 
-        amon_cpu_start(cpu, pc, sp, gp, a0);
+        amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
 }
 
 /*
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 8a0626cbb10..c16bb6d6c25 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -465,11 +465,8 @@ void smtc_prepare_cpus(int cpus)
         smtc_configure_tlb();
 
         for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) {
-                /*
-                 * Set the MVP bits.
-                 */
-                settc(tc);
-                write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_MVP);
+                if (tcpervpe[vpe] == 0)
+                        continue;
                 if (vpe != 0)
                         printk(", ");
                 printk("VPE %d: TC", vpe);
@@ -488,6 +485,12 @@ void smtc_prepare_cpus(int cpus)
                 }
                 if (vpe != 0) {
                         /*
+                         * Allow this VPE to control others.
+                         */
+                        write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() |
+                                              VPECONF0_MVP);
+
+                        /*
                          * Clear any stale software interrupts from VPE's Cause
                          */
                         write_vpe_c0_cause(0);
diff --git a/arch/mips/kernel/stacktrace.c b/arch/mips/kernel/stacktrace.c
index 58f5cd76c8c..d52ff77baf3 100644
--- a/arch/mips/kernel/stacktrace.c
+++ b/arch/mips/kernel/stacktrace.c
@@ -1,6 +1,4 @@
 /*
- * arch/mips/kernel/stacktrace.c
- *
  * Stack trace management functions
  *
  *  Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 9021108eb9c..05dd170a83f 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -1,7 +1,7 @@
 /*
  * Count register synchronisation.
  *
- * All CPUs will have their count registers synchronised to the CPU0 expirelo
+ * All CPUs will have their count registers synchronised to the CPU0 next time
  * value. This can cause a small timewarp for CPU0. All other CPU's should
  * not have done anything significant (but they may have had interrupts
  * enabled briefly - prom_smp_finish() should not be responsible for enabling
@@ -13,21 +13,22 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irqflags.h>
-#include <linux/r4k-timer.h>
+#include <linux/cpumask.h>
 
+#include <asm/r4k-timer.h>
 #include <asm/atomic.h>
 #include <asm/barrier.h>
-#include <asm/cpumask.h>
 #include <asm/mipsregs.h>
 
-static atomic_t __initdata count_start_flag = ATOMIC_INIT(0);
-static atomic_t __initdata count_count_start = ATOMIC_INIT(0);
-static atomic_t __initdata count_count_stop = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_start_flag = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_count_start = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_count_stop = ATOMIC_INIT(0);
+static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);
 
 #define COUNTON 100
 #define NR_LOOPS 5
 
-void __init synchronise_count_master(void)
+void __cpuinit synchronise_count_master(void)
 {
         int i;
         unsigned long flags;
@@ -42,19 +43,20 @@ void __init synchronise_count_master(void)
         return;
 #endif
 
-        pr_info("Checking COUNT synchronization across %u CPUs: ",
-                num_online_cpus());
+        printk(KERN_INFO "Synchronize counters across %u CPUs: ",
+               num_online_cpus());
 
         local_irq_save(flags);
 
         /*
          * Notify the slaves that it's time to start
          */
+        atomic_set(&count_reference, read_c0_count());
         atomic_set(&count_start_flag, 1);
         smp_wmb();
 
-        /* Count will be initialised to expirelo for all CPU's */
-        initcount = expirelo;
+        /* Count will be initialised to current timer for all CPU's */
+        initcount = read_c0_count();
 
         /*
          * We loop a few times to get a primed instruction cache,
@@ -106,7 +108,7 @@ void __init synchronise_count_master(void)
         printk("done.\n");
 }
 
-void __init synchronise_count_slave(void)
+void __cpuinit synchronise_count_slave(void)
 {
         int i;
         unsigned long flags;
@@ -131,8 +133,8 @@ void __init synchronise_count_slave(void)
         while (!atomic_read(&count_start_flag))
                 mb();
 
-        /* Count will be initialised to expirelo for all CPU's */
-        initcount = expirelo;
+        /* Count will be initialised to next expire for all CPU's */
+        initcount = atomic_read(&count_reference);
 
         ncpus = num_online_cpus();
         for (i = 0; i < NR_LOOPS; i++) {
@@ -156,4 +158,3 @@ void __init synchronise_count_slave(void)
         local_irq_restore(flags);
 }
 #undef NR_LOOPS
-#endif
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 3ca5f42e819..9a1ab7e87fd 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -73,7 +73,7 @@ static int major;
 static const int minor = 1;     /* fixed for now  */
 
 #ifdef CONFIG_MIPS_APSP_KSPD
- static struct kspd_notifications kspd_events;
+static struct kspd_notifications kspd_events;
 static int kspd_events_reqd = 0;
 #endif
 
@@ -155,10 +155,9 @@ struct {
 };
 
 static void release_progmem(void *ptr);
-extern void save_gp_address(unsigned int secbase, unsigned int rel);
 
 /* get the vpe associated with this minor */
-struct vpe *get_vpe(int minor)
+static struct vpe *get_vpe(int minor)
 {
         struct vpe *v;
 
@@ -174,7 +173,7 @@ struct vpe *get_vpe(int minor)
 }
 
 /* get the vpe associated with this minor */
-struct tc *get_tc(int index)
+static struct tc *get_tc(int index)
 {
         struct tc *t;
 
@@ -186,20 +185,8 @@ struct tc *get_tc(int index)
         return NULL;
 }
 
-struct tc *get_tc_unused(void)
-{
-        struct tc *t;
-
-        list_for_each_entry(t, &vpecontrol.tc_list, list) {
-                if (t->state == TC_STATE_UNUSED)
-                        return t;
-        }
-
-        return NULL;
-}
-
 /* allocate a vpe and associate it with this minor (or index) */
-struct vpe *alloc_vpe(int minor)
+static struct vpe *alloc_vpe(int minor)
 {
         struct vpe *v;
 
@@ -216,7 +203,7 @@ struct vpe *alloc_vpe(int minor)
 }
 
 /* allocate a tc. At startup only tc0 is running, all other can be halted. */
-struct tc *alloc_tc(int index)
+static struct tc *alloc_tc(int index)
 {
         struct tc *tc;
 
@@ -232,7 +219,7 @@ out:
 }
 
 /* clean up and free everything */
-void release_vpe(struct vpe *v)
+static void release_vpe(struct vpe *v)
 {
         list_del(&v->list);
         if (v->load_addr)
@@ -240,7 +227,7 @@ void release_vpe(struct vpe *v)
         kfree(v);
 }
 
-void dump_mtregs(void)
+static void dump_mtregs(void)
 {
         unsigned long val;
 
@@ -327,7 +314,8 @@ static void layout_sections(struct module *mod, const Elf_Ehdr * hdr,
                             || (s->sh_flags & masks[m][1])
                             || s->sh_entsize != ~0UL)
                                 continue;
-                        s->sh_entsize = get_offset(&mod->core_size, s);
+                        s->sh_entsize =
+                                get_offset((unsigned long *)&mod->core_size, s);
                 }
 
                 if (m == 0)
@@ -461,16 +449,15 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
 {
         unsigned long insnlo = *location;
         Elf32_Addr val, vallo;
+        struct mips_hi16 *l, *next;
 
         /* Sign extend the addend we extract from the lo insn.  */
         vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
 
         if (mips_hi16_list != NULL) {
-                struct mips_hi16 *l;
 
                 l = mips_hi16_list;
                 while (l != NULL) {
-                        struct mips_hi16 *next;
                         unsigned long insn;
 
                         /*
@@ -480,7 +467,7 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
                                 printk(KERN_DEBUG "VPE loader: "
                                        "apply_r_mips_lo16/hi16: \t"
                                        "inconsistent value information\n");
-                                return -ENOEXEC;
+                                goto out_free;
                         }
 
                         /*
@@ -518,6 +505,16 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
         *location = insnlo;
 
         return 0;
+
+out_free:
+        while (l != NULL) {
+                next = l->next;
+                kfree(l);
+                l = next;
+        }
+        mips_hi16_list = NULL;
+
+        return -ENOEXEC;
 }
 
 static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
@@ -541,7 +538,7 @@ static char *rstrs[] = {
         [R_MIPS_PC16] = "MIPS_PC16"
 };
 
-int apply_relocations(Elf32_Shdr *sechdrs,
+static int apply_relocations(Elf32_Shdr *sechdrs,
                       const char *strtab,
                       unsigned int symindex,
                       unsigned int relsec,
@@ -586,7 +583,7 @@ int apply_relocations(Elf32_Shdr *sechdrs,
         return 0;
 }
 
-void save_gp_address(unsigned int secbase, unsigned int rel)
+static inline void save_gp_address(unsigned int secbase, unsigned int rel)
 {
         gp_addr = secbase + rel;
         gp_offs = gp_addr - (secbase & 0xffff0000);
@@ -1387,7 +1384,7 @@ static ssize_t store_ntcs(struct device *dev, struct device_attribute *attr,
         return len;
 
 out_einval:
-        return -EINVAL;;
+        return -EINVAL;
 }
 
 static struct device_attribute vpe_class_attributes[] = {