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-rw-r--r--arch/mips/include/asm/mach-ip32/dma-coherence.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ip32/dma-coherence.h b/arch/mips/include/asm/mach-ip32/dma-coherence.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
7 *
8 */
9#ifndef __ASM_MACH_IP32_DMA_COHERENCE_H
10#define __ASM_MACH_IP32_DMA_COHERENCE_H
11
12#include <asm/ip32/crime.h>
13
14struct device;
15
16/*
17 * Few notes.
18 * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
19 * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
20 * native-endian)
21 * 3. All other devices see memory as one big chunk at 0x40000000
22 * 4. Non-PCI devices will pass NULL as struct device*
23 *
24 * Thus we translate differently, depending on device.
25 */
26
27#define RAM_OFFSET_MASK 0x3fffffffUL
28
29static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
30 size_t size)
31{
32 dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
33
34 if (dev == NULL)
35 pa += CRIME_HI_MEM_BASE;
36
37 return pa;
38}
39
40static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
41{
42 dma_addr_t pa;
43
44 pa = page_to_phys(page) & RAM_OFFSET_MASK;
45
46 if (dev == NULL)
47 pa += CRIME_HI_MEM_BASE;
48
49 return pa;
50}
51
52/* This is almost certainly wrong but it's what dma-ip32.c used to use */
53static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
54{
55 unsigned long addr = dma_addr & RAM_OFFSET_MASK;
56
57 if (dma_addr >= 256*1024*1024)
58 addr += CRIME_HI_MEM_BASE;
59
60 return addr;
61}
62
63static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
64{
65}
66
67static inline int plat_device_is_coherent(struct device *dev)
68{
69 return 0; /* IP32 is non-cohernet */
70}
71
72#endif /* __ASM_MACH_IP32_DMA_COHERENCE_H */