diff options
Diffstat (limited to 'arch/m32r/platforms/mappi/setup.c')
-rw-r--r-- | arch/m32r/platforms/mappi/setup.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c index cdd8c457402..35130ac3f8d 100644 --- a/arch/m32r/platforms/mappi/setup.c +++ b/arch/m32r/platforms/mappi/setup.c | |||
@@ -75,39 +75,39 @@ void __init init_IRQ(void) | |||
75 | 75 | ||
76 | #ifdef CONFIG_NE2000 | 76 | #ifdef CONFIG_NE2000 |
77 | /* INT0 : LAN controller (RTL8019AS) */ | 77 | /* INT0 : LAN controller (RTL8019AS) */ |
78 | set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type, | 78 | irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type, |
79 | handle_level_irq); | 79 | handle_level_irq); |
80 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | 80 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; |
81 | disable_mappi_irq(M32R_IRQ_INT0); | 81 | disable_mappi_irq(M32R_IRQ_INT0); |
82 | #endif /* CONFIG_M32R_NE2000 */ | 82 | #endif /* CONFIG_M32R_NE2000 */ |
83 | 83 | ||
84 | /* MFT2 : system timer */ | 84 | /* MFT2 : system timer */ |
85 | set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, | 85 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, |
86 | handle_level_irq); | 86 | handle_level_irq); |
87 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 87 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
88 | disable_mappi_irq(M32R_IRQ_MFT2); | 88 | disable_mappi_irq(M32R_IRQ_MFT2); |
89 | 89 | ||
90 | #ifdef CONFIG_SERIAL_M32R_SIO | 90 | #ifdef CONFIG_SERIAL_M32R_SIO |
91 | /* SIO0_R : uart receive data */ | 91 | /* SIO0_R : uart receive data */ |
92 | set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, | 92 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, |
93 | handle_level_irq); | 93 | handle_level_irq); |
94 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 94 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
95 | disable_mappi_irq(M32R_IRQ_SIO0_R); | 95 | disable_mappi_irq(M32R_IRQ_SIO0_R); |
96 | 96 | ||
97 | /* SIO0_S : uart send data */ | 97 | /* SIO0_S : uart send data */ |
98 | set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, | 98 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, |
99 | handle_level_irq); | 99 | handle_level_irq); |
100 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 100 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
101 | disable_mappi_irq(M32R_IRQ_SIO0_S); | 101 | disable_mappi_irq(M32R_IRQ_SIO0_S); |
102 | 102 | ||
103 | /* SIO1_R : uart receive data */ | 103 | /* SIO1_R : uart receive data */ |
104 | set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, | 104 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, |
105 | handle_level_irq); | 105 | handle_level_irq); |
106 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 106 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
107 | disable_mappi_irq(M32R_IRQ_SIO1_R); | 107 | disable_mappi_irq(M32R_IRQ_SIO1_R); |
108 | 108 | ||
109 | /* SIO1_S : uart send data */ | 109 | /* SIO1_S : uart send data */ |
110 | set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, | 110 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, |
111 | handle_level_irq); | 111 | handle_level_irq); |
112 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 112 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
113 | disable_mappi_irq(M32R_IRQ_SIO1_S); | 113 | disable_mappi_irq(M32R_IRQ_SIO1_S); |
@@ -115,13 +115,13 @@ void __init init_IRQ(void) | |||
115 | 115 | ||
116 | #if defined(CONFIG_M32R_PCC) | 116 | #if defined(CONFIG_M32R_PCC) |
117 | /* INT1 : pccard0 interrupt */ | 117 | /* INT1 : pccard0 interrupt */ |
118 | set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type, | 118 | irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type, |
119 | handle_level_irq); | 119 | handle_level_irq); |
120 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 120 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
121 | disable_mappi_irq(M32R_IRQ_INT1); | 121 | disable_mappi_irq(M32R_IRQ_INT1); |
122 | 122 | ||
123 | /* INT2 : pccard1 interrupt */ | 123 | /* INT2 : pccard1 interrupt */ |
124 | set_irq_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type, | 124 | irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type, |
125 | handle_level_irq); | 125 | handle_level_irq); |
126 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 126 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
127 | disable_mappi_irq(M32R_IRQ_INT2); | 127 | disable_mappi_irq(M32R_IRQ_INT2); |