diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/regs-adc.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-adc.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h index 7554c4fcddb..18a95105b88 100644 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ b/arch/arm/plat-samsung/include/plat/regs-adc.h | |||
@@ -21,16 +21,19 @@ | |||
21 | #define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) | 21 | #define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) |
22 | #define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) | 22 | #define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) |
23 | #define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) | 23 | #define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) |
24 | #define S5PV210_ADCMUX S3C2410_ADCREG(0x1C) | ||
24 | #define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) | 25 | #define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) |
25 | 26 | ||
26 | 27 | ||
27 | /* ADCCON Register Bits */ | 28 | /* ADCCON Register Bits */ |
29 | #define S3C64XX_ADCCON_TSSEL (1<<17) | ||
28 | #define S3C64XX_ADCCON_RESSEL (1<<16) | 30 | #define S3C64XX_ADCCON_RESSEL (1<<16) |
29 | #define S3C2410_ADCCON_ECFLG (1<<15) | 31 | #define S3C2410_ADCCON_ECFLG (1<<15) |
30 | #define S3C2410_ADCCON_PRSCEN (1<<14) | 32 | #define S3C2410_ADCCON_PRSCEN (1<<14) |
31 | #define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) | 33 | #define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) |
32 | #define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) | 34 | #define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) |
33 | #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) | 35 | #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) |
36 | #define S5PV210_ADCCON_SELMUX(x) (((x)&0xF)<<0) | ||
34 | #define S3C2410_ADCCON_MUXMASK (0x7<<3) | 37 | #define S3C2410_ADCCON_MUXMASK (0x7<<3) |
35 | #define S3C2410_ADCCON_STDBM (1<<2) | 38 | #define S3C2410_ADCCON_STDBM (1<<2) |
36 | #define S3C2410_ADCCON_READ_START (1<<1) | 39 | #define S3C2410_ADCCON_READ_START (1<<1) |
@@ -59,6 +62,9 @@ | |||
59 | #define S3C2410_ADCDAT1_XY_PST (0x3<<12) | 62 | #define S3C2410_ADCDAT1_XY_PST (0x3<<12) |
60 | #define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) | 63 | #define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) |
61 | 64 | ||
65 | /* ADCDLY Register Bits */ | ||
66 | #define S3C2410_ADCDLY_DELAY(x) (((x)&0xFFFF)<<0) | ||
67 | |||
62 | #endif /* __ASM_ARCH_REGS_ADC_H */ | 68 | #endif /* __ASM_ARCH_REGS_ADC_H */ |
63 | 69 | ||
64 | 70 | ||