diff options
Diffstat (limited to 'arch/arm/mach-s5pv210/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/irqs.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index e1c020e5a49..119b95fdc3c 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -55,8 +55,8 @@ | |||
55 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) | 55 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) |
56 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | 56 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) |
57 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | 57 | #define IRQ_IRDA S5P_IRQ_VIC1(18) |
58 | #define IRQ_CAN0 S5P_IRQ_VIC1(19) | 58 | #define IRQ_IIC2 S5P_IRQ_VIC1(19) |
59 | #define IRQ_CAN1 S5P_IRQ_VIC1(20) | 59 | #define IRQ_IIC3 S5P_IRQ_VIC1(20) |
60 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | 60 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) |
61 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | 61 | #define IRQ_HSITX S5P_IRQ_VIC1(22) |
62 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | 62 | #define IRQ_UHOST S5P_IRQ_VIC1(23) |
@@ -109,7 +109,7 @@ | |||
109 | 109 | ||
110 | #define IRQ_IPC S5P_IRQ_VIC3(0) | 110 | #define IRQ_IPC S5P_IRQ_VIC3(0) |
111 | #define IRQ_HOSTIF S5P_IRQ_VIC3(1) | 111 | #define IRQ_HOSTIF S5P_IRQ_VIC3(1) |
112 | #define IRQ_MMC3 S5P_IRQ_VIC3(2) | 112 | #define IRQ_HSMMC3 S5P_IRQ_VIC3(2) |
113 | #define IRQ_CEC S5P_IRQ_VIC3(3) | 113 | #define IRQ_CEC S5P_IRQ_VIC3(3) |
114 | #define IRQ_TSI S5P_IRQ_VIC3(4) | 114 | #define IRQ_TSI S5P_IRQ_VIC3(4) |
115 | #define IRQ_MDNIE0 S5P_IRQ_VIC3(5) | 115 | #define IRQ_MDNIE0 S5P_IRQ_VIC3(5) |
@@ -121,8 +121,12 @@ | |||
121 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | 121 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
122 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | 122 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) |
123 | 123 | ||
124 | /* GPIO interrupt */ | ||
125 | #define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1) | ||
126 | #define S5P_GPIOINT_GROUP_MAXNR 22 | ||
127 | |||
124 | /* Set the default NR_IRQS */ | 128 | /* Set the default NR_IRQS */ |
125 | #define NR_IRQS (IRQ_EINT(31) + 1) | 129 | #define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1) |
126 | 130 | ||
127 | /* Compatibility */ | 131 | /* Compatibility */ |
128 | #define IRQ_LCD_FIFO IRQ_LCD0 | 132 | #define IRQ_LCD_FIFO IRQ_LCD0 |