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diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
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1/* linux/arch/arm/mach-s3c6400/include/mach/map.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Memory map definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_MAP_H
16#define __ASM_ARCH_MAP_H __FILE__
17
18#include <plat/map-base.h>
19
20/*
21 * Post-mux Chip Select Regions Xm0CSn_
22 * These may be used by SROM, NAND or CF depending on settings
23 */
24
25#define S3C64XX_PA_XM0CSN0 (0x10000000)
26#define S3C64XX_PA_XM0CSN1 (0x18000000)
27#define S3C64XX_PA_XM0CSN2 (0x20000000)
28#define S3C64XX_PA_XM0CSN3 (0x28000000)
29#define S3C64XX_PA_XM0CSN4 (0x30000000)
30#define S3C64XX_PA_XM0CSN5 (0x38000000)
31
32/* HSMMC units */
33#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
34#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
35#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1)
36#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2)
37
38#define S3C_PA_UART (0x7F005000)
39#define S3C_PA_UART0 (S3C_PA_UART + 0x00)
40#define S3C_PA_UART1 (S3C_PA_UART + 0x400)
41#define S3C_PA_UART2 (S3C_PA_UART + 0x800)
42#define S3C_PA_UART3 (S3C_PA_UART + 0xC00)
43#define S3C_UART_OFFSET (0x400)
44
45/* See notes on UART VA mapping in debug-macro.S */
46#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
47
48#define S3C_VA_UART0 S3C_VA_UARTx(0)
49#define S3C_VA_UART1 S3C_VA_UARTx(1)
50#define S3C_VA_UART2 S3C_VA_UARTx(2)
51#define S3C_VA_UART3 S3C_VA_UARTx(3)
52
53#define S3C64XX_PA_SROM (0x70000000)
54
55#define S3C64XX_PA_NAND (0x70200000)
56#define S3C64XX_PA_FB (0x77100000)
57#define S3C64XX_PA_USB_HSOTG (0x7C000000)
58#define S3C64XX_PA_WATCHDOG (0x7E004000)
59#define S3C64XX_PA_RTC (0x7E005000)
60#define S3C64XX_PA_ADC (0x7E00B000)
61#define S3C64XX_PA_SYSCON (0x7E00F000)
62#define S3C64XX_PA_AC97 (0x7F001000)
63#define S3C64XX_PA_IIS0 (0x7F002000)
64#define S3C64XX_PA_IIS1 (0x7F003000)
65#define S3C64XX_PA_TIMER (0x7F006000)
66#define S3C64XX_PA_IIC0 (0x7F004000)
67#define S3C64XX_PA_SPI0 (0x7F00B000)
68#define S3C64XX_PA_SPI1 (0x7F00C000)
69#define S3C64XX_PA_PCM0 (0x7F009000)
70#define S3C64XX_PA_PCM1 (0x7F00A000)
71#define S3C64XX_PA_IISV4 (0x7F00D000)
72#define S3C64XX_PA_IIC1 (0x7F00F000)
73
74#define S3C64XX_PA_GPIO (0x7F008000)
75#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
76#define S3C64XX_SZ_GPIO SZ_4K
77
78#define S3C64XX_PA_SDRAM (0x50000000)
79#define S3C64XX_PA_VIC0 (0x71200000)
80#define S3C64XX_PA_VIC1 (0x71300000)
81
82#define S3C64XX_PA_MODEM (0x74108000)
83#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
84
85#define S3C64XX_PA_USBHOST (0x74300000)
86
87#define S3C64XX_PA_USB_HSPHY (0x7C100000)
88#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
89
90/* place VICs close together */
91#define VA_VIC0 (S3C_VA_IRQ + 0x00)
92#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
93
94/* compatibiltiy defines. */
95#define S3C_PA_TIMER S3C64XX_PA_TIMER
96#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
97#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1
98#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2
99#define S3C_PA_IIC S3C64XX_PA_IIC0
100#define S3C_PA_IIC1 S3C64XX_PA_IIC1
101#define S3C_PA_NAND S3C64XX_PA_NAND
102#define S3C_PA_FB S3C64XX_PA_FB
103#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
104#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
105#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
106
107#endif /* __ASM_ARCH_6400_MAP_H */