diff options
Diffstat (limited to 'arch/arm/mach-realview/include')
-rw-r--r-- | arch/arm/mach-realview/include/mach/board-pb1176.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-realview/include/mach/board-pb11mp.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-realview/include/mach/platform.h | 15 | ||||
-rw-r--r-- | arch/arm/mach-realview/include/mach/system.h | 10 |
4 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h index 98f8e7eeacc..34b80b7d40b 100644 --- a/arch/arm/mach-realview/include/mach/board-pb1176.h +++ b/arch/arm/mach-realview/include/mach/board-pb1176.h | |||
@@ -73,4 +73,9 @@ | |||
73 | #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ | 73 | #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ |
74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ | 74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ |
75 | 75 | ||
76 | /* | ||
77 | * Control register SYS_RESETCTL is set to 1 to force a soft reset | ||
78 | */ | ||
79 | #define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100 | ||
80 | |||
76 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ | 81 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ |
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h index f0d68e0fea0..7abf918b77e 100644 --- a/arch/arm/mach-realview/include/mach/board-pb11mp.h +++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h | |||
@@ -81,4 +81,16 @@ | |||
81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ | 81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ |
82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ | 82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ |
83 | 83 | ||
84 | /* | ||
85 | * Values for REALVIEW_SYS_RESET_CTRL | ||
86 | */ | ||
87 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01 | ||
88 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02 | ||
89 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03 | ||
90 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04 | ||
91 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05 | ||
92 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06 | ||
93 | |||
94 | #define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0) | ||
95 | |||
84 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ | 96 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ |
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index c8f50835fed..4f46bf71e75 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h | |||
@@ -119,19 +119,6 @@ | |||
119 | #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) | 119 | #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) |
120 | #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) | 120 | #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) |
121 | 121 | ||
122 | /* | ||
123 | * Values for REALVIEW_SYS_RESET_CTRL | ||
124 | */ | ||
125 | #define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01 | ||
126 | #define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02 | ||
127 | #define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03 | ||
128 | #define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04 | ||
129 | #define REALVIEW_SYS_CTRL_RESET_POR 0x05 | ||
130 | #define REALVIEW_SYS_CTRL_RESET_DoC 0x06 | ||
131 | |||
132 | #define REALVIEW_SYS_CTRL_LED (1 << 0) | ||
133 | |||
134 | |||
135 | /* ------------------------------------------------------------------------ | 122 | /* ------------------------------------------------------------------------ |
136 | * RealView control registers | 123 | * RealView control registers |
137 | * ------------------------------------------------------------------------ | 124 | * ------------------------------------------------------------------------ |
@@ -153,7 +140,7 @@ | |||
153 | * SYS_CLD, SYS_BOOTCS | 140 | * SYS_CLD, SYS_BOOTCS |
154 | */ | 141 | */ |
155 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) | 142 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) |
156 | #define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ | 143 | #define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */ |
157 | 144 | ||
158 | /* | 145 | /* |
159 | * REALVIEW_SYS_FLASH | 146 | * REALVIEW_SYS_FLASH |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h index 1a15a441e02..a30f2e3ec17 100644 --- a/arch/arm/mach-realview/include/mach/system.h +++ b/arch/arm/mach-realview/include/mach/system.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
26 | #include <mach/platform.h> | 26 | #include <mach/platform.h> |
27 | 27 | ||
28 | void (*realview_reset)(char mode); | ||
29 | |||
28 | static inline void arch_idle(void) | 30 | static inline void arch_idle(void) |
29 | { | 31 | { |
30 | /* | 32 | /* |
@@ -36,16 +38,12 @@ static inline void arch_idle(void) | |||
36 | 38 | ||
37 | static inline void arch_reset(char mode, const char *cmd) | 39 | static inline void arch_reset(char mode, const char *cmd) |
38 | { | 40 | { |
39 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET; | ||
40 | unsigned int val; | ||
41 | |||
42 | /* | 41 | /* |
43 | * To reset, we hit the on-board reset register | 42 | * To reset, we hit the on-board reset register |
44 | * in the system FPGA | 43 | * in the system FPGA |
45 | */ | 44 | */ |
46 | val = __raw_readl(hdr_ctrl); | 45 | if (realview_reset) |
47 | val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; | 46 | realview_reset(mode); |
48 | __raw_writel(val, hdr_ctrl); | ||
49 | } | 47 | } |
50 | 48 | ||
51 | #endif | 49 | #endif |