diff options
Diffstat (limited to 'arch/arm/mach-pnx4008/include/mach/dma.h')
| -rw-r--r-- | arch/arm/mach-pnx4008/include/mach/dma.h | 162 |
1 files changed, 162 insertions, 0 deletions
diff --git a/arch/arm/mach-pnx4008/include/mach/dma.h b/arch/arm/mach-pnx4008/include/mach/dma.h new file mode 100644 index 00000000000..5442d04fc57 --- /dev/null +++ b/arch/arm/mach-pnx4008/include/mach/dma.h | |||
| @@ -0,0 +1,162 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-pnx4008/include/mach/dma.h | ||
| 3 | * | ||
| 4 | * PNX4008 DMA header file | ||
| 5 | * | ||
| 6 | * Author: Vitaly Wool | ||
| 7 | * Copyright: MontaVista Software Inc. (c) 2005 | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __ASM_ARCH_DMA_H | ||
| 15 | #define __ASM_ARCH_DMA_H | ||
| 16 | |||
| 17 | #include "platform.h" | ||
| 18 | |||
| 19 | #define MAX_DMA_ADDRESS 0xffffffff | ||
| 20 | |||
| 21 | #define MAX_DMA_CHANNELS 8 | ||
| 22 | |||
| 23 | #define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE) | ||
| 24 | #define DMAC_INT_STAT (DMAC_BASE + 0x0000) | ||
| 25 | #define DMAC_INT_TC_STAT (DMAC_BASE + 0x0004) | ||
| 26 | #define DMAC_INT_TC_CLEAR (DMAC_BASE + 0x0008) | ||
| 27 | #define DMAC_INT_ERR_STAT (DMAC_BASE + 0x000c) | ||
| 28 | #define DMAC_INT_ERR_CLEAR (DMAC_BASE + 0x0010) | ||
| 29 | #define DMAC_SOFT_SREQ (DMAC_BASE + 0x0024) | ||
| 30 | #define DMAC_CONFIG (DMAC_BASE + 0x0030) | ||
| 31 | #define DMAC_Cx_SRC_ADDR(c) (DMAC_BASE + 0x0100 + (c) * 0x20) | ||
| 32 | #define DMAC_Cx_DEST_ADDR(c) (DMAC_BASE + 0x0104 + (c) * 0x20) | ||
| 33 | #define DMAC_Cx_LLI(c) (DMAC_BASE + 0x0108 + (c) * 0x20) | ||
| 34 | #define DMAC_Cx_CONTROL(c) (DMAC_BASE + 0x010c + (c) * 0x20) | ||
| 35 | #define DMAC_Cx_CONFIG(c) (DMAC_BASE + 0x0110 + (c) * 0x20) | ||
| 36 | |||
| 37 | enum { | ||
| 38 | WIDTH_BYTE = 0, | ||
| 39 | WIDTH_HWORD, | ||
| 40 | WIDTH_WORD | ||
| 41 | }; | ||
| 42 | |||
| 43 | enum { | ||
| 44 | FC_MEM2MEM_DMA, | ||
| 45 | FC_MEM2PER_DMA, | ||
| 46 | FC_PER2MEM_DMA, | ||
| 47 | FC_PER2PER_DMA, | ||
| 48 | FC_PER2PER_DPER, | ||
| 49 | FC_MEM2PER_PER, | ||
| 50 | FC_PER2MEM_PER, | ||
| 51 | FC_PER2PER_SPER | ||
| 52 | }; | ||
| 53 | |||
| 54 | enum { | ||
| 55 | DMA_INT_UNKNOWN = 0, | ||
| 56 | DMA_ERR_INT = 1, | ||
| 57 | DMA_TC_INT = 2, | ||
| 58 | }; | ||
| 59 | |||
| 60 | enum { | ||
| 61 | DMA_BUFFER_ALLOCATED = 1, | ||
| 62 | DMA_HAS_LL = 2, | ||
| 63 | }; | ||
| 64 | |||
| 65 | enum { | ||
| 66 | PER_CAM_DMA_1 = 0, | ||
| 67 | PER_NDF_FLASH = 1, | ||
| 68 | PER_MBX_SLAVE_FIFO = 2, | ||
| 69 | PER_SPI2_REC_XMIT = 3, | ||
| 70 | PER_MS_SD_RX_XMIT = 4, | ||
| 71 | PER_HS_UART_1_XMIT = 5, | ||
| 72 | PER_HS_UART_1_RX = 6, | ||
| 73 | PER_HS_UART_2_XMIT = 7, | ||
| 74 | PER_HS_UART_2_RX = 8, | ||
| 75 | PER_HS_UART_7_XMIT = 9, | ||
| 76 | PER_HS_UART_7_RX = 10, | ||
| 77 | PER_SPI1_REC_XMIT = 11, | ||
| 78 | PER_MLC_NDF_SREC = 12, | ||
| 79 | PER_CAM_DMA_2 = 13, | ||
| 80 | PER_PRNG_INFIFO = 14, | ||
| 81 | PER_PRNG_OUTFIFO = 15, | ||
| 82 | }; | ||
| 83 | |||
| 84 | struct pnx4008_dma_ch_ctrl { | ||
| 85 | int tc_mask; | ||
| 86 | int cacheable; | ||
| 87 | int bufferable; | ||
| 88 | int priv_mode; | ||
| 89 | int di; | ||
| 90 | int si; | ||
| 91 | int dest_ahb1; | ||
| 92 | int src_ahb1; | ||
| 93 | int dwidth; | ||
| 94 | int swidth; | ||
| 95 | int dbsize; | ||
| 96 | int sbsize; | ||
| 97 | int tr_size; | ||
| 98 | }; | ||
| 99 | |||
| 100 | struct pnx4008_dma_ch_config { | ||
| 101 | int halt; | ||
| 102 | int active; | ||
| 103 | int lock; | ||
| 104 | int itc; | ||
| 105 | int ie; | ||
| 106 | int flow_cntrl; | ||
| 107 | int dest_per; | ||
| 108 | int src_per; | ||
| 109 | }; | ||
| 110 | |||
| 111 | struct pnx4008_dma_ll { | ||
| 112 | unsigned long src_addr; | ||
| 113 | unsigned long dest_addr; | ||
| 114 | u32 next_dma; | ||
| 115 | unsigned long ch_ctrl; | ||
| 116 | struct pnx4008_dma_ll *next; | ||
| 117 | int flags; | ||
| 118 | void *alloc_data; | ||
| 119 | int (*free) (void *); | ||
| 120 | }; | ||
| 121 | |||
| 122 | struct pnx4008_dma_config { | ||
| 123 | int is_ll; | ||
| 124 | unsigned long src_addr; | ||
| 125 | unsigned long dest_addr; | ||
| 126 | unsigned long ch_ctrl; | ||
| 127 | unsigned long ch_cfg; | ||
| 128 | struct pnx4008_dma_ll *ll; | ||
| 129 | u32 ll_dma; | ||
| 130 | int flags; | ||
| 131 | void *alloc_data; | ||
| 132 | int (*free) (void *); | ||
| 133 | }; | ||
| 134 | |||
| 135 | extern struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t *); | ||
| 136 | extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t); | ||
| 137 | extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *); | ||
| 138 | |||
| 139 | extern int pnx4008_request_channel(char *, int, | ||
| 140 | void (*)(int, int, void *), | ||
| 141 | void *); | ||
| 142 | extern void pnx4008_free_channel(int); | ||
| 143 | extern int pnx4008_config_dma(int, int, int); | ||
| 144 | extern int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl *, | ||
| 145 | unsigned long *); | ||
| 146 | extern int pnx4008_dma_parse_control(unsigned long, | ||
| 147 | struct pnx4008_dma_ch_ctrl *); | ||
| 148 | extern int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config *, | ||
| 149 | unsigned long *); | ||
| 150 | extern int pnx4008_dma_parse_config(unsigned long, | ||
| 151 | struct pnx4008_dma_ch_config *); | ||
| 152 | extern int pnx4008_config_channel(int, struct pnx4008_dma_config *); | ||
| 153 | extern int pnx4008_channel_get_config(int, struct pnx4008_dma_config *); | ||
| 154 | extern int pnx4008_dma_ch_enable(int); | ||
| 155 | extern int pnx4008_dma_ch_disable(int); | ||
| 156 | extern int pnx4008_dma_ch_enabled(int); | ||
| 157 | extern void pnx4008_dma_split_head_entry(struct pnx4008_dma_config *, | ||
| 158 | struct pnx4008_dma_ch_ctrl *); | ||
| 159 | extern void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll *, | ||
| 160 | struct pnx4008_dma_ch_ctrl *); | ||
| 161 | |||
| 162 | #endif /* _ASM_ARCH_DMA_H */ | ||
