aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/omap_hwmod_2420_data.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c465
1 files changed, 460 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index adf6e3632a2..b85c630b64d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -16,11 +16,14 @@
16#include <plat/cpu.h> 16#include <plat/cpu.h>
17#include <plat/dma.h> 17#include <plat/dma.h>
18#include <plat/serial.h> 18#include <plat/serial.h>
19#include <plat/i2c.h>
20#include <plat/gpio.h>
19 21
20#include "omap_hwmod_common_data.h" 22#include "omap_hwmod_common_data.h"
21 23
22#include "prm-regbits-24xx.h"
23#include "cm-regbits-24xx.h" 24#include "cm-regbits-24xx.h"
25#include "prm-regbits-24xx.h"
26#include "wd_timer.h"
24 27
25/* 28/*
26 * OMAP2420 hardware module integration data 29 * OMAP2420 hardware module integration data
@@ -36,6 +39,11 @@ static struct omap_hwmod omap2420_iva_hwmod;
36static struct omap_hwmod omap2420_l3_main_hwmod; 39static struct omap_hwmod omap2420_l3_main_hwmod;
37static struct omap_hwmod omap2420_l4_core_hwmod; 40static struct omap_hwmod omap2420_l4_core_hwmod;
38static struct omap_hwmod omap2420_wd_timer2_hwmod; 41static struct omap_hwmod omap2420_wd_timer2_hwmod;
42static struct omap_hwmod omap2420_gpio1_hwmod;
43static struct omap_hwmod omap2420_gpio2_hwmod;
44static struct omap_hwmod omap2420_gpio3_hwmod;
45static struct omap_hwmod omap2420_gpio4_hwmod;
46static struct omap_hwmod omap2420_dma_system_hwmod;
39 47
40/* L3 -> L4_CORE interface */ 48/* L3 -> L4_CORE interface */
41static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { 49static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -77,6 +85,8 @@ static struct omap_hwmod omap2420_l4_wkup_hwmod;
77static struct omap_hwmod omap2420_uart1_hwmod; 85static struct omap_hwmod omap2420_uart1_hwmod;
78static struct omap_hwmod omap2420_uart2_hwmod; 86static struct omap_hwmod omap2420_uart2_hwmod;
79static struct omap_hwmod omap2420_uart3_hwmod; 87static struct omap_hwmod omap2420_uart3_hwmod;
88static struct omap_hwmod omap2420_i2c1_hwmod;
89static struct omap_hwmod omap2420_i2c2_hwmod;
80 90
81/* L4_CORE -> L4_WKUP interface */ 91/* L4_CORE -> L4_WKUP interface */
82static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { 92static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
@@ -139,6 +149,45 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
139 .user = OCP_USER_MPU | OCP_USER_SDMA, 149 .user = OCP_USER_MPU | OCP_USER_SDMA,
140}; 150};
141 151
152/* I2C IP block address space length (in bytes) */
153#define OMAP2_I2C_AS_LEN 128
154
155/* L4 CORE -> I2C1 interface */
156static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
157 {
158 .pa_start = 0x48070000,
159 .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
160 .flags = ADDR_TYPE_RT,
161 },
162};
163
164static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
165 .master = &omap2420_l4_core_hwmod,
166 .slave = &omap2420_i2c1_hwmod,
167 .clk = "i2c1_ick",
168 .addr = omap2420_i2c1_addr_space,
169 .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space),
170 .user = OCP_USER_MPU | OCP_USER_SDMA,
171};
172
173/* L4 CORE -> I2C2 interface */
174static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
175 {
176 .pa_start = 0x48072000,
177 .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
178 .flags = ADDR_TYPE_RT,
179 },
180};
181
182static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
183 .master = &omap2420_l4_core_hwmod,
184 .slave = &omap2420_i2c2_hwmod,
185 .clk = "i2c2_ick",
186 .addr = omap2420_i2c2_addr_space,
187 .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space),
188 .user = OCP_USER_MPU | OCP_USER_SDMA,
189};
190
142/* Slave interfaces on the L4_CORE interconnect */ 191/* Slave interfaces on the L4_CORE interconnect */
143static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = { 192static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
144 &omap2420_l3_main__l4_core, 193 &omap2420_l3_main__l4_core,
@@ -150,6 +199,8 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
150 &omap2_l4_core__uart1, 199 &omap2_l4_core__uart1,
151 &omap2_l4_core__uart2, 200 &omap2_l4_core__uart2,
152 &omap2_l4_core__uart3, 201 &omap2_l4_core__uart3,
202 &omap2420_l4_core__i2c1,
203 &omap2420_l4_core__i2c2
153}; 204};
154 205
155/* L4 CORE */ 206/* L4 CORE */
@@ -262,8 +313,9 @@ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
262}; 313};
263 314
264static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { 315static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = {
265 .name = "wd_timer", 316 .name = "wd_timer",
266 .sysc = &omap2420_wd_timer_sysc, 317 .sysc = &omap2420_wd_timer_sysc,
318 .pre_shutdown = &omap2_wd_timer_disable
267}; 319};
268 320
269/* wd_timer2 */ 321/* wd_timer2 */
@@ -418,6 +470,400 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
418 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), 470 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
419}; 471};
420 472
473/* I2C common */
474static struct omap_hwmod_class_sysconfig i2c_sysc = {
475 .rev_offs = 0x00,
476 .sysc_offs = 0x20,
477 .syss_offs = 0x10,
478 .sysc_flags = SYSC_HAS_SOFTRESET,
479 .sysc_fields = &omap_hwmod_sysc_type1,
480};
481
482static struct omap_hwmod_class i2c_class = {
483 .name = "i2c",
484 .sysc = &i2c_sysc,
485};
486
487static struct omap_i2c_dev_attr i2c_dev_attr;
488
489/* I2C1 */
490
491static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
492 { .irq = INT_24XX_I2C1_IRQ, },
493};
494
495static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
496 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
497 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
498};
499
500static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
501 &omap2420_l4_core__i2c1,
502};
503
504static struct omap_hwmod omap2420_i2c1_hwmod = {
505 .name = "i2c1",
506 .mpu_irqs = i2c1_mpu_irqs,
507 .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
508 .sdma_reqs = i2c1_sdma_reqs,
509 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
510 .main_clk = "i2c1_fck",
511 .prcm = {
512 .omap2 = {
513 .module_offs = CORE_MOD,
514 .prcm_reg_id = 1,
515 .module_bit = OMAP2420_EN_I2C1_SHIFT,
516 .idlest_reg_id = 1,
517 .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,
518 },
519 },
520 .slaves = omap2420_i2c1_slaves,
521 .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves),
522 .class = &i2c_class,
523 .dev_attr = &i2c_dev_attr,
524 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
525 .flags = HWMOD_16BIT_REG,
526};
527
528/* I2C2 */
529
530static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
531 { .irq = INT_24XX_I2C2_IRQ, },
532};
533
534static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
535 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
536 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
537};
538
539static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
540 &omap2420_l4_core__i2c2,
541};
542
543static struct omap_hwmod omap2420_i2c2_hwmod = {
544 .name = "i2c2",
545 .mpu_irqs = i2c2_mpu_irqs,
546 .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
547 .sdma_reqs = i2c2_sdma_reqs,
548 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
549 .main_clk = "i2c2_fck",
550 .prcm = {
551 .omap2 = {
552 .module_offs = CORE_MOD,
553 .prcm_reg_id = 1,
554 .module_bit = OMAP2420_EN_I2C2_SHIFT,
555 .idlest_reg_id = 1,
556 .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,
557 },
558 },
559 .slaves = omap2420_i2c2_slaves,
560 .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves),
561 .class = &i2c_class,
562 .dev_attr = &i2c_dev_attr,
563 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
564 .flags = HWMOD_16BIT_REG,
565};
566
567/* l4_wkup -> gpio1 */
568static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {
569 {
570 .pa_start = 0x48018000,
571 .pa_end = 0x480181ff,
572 .flags = ADDR_TYPE_RT
573 },
574};
575
576static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = {
577 .master = &omap2420_l4_wkup_hwmod,
578 .slave = &omap2420_gpio1_hwmod,
579 .clk = "gpios_ick",
580 .addr = omap2420_gpio1_addr_space,
581 .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space),
582 .user = OCP_USER_MPU | OCP_USER_SDMA,
583};
584
585/* l4_wkup -> gpio2 */
586static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = {
587 {
588 .pa_start = 0x4801a000,
589 .pa_end = 0x4801a1ff,
590 .flags = ADDR_TYPE_RT
591 },
592};
593
594static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = {
595 .master = &omap2420_l4_wkup_hwmod,
596 .slave = &omap2420_gpio2_hwmod,
597 .clk = "gpios_ick",
598 .addr = omap2420_gpio2_addr_space,
599 .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space),
600 .user = OCP_USER_MPU | OCP_USER_SDMA,
601};
602
603/* l4_wkup -> gpio3 */
604static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = {
605 {
606 .pa_start = 0x4801c000,
607 .pa_end = 0x4801c1ff,
608 .flags = ADDR_TYPE_RT
609 },
610};
611
612static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {
613 .master = &omap2420_l4_wkup_hwmod,
614 .slave = &omap2420_gpio3_hwmod,
615 .clk = "gpios_ick",
616 .addr = omap2420_gpio3_addr_space,
617 .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space),
618 .user = OCP_USER_MPU | OCP_USER_SDMA,
619};
620
621/* l4_wkup -> gpio4 */
622static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = {
623 {
624 .pa_start = 0x4801e000,
625 .pa_end = 0x4801e1ff,
626 .flags = ADDR_TYPE_RT
627 },
628};
629
630static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
631 .master = &omap2420_l4_wkup_hwmod,
632 .slave = &omap2420_gpio4_hwmod,
633 .clk = "gpios_ick",
634 .addr = omap2420_gpio4_addr_space,
635 .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space),
636 .user = OCP_USER_MPU | OCP_USER_SDMA,
637};
638
639/* gpio dev_attr */
640static struct omap_gpio_dev_attr gpio_dev_attr = {
641 .bank_width = 32,
642 .dbck_flag = false,
643};
644
645static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
646 .rev_offs = 0x0000,
647 .sysc_offs = 0x0010,
648 .syss_offs = 0x0014,
649 .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
650 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
651 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
652 .sysc_fields = &omap_hwmod_sysc_type1,
653};
654
655/*
656 * 'gpio' class
657 * general purpose io module
658 */
659static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
660 .name = "gpio",
661 .sysc = &omap242x_gpio_sysc,
662 .rev = 0,
663};
664
665/* gpio1 */
666static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
667 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
668};
669
670static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
671 &omap2420_l4_wkup__gpio1,
672};
673
674static struct omap_hwmod omap2420_gpio1_hwmod = {
675 .name = "gpio1",
676 .mpu_irqs = omap242x_gpio1_irqs,
677 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
678 .main_clk = "gpios_fck",
679 .prcm = {
680 .omap2 = {
681 .prcm_reg_id = 1,
682 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
683 .module_offs = WKUP_MOD,
684 .idlest_reg_id = 1,
685 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
686 },
687 },
688 .slaves = omap2420_gpio1_slaves,
689 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves),
690 .class = &omap242x_gpio_hwmod_class,
691 .dev_attr = &gpio_dev_attr,
692 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
693};
694
695/* gpio2 */
696static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
697 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
698};
699
700static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
701 &omap2420_l4_wkup__gpio2,
702};
703
704static struct omap_hwmod omap2420_gpio2_hwmod = {
705 .name = "gpio2",
706 .mpu_irqs = omap242x_gpio2_irqs,
707 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
708 .main_clk = "gpios_fck",
709 .prcm = {
710 .omap2 = {
711 .prcm_reg_id = 1,
712 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
713 .module_offs = WKUP_MOD,
714 .idlest_reg_id = 1,
715 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
716 },
717 },
718 .slaves = omap2420_gpio2_slaves,
719 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves),
720 .class = &omap242x_gpio_hwmod_class,
721 .dev_attr = &gpio_dev_attr,
722 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
723};
724
725/* gpio3 */
726static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
727 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
728};
729
730static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
731 &omap2420_l4_wkup__gpio3,
732};
733
734static struct omap_hwmod omap2420_gpio3_hwmod = {
735 .name = "gpio3",
736 .mpu_irqs = omap242x_gpio3_irqs,
737 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
738 .main_clk = "gpios_fck",
739 .prcm = {
740 .omap2 = {
741 .prcm_reg_id = 1,
742 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
743 .module_offs = WKUP_MOD,
744 .idlest_reg_id = 1,
745 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
746 },
747 },
748 .slaves = omap2420_gpio3_slaves,
749 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves),
750 .class = &omap242x_gpio_hwmod_class,
751 .dev_attr = &gpio_dev_attr,
752 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
753};
754
755/* gpio4 */
756static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
757 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
758};
759
760static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
761 &omap2420_l4_wkup__gpio4,
762};
763
764static struct omap_hwmod omap2420_gpio4_hwmod = {
765 .name = "gpio4",
766 .mpu_irqs = omap242x_gpio4_irqs,
767 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
768 .main_clk = "gpios_fck",
769 .prcm = {
770 .omap2 = {
771 .prcm_reg_id = 1,
772 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
773 .module_offs = WKUP_MOD,
774 .idlest_reg_id = 1,
775 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
776 },
777 },
778 .slaves = omap2420_gpio4_slaves,
779 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves),
780 .class = &omap242x_gpio_hwmod_class,
781 .dev_attr = &gpio_dev_attr,
782 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
783};
784
785/* system dma */
786static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
787 .rev_offs = 0x0000,
788 .sysc_offs = 0x002c,
789 .syss_offs = 0x0028,
790 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
791 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
792 SYSC_HAS_AUTOIDLE),
793 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
794 .sysc_fields = &omap_hwmod_sysc_type1,
795};
796
797static struct omap_hwmod_class omap2420_dma_hwmod_class = {
798 .name = "dma",
799 .sysc = &omap2420_dma_sysc,
800};
801
802/* dma attributes */
803static struct omap_dma_dev_attr dma_dev_attr = {
804 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
805 IS_CSSA_32 | IS_CDSA_32,
806 .lch_count = 32,
807};
808
809static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
810 { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
811 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
812 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
813 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
814};
815
816static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
817 {
818 .pa_start = 0x48056000,
819 .pa_end = 0x4a0560ff,
820 .flags = ADDR_TYPE_RT
821 },
822};
823
824/* dma_system -> L3 */
825static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
826 .master = &omap2420_dma_system_hwmod,
827 .slave = &omap2420_l3_main_hwmod,
828 .clk = "core_l3_ck",
829 .user = OCP_USER_MPU | OCP_USER_SDMA,
830};
831
832/* dma_system master ports */
833static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
834 &omap2420_dma_system__l3,
835};
836
837/* l4_core -> dma_system */
838static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
839 .master = &omap2420_l4_core_hwmod,
840 .slave = &omap2420_dma_system_hwmod,
841 .clk = "sdma_ick",
842 .addr = omap2420_dma_system_addrs,
843 .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
844 .user = OCP_USER_MPU | OCP_USER_SDMA,
845};
846
847/* dma_system slave ports */
848static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
849 &omap2420_l4_core__dma_system,
850};
851
852static struct omap_hwmod omap2420_dma_system_hwmod = {
853 .name = "dma",
854 .class = &omap2420_dma_hwmod_class,
855 .mpu_irqs = omap2420_dma_system_irqs,
856 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
857 .main_clk = "core_l3_ck",
858 .slaves = omap2420_dma_system_slaves,
859 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
860 .masters = omap2420_dma_system_masters,
861 .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters),
862 .dev_attr = &dma_dev_attr,
863 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
864 .flags = HWMOD_NO_IDLEST,
865};
866
421static __initdata struct omap_hwmod *omap2420_hwmods[] = { 867static __initdata struct omap_hwmod *omap2420_hwmods[] = {
422 &omap2420_l3_main_hwmod, 868 &omap2420_l3_main_hwmod,
423 &omap2420_l4_core_hwmod, 869 &omap2420_l4_core_hwmod,
@@ -428,6 +874,17 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
428 &omap2420_uart1_hwmod, 874 &omap2420_uart1_hwmod,
429 &omap2420_uart2_hwmod, 875 &omap2420_uart2_hwmod,
430 &omap2420_uart3_hwmod, 876 &omap2420_uart3_hwmod,
877 &omap2420_i2c1_hwmod,
878 &omap2420_i2c2_hwmod,
879
880 /* gpio class */
881 &omap2420_gpio1_hwmod,
882 &omap2420_gpio2_hwmod,
883 &omap2420_gpio3_hwmod,
884 &omap2420_gpio4_hwmod,
885
886 /* dma_system class*/
887 &omap2420_dma_system_hwmod,
431 NULL, 888 NULL,
432}; 889};
433 890
@@ -435,5 +892,3 @@ int __init omap2420_hwmod_init(void)
435{ 892{
436 return omap_hwmod_init(omap2420_hwmods); 893 return omap_hwmod_init(omap2420_hwmods);
437} 894}
438
439
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 09:49:24 -0400