diff options
Diffstat (limited to 'arch/arm/mach-ns9xxx')
30 files changed, 1141 insertions, 24 deletions
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 46b4f5a2e7f..a22a608a7ab 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c | |||
@@ -13,12 +13,12 @@ | |||
13 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
14 | #include <asm/gpio.h> | 14 | #include <asm/gpio.h> |
15 | 15 | ||
16 | #include <asm/arch/board.h> | 16 | #include <mach/board.h> |
17 | #include <asm/arch/processor-ns9360.h> | 17 | #include <mach/processor-ns9360.h> |
18 | #include <asm/arch/regs-sys-ns9360.h> | 18 | #include <mach/regs-sys-ns9360.h> |
19 | #include <asm/arch/regs-mem.h> | 19 | #include <mach/regs-mem.h> |
20 | #include <asm/arch/regs-bbu.h> | 20 | #include <mach/regs-bbu.h> |
21 | #include <asm/arch/regs-board-a9m9750dev.h> | 21 | #include <mach/regs-board-a9m9750dev.h> |
22 | 22 | ||
23 | #include "board-a9m9750dev.h" | 23 | #include "board-a9m9750dev.h" |
24 | 24 | ||
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.c b/arch/arm/mach-ns9xxx/gpio-ns9360.c index 7bc05a4b45b..377330c1b25 100644 --- a/arch/arm/mach-ns9xxx/gpio-ns9360.c +++ b/arch/arm/mach-ns9xxx/gpio-ns9360.c | |||
@@ -14,8 +14,8 @@ | |||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | 16 | ||
17 | #include <asm/arch/regs-bbu.h> | 17 | #include <mach/regs-bbu.h> |
18 | #include <asm/arch/processor-ns9360.h> | 18 | #include <mach/processor-ns9360.h> |
19 | 19 | ||
20 | #include "gpio-ns9360.h" | 20 | #include "gpio-ns9360.h" |
21 | 21 | ||
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c index ed4c83389d4..804c3007596 100644 --- a/arch/arm/mach-ns9xxx/gpio.c +++ b/arch/arm/mach-ns9xxx/gpio.c | |||
@@ -13,9 +13,9 @@ | |||
13 | #include <linux/spinlock.h> | 13 | #include <linux/spinlock.h> |
14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
15 | 15 | ||
16 | #include <asm/arch/gpio.h> | 16 | #include <mach/gpio.h> |
17 | #include <asm/arch/processor.h> | 17 | #include <mach/processor.h> |
18 | #include <asm/arch/processor-ns9360.h> | 18 | #include <mach/processor-ns9360.h> |
19 | #include <asm/bug.h> | 19 | #include <asm/bug.h> |
20 | #include <asm/types.h> | 20 | #include <asm/types.h> |
21 | #include <asm/bitops.h> | 21 | #include <asm/bitops.h> |
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h new file mode 100644 index 00000000000..f7e9196eb9a --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/board.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/board.h | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_BOARD_H | ||
12 | #define __ASM_ARCH_BOARD_H | ||
13 | |||
14 | #include <asm/mach-types.h> | ||
15 | |||
16 | #define board_is_a9m9750dev() (0 \ | ||
17 | || machine_is_cc9p9360dev() \ | ||
18 | || machine_is_cc9p9750dev() \ | ||
19 | ) | ||
20 | |||
21 | #define board_is_a9mvali() (0 \ | ||
22 | || machine_is_cc9p9360val() \ | ||
23 | || machine_is_cc9p9750val() \ | ||
24 | ) | ||
25 | |||
26 | #define board_is_jscc9p9210() (0 \ | ||
27 | || machine_is_cc9p9210js() \ | ||
28 | ) | ||
29 | |||
30 | #define board_is_jscc9p9215() (0 \ | ||
31 | || machine_is_cc9p9215js() \ | ||
32 | ) | ||
33 | |||
34 | #define board_is_jscc9p9360() (0 \ | ||
35 | || machine_is_cc9p9360js() \ | ||
36 | ) | ||
37 | |||
38 | #define board_is_uncbas() (0 \ | ||
39 | || machine_is_cc7ucamry() \ | ||
40 | ) | ||
41 | |||
42 | #endif /* ifndef __ASM_ARCH_BOARD_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S new file mode 100644 index 00000000000..c9530fba00a --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/debug-macro.S | ||
3 | * Copyright (C) 2006 by Digi International Inc. | ||
4 | * All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License version 2 as published by | ||
8 | * the Free Software Foundation. | ||
9 | */ | ||
10 | #include <mach/hardware.h> | ||
11 | |||
12 | #include <mach/regs-board-a9m9750dev.h> | ||
13 | |||
14 | .macro addruart,rx | ||
15 | mrc p15, 0, \rx, c1, c0 | ||
16 | tst \rx, #1 | ||
17 | ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0) | ||
18 | ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) | ||
19 | .endm | ||
20 | |||
21 | #define UART_SHIFT 2 | ||
22 | #include <asm/hardware/debug-8250.S> | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/dma.h b/arch/arm/mach-ns9xxx/include/mach/dma.h new file mode 100644 index 00000000000..3f50d8c9e5c --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/dma.h | |||
@@ -0,0 +1,14 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/dma.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_DMA_H | ||
12 | #define __ASM_ARCH_DMA_H | ||
13 | |||
14 | #endif /* ifndef __ASM_ARCH_DMA_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S b/arch/arm/mach-ns9xxx/include/mach/entry-macro.S new file mode 100644 index 00000000000..71ca0319b54 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/entry-macro.S | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #include <mach/hardware.h> | ||
12 | #include <mach/regs-sys-common.h> | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | ||
15 | ldr \base, =SYS_ISRADDR | ||
16 | .endm | ||
17 | |||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
22 | ldr \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)] | ||
23 | cmp \irqstat, #0 | ||
24 | ldrne \irqnr, [\base] | ||
25 | .endm | ||
26 | |||
27 | .macro disable_fiq | ||
28 | .endm | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/gpio.h b/arch/arm/mach-ns9xxx/include/mach/gpio.h new file mode 100644 index 00000000000..5eb34903257 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/gpio.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/gpio.h | ||
3 | * | ||
4 | * Copyright (C) 2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_GPIO_H | ||
12 | #define __ASM_ARCH_GPIO_H | ||
13 | |||
14 | #include <asm/errno.h> | ||
15 | |||
16 | int gpio_request(unsigned gpio, const char *label); | ||
17 | |||
18 | void gpio_free(unsigned gpio); | ||
19 | |||
20 | int ns9xxx_gpio_configure(unsigned gpio, int inv, int func); | ||
21 | |||
22 | int gpio_direction_input(unsigned gpio); | ||
23 | |||
24 | int gpio_direction_output(unsigned gpio, int value); | ||
25 | |||
26 | int gpio_get_value(unsigned gpio); | ||
27 | |||
28 | void gpio_set_value(unsigned gpio, int value); | ||
29 | |||
30 | /* | ||
31 | * ns9xxx can use gpio pins to trigger an irq, but it's not generic | ||
32 | * enough to be supported by the gpio_to_irq/irq_to_gpio interface | ||
33 | */ | ||
34 | static inline int gpio_to_irq(unsigned gpio) | ||
35 | { | ||
36 | return -EINVAL; | ||
37 | } | ||
38 | |||
39 | static inline int irq_to_gpio(unsigned irq) | ||
40 | { | ||
41 | return -EINVAL; | ||
42 | } | ||
43 | |||
44 | /* get the cansleep() stubs */ | ||
45 | #include <asm-generic/gpio.h> | ||
46 | |||
47 | #endif /* ifndef __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h new file mode 100644 index 00000000000..6dbb2030f56 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/hardware.h | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/hardware.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_HARDWARE_H | ||
12 | #define __ASM_ARCH_HARDWARE_H | ||
13 | |||
14 | #include <asm/memory.h> | ||
15 | |||
16 | /* | ||
17 | * NetSilicon NS9xxx internal mapping: | ||
18 | * | ||
19 | * physical <--> virtual | ||
20 | * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff | ||
21 | * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff | ||
22 | */ | ||
23 | #define io_p2v(x) (0xf0000000 \ | ||
24 | + (((x) & 0xf0000000) >> 4) \ | ||
25 | + ((x) & 0x00ffffff)) | ||
26 | |||
27 | #define io_v2p(x) ((((x) & 0x0f000000) << 4) \ | ||
28 | + ((x) & 0x00ffffff)) | ||
29 | |||
30 | #define __REGSHIFT(mask) ((mask) & (-(mask))) | ||
31 | |||
32 | #define __REGBIT(bit) ((u32)1 << (bit)) | ||
33 | #define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit)) | ||
34 | #define __REGVAL(mask, value) (((value) * __REGSHIFT(mask)) & (mask)) | ||
35 | |||
36 | #ifndef __ASSEMBLY__ | ||
37 | |||
38 | # define __REG(x) ((void __iomem __force *)io_p2v((x))) | ||
39 | # define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y))) | ||
40 | |||
41 | # define __REGSET(var, field, value) \ | ||
42 | ((var) = (((var) & ~((field) & ~(value))) | (value))) | ||
43 | |||
44 | # define REGSET(var, reg, field, value) \ | ||
45 | __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value) | ||
46 | |||
47 | # define REGSET_IDX(var, reg, field, idx, value) \ | ||
48 | __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx))) | ||
49 | |||
50 | # define REGSETIM(var, reg, field, value) \ | ||
51 | __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value))) | ||
52 | |||
53 | # define REGSETIM_IDX(var, reg, field, idx, value) \ | ||
54 | __REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value))) | ||
55 | |||
56 | # define __REGGET(var, field) \ | ||
57 | (((var) & (field))) | ||
58 | |||
59 | # define REGGET(var, reg, field) \ | ||
60 | __REGGET(var, reg ## _ ## field) | ||
61 | |||
62 | # define REGGET_IDX(var, reg, field, idx) \ | ||
63 | __REGGET(var, reg ## _ ## field((idx))) | ||
64 | |||
65 | # define REGGETIM(var, reg, field) \ | ||
66 | __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field) | ||
67 | |||
68 | # define REGGETIM_IDX(var, reg, field, idx) \ | ||
69 | __REGGET(var, reg ## _ ## field((idx))) / \ | ||
70 | __REGSHIFT(reg ## _ ## field((idx))) | ||
71 | |||
72 | #else | ||
73 | |||
74 | # define __REG(x) io_p2v(x) | ||
75 | # define __REG2(x, y) io_p2v((x) + 4 * (y)) | ||
76 | |||
77 | #endif | ||
78 | |||
79 | #endif /* ifndef __ASM_ARCH_HARDWARE_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h new file mode 100644 index 00000000000..027bf649645 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/io.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/io.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_IO_H | ||
12 | #define __ASM_ARCH_IO_H | ||
13 | |||
14 | #define IO_SPACE_LIMIT 0xffffffff /* XXX */ | ||
15 | |||
16 | #define __io(a) ((void __iomem *)(a)) | ||
17 | #define __mem_pci(a) (a) | ||
18 | #define __mem_isa(a) (IO_BASE + (a)) | ||
19 | |||
20 | #endif /* ifndef __ASM_ARCH_IO_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/irqs.h b/arch/arm/mach-ns9xxx/include/mach/irqs.h new file mode 100644 index 00000000000..13483949e21 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/irqs.h | |||
@@ -0,0 +1,86 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/irqs.h | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_IRQS_H | ||
12 | #define __ASM_ARCH_IRQS_H | ||
13 | |||
14 | /* NetSilicon 9360 */ | ||
15 | #define IRQ_NS9XXX_WATCHDOG 0 | ||
16 | #define IRQ_NS9XXX_AHBBUSERR 1 | ||
17 | #define IRQ_NS9360_BBUSAGG 2 | ||
18 | /* irq 3 is reserved for NS9360 */ | ||
19 | #define IRQ_NS9XXX_ETHRX 4 | ||
20 | #define IRQ_NS9XXX_ETHTX 5 | ||
21 | #define IRQ_NS9XXX_ETHPHY 6 | ||
22 | #define IRQ_NS9360_LCD 7 | ||
23 | #define IRQ_NS9360_SERBRX 8 | ||
24 | #define IRQ_NS9360_SERBTX 9 | ||
25 | #define IRQ_NS9360_SERARX 10 | ||
26 | #define IRQ_NS9360_SERATX 11 | ||
27 | #define IRQ_NS9360_SERCRX 12 | ||
28 | #define IRQ_NS9360_SERCTX 13 | ||
29 | #define IRQ_NS9360_I2C 14 | ||
30 | #define IRQ_NS9360_BBUSDMA 15 | ||
31 | #define IRQ_NS9360_TIMER0 16 | ||
32 | #define IRQ_NS9360_TIMER1 17 | ||
33 | #define IRQ_NS9360_TIMER2 18 | ||
34 | #define IRQ_NS9360_TIMER3 19 | ||
35 | #define IRQ_NS9360_TIMER4 20 | ||
36 | #define IRQ_NS9360_TIMER5 21 | ||
37 | #define IRQ_NS9360_TIMER6 22 | ||
38 | #define IRQ_NS9360_TIMER7 23 | ||
39 | #define IRQ_NS9360_RTC 24 | ||
40 | #define IRQ_NS9360_USBHOST 25 | ||
41 | #define IRQ_NS9360_USBDEVICE 26 | ||
42 | #define IRQ_NS9360_IEEE1284 27 | ||
43 | #define IRQ_NS9XXX_EXT0 28 | ||
44 | #define IRQ_NS9XXX_EXT1 29 | ||
45 | #define IRQ_NS9XXX_EXT2 30 | ||
46 | #define IRQ_NS9XXX_EXT3 31 | ||
47 | |||
48 | #define BBUS_IRQ(irq) (32 + irq) | ||
49 | |||
50 | #define IRQ_BBUS_DMA BBUS_IRQ(0) | ||
51 | #define IRQ_BBUS_SERBRX BBUS_IRQ(2) | ||
52 | #define IRQ_BBUS_SERBTX BBUS_IRQ(3) | ||
53 | #define IRQ_BBUS_SERARX BBUS_IRQ(4) | ||
54 | #define IRQ_BBUS_SERATX BBUS_IRQ(5) | ||
55 | #define IRQ_BBUS_SERCRX BBUS_IRQ(6) | ||
56 | #define IRQ_BBUS_SERCTX BBUS_IRQ(7) | ||
57 | #define IRQ_BBUS_SERDRX BBUS_IRQ(8) | ||
58 | #define IRQ_BBUS_SERDTX BBUS_IRQ(9) | ||
59 | #define IRQ_BBUS_I2C BBUS_IRQ(10) | ||
60 | #define IRQ_BBUS_1284 BBUS_IRQ(11) | ||
61 | #define IRQ_BBUS_UTIL BBUS_IRQ(12) | ||
62 | #define IRQ_BBUS_RTC BBUS_IRQ(13) | ||
63 | #define IRQ_BBUS_USBHST BBUS_IRQ(14) | ||
64 | #define IRQ_BBUS_USBDEV BBUS_IRQ(15) | ||
65 | #define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24) | ||
66 | #define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25) | ||
67 | |||
68 | /* | ||
69 | * these Interrupts are specific for the a9m9750dev board. | ||
70 | * They are generated by an FPGA that interrupts the CPU on | ||
71 | * IRQ_NS9360_EXT2 | ||
72 | */ | ||
73 | #define FPGA_IRQ(irq) (64 + irq) | ||
74 | |||
75 | #define IRQ_FPGA_UARTA FPGA_IRQ(0) | ||
76 | #define IRQ_FPGA_UARTB FPGA_IRQ(1) | ||
77 | #define IRQ_FPGA_UARTC FPGA_IRQ(2) | ||
78 | #define IRQ_FPGA_UARTD FPGA_IRQ(3) | ||
79 | #define IRQ_FPGA_TOUCH FPGA_IRQ(4) | ||
80 | #define IRQ_FPGA_CF FPGA_IRQ(5) | ||
81 | #define IRQ_FPGA_CAN0 FPGA_IRQ(6) | ||
82 | #define IRQ_FPGA_CAN1 FPGA_IRQ(7) | ||
83 | |||
84 | #define NR_IRQS 72 | ||
85 | |||
86 | #endif /* __ASM_ARCH_IRQS_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h new file mode 100644 index 00000000000..649ee6235b9 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/memory.h | |||
@@ -0,0 +1,27 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_MEMORY_H | ||
12 | #define __ASM_ARCH_MEMORY_H | ||
13 | |||
14 | /* x in [0..3] */ | ||
15 | #define NS9XXX_CSxSTAT_PHYS(x) UL(((x) + 4) << 28) | ||
16 | |||
17 | #define NS9XXX_CS0STAT_LENGTH UL(0x1000) | ||
18 | #define NS9XXX_CS1STAT_LENGTH UL(0x1000) | ||
19 | #define NS9XXX_CS2STAT_LENGTH UL(0x1000) | ||
20 | #define NS9XXX_CS3STAT_LENGTH UL(0x1000) | ||
21 | |||
22 | #define PHYS_OFFSET UL(0x00000000) | ||
23 | |||
24 | #define __virt_to_bus(x) __virt_to_phys(x) | ||
25 | #define __bus_to_virt(x) __phys_to_virt(x) | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h new file mode 100644 index 00000000000..f851a6b7da6 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/module.h | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/module.h | ||
3 | * | ||
4 | * Copyright (C) 2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_MODULE_H | ||
12 | #define __ASM_ARCH_MODULE_H | ||
13 | |||
14 | #include <asm/mach-types.h> | ||
15 | |||
16 | #define module_is_cc7ucamry() (0 \ | ||
17 | || machine_is_cc7ucamry() \ | ||
18 | ) | ||
19 | |||
20 | #define module_is_cc9c() (0 \ | ||
21 | || machine_is_cc9c() \ | ||
22 | ) | ||
23 | |||
24 | #define module_is_cc9p9210() (0 \ | ||
25 | || machine_is_cc9p9210() \ | ||
26 | || machine_is_cc9p9210js() \ | ||
27 | ) | ||
28 | |||
29 | #define module_is_cc9p9215() (0 \ | ||
30 | || machine_is_cc9p9215() \ | ||
31 | || machine_is_cc9p9215js() \ | ||
32 | ) | ||
33 | |||
34 | #define module_is_cc9p9360() (0 \ | ||
35 | || machine_is_a9m9360() \ | ||
36 | || machine_is_cc9p9360dev() \ | ||
37 | || machine_is_cc9p9360js() \ | ||
38 | || machine_is_cc9p9360val() \ | ||
39 | ) | ||
40 | |||
41 | #define module_is_cc9p9750() (0 \ | ||
42 | || machine_is_a9m9750() \ | ||
43 | || machine_is_cc9p9750dev() \ | ||
44 | || machine_is_cc9p9750js() \ | ||
45 | || machine_is_cc9p9750val() \ | ||
46 | ) | ||
47 | |||
48 | #define module_is_ccw9c() (0 \ | ||
49 | || machine_is_ccw9c() \ | ||
50 | ) | ||
51 | |||
52 | #define module_is_inc20otter() (0 \ | ||
53 | || machine_is_inc20otter() \ | ||
54 | ) | ||
55 | |||
56 | #define module_is_otter() (0 \ | ||
57 | || machine_is_otter() \ | ||
58 | ) | ||
59 | |||
60 | #endif /* ifndef __ASM_ARCH_MODULE_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h new file mode 100644 index 00000000000..f41deda5129 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h | ||
3 | * | ||
4 | * Copyright (C) 2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_PROCESSORNS9360_H | ||
12 | #define __ASM_ARCH_PROCESSORNS9360_H | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | |||
16 | void ns9360_reset(char mode); | ||
17 | |||
18 | unsigned long ns9360_systemclock(void) __attribute__((const)); | ||
19 | |||
20 | static inline unsigned long ns9360_cpuclock(void) __attribute__((const)); | ||
21 | static inline unsigned long ns9360_cpuclock(void) | ||
22 | { | ||
23 | return ns9360_systemclock() / 2; | ||
24 | } | ||
25 | |||
26 | void __init ns9360_map_io(void); | ||
27 | |||
28 | extern struct sys_timer ns9360_timer; | ||
29 | |||
30 | int ns9360_gpio_configure(unsigned gpio, int inv, int func); | ||
31 | |||
32 | #endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor.h b/arch/arm/mach-ns9xxx/include/mach/processor.h new file mode 100644 index 00000000000..9f77f746a38 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/processor.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/processor.h | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_PROCESSOR_H | ||
12 | #define __ASM_ARCH_PROCESSOR_H | ||
13 | |||
14 | #include <mach/module.h> | ||
15 | |||
16 | #define processor_is_ns9210() (0 \ | ||
17 | || module_is_cc7ucamry() \ | ||
18 | || module_is_cc9p9210() \ | ||
19 | || module_is_inc20otter() \ | ||
20 | || module_is_otter() \ | ||
21 | ) | ||
22 | |||
23 | #define processor_is_ns9215() (0 \ | ||
24 | || module_is_cc9p9215() \ | ||
25 | ) | ||
26 | |||
27 | #define processor_is_ns9360() (0 \ | ||
28 | || module_is_cc9p9360() \ | ||
29 | || module_is_cc9c() \ | ||
30 | || module_is_ccw9c() \ | ||
31 | ) | ||
32 | |||
33 | #define processor_is_ns9750() (0 \ | ||
34 | || module_is_cc9p9750() \ | ||
35 | ) | ||
36 | |||
37 | #define processor_is_ns921x() (0 \ | ||
38 | || processor_is_ns9210() \ | ||
39 | || processor_is_ns9215() \ | ||
40 | ) | ||
41 | |||
42 | #endif /* ifndef __ASM_ARCH_PROCESSOR_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h b/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h new file mode 100644 index 00000000000..af227c058fb --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/regs-bbu.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_REGSBBU_H | ||
12 | #define __ASM_ARCH_REGSBBU_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | /* BBus Utility */ | ||
17 | |||
18 | /* GPIO Configuration Registers block 1 */ | ||
19 | /* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is | ||
20 | * at 0 for each block. That is, BBU_GCONFb1(0) is GPIO Configuration Register | ||
21 | * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */ | ||
22 | #define BBU_GCONFb1(x) __REG2(0x90600010, (x)) | ||
23 | #define BBU_GCONFb2(x) __REG2(0x90600100, (x)) | ||
24 | |||
25 | #define BBU_GCONFx_DIR(m) __REGBIT(3 + (((m) & 7) << 2)) | ||
26 | #define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0) | ||
27 | #define BBU_GCONFx_DIR_OUTPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 1) | ||
28 | #define BBU_GCONFx_INV(m) __REGBIT(2 + (((m) & 7) << 2)) | ||
29 | #define BBU_GCONFx_INV_NO(m) __REGVAL(BBU_GCONFx_INV(m), 0) | ||
30 | #define BBU_GCONFx_INV_YES(m) __REGVAL(BBU_GCONFx_INV(m), 1) | ||
31 | #define BBU_GCONFx_FUNC(m) __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2) | ||
32 | #define BBU_GCONFx_FUNC_0(m) __REGVAL(BBU_GCONFx_FUNC(m), 0) | ||
33 | #define BBU_GCONFx_FUNC_1(m) __REGVAL(BBU_GCONFx_FUNC(m), 1) | ||
34 | #define BBU_GCONFx_FUNC_2(m) __REGVAL(BBU_GCONFx_FUNC(m), 2) | ||
35 | #define BBU_GCONFx_FUNC_3(m) __REGVAL(BBU_GCONFx_FUNC(m), 3) | ||
36 | |||
37 | #define BBU_GCTRL1 __REG(0x90600030) | ||
38 | #define BBU_GCTRL2 __REG(0x90600034) | ||
39 | #define BBU_GCTRL3 __REG(0x90600120) | ||
40 | |||
41 | #define BBU_GSTAT1 __REG(0x90600040) | ||
42 | #define BBU_GSTAT2 __REG(0x90600044) | ||
43 | #define BBU_GSTAT3 __REG(0x90600130) | ||
44 | |||
45 | #endif /* ifndef __ASM_ARCH_REGSBBU_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h b/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h new file mode 100644 index 00000000000..cd1593693f5 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h | |||
@@ -0,0 +1,24 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_REGSBOARDA9M9750_H | ||
12 | #define __ASM_ARCH_REGSBOARDA9M9750_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | #define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0)) | ||
17 | #define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08) | ||
18 | #define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10) | ||
19 | #define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18) | ||
20 | |||
21 | #define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50) | ||
22 | #define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60) | ||
23 | |||
24 | #endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h b/arch/arm/mach-ns9xxx/include/mach/regs-mem.h new file mode 100644 index 00000000000..f1625bf8cdc --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/regs-mem.h | |||
@@ -0,0 +1,135 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/regs-mem.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_REGSMEM_H | ||
12 | #define __ASM_ARCH_REGSMEM_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | /* Memory Module */ | ||
17 | |||
18 | /* Control register */ | ||
19 | #define MEM_CTRL __REG(0xa0700000) | ||
20 | |||
21 | /* Status register */ | ||
22 | #define MEM_STAT __REG(0xa0700004) | ||
23 | |||
24 | /* Configuration register */ | ||
25 | #define MEM_CONF __REG(0xa0700008) | ||
26 | |||
27 | /* Dynamic Memory Control register */ | ||
28 | #define MEM_DMCTRL __REG(0xa0700020) | ||
29 | |||
30 | /* Dynamic Memory Refresh Timer */ | ||
31 | #define MEM_DMRT __REG(0xa0700024) | ||
32 | |||
33 | /* Dynamic Memory Read Configuration register */ | ||
34 | #define MEM_DMRC __REG(0xa0700028) | ||
35 | |||
36 | /* Dynamic Memory Precharge Command Period (tRP) */ | ||
37 | #define MEM_DMPCP __REG(0xa0700030) | ||
38 | |||
39 | /* Dynamic Memory Active to Precharge Command Period (tRAS) */ | ||
40 | #define MEM_DMAPCP __REG(0xa0700034) | ||
41 | |||
42 | /* Dynamic Memory Self-Refresh Exit Time (tSREX) */ | ||
43 | #define MEM_DMSRET __REG(0xa0700038) | ||
44 | |||
45 | /* Dynamic Memory Last Data Out to Active Time (tAPR) */ | ||
46 | #define MEM_DMLDOAT __REG(0xa070003c) | ||
47 | |||
48 | /* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */ | ||
49 | #define MEM_DMDIACT __REG(0xa0700040) | ||
50 | |||
51 | /* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */ | ||
52 | #define MEM_DMWRT __REG(0xa0700044) | ||
53 | |||
54 | /* Dynamic Memory Active to Active Command Period (tRC) */ | ||
55 | #define MEM_DMAACP __REG(0xa0700048) | ||
56 | |||
57 | /* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */ | ||
58 | #define MEM_DMARP __REG(0xa070004c) | ||
59 | |||
60 | /* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */ | ||
61 | #define MEM_DMESRAC __REG(0xa0700050) | ||
62 | |||
63 | /* Dynamic Memory Active Bank A to Active B Time (tRRD) */ | ||
64 | #define MEM_DMABAABT __REG(0xa0700054) | ||
65 | |||
66 | /* Dynamic Memory Load Mode register to Active Command Time (tMRD) */ | ||
67 | #define MEM_DMLMACT __REG(0xa0700058) | ||
68 | |||
69 | /* Static Memory Extended Wait */ | ||
70 | #define MEM_SMEW __REG(0xa0700080) | ||
71 | |||
72 | /* Dynamic Memory Configuration Register x */ | ||
73 | #define MEM_DMCONF(x) __REG2(0xa0700100, (x) << 3) | ||
74 | |||
75 | /* Dynamic Memory RAS and CAS Delay x */ | ||
76 | #define MEM_DMRCD(x) __REG2(0xa0700104, (x) << 3) | ||
77 | |||
78 | /* Static Memory Configuration Register x */ | ||
79 | #define MEM_SMC(x) __REG2(0xa0700200, (x) << 3) | ||
80 | |||
81 | /* Static Memory Configuration Register x: Write protect */ | ||
82 | #define MEM_SMC_PSMC __REGBIT(20) | ||
83 | #define MEM_SMC_PSMC_OFF __REGVAL(MEM_SMC_PSMC, 0) | ||
84 | #define MEM_SMC_PSMC_ON __REGVAL(MEM_SMC_PSMC, 1) | ||
85 | |||
86 | /* Static Memory Configuration Register x: Buffer enable */ | ||
87 | #define MEM_SMC_BSMC __REGBIT(19) | ||
88 | #define MEM_SMC_BSMC_OFF __REGVAL(MEM_SMC_BSMC, 0) | ||
89 | #define MEM_SMC_BSMC_ON __REGVAL(MEM_SMC_BSMC, 1) | ||
90 | |||
91 | /* Static Memory Configuration Register x: Extended Wait */ | ||
92 | #define MEM_SMC_EW __REGBIT(8) | ||
93 | #define MEM_SMC_EW_OFF __REGVAL(MEM_SMC_EW, 0) | ||
94 | #define MEM_SMC_EW_ON __REGVAL(MEM_SMC_EW, 1) | ||
95 | |||
96 | /* Static Memory Configuration Register x: Byte lane state */ | ||
97 | #define MEM_SMC_PB __REGBIT(7) | ||
98 | #define MEM_SMC_PB_0 __REGVAL(MEM_SMC_PB, 0) | ||
99 | #define MEM_SMC_PB_1 __REGVAL(MEM_SMC_PB, 1) | ||
100 | |||
101 | /* Static Memory Configuration Register x: Chip select polarity */ | ||
102 | #define MEM_SMC_PC __REGBIT(6) | ||
103 | #define MEM_SMC_PC_AL __REGVAL(MEM_SMC_PC, 0) | ||
104 | #define MEM_SMC_PC_AH __REGVAL(MEM_SMC_PC, 1) | ||
105 | |||
106 | /* static memory configuration register x: page mode*/ | ||
107 | #define MEM_SMC_PM __REGBIT(3) | ||
108 | #define MEM_SMC_PM_DIS __REGVAL(MEM_SMC_PM, 0) | ||
109 | #define MEM_SMC_PM_ASYNC __REGVAL(MEM_SMC_PM, 1) | ||
110 | |||
111 | /* static memory configuration register x: Memory width */ | ||
112 | #define MEM_SMC_MW __REGBITS(1, 0) | ||
113 | #define MEM_SMC_MW_8 __REGVAL(MEM_SMC_MW, 0) | ||
114 | #define MEM_SMC_MW_16 __REGVAL(MEM_SMC_MW, 1) | ||
115 | #define MEM_SMC_MW_32 __REGVAL(MEM_SMC_MW, 2) | ||
116 | |||
117 | /* Static Memory Write Enable Delay x */ | ||
118 | #define MEM_SMWED(x) __REG2(0xa0700204, (x) << 3) | ||
119 | |||
120 | /* Static Memory Output Enable Delay x */ | ||
121 | #define MEM_SMOED(x) __REG2(0xa0700208, (x) << 3) | ||
122 | |||
123 | /* Static Memory Read Delay x */ | ||
124 | #define MEM_SMRD(x) __REG2(0xa070020c, (x) << 3) | ||
125 | |||
126 | /* Static Memory Page Mode Read Delay 0 */ | ||
127 | #define MEM_SMPMRD(x) __REG2(0xa0700210, (x) << 3) | ||
128 | |||
129 | /* Static Memory Write Delay */ | ||
130 | #define MEM_SMWD(x) __REG2(0xa0700214, (x) << 3) | ||
131 | |||
132 | /* Static Memory Turn Round Delay x */ | ||
133 | #define MEM_SWT(x) __REG2(0xa0700218, (x) << 3) | ||
134 | |||
135 | #endif /* ifndef __ASM_ARCH_REGSMEM_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h new file mode 100644 index 00000000000..14f91dfd573 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h | ||
3 | * | ||
4 | * Copyright (C) 2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_REGSSYSCOMMON_H | ||
13 | #define __ASM_ARCH_REGSSYSCOMMON_H | ||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | /* Interrupt Vector Address Register Level x */ | ||
17 | #define SYS_IVA(x) __REG2(0xa09000c4, (x)) | ||
18 | |||
19 | /* Interrupt Configuration registers */ | ||
20 | #define SYS_IC(x) __REG2(0xa0900144, (x)) | ||
21 | |||
22 | /* ISRADDR */ | ||
23 | #define SYS_ISRADDR __REG(0xa0900164) | ||
24 | |||
25 | /* Interrupt Status Active */ | ||
26 | #define SYS_ISA __REG(0xa0900168) | ||
27 | |||
28 | /* Interrupt Status Raw */ | ||
29 | #define SYS_ISR __REG(0xa090016c) | ||
30 | |||
31 | #endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h new file mode 100644 index 00000000000..8ff254d9901 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h | |||
@@ -0,0 +1,148 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_REGSSYSNS9360_H | ||
12 | #define __ASM_ARCH_REGSSYSNS9360_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | /* System Control Module */ | ||
17 | |||
18 | /* AHB Arbiter Gen Configuration */ | ||
19 | #define SYS_AHBAGENCONF __REG(0xa0900000) | ||
20 | |||
21 | /* BRC */ | ||
22 | #define SYS_BRC(x) __REG2(0xa0900004, (x)) | ||
23 | |||
24 | /* Timer x Reload Count register */ | ||
25 | #define SYS_TRC(x) __REG2(0xa0900044, (x)) | ||
26 | |||
27 | /* Timer x Read register */ | ||
28 | #define SYS_TR(x) __REG2(0xa0900084, (x)) | ||
29 | |||
30 | /* Timer Interrupt Status register */ | ||
31 | #define SYS_TIS __REG(0xa0900170) | ||
32 | |||
33 | /* PLL Configuration register */ | ||
34 | #define SYS_PLL __REG(0xa0900188) | ||
35 | |||
36 | /* PLL FS status */ | ||
37 | #define SYS_PLL_FS __REGBITS(24, 23) | ||
38 | |||
39 | /* PLL ND status */ | ||
40 | #define SYS_PLL_ND __REGBITS(20, 16) | ||
41 | |||
42 | /* PLL Configuration register: PLL SW change */ | ||
43 | #define SYS_PLL_SWC __REGBIT(15) | ||
44 | #define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0) | ||
45 | #define SYS_PLL_SWC_YES __REGVAL(SYS_PLL_SWC, 1) | ||
46 | |||
47 | /* Timer x Control register */ | ||
48 | #define SYS_TC(x) __REG2(0xa0900190, (x)) | ||
49 | |||
50 | /* Timer x Control register: Timer enable */ | ||
51 | #define SYS_TCx_TEN __REGBIT(15) | ||
52 | #define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 0) | ||
53 | #define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1) | ||
54 | |||
55 | /* Timer x Control register: CPU debug mode */ | ||
56 | #define SYS_TCx_TDBG __REGBIT(10) | ||
57 | #define SYS_TCx_TDBG_CONT __REGVAL(SYS_TCx_TDBG, 0) | ||
58 | #define SYS_TCx_TDBG_STOP __REGVAL(SYS_TCx_TDBG, 1) | ||
59 | |||
60 | /* Timer x Control register: Interrupt clear */ | ||
61 | #define SYS_TCx_INTC __REGBIT(9) | ||
62 | #define SYS_TCx_INTC_UNSET __REGVAL(SYS_TCx_INTC, 0) | ||
63 | #define SYS_TCx_INTC_SET __REGVAL(SYS_TCx_INTC, 1) | ||
64 | |||
65 | /* Timer x Control register: Timer clock select */ | ||
66 | #define SYS_TCx_TLCS __REGBITS(8, 6) | ||
67 | #define SYS_TCx_TLCS_CPU __REGVAL(SYS_TCx_TLCS, 0) /* CPU clock */ | ||
68 | #define SYS_TCx_TLCS_DIV2 __REGVAL(SYS_TCx_TLCS, 1) /* CPU clock / 2 */ | ||
69 | #define SYS_TCx_TLCS_DIV4 __REGVAL(SYS_TCx_TLCS, 2) /* CPU clock / 4 */ | ||
70 | #define SYS_TCx_TLCS_DIV8 __REGVAL(SYS_TCx_TLCS, 3) /* CPU clock / 8 */ | ||
71 | #define SYS_TCx_TLCS_DIV16 __REGVAL(SYS_TCx_TLCS, 4) /* CPU clock / 16 */ | ||
72 | #define SYS_TCx_TLCS_DIV32 __REGVAL(SYS_TCx_TLCS, 5) /* CPU clock / 32 */ | ||
73 | #define SYS_TCx_TLCS_DIV64 __REGVAL(SYS_TCx_TLCS, 6) /* CPU clock / 64 */ | ||
74 | #define SYS_TCx_TLCS_EXT __REGVAL(SYS_TCx_TLCS, 7) | ||
75 | |||
76 | /* Timer x Control register: Timer mode */ | ||
77 | #define SYS_TCx_TM __REGBITS(5, 4) | ||
78 | #define SYS_TCx_TM_IEE __REGVAL(SYS_TCx_TM, 0) /* Internal timer or external event */ | ||
79 | #define SYS_TCx_TM_ELL __REGVAL(SYS_TCx_TM, 1) /* External low-level, gated timer */ | ||
80 | #define SYS_TCx_TM_EHL __REGVAL(SYS_TCx_TM, 2) /* External high-level, gated timer */ | ||
81 | #define SYS_TCx_TM_CONCAT __REGVAL(SYS_TCx_TM, 3) /* Concatenate the lower timer. */ | ||
82 | |||
83 | /* Timer x Control register: Interrupt select */ | ||
84 | #define SYS_TCx_INTS __REGBIT(3) | ||
85 | #define SYS_TCx_INTS_DIS __REGVAL(SYS_TCx_INTS, 0) | ||
86 | #define SYS_TCx_INTS_EN __REGVAL(SYS_TCx_INTS, 1) | ||
87 | |||
88 | /* Timer x Control register: Up/down select */ | ||
89 | #define SYS_TCx_UDS __REGBIT(2) | ||
90 | #define SYS_TCx_UDS_UP __REGVAL(SYS_TCx_UDS, 0) | ||
91 | #define SYS_TCx_UDS_DOWN __REGVAL(SYS_TCx_UDS, 1) | ||
92 | |||
93 | /* Timer x Control register: 32- or 16-bit timer */ | ||
94 | #define SYS_TCx_TSZ __REGBIT(1) | ||
95 | #define SYS_TCx_TSZ_16 __REGVAL(SYS_TCx_TSZ, 0) | ||
96 | #define SYS_TCx_TSZ_32 __REGVAL(SYS_TCx_TSZ, 1) | ||
97 | |||
98 | /* Timer x Control register: Reload enable */ | ||
99 | #define SYS_TCx_REN __REGBIT(0) | ||
100 | #define SYS_TCx_REN_DIS __REGVAL(SYS_TCx_REN, 0) | ||
101 | #define SYS_TCx_REN_EN __REGVAL(SYS_TCx_REN, 1) | ||
102 | |||
103 | /* System Memory Chip Select x Dynamic Memory Base */ | ||
104 | #define SYS_SMCSDMB(x) __REG2(0xa09001d0, (x) << 1) | ||
105 | |||
106 | /* System Memory Chip Select x Dynamic Memory Mask */ | ||
107 | #define SYS_SMCSDMM(x) __REG2(0xa09001d4, (x) << 1) | ||
108 | |||
109 | /* System Memory Chip Select x Static Memory Base */ | ||
110 | #define SYS_SMCSSMB(x) __REG2(0xa09001f0, (x) << 1) | ||
111 | |||
112 | /* System Memory Chip Select x Static Memory Base: Chip select x base */ | ||
113 | #define SYS_SMCSSMB_CSxB __REGBITS(31, 12) | ||
114 | |||
115 | /* System Memory Chip Select x Static Memory Mask */ | ||
116 | #define SYS_SMCSSMM(x) __REG2(0xa09001f4, (x) << 1) | ||
117 | |||
118 | /* System Memory Chip Select x Static Memory Mask: Chip select x mask */ | ||
119 | #define SYS_SMCSSMM_CSxM __REGBITS(31, 12) | ||
120 | |||
121 | /* System Memory Chip Select x Static Memory Mask: Chip select x enable */ | ||
122 | #define SYS_SMCSSMM_CSEx __REGBIT(0) | ||
123 | #define SYS_SMCSSMM_CSEx_DIS __REGVAL(SYS_SMCSSMM_CSEx, 0) | ||
124 | #define SYS_SMCSSMM_CSEx_EN __REGVAL(SYS_SMCSSMM_CSEx, 1) | ||
125 | |||
126 | /* General purpose, user-defined ID register */ | ||
127 | #define SYS_GENID __REG(0xa0900210) | ||
128 | |||
129 | /* External Interrupt x Control register */ | ||
130 | #define SYS_EIC(x) __REG2(0xa0900214, (x)) | ||
131 | |||
132 | /* External Interrupt x Control register: Status */ | ||
133 | #define SYS_EIC_STS __REGBIT(3) | ||
134 | |||
135 | /* External Interrupt x Control register: Clear */ | ||
136 | #define SYS_EIC_CLR __REGBIT(2) | ||
137 | |||
138 | /* External Interrupt x Control register: Polarity */ | ||
139 | #define SYS_EIC_PLTY __REGBIT(1) | ||
140 | #define SYS_EIC_PLTY_AH __REGVAL(SYS_EIC_PLTY, 0) | ||
141 | #define SYS_EIC_PLTY_AL __REGVAL(SYS_EIC_PLTY, 1) | ||
142 | |||
143 | /* External Interrupt x Control register: Level edge */ | ||
144 | #define SYS_EIC_LVEDG __REGBIT(0) | ||
145 | #define SYS_EIC_LVEDG_LEVEL __REGVAL(SYS_EIC_LVEDG, 0) | ||
146 | #define SYS_EIC_LVEDG_EDGE __REGVAL(SYS_EIC_LVEDG, 1) | ||
147 | |||
148 | #endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/system.h b/arch/arm/mach-ns9xxx/include/mach/system.h new file mode 100644 index 00000000000..e2068c57415 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/system.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2006,2007 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | #include <asm/proc-fns.h> | ||
15 | #include <mach/processor.h> | ||
16 | #include <mach/processor-ns9360.h> | ||
17 | |||
18 | static inline void arch_idle(void) | ||
19 | { | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | static inline void arch_reset(char mode) | ||
24 | { | ||
25 | #ifdef CONFIG_PROCESSOR_NS9360 | ||
26 | if (processor_is_ns9360()) | ||
27 | ns9360_reset(mode); | ||
28 | else | ||
29 | #endif | ||
30 | BUG(); | ||
31 | |||
32 | BUG(); | ||
33 | } | ||
34 | |||
35 | #endif /* ifndef __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/timex.h b/arch/arm/mach-ns9xxx/include/mach/timex.h new file mode 100644 index 00000000000..734a8d8bd57 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/timex.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/timex.h | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_TIMEX_H | ||
12 | #define __ASM_ARCH_TIMEX_H | ||
13 | |||
14 | /* | ||
15 | * value for CLOCK_TICK_RATE stolen from arch/arm/mach-s3c2410/include/mach/timex.h. | ||
16 | * See there for an explanation. | ||
17 | */ | ||
18 | #define CLOCK_TICK_RATE 12000000 | ||
19 | |||
20 | #endif /* ifndef __ASM_ARCH_TIMEX_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h new file mode 100644 index 00000000000..5dbc3c5167c --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h | |||
@@ -0,0 +1,164 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/uncompress.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
12 | #define __ASM_ARCH_UNCOMPRESS_H | ||
13 | |||
14 | #include <asm/io.h> | ||
15 | |||
16 | #define __REG(x) ((void __iomem __force *)(x)) | ||
17 | |||
18 | static void putc_dummy(char c, void __iomem *base) | ||
19 | { | ||
20 | /* nothing */ | ||
21 | } | ||
22 | |||
23 | static void putc_ns9360(char c, void __iomem *base) | ||
24 | { | ||
25 | static int t = 0x10000; | ||
26 | do { | ||
27 | if (t) | ||
28 | --t; | ||
29 | |||
30 | if (__raw_readl(base + 8) & (1 << 3)) { | ||
31 | __raw_writeb(c, base + 16); | ||
32 | t = 0x10000; | ||
33 | break; | ||
34 | } | ||
35 | } while (t); | ||
36 | } | ||
37 | |||
38 | static void putc_a9m9750dev(char c, void __iomem *base) | ||
39 | { | ||
40 | static int t = 0x10000; | ||
41 | do { | ||
42 | if (t) | ||
43 | --t; | ||
44 | |||
45 | if (__raw_readb(base + 5) & (1 << 5)) { | ||
46 | __raw_writeb(c, base); | ||
47 | t = 0x10000; | ||
48 | break; | ||
49 | } | ||
50 | } while (t); | ||
51 | |||
52 | } | ||
53 | |||
54 | static void putc_ns921x(char c, void __iomem *base) | ||
55 | { | ||
56 | static int t = 0x10000; | ||
57 | do { | ||
58 | if (t) | ||
59 | --t; | ||
60 | |||
61 | if (!(__raw_readl(base) & (1 << 11))) { | ||
62 | __raw_writeb(c, base + 0x0028); | ||
63 | t = 0x10000; | ||
64 | break; | ||
65 | } | ||
66 | } while (t); | ||
67 | } | ||
68 | |||
69 | #define MSCS __REG(0xA0900184) | ||
70 | |||
71 | #define NS9360_UARTA __REG(0x90200040) | ||
72 | #define NS9360_UARTB __REG(0x90200000) | ||
73 | #define NS9360_UARTC __REG(0x90300000) | ||
74 | #define NS9360_UARTD __REG(0x90300040) | ||
75 | |||
76 | #define NS9360_UART_ENABLED(base) \ | ||
77 | (__raw_readl(NS9360_UARTA) & (1 << 31)) | ||
78 | |||
79 | #define A9M9750DEV_UARTA __REG(0x40000000) | ||
80 | |||
81 | #define NS921XSYS_CLOCK __REG(0xa090017c) | ||
82 | #define NS921X_UARTA __REG(0x90010000) | ||
83 | #define NS921X_UARTB __REG(0x90018000) | ||
84 | #define NS921X_UARTC __REG(0x90020000) | ||
85 | #define NS921X_UARTD __REG(0x90028000) | ||
86 | |||
87 | #define NS921X_UART_ENABLED(base) \ | ||
88 | (__raw_readl((base) + 0x1000) & (1 << 29)) | ||
89 | |||
90 | static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) | ||
91 | { | ||
92 | if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { | ||
93 | /* ns9360 or ns9750 */ | ||
94 | if (NS9360_UART_ENABLED(NS9360_UARTA)) { | ||
95 | *putc = putc_ns9360; | ||
96 | *base = NS9360_UARTA; | ||
97 | return; | ||
98 | } else if (NS9360_UART_ENABLED(NS9360_UARTB)) { | ||
99 | *putc = putc_ns9360; | ||
100 | *base = NS9360_UARTB; | ||
101 | return; | ||
102 | } else if (NS9360_UART_ENABLED(NS9360_UARTC)) { | ||
103 | *putc = putc_ns9360; | ||
104 | *base = NS9360_UARTC; | ||
105 | return; | ||
106 | } else if (NS9360_UART_ENABLED(NS9360_UARTD)) { | ||
107 | *putc = putc_ns9360; | ||
108 | *base = NS9360_UARTD; | ||
109 | return; | ||
110 | } else if (__raw_readl(__REG(0xa09001f4)) == 0xfffff001) { | ||
111 | *putc = putc_a9m9750dev; | ||
112 | *base = A9M9750DEV_UARTA; | ||
113 | return; | ||
114 | } | ||
115 | } else if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x02) { | ||
116 | /* ns921x */ | ||
117 | u32 clock = __raw_readl(NS921XSYS_CLOCK); | ||
118 | |||
119 | if ((clock & (1 << 1)) && | ||
120 | NS921X_UART_ENABLED(NS921X_UARTA)) { | ||
121 | *putc = putc_ns921x; | ||
122 | *base = NS921X_UARTA; | ||
123 | return; | ||
124 | } else if ((clock & (1 << 2)) && | ||
125 | NS921X_UART_ENABLED(NS921X_UARTB)) { | ||
126 | *putc = putc_ns921x; | ||
127 | *base = NS921X_UARTB; | ||
128 | return; | ||
129 | } else if ((clock & (1 << 3)) && | ||
130 | NS921X_UART_ENABLED(NS921X_UARTC)) { | ||
131 | *putc = putc_ns921x; | ||
132 | *base = NS921X_UARTC; | ||
133 | return; | ||
134 | } else if ((clock & (1 << 4)) && | ||
135 | NS921X_UART_ENABLED(NS921X_UARTD)) { | ||
136 | *putc = putc_ns921x; | ||
137 | *base = NS921X_UARTD; | ||
138 | return; | ||
139 | } | ||
140 | } | ||
141 | |||
142 | *putc = putc_dummy; | ||
143 | } | ||
144 | |||
145 | void (*myputc)(char, void __iomem *); | ||
146 | void __iomem *base; | ||
147 | |||
148 | static void putc(char c) | ||
149 | { | ||
150 | myputc(c, base); | ||
151 | } | ||
152 | |||
153 | static void arch_decomp_setup(void) | ||
154 | { | ||
155 | autodetect(&myputc, &base); | ||
156 | } | ||
157 | #define arch_decomp_wdog() | ||
158 | |||
159 | static void flush(void) | ||
160 | { | ||
161 | /* nothing */ | ||
162 | } | ||
163 | |||
164 | #endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h b/arch/arm/mach-ns9xxx/include/mach/vmalloc.h new file mode 100644 index 00000000000..fe964d3bcc4 --- /dev/null +++ b/arch/arm/mach-ns9xxx/include/mach/vmalloc.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ns9xxx/include/mach/vmalloc.h | ||
3 | * | ||
4 | * Copyright (C) 2006 by Digi International Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_VMALLOC_H | ||
12 | #define __ASM_ARCH_VMALLOC_H | ||
13 | |||
14 | #define VMALLOC_END (0xf0000000) | ||
15 | |||
16 | #endif /* ifndef __ASM_ARCH_VMALLOC_H */ | ||
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 96de8ebed41..38260d5f849 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c | |||
@@ -12,9 +12,9 @@ | |||
12 | #include <linux/kernel_stat.h> | 12 | #include <linux/kernel_stat.h> |
13 | #include <asm/io.h> | 13 | #include <asm/io.h> |
14 | #include <asm/mach/irq.h> | 14 | #include <asm/mach/irq.h> |
15 | #include <asm/arch/regs-sys-common.h> | 15 | #include <mach/regs-sys-common.h> |
16 | #include <asm/arch/irqs.h> | 16 | #include <mach/irqs.h> |
17 | #include <asm/arch/board.h> | 17 | #include <mach/board.h> |
18 | 18 | ||
19 | #include "generic.h" | 19 | #include "generic.h" |
20 | 20 | ||
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c index 7714233fb00..2858417d8d8 100644 --- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c +++ b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c | |||
@@ -11,7 +11,7 @@ | |||
11 | #include <asm/mach/arch.h> | 11 | #include <asm/mach/arch.h> |
12 | #include <asm/mach-types.h> | 12 | #include <asm/mach-types.h> |
13 | 13 | ||
14 | #include <asm/arch/processor-ns9360.h> | 14 | #include <mach/processor-ns9360.h> |
15 | 15 | ||
16 | #include "board-a9m9750dev.h" | 16 | #include "board-a9m9750dev.h" |
17 | #include "generic.h" | 17 | #include "generic.h" |
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c index bdbd0bb1a0b..729f68da429 100644 --- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c +++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c | |||
@@ -11,7 +11,7 @@ | |||
11 | #include <asm/mach/arch.h> | 11 | #include <asm/mach/arch.h> |
12 | #include <asm/mach-types.h> | 12 | #include <asm/mach-types.h> |
13 | 13 | ||
14 | #include <asm/arch/processor-ns9360.h> | 14 | #include <mach/processor-ns9360.h> |
15 | 15 | ||
16 | #include "board-jscc9p9360.h" | 16 | #include "board-jscc9p9360.h" |
17 | #include "generic.h" | 17 | #include "generic.h" |
diff --git a/arch/arm/mach-ns9xxx/plat-serial8250.c b/arch/arm/mach-ns9xxx/plat-serial8250.c index c9cce9b4e6c..795b15e8982 100644 --- a/arch/arm/mach-ns9xxx/plat-serial8250.c +++ b/arch/arm/mach-ns9xxx/plat-serial8250.c | |||
@@ -11,8 +11,8 @@ | |||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/serial_8250.h> | 12 | #include <linux/serial_8250.h> |
13 | 13 | ||
14 | #include <asm/arch/regs-board-a9m9750dev.h> | 14 | #include <mach/regs-board-a9m9750dev.h> |
15 | #include <asm/arch/board.h> | 15 | #include <mach/board.h> |
16 | 16 | ||
17 | #define DRIVER_NAME "serial8250" | 17 | #define DRIVER_NAME "serial8250" |
18 | 18 | ||
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c index 8ee81b59b35..abee8338735 100644 --- a/arch/arm/mach-ns9xxx/processor-ns9360.c +++ b/arch/arm/mach-ns9xxx/processor-ns9360.c | |||
@@ -14,8 +14,8 @@ | |||
14 | 14 | ||
15 | #include <asm/page.h> | 15 | #include <asm/page.h> |
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | #include <asm/arch/processor-ns9360.h> | 17 | #include <mach/processor-ns9360.h> |
18 | #include <asm/arch/regs-sys-ns9360.h> | 18 | #include <mach/regs-sys-ns9360.h> |
19 | 19 | ||
20 | void ns9360_reset(char mode) | 20 | void ns9360_reset(char mode) |
21 | { | 21 | { |
diff --git a/arch/arm/mach-ns9xxx/time-ns9360.c b/arch/arm/mach-ns9xxx/time-ns9360.c index 66bd5826297..a63424d083d 100644 --- a/arch/arm/mach-ns9xxx/time-ns9360.c +++ b/arch/arm/mach-ns9xxx/time-ns9360.c | |||
@@ -15,10 +15,10 @@ | |||
15 | #include <linux/clocksource.h> | 15 | #include <linux/clocksource.h> |
16 | #include <linux/clockchips.h> | 16 | #include <linux/clockchips.h> |
17 | 17 | ||
18 | #include <asm/arch/processor-ns9360.h> | 18 | #include <mach/processor-ns9360.h> |
19 | #include <asm/arch/regs-sys-ns9360.h> | 19 | #include <mach/regs-sys-ns9360.h> |
20 | #include <asm/arch/irqs.h> | 20 | #include <mach/irqs.h> |
21 | #include <asm/arch/system.h> | 21 | #include <mach/system.h> |
22 | #include "generic.h" | 22 | #include "generic.h" |
23 | 23 | ||
24 | #define TIMER_CLOCKSOURCE 0 | 24 | #define TIMER_CLOCKSOURCE 0 |