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-rw-r--r--arch/arm/mach-mx25/Kconfig34
-rw-r--r--arch/arm/mach-mx25/Makefile5
-rw-r--r--arch/arm/mach-mx25/Makefile.boot3
-rw-r--r--arch/arm/mach-mx25/clock.c331
-rw-r--r--arch/arm/mach-mx25/devices-imx25.h54
-rw-r--r--arch/arm/mach-mx25/devices.c308
-rw-r--r--arch/arm/mach-mx25/devices.h13
-rw-r--r--arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c298
-rw-r--r--arch/arm/mach-mx25/mach-cpuimx25.c164
-rw-r--r--arch/arm/mach-mx25/mach-mx25_3ds.c225
-rw-r--r--arch/arm/mach-mx25/mm.c75
11 files changed, 0 insertions, 1510 deletions
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
deleted file mode 100644
index 38ca09a5df9..00000000000
--- a/arch/arm/mach-mx25/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
1if ARCH_MX25
2
3comment "MX25 platforms:"
4
5config MACH_MX25_3DS
6 bool "Support MX25PDK (3DS) Platform"
7 select IMX_HAVE_PLATFORM_IMX_UART
8 select IMX_HAVE_PLATFORM_MXC_NAND
9 select IMX_HAVE_PLATFORM_ESDHC
10
11config MACH_EUKREA_CPUIMX25
12 bool "Support Eukrea CPUIMX25 Platform"
13 select IMX_HAVE_PLATFORM_IMX_I2C
14 select IMX_HAVE_PLATFORM_IMX_UART
15 select IMX_HAVE_PLATFORM_MXC_NAND
16 select IMX_HAVE_PLATFORM_FLEXCAN
17 select IMX_HAVE_PLATFORM_ESDHC
18 select MXC_ULPI if USB_ULPI
19
20choice
21 prompt "Baseboard"
22 depends on MACH_EUKREA_CPUIMX25
23 default MACH_EUKREA_MBIMXSD25_BASEBOARD
24
25config MACH_EUKREA_MBIMXSD25_BASEBOARD
26 bool "Eukrea MBIMXSD development board"
27 select IMX_HAVE_PLATFORM_IMX_SSI
28 help
29 This adds board specific devices that can be found on Eukrea's
30 MBIMXSD evaluation board.
31
32endchoice
33
34endif
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
deleted file mode 100644
index d9e46ce00a4..00000000000
--- a/arch/arm/mach-mx25/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1obj-y := mm.o devices.o
2obj-$(CONFIG_ARCH_MX25) += clock.o
3obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
4obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-cpuimx25.o
5obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd-baseboard.o
diff --git a/arch/arm/mach-mx25/Makefile.boot b/arch/arm/mach-mx25/Makefile.boot
deleted file mode 100644
index e1dd366f836..00000000000
--- a/arch/arm/mach-mx25/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1 zreladdr-y := 0x80008000
2params_phys-y := 0x80000100
3initrd_phys-y := 0x80800000
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
deleted file mode 100644
index 00dcb08019e..00000000000
--- a/arch/arm/mach-mx25/clock.c
+++ /dev/null
@@ -1,331 +0,0 @@
1/*
2 * Copyright (C) 2009 by Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16 * MA 02110-1301, USA.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/list.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24#include <linux/clkdev.h>
25
26#include <mach/clock.h>
27#include <mach/hardware.h>
28#include <mach/common.h>
29#include <mach/mx25.h>
30
31#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
32
33#define CCM_MPCTL 0x00
34#define CCM_UPCTL 0x04
35#define CCM_CCTL 0x08
36#define CCM_CGCR0 0x0C
37#define CCM_CGCR1 0x10
38#define CCM_CGCR2 0x14
39#define CCM_PCDR0 0x18
40#define CCM_PCDR1 0x1C
41#define CCM_PCDR2 0x20
42#define CCM_PCDR3 0x24
43#define CCM_RCSR 0x28
44#define CCM_CRDR 0x2C
45#define CCM_DCVR0 0x30
46#define CCM_DCVR1 0x34
47#define CCM_DCVR2 0x38
48#define CCM_DCVR3 0x3c
49#define CCM_LTR0 0x40
50#define CCM_LTR1 0x44
51#define CCM_LTR2 0x48
52#define CCM_LTR3 0x4c
53
54static unsigned long get_rate_mpll(void)
55{
56 ulong mpctl = __raw_readl(CRM_BASE + CCM_MPCTL);
57
58 return mxc_decode_pll(mpctl, 24000000);
59}
60
61static unsigned long get_rate_upll(void)
62{
63 ulong mpctl = __raw_readl(CRM_BASE + CCM_UPCTL);
64
65 return mxc_decode_pll(mpctl, 24000000);
66}
67
68unsigned long get_rate_arm(struct clk *clk)
69{
70 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
71 unsigned long rate = get_rate_mpll();
72
73 if (cctl & (1 << 14))
74 rate = (rate * 3) >> 2;
75
76 return rate / ((cctl >> 30) + 1);
77}
78
79static unsigned long get_rate_ahb(struct clk *clk)
80{
81 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
82
83 return get_rate_arm(NULL) / (((cctl >> 28) & 0x3) + 1);
84}
85
86static unsigned long get_rate_ipg(struct clk *clk)
87{
88 return get_rate_ahb(NULL) >> 1;
89}
90
91static unsigned long get_rate_per(int per)
92{
93 unsigned long ofs = (per & 0x3) * 8;
94 unsigned long reg = per & ~0x3;
95 unsigned long val = (readl(CRM_BASE + CCM_PCDR0 + reg) >> ofs) & 0x3f;
96 unsigned long fref;
97
98 if (readl(CRM_BASE + 0x64) & (1 << per))
99 fref = get_rate_upll();
100 else
101 fref = get_rate_ahb(NULL);
102
103 return fref / (val + 1);
104}
105
106static unsigned long get_rate_uart(struct clk *clk)
107{
108 return get_rate_per(15);
109}
110
111static unsigned long get_rate_ssi2(struct clk *clk)
112{
113 return get_rate_per(14);
114}
115
116static unsigned long get_rate_ssi1(struct clk *clk)
117{
118 return get_rate_per(13);
119}
120
121static unsigned long get_rate_i2c(struct clk *clk)
122{
123 return get_rate_per(6);
124}
125
126static unsigned long get_rate_nfc(struct clk *clk)
127{
128 return get_rate_per(8);
129}
130
131static unsigned long get_rate_gpt(struct clk *clk)
132{
133 return get_rate_per(5);
134}
135
136static unsigned long get_rate_lcdc(struct clk *clk)
137{
138 return get_rate_per(7);
139}
140
141static unsigned long get_rate_esdhc1(struct clk *clk)
142{
143 return get_rate_per(3);
144}
145
146static unsigned long get_rate_esdhc2(struct clk *clk)
147{
148 return get_rate_per(4);
149}
150
151static unsigned long get_rate_csi(struct clk *clk)
152{
153 return get_rate_per(0);
154}
155
156static unsigned long get_rate_otg(struct clk *clk)
157{
158 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
159 unsigned long rate = get_rate_upll();
160
161 return (cctl & (1 << 23)) ? 0 : rate / ((0x3F & (cctl >> 16)) + 1);
162}
163
164static int clk_cgcr_enable(struct clk *clk)
165{
166 u32 reg;
167
168 reg = __raw_readl(clk->enable_reg);
169 reg |= 1 << clk->enable_shift;
170 __raw_writel(reg, clk->enable_reg);
171
172 return 0;
173}
174
175static void clk_cgcr_disable(struct clk *clk)
176{
177 u32 reg;
178
179 reg = __raw_readl(clk->enable_reg);
180 reg &= ~(1 << clk->enable_shift);
181 __raw_writel(reg, clk->enable_reg);
182}
183
184#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
185 static struct clk name = { \
186 .id = i, \
187 .enable_reg = CRM_BASE + er, \
188 .enable_shift = es, \
189 .get_rate = gr, \
190 .set_rate = sr, \
191 .enable = clk_cgcr_enable, \
192 .disable = clk_cgcr_disable, \
193 .secondary = s, \
194 }
195
196/*
197 * Note: the following IPG clock gating bits are wrongly marked "Reserved" in
198 * the i.MX25 Reference Manual Rev 1, table 15-13. The information below is
199 * taken from the Freescale released BSP.
200 *
201 * bit reg offset clock
202 *
203 * 0 CGCR1 0 AUDMUX
204 * 12 CGCR1 12 ESAI
205 * 16 CGCR1 16 GPIO1
206 * 17 CGCR1 17 GPIO2
207 * 18 CGCR1 18 GPIO3
208 * 23 CGCR1 23 I2C1
209 * 24 CGCR1 24 I2C2
210 * 25 CGCR1 25 I2C3
211 * 27 CGCR1 27 IOMUXC
212 * 28 CGCR1 28 KPP
213 * 30 CGCR1 30 OWIRE
214 * 36 CGCR2 4 RTIC
215 * 51 CGCR2 19 WDOG
216 */
217
218DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
219DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
220DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL);
221DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL);
222DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
223DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
224DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
225DEFINE_CLOCK(esdhc1_ahb_clk, 0, CCM_CGCR0, 21, get_rate_esdhc1, NULL, NULL);
226DEFINE_CLOCK(esdhc1_per_clk, 0, CCM_CGCR0, 3, get_rate_esdhc1, NULL,
227 &esdhc1_ahb_clk);
228DEFINE_CLOCK(esdhc2_ahb_clk, 0, CCM_CGCR0, 22, get_rate_esdhc2, NULL, NULL);
229DEFINE_CLOCK(esdhc2_per_clk, 0, CCM_CGCR0, 4, get_rate_esdhc2, NULL,
230 &esdhc2_ahb_clk);
231DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
232DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL);
233DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk);
234DEFINE_CLOCK(csi_ahb_clk, 0, CCM_CGCR0, 18, get_rate_csi, NULL, NULL);
235DEFINE_CLOCK(csi_per_clk, 0, CCM_CGCR0, 0, get_rate_csi, NULL, &csi_ahb_clk);
236DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
237DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
238DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
239DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
240DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
241DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
242DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
243DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
244DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
245DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
246DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
247DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
248DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
249DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
250DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
251DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1, 8, get_rate_ipg, NULL, NULL);
252DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
253DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL);
254DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk);
255DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk);
256DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGCR1, 13, get_rate_esdhc1, NULL,
257 &esdhc1_per_clk);
258DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGCR1, 14, get_rate_esdhc2, NULL,
259 &esdhc2_per_clk);
260DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
261DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
262DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
263DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
264
265#define _REGISTER_CLOCK(d, n, c) \
266 { \
267 .dev_id = d, \
268 .con_id = n, \
269 .clk = &c, \
270 },
271
272static struct clk_lookup lookups[] = {
273 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
274 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
275 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
276 _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk)
277 _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk)
278 _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
279 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
280 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
281 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
282 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
283 _REGISTER_CLOCK("imx25-cspi.0", NULL, cspi1_clk)
284 _REGISTER_CLOCK("imx25-cspi.1", NULL, cspi2_clk)
285 _REGISTER_CLOCK("imx25-cspi.2", NULL, cspi3_clk)
286 _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)
287 _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
288 _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
289 _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
290 _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
291 _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
292 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
293 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
294 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
295 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
296 _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
297 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
298 _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk)
299 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
300 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
301 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
302 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
303 _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
304 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
305 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
306 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
307};
308
309int __init mx25_clocks_init(void)
310{
311 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
312
313 /* Turn off all clocks except the ones we need to survive, namely:
314 * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
315 * SCC
316 */
317 __raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
318 __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
319 __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
320#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
321 clk_enable(&uart1_clk);
322#endif
323
324 /* Clock source for lcdc and csi is upll */
325 __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
326 CRM_BASE + 0x64);
327
328 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
329
330 return 0;
331}
diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h
deleted file mode 100644
index d94d282fa67..00000000000
--- a/arch/arm/mach-mx25/devices-imx25.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx25.h>
10#include <mach/devices-common.h>
11
12extern const struct imx_fec_data imx25_fec_data __initconst;
13#define imx25_add_fec(pdata) \
14 imx_add_fec(&imx25_fec_data, pdata)
15
16#define imx25_add_flexcan0(pdata) \
17 imx_add_flexcan(0, MX25_CAN1_BASE_ADDR, SZ_16K, MX25_INT_CAN1, pdata)
18#define imx25_add_flexcan1(pdata) \
19 imx_add_flexcan(1, MX25_CAN2_BASE_ADDR, SZ_16K, MX25_INT_CAN2, pdata)
20
21extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst;
22#define imx25_add_imx_i2c(id, pdata) \
23 imx_add_imx_i2c(&imx25_imx_i2c_data[id], pdata)
24#define imx25_add_imx_i2c0(pdata) imx25_add_imx_i2c(0, pdata)
25#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata)
26#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata)
27
28extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst;
29#define imx25_add_imx_ssi(id, pdata) \
30 imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata)
31
32extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst;
33#define imx25_add_imx_uart(id, pdata) \
34 imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata)
35#define imx25_add_imx_uart0(pdata) imx25_add_imx_uart(0, pdata)
36#define imx25_add_imx_uart1(pdata) imx25_add_imx_uart(1, pdata)
37#define imx25_add_imx_uart2(pdata) imx25_add_imx_uart(2, pdata)
38#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
39#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
40
41extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst;
42#define imx25_add_mxc_nand(pdata) \
43 imx_add_mxc_nand(&imx25_mxc_nand_data, pdata)
44
45extern const struct imx_spi_imx_data imx25_cspi_data[] __initconst;
46#define imx25_add_spi_imx(id, pdata) \
47 imx_add_spi_imx(&imx25_cspi_data[id], pdata)
48#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata)
49#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata)
50#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata)
51
52extern const struct imx_esdhc_imx_data imx25_esdhc_data[] __initconst;
53#define imx25_add_esdhc(id, pdata) \
54 imx_add_esdhc(&imx25_esdhc_data[id], pdata)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
deleted file mode 100644
index 1d0eb3e8594..00000000000
--- a/arch/arm/mach-mx25/devices.c
+++ /dev/null
@@ -1,308 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19#include <linux/platform_device.h>
20#include <linux/dma-mapping.h>
21#include <linux/gpio.h>
22#include <mach/mx25.h>
23#include <mach/irqs.h>
24
25static u64 otg_dmamask = DMA_BIT_MASK(32);
26
27static struct resource mxc_otg_resources[] = {
28 {
29 .start = MX25_OTG_BASE_ADDR,
30 .end = MX25_OTG_BASE_ADDR + 0x1ff,
31 .flags = IORESOURCE_MEM,
32 }, {
33 .start = 37,
34 .end = 37,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39struct platform_device mxc_otg = {
40 .name = "mxc-ehci",
41 .id = 0,
42 .dev = {
43 .coherent_dma_mask = 0xffffffff,
44 .dma_mask = &otg_dmamask,
45 },
46 .resource = mxc_otg_resources,
47 .num_resources = ARRAY_SIZE(mxc_otg_resources),
48};
49
50/* OTG gadget device */
51struct platform_device otg_udc_device = {
52 .name = "fsl-usb2-udc",
53 .id = -1,
54 .dev = {
55 .dma_mask = &otg_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 },
58 .resource = mxc_otg_resources,
59 .num_resources = ARRAY_SIZE(mxc_otg_resources),
60};
61
62static u64 usbh2_dmamask = DMA_BIT_MASK(32);
63
64static struct resource mxc_usbh2_resources[] = {
65 {
66 .start = MX25_OTG_BASE_ADDR + 0x400,
67 .end = MX25_OTG_BASE_ADDR + 0x5ff,
68 .flags = IORESOURCE_MEM,
69 }, {
70 .start = 35,
71 .end = 35,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76struct platform_device mxc_usbh2 = {
77 .name = "mxc-ehci",
78 .id = 1,
79 .dev = {
80 .coherent_dma_mask = 0xffffffff,
81 .dma_mask = &usbh2_dmamask,
82 },
83 .resource = mxc_usbh2_resources,
84 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
85};
86
87static struct resource mxc_pwm_resources0[] = {
88 {
89 .start = 0x53fe0000,
90 .end = 0x53fe3fff,
91 .flags = IORESOURCE_MEM,
92 }, {
93 .start = 26,
94 .end = 26,
95 .flags = IORESOURCE_IRQ,
96 }
97};
98
99struct platform_device mxc_pwm_device0 = {
100 .name = "mxc_pwm",
101 .id = 0,
102 .num_resources = ARRAY_SIZE(mxc_pwm_resources0),
103 .resource = mxc_pwm_resources0,
104};
105
106static struct resource mxc_pwm_resources1[] = {
107 {
108 .start = 0x53fa0000,
109 .end = 0x53fa3fff,
110 .flags = IORESOURCE_MEM,
111 }, {
112 .start = 36,
113 .end = 36,
114 .flags = IORESOURCE_IRQ,
115 }
116};
117
118struct platform_device mxc_pwm_device1 = {
119 .name = "mxc_pwm",
120 .id = 1,
121 .num_resources = ARRAY_SIZE(mxc_pwm_resources1),
122 .resource = mxc_pwm_resources1,
123};
124
125static struct resource mxc_pwm_resources2[] = {
126 {
127 .start = 0x53fa8000,
128 .end = 0x53fabfff,
129 .flags = IORESOURCE_MEM,
130 }, {
131 .start = 41,
132 .end = 41,
133 .flags = IORESOURCE_IRQ,
134 }
135};
136
137struct platform_device mxc_pwm_device2 = {
138 .name = "mxc_pwm",
139 .id = 2,
140 .num_resources = ARRAY_SIZE(mxc_pwm_resources2),
141 .resource = mxc_pwm_resources2,
142};
143
144static struct resource mxc_keypad_resources[] = {
145 {
146 .start = 0x43fa8000,
147 .end = 0x43fabfff,
148 .flags = IORESOURCE_MEM,
149 }, {
150 .start = 24,
151 .end = 24,
152 .flags = IORESOURCE_IRQ,
153 }
154};
155
156struct platform_device mxc_keypad_device = {
157 .name = "mxc-keypad",
158 .id = -1,
159 .num_resources = ARRAY_SIZE(mxc_keypad_resources),
160 .resource = mxc_keypad_resources,
161};
162
163static struct resource mxc_pwm_resources3[] = {
164 {
165 .start = 0x53fc8000,
166 .end = 0x53fcbfff,
167 .flags = IORESOURCE_MEM,
168 }, {
169 .start = 42,
170 .end = 42,
171 .flags = IORESOURCE_IRQ,
172 }
173};
174
175struct platform_device mxc_pwm_device3 = {
176 .name = "mxc_pwm",
177 .id = 3,
178 .num_resources = ARRAY_SIZE(mxc_pwm_resources3),
179 .resource = mxc_pwm_resources3,
180};
181
182static struct mxc_gpio_port imx_gpio_ports[] = {
183 {
184 .chip.label = "gpio-0",
185 .base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT,
186 .irq = 52,
187 .virtual_irq_start = MXC_GPIO_IRQ_START,
188 }, {
189 .chip.label = "gpio-1",
190 .base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT,
191 .irq = 51,
192 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
193 }, {
194 .chip.label = "gpio-2",
195 .base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT,
196 .irq = 16,
197 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
198 }, {
199 .chip.label = "gpio-3",
200 .base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT,
201 .irq = 23,
202 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
203 }
204};
205
206int __init imx25_register_gpios(void)
207{
208 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
209}
210
211static struct resource mx25_rtc_resources[] = {
212 {
213 .start = MX25_DRYICE_BASE_ADDR,
214 .end = MX25_DRYICE_BASE_ADDR + 0x40,
215 .flags = IORESOURCE_MEM,
216 },
217 {
218 .start = MX25_INT_DRYICE,
219 .flags = IORESOURCE_IRQ
220 },
221};
222
223struct platform_device mx25_rtc_device = {
224 .name = "imxdi_rtc",
225 .id = 0,
226 .num_resources = ARRAY_SIZE(mx25_rtc_resources),
227 .resource = mx25_rtc_resources,
228};
229
230static struct resource mx25_fb_resources[] = {
231 {
232 .start = MX25_LCDC_BASE_ADDR,
233 .end = MX25_LCDC_BASE_ADDR + 0xfff,
234 .flags = IORESOURCE_MEM,
235 },
236 {
237 .start = MX25_INT_LCDC,
238 .end = MX25_INT_LCDC,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243struct platform_device mx25_fb_device = {
244 .name = "imx-fb",
245 .id = 0,
246 .resource = mx25_fb_resources,
247 .num_resources = ARRAY_SIZE(mx25_fb_resources),
248 .dev = {
249 .coherent_dma_mask = 0xFFFFFFFF,
250 },
251};
252
253static struct resource mxc_wdt_resources[] = {
254 {
255 .start = MX25_WDOG_BASE_ADDR,
256 .end = MX25_WDOG_BASE_ADDR + SZ_16K - 1,
257 .flags = IORESOURCE_MEM,
258 },
259};
260
261struct platform_device mxc_wdt = {
262 .name = "imx2-wdt",
263 .id = 0,
264 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
265 .resource = mxc_wdt_resources,
266};
267
268static struct resource mx25_kpp_resources[] = {
269 {
270 .start = MX25_KPP_BASE_ADDR,
271 .end = MX25_KPP_BASE_ADDR + 0xf,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .start = MX25_INT_KPP,
276 .end = MX25_INT_KPP,
277 .flags = IORESOURCE_IRQ,
278 },
279};
280
281struct platform_device mx25_kpp_device = {
282 .name = "imx-keypad",
283 .id = -1,
284 .num_resources = ARRAY_SIZE(mx25_kpp_resources),
285 .resource = mx25_kpp_resources,
286};
287
288static struct resource mx25_csi_resources[] = {
289 {
290 .start = MX25_CSI_BASE_ADDR,
291 .end = MX25_CSI_BASE_ADDR + 0xfff,
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = MX25_INT_CSI,
296 .flags = IORESOURCE_IRQ
297 },
298};
299
300struct platform_device mx25_csi_device = {
301 .name = "mx2-camera",
302 .id = 0,
303 .num_resources = ARRAY_SIZE(mx25_csi_resources),
304 .resource = mx25_csi_resources,
305 .dev = {
306 .coherent_dma_mask = 0xffffffff,
307 },
308};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
deleted file mode 100644
index 7b70a43c3a4..00000000000
--- a/arch/arm/mach-mx25/devices.h
+++ /dev/null
@@ -1,13 +0,0 @@
1extern struct platform_device mxc_otg;
2extern struct platform_device otg_udc_device;
3extern struct platform_device mxc_usbh2;
4extern struct platform_device mxc_pwm_device0;
5extern struct platform_device mxc_pwm_device1;
6extern struct platform_device mxc_pwm_device2;
7extern struct platform_device mxc_pwm_device3;
8extern struct platform_device mxc_keypad_device;
9extern struct platform_device mx25_rtc_device;
10extern struct platform_device mx25_fb_device;
11extern struct platform_device mxc_wdt;
12extern struct platform_device mx25_kpp_device;
13extern struct platform_device mx25_csi_device;
diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
deleted file mode 100644
index e765ac5d9a0..00000000000
--- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+++ /dev/null
@@ -1,298 +0,0 @@
1/*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/gpio.h>
23#include <linux/leds.h>
24#include <linux/platform_device.h>
25#include <linux/gpio_keys.h>
26#include <linux/input.h>
27#include <video/platform_lcd.h>
28
29#include <mach/hardware.h>
30#include <mach/iomux-mx25.h>
31#include <mach/common.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <mach/mx25.h>
35#include <mach/imx-uart.h>
36#include <mach/imxfb.h>
37#include <mach/audmux.h>
38
39#include "devices-imx25.h"
40#include "devices.h"
41
42static struct pad_desc eukrea_mbimxsd_pads[] = {
43 /* LCD */
44 MX25_PAD_LD0__LD0,
45 MX25_PAD_LD1__LD1,
46 MX25_PAD_LD2__LD2,
47 MX25_PAD_LD3__LD3,
48 MX25_PAD_LD4__LD4,
49 MX25_PAD_LD5__LD5,
50 MX25_PAD_LD6__LD6,
51 MX25_PAD_LD7__LD7,
52 MX25_PAD_LD8__LD8,
53 MX25_PAD_LD9__LD9,
54 MX25_PAD_LD10__LD10,
55 MX25_PAD_LD11__LD11,
56 MX25_PAD_LD12__LD12,
57 MX25_PAD_LD13__LD13,
58 MX25_PAD_LD14__LD14,
59 MX25_PAD_LD15__LD15,
60 MX25_PAD_GPIO_E__LD16,
61 MX25_PAD_GPIO_F__LD17,
62 MX25_PAD_HSYNC__HSYNC,
63 MX25_PAD_VSYNC__VSYNC,
64 MX25_PAD_LSCLK__LSCLK,
65 MX25_PAD_OE_ACD__OE_ACD,
66 MX25_PAD_CONTRAST__CONTRAST,
67 /* LCD_PWR */
68 MX25_PAD_PWM__GPIO_1_26,
69 /* LED */
70 MX25_PAD_POWER_FAIL__GPIO_3_19,
71 /* SWITCH */
72 MX25_PAD_VSTBY_ACK__GPIO_3_18,
73 /* UART2 */
74 MX25_PAD_UART2_RTS__UART2_RTS,
75 MX25_PAD_UART2_CTS__UART2_CTS,
76 MX25_PAD_UART2_TXD__UART2_TXD,
77 MX25_PAD_UART2_RXD__UART2_RXD,
78 /* SD1 */
79 MX25_PAD_SD1_CMD__SD1_CMD,
80 MX25_PAD_SD1_CLK__SD1_CLK,
81 MX25_PAD_SD1_DATA0__SD1_DATA0,
82 MX25_PAD_SD1_DATA1__SD1_DATA1,
83 MX25_PAD_SD1_DATA2__SD1_DATA2,
84 MX25_PAD_SD1_DATA3__SD1_DATA3,
85 /* SD1 CD */
86 MX25_PAD_DE_B__GPIO_2_20,
87 /* I2S */
88 MX25_PAD_KPP_COL3__AUD5_TXFS,
89 MX25_PAD_KPP_COL2__AUD5_TXC,
90 MX25_PAD_KPP_COL1__AUD5_RXD,
91 MX25_PAD_KPP_COL0__AUD5_TXD,
92 /* CAN */
93 MX25_PAD_GPIO_D__CAN2_RX,
94 MX25_PAD_GPIO_C__CAN2_TX,
95};
96
97#define GPIO_LED1 83
98#define GPIO_SWITCH1 82
99#define GPIO_SD1CD 52
100#define GPIO_LCDPWR 26
101
102static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
103 {
104 .mode = {
105 .name = "CMO-QVGA",
106 .refresh = 60,
107 .xres = 320,
108 .yres = 240,
109 .pixclock = KHZ2PICOS(6500),
110 .left_margin = 30,
111 .right_margin = 38,
112 .upper_margin = 20,
113 .lower_margin = 3,
114 .hsync_len = 15,
115 .vsync_len = 4,
116 },
117 .bpp = 16,
118 .pcr = 0xCAD08B80,
119 }, {
120 .mode = {
121 .name = "DVI-VGA",
122 .refresh = 60,
123 .xres = 640,
124 .yres = 480,
125 .pixclock = 32000,
126 .hsync_len = 7,
127 .left_margin = 100,
128 .right_margin = 100,
129 .vsync_len = 7,
130 .upper_margin = 7,
131 .lower_margin = 100,
132 },
133 .pcr = 0xFA208B80,
134 .bpp = 16,
135 }, {
136 .mode = {
137 .name = "DVI-SVGA",
138 .refresh = 60,
139 .xres = 800,
140 .yres = 600,
141 .pixclock = 25000,
142 .hsync_len = 7,
143 .left_margin = 75,
144 .right_margin = 75,
145 .vsync_len = 7,
146 .upper_margin = 7,
147 .lower_margin = 75,
148 },
149 .pcr = 0xFA208B80,
150 .bpp = 16,
151 },
152};
153
154static struct imx_fb_platform_data eukrea_mximxsd_fb_pdata = {
155 .mode = eukrea_mximxsd_modes,
156 .num_modes = ARRAY_SIZE(eukrea_mximxsd_modes),
157 .pwmr = 0x00A903FF,
158 .lscr1 = 0x00120300,
159 .dmacr = 0x00040060,
160};
161
162static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
163 unsigned int power)
164{
165 if (power)
166 gpio_direction_output(GPIO_LCDPWR, 1);
167 else
168 gpio_direction_output(GPIO_LCDPWR, 0);
169}
170
171static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
172 .set_power = eukrea_mbimxsd_lcd_power_set,
173};
174
175static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
176 .name = "platform-lcd",
177 .dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
178};
179
180static struct gpio_led eukrea_mbimxsd_leds[] = {
181 {
182 .name = "led1",
183 .default_trigger = "heartbeat",
184 .active_low = 1,
185 .gpio = GPIO_LED1,
186 },
187};
188
189static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
190 .leds = eukrea_mbimxsd_leds,
191 .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
192};
193
194static struct platform_device eukrea_mbimxsd_leds_gpio = {
195 .name = "leds-gpio",
196 .id = -1,
197 .dev = {
198 .platform_data = &eukrea_mbimxsd_led_info,
199 },
200};
201
202static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
203 {
204 .gpio = GPIO_SWITCH1,
205 .code = BTN_0,
206 .desc = "BP1",
207 .active_low = 1,
208 .wakeup = 1,
209 },
210};
211
212static struct gpio_keys_platform_data eukrea_mbimxsd_button_data = {
213 .buttons = eukrea_mbimxsd_gpio_buttons,
214 .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
215};
216
217static struct platform_device eukrea_mbimxsd_button_device = {
218 .name = "gpio-keys",
219 .id = -1,
220 .num_resources = 0,
221 .dev = {
222 .platform_data = &eukrea_mbimxsd_button_data,
223 }
224};
225
226static struct platform_device *platform_devices[] __initdata = {
227 &eukrea_mbimxsd_leds_gpio,
228 &eukrea_mbimxsd_button_device,
229 &eukrea_mbimxsd_lcd_powerdev,
230};
231
232static const struct imxuart_platform_data uart_pdata __initconst = {
233 .flags = IMXUART_HAVE_RTSCTS,
234};
235
236static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
237 {
238 I2C_BOARD_INFO("tlv320aic23", 0x1a),
239 },
240};
241
242static const
243struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
244 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
245};
246
247/*
248 * system init for baseboard usage. Will be called by cpuimx25 init.
249 *
250 * Add platform devices present on this baseboard and init
251 * them from CPU side as far as required to use them later on
252 */
253void __init eukrea_mbimxsd25_baseboard_init(void)
254{
255 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
256 ARRAY_SIZE(eukrea_mbimxsd_pads)))
257 printk(KERN_ERR "error setting mbimxsd pads !\n");
258
259#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
260 /* SSI unit master I2S codec connected to SSI_AUD5*/
261 mxc_audmux_v2_configure_port(0,
262 MXC_AUDMUX_V2_PTCR_SYN |
263 MXC_AUDMUX_V2_PTCR_TFSDIR |
264 MXC_AUDMUX_V2_PTCR_TFSEL(4) |
265 MXC_AUDMUX_V2_PTCR_TCLKDIR |
266 MXC_AUDMUX_V2_PTCR_TCSEL(4),
267 MXC_AUDMUX_V2_PDCR_RXDSEL(4)
268 );
269 mxc_audmux_v2_configure_port(4,
270 MXC_AUDMUX_V2_PTCR_SYN,
271 MXC_AUDMUX_V2_PDCR_RXDSEL(0)
272 );
273#endif
274
275 imx25_add_imx_uart1(&uart_pdata);
276 mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata);
277 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
278
279 imx25_add_flexcan1(NULL);
280 imx25_add_esdhc(0, NULL);
281
282 gpio_request(GPIO_LED1, "LED1");
283 gpio_direction_output(GPIO_LED1, 1);
284 gpio_free(GPIO_LED1);
285
286 gpio_request(GPIO_SWITCH1, "SWITCH1");
287 gpio_direction_input(GPIO_SWITCH1);
288 gpio_free(GPIO_SWITCH1);
289
290 gpio_request(GPIO_LCDPWR, "LCDPWR");
291 gpio_direction_output(GPIO_LCDPWR, 1);
292 gpio_free(GPIO_SWITCH1);
293
294 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
295 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
296
297 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
298}
diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c
deleted file mode 100644
index f6f9ad60c25..00000000000
--- a/arch/arm/mach-mx25/mach-cpuimx25.c
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 * Copyright 2010 Eric Bénard - Eukréa Electromatique, <eric@eukrea.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
17 * Boston, MA 02110-1301, USA.
18 */
19
20#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/clk.h>
24#include <linux/irq.h>
25#include <linux/gpio.h>
26#include <linux/platform_device.h>
27#include <linux/usb/otg.h>
28#include <linux/usb/ulpi.h>
29#include <linux/fsl_devices.h>
30
31#include <mach/eukrea-baseboards.h>
32#include <mach/hardware.h>
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35#include <asm/mach/time.h>
36#include <asm/memory.h>
37#include <asm/mach/map.h>
38#include <mach/common.h>
39#include <mach/mx25.h>
40#include <mach/mxc_nand.h>
41#include <mach/imxfb.h>
42#include <mach/mxc_ehci.h>
43#include <mach/iomux-mx25.h>
44
45#include "devices-imx25.h"
46#include "devices.h"
47
48static const struct imxuart_platform_data uart_pdata __initconst = {
49 .flags = IMXUART_HAVE_RTSCTS,
50};
51
52static struct pad_desc eukrea_cpuimx25_pads[] = {
53 /* FEC - RMII */
54 MX25_PAD_FEC_MDC__FEC_MDC,
55 MX25_PAD_FEC_MDIO__FEC_MDIO,
56 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
57 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
58 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
59 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
60 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
61 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
62 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
63 /* I2C1 */
64 MX25_PAD_I2C1_CLK__I2C1_CLK,
65 MX25_PAD_I2C1_DAT__I2C1_DAT,
66};
67
68static const struct fec_platform_data mx25_fec_pdata __initconst = {
69 .phy = PHY_INTERFACE_MODE_RMII,
70};
71
72static const struct mxc_nand_platform_data
73eukrea_cpuimx25_nand_board_info __initconst = {
74 .width = 1,
75 .hw_ecc = 1,
76 .flash_bbt = 1,
77};
78
79static const struct imxi2c_platform_data
80eukrea_cpuimx25_i2c0_data __initconst = {
81 .bitrate = 100000,
82};
83
84static struct i2c_board_info eukrea_cpuimx25_i2c_devices[] = {
85 {
86 I2C_BOARD_INFO("pcf8563", 0x51),
87 },
88};
89
90static struct mxc_usbh_platform_data otg_pdata = {
91 .portsc = MXC_EHCI_MODE_UTMI,
92 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
93};
94
95static struct mxc_usbh_platform_data usbh2_pdata = {
96 .portsc = MXC_EHCI_MODE_SERIAL,
97 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
98 MXC_EHCI_IPPUE_DOWN,
99};
100
101static struct fsl_usb2_platform_data otg_device_pdata = {
102 .operating_mode = FSL_USB2_DR_DEVICE,
103 .phy_mode = FSL_USB2_PHY_UTMI,
104};
105
106static int otg_mode_host;
107
108static int __init eukrea_cpuimx25_otg_mode(char *options)
109{
110 if (!strcmp(options, "host"))
111 otg_mode_host = 1;
112 else if (!strcmp(options, "device"))
113 otg_mode_host = 0;
114 else
115 pr_info("otg_mode neither \"host\" nor \"device\". "
116 "Defaulting to device\n");
117 return 0;
118}
119__setup("otg_mode=", eukrea_cpuimx25_otg_mode);
120
121static void __init eukrea_cpuimx25_init(void)
122{
123 if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
124 ARRAY_SIZE(eukrea_cpuimx25_pads)))
125 printk(KERN_ERR "error setting cpuimx25 pads !\n");
126
127 imx25_add_imx_uart0(&uart_pdata);
128 imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
129 mxc_register_device(&mx25_rtc_device, NULL);
130 imx25_add_fec(&mx25_fec_pdata);
131
132 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
133 ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
134 imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
135
136 if (otg_mode_host)
137 mxc_register_device(&mxc_otg, &otg_pdata);
138 else
139 mxc_register_device(&otg_udc_device, &otg_device_pdata);
140
141 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
142
143#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
144 eukrea_mbimxsd25_baseboard_init();
145#endif
146}
147
148static void __init eukrea_cpuimx25_timer_init(void)
149{
150 mx25_clocks_init();
151}
152
153static struct sys_timer eukrea_cpuimx25_timer = {
154 .init = eukrea_cpuimx25_timer_init,
155};
156
157MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
158 /* Maintainer: Eukrea Electromatique */
159 .boot_params = MX25_PHYS_OFFSET + 0x100,
160 .map_io = mx25_map_io,
161 .init_irq = mx25_init_irq,
162 .init_machine = eukrea_cpuimx25_init,
163 .timer = &eukrea_cpuimx25_timer,
164MACHINE_END
diff --git a/arch/arm/mach-mx25/mach-mx25_3ds.c b/arch/arm/mach-mx25/mach-mx25_3ds.c
deleted file mode 100644
index f8be1eb0c06..00000000000
--- a/arch/arm/mach-mx25/mach-mx25_3ds.c
+++ /dev/null
@@ -1,225 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19/*
20 * This machine is known as:
21 * - i.MX25 3-Stack Development System
22 * - i.MX25 Platform Development Kit (i.MX25 PDK)
23 */
24
25#include <linux/types.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/clk.h>
29#include <linux/irq.h>
30#include <linux/gpio.h>
31#include <linux/platform_device.h>
32#include <linux/input/matrix_keypad.h>
33
34#include <mach/hardware.h>
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38#include <asm/memory.h>
39#include <asm/mach/map.h>
40#include <mach/common.h>
41#include <mach/mx25.h>
42#include <mach/imxfb.h>
43#include <mach/iomux-mx25.h>
44
45#include "devices-imx25.h"
46#include "devices.h"
47
48static const struct imxuart_platform_data uart_pdata __initconst = {
49 .flags = IMXUART_HAVE_RTSCTS,
50};
51
52static struct pad_desc mx25pdk_pads[] = {
53 MX25_PAD_FEC_MDC__FEC_MDC,
54 MX25_PAD_FEC_MDIO__FEC_MDIO,
55 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
56 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
57 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
58 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
59 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
60 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
61 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
62 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
63 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
64
65 /* LCD */
66 MX25_PAD_LD0__LD0,
67 MX25_PAD_LD1__LD1,
68 MX25_PAD_LD2__LD2,
69 MX25_PAD_LD3__LD3,
70 MX25_PAD_LD4__LD4,
71 MX25_PAD_LD5__LD5,
72 MX25_PAD_LD6__LD6,
73 MX25_PAD_LD7__LD7,
74 MX25_PAD_LD8__LD8,
75 MX25_PAD_LD9__LD9,
76 MX25_PAD_LD10__LD10,
77 MX25_PAD_LD11__LD11,
78 MX25_PAD_LD12__LD12,
79 MX25_PAD_LD13__LD13,
80 MX25_PAD_LD14__LD14,
81 MX25_PAD_LD15__LD15,
82 MX25_PAD_GPIO_E__LD16,
83 MX25_PAD_GPIO_F__LD17,
84 MX25_PAD_HSYNC__HSYNC,
85 MX25_PAD_VSYNC__VSYNC,
86 MX25_PAD_LSCLK__LSCLK,
87 MX25_PAD_OE_ACD__OE_ACD,
88 MX25_PAD_CONTRAST__CONTRAST,
89
90 /* Keypad */
91 MX25_PAD_KPP_ROW0__KPP_ROW0,
92 MX25_PAD_KPP_ROW1__KPP_ROW1,
93 MX25_PAD_KPP_ROW2__KPP_ROW2,
94 MX25_PAD_KPP_ROW3__KPP_ROW3,
95 MX25_PAD_KPP_COL0__KPP_COL0,
96 MX25_PAD_KPP_COL1__KPP_COL1,
97 MX25_PAD_KPP_COL2__KPP_COL2,
98 MX25_PAD_KPP_COL3__KPP_COL3,
99
100 /* SD1 */
101 MX25_PAD_SD1_CMD__SD1_CMD,
102 MX25_PAD_SD1_CLK__SD1_CLK,
103 MX25_PAD_SD1_DATA0__SD1_DATA0,
104 MX25_PAD_SD1_DATA1__SD1_DATA1,
105 MX25_PAD_SD1_DATA2__SD1_DATA2,
106 MX25_PAD_SD1_DATA3__SD1_DATA3,
107};
108
109static const struct fec_platform_data mx25_fec_pdata __initconst = {
110 .phy = PHY_INTERFACE_MODE_RMII,
111};
112
113#define FEC_ENABLE_GPIO 35
114#define FEC_RESET_B_GPIO 104
115
116static void __init mx25pdk_fec_reset(void)
117{
118 gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
119 gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
120
121 gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
122 gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
123 udelay(2);
124
125 /* turn on PHY power and lift reset */
126 gpio_set_value(FEC_ENABLE_GPIO, 1);
127 gpio_set_value(FEC_RESET_B_GPIO, 1);
128}
129
130static const struct mxc_nand_platform_data
131mx25pdk_nand_board_info __initconst = {
132 .width = 1,
133 .hw_ecc = 1,
134 .flash_bbt = 1,
135};
136
137static struct imx_fb_videomode mx25pdk_modes[] = {
138 {
139 .mode = {
140 .name = "CRT-VGA",
141 .refresh = 60,
142 .xres = 640,
143 .yres = 480,
144 .pixclock = 39683,
145 .left_margin = 45,
146 .right_margin = 114,
147 .upper_margin = 33,
148 .lower_margin = 11,
149 .hsync_len = 1,
150 .vsync_len = 1,
151 },
152 .bpp = 16,
153 .pcr = 0xFA208B80,
154 },
155};
156
157static struct imx_fb_platform_data mx25pdk_fb_pdata = {
158 .mode = mx25pdk_modes,
159 .num_modes = ARRAY_SIZE(mx25pdk_modes),
160 .pwmr = 0x00A903FF,
161 .lscr1 = 0x00120300,
162 .dmacr = 0x00020010,
163};
164
165static const uint32_t mx25pdk_keymap[] = {
166 KEY(0, 0, KEY_UP),
167 KEY(0, 1, KEY_DOWN),
168 KEY(0, 2, KEY_VOLUMEDOWN),
169 KEY(0, 3, KEY_HOME),
170 KEY(1, 0, KEY_RIGHT),
171 KEY(1, 1, KEY_LEFT),
172 KEY(1, 2, KEY_ENTER),
173 KEY(1, 3, KEY_VOLUMEUP),
174 KEY(2, 0, KEY_F6),
175 KEY(2, 1, KEY_F8),
176 KEY(2, 2, KEY_F9),
177 KEY(2, 3, KEY_F10),
178 KEY(3, 0, KEY_F1),
179 KEY(3, 1, KEY_F2),
180 KEY(3, 2, KEY_F3),
181 KEY(3, 3, KEY_POWER),
182};
183
184static struct matrix_keymap_data mx25pdk_keymap_data = {
185 .keymap = mx25pdk_keymap,
186 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
187};
188
189static void __init mx25pdk_init(void)
190{
191 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
192 ARRAY_SIZE(mx25pdk_pads));
193
194 imx25_add_imx_uart0(&uart_pdata);
195 mxc_register_device(&mxc_usbh2, NULL);
196 imx25_add_mxc_nand(&mx25pdk_nand_board_info);
197 mxc_register_device(&mx25_rtc_device, NULL);
198 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
199 mxc_register_device(&mxc_wdt, NULL);
200
201 mx25pdk_fec_reset();
202 imx25_add_fec(&mx25_fec_pdata);
203 mxc_register_device(&mx25_kpp_device, &mx25pdk_keymap_data);
204
205 imx25_add_esdhc(0, NULL);
206}
207
208static void __init mx25pdk_timer_init(void)
209{
210 mx25_clocks_init();
211}
212
213static struct sys_timer mx25pdk_timer = {
214 .init = mx25pdk_timer_init,
215};
216
217MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
218 /* Maintainer: Freescale Semiconductor, Inc. */
219 .boot_params = MX25_PHYS_OFFSET + 0x100,
220 .map_io = mx25_map_io,
221 .init_irq = mx25_init_irq,
222 .init_machine = mx25pdk_init,
223 .timer = &mx25pdk_timer,
224MACHINE_END
225
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
deleted file mode 100644
index bb677111fb0..00000000000
--- a/arch/arm/mach-mx25/mm.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/mach/map.h>
25
26#include <mach/common.h>
27#include <mach/hardware.h>
28#include <mach/mx25.h>
29#include <mach/iomux-v3.h>
30
31/*
32 * This table defines static virtual address mappings for I/O regions.
33 * These are the mappings common across all MX3 boards.
34 */
35static struct map_desc mxc_io_desc[] __initdata = {
36 {
37 .virtual = MX25_AVIC_BASE_ADDR_VIRT,
38 .pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR),
39 .length = MX25_AVIC_SIZE,
40 .type = MT_DEVICE_NONSHARED
41 }, {
42 .virtual = MX25_AIPS1_BASE_ADDR_VIRT,
43 .pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
44 .length = MX25_AIPS1_SIZE,
45 .type = MT_DEVICE_NONSHARED
46 }, {
47 .virtual = MX25_AIPS2_BASE_ADDR_VIRT,
48 .pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
49 .length = MX25_AIPS2_SIZE,
50 .type = MT_DEVICE_NONSHARED
51 },
52};
53
54/*
55 * This function initializes the memory map. It is called during the
56 * system startup to create static physical to virtual memory mappings
57 * for the IO modules.
58 */
59void __init mx25_map_io(void)
60{
61 mxc_set_cpu_type(MXC_CPU_MX25);
62 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
63 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
64
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
66}
67
68int imx25_register_gpios(void);
69
70void __init mx25_init_irq(void)
71{
72 mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
73 imx25_register_gpios();
74}
75
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-19 11:24:35 -0500