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-rw-r--r--arch/arm/mach-iop13xx/Makefile1
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c5
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c5
-rw-r--r--arch/arm/mach-iop13xx/time.c92
4 files changed, 6 insertions, 97 deletions
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
index c3d6c08f2d4..4185e0586c3 100644
--- a/arch/arm/mach-iop13xx/Makefile
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -5,7 +5,6 @@ obj- :=
5 5
6obj-$(CONFIG_ARCH_IOP13XX) += setup.o 6obj-$(CONFIG_ARCH_IOP13XX) += setup.o
7obj-$(CONFIG_ARCH_IOP13XX) += irq.o 7obj-$(CONFIG_ARCH_IOP13XX) += irq.o
8obj-$(CONFIG_ARCH_IOP13XX) += time.o
9obj-$(CONFIG_ARCH_IOP13XX) += pci.o 8obj-$(CONFIG_ARCH_IOP13XX) += pci.o
10obj-$(CONFIG_ARCH_IOP13XX) += io.o 9obj-$(CONFIG_ARCH_IOP13XX) += io.o
11obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o 10obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 2a1bbfe9896..a519d707571 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -25,6 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h> 26#include <asm/arch/pci.h>
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/arch/time.h>
28 29
29extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ 30extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
30 31
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void)
78 79
79static void __init iq81340mc_timer_init(void) 80static void __init iq81340mc_timer_init(void)
80{ 81{
81 iop13xx_init_time(400000000); 82 iop_init_time(400000000);
82} 83}
83 84
84static struct sys_timer iq81340mc_timer = { 85static struct sys_timer iq81340mc_timer = {
85 .init = iq81340mc_timer_init, 86 .init = iq81340mc_timer_init,
86 .offset = iop13xx_gettimeoffset, 87 .offset = iop_gettimeoffset,
87}; 88};
88 89
89MACHINE_START(IQ81340MC, "Intel IQ81340MC") 90MACHINE_START(IQ81340MC, "Intel IQ81340MC")
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 5ad2b62c9bf..0e71fbcabe0 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -25,6 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h> 26#include <asm/arch/pci.h>
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/arch/time.h>
28 29
29extern int init_atu; 30extern int init_atu;
30 31
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void)
80 81
81static void __init iq81340sc_timer_init(void) 82static void __init iq81340sc_timer_init(void)
82{ 83{
83 iop13xx_init_time(400000000); 84 iop_init_time(400000000);
84} 85}
85 86
86static struct sys_timer iq81340sc_timer = { 87static struct sys_timer iq81340sc_timer = {
87 .init = iq81340sc_timer_init, 88 .init = iq81340sc_timer_init,
88 .offset = iop13xx_gettimeoffset, 89 .offset = iop_gettimeoffset,
89}; 90};
90 91
91MACHINE_START(IQ81340SC, "Intel IQ81340SC") 92MACHINE_START(IQ81340SC, "Intel IQ81340SC")
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
deleted file mode 100644
index fc9d9d9a842..00000000000
--- a/arch/arm/mach-iop13xx/time.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * arch/arm/mach-iop13xx/time.c
3 *
4 * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
5 *
6 * Author: Deepak Saxena <dsaxena@mvista.com>
7 *
8 * Copyright 2002-2003 MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/init.h>
20#include <linux/timex.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/uaccess.h>
24#include <asm/mach/irq.h>
25#include <asm/mach/time.h>
26
27static unsigned long ticks_per_jiffy;
28static unsigned long ticks_per_usec;
29static unsigned long next_jiffy_time;
30
31static inline u32 read_tcr1(void)
32{
33 u32 val;
34 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
35 return val;
36}
37
38unsigned long iop13xx_gettimeoffset(void)
39{
40 unsigned long offset;
41
42 offset = next_jiffy_time - read_tcr1();
43
44 return offset / ticks_per_usec;
45}
46
47static irqreturn_t
48iop13xx_timer_interrupt(int irq, void *dev_id)
49{
50 write_seqlock(&xtime_lock);
51
52 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
53
54 while ((signed long)(next_jiffy_time - read_tcr1())
55 >= ticks_per_jiffy) {
56 timer_tick();
57 next_jiffy_time -= ticks_per_jiffy;
58 }
59
60 write_sequnlock(&xtime_lock);
61
62 return IRQ_HANDLED;
63}
64
65static struct irqaction iop13xx_timer_irq = {
66 .name = "IOP13XX Timer Tick",
67 .handler = iop13xx_timer_interrupt,
68 .flags = IRQF_DISABLED | IRQF_TIMER,
69};
70
71void __init iop13xx_init_time(unsigned long tick_rate)
72{
73 u32 timer_ctl;
74
75 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
76 ticks_per_usec = tick_rate / 1000000;
77 next_jiffy_time = 0xffffffff;
78
79 timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
80 IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
81
82 /*
83 * We use timer 0 for our timer interrupt, and timer 1 as
84 * monotonic counter for tracking missed jiffies.
85 */
86 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
87 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
88 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
89 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
90
91 setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
92}