16 files changed, 176 insertions, 47 deletions

diff --git a/arch/arm/mach-davinci/include/mach/cdce949.h b/arch/arm/mach-davinci/include/mach/cdce949.h
new file mode 100644
index 00000000000..c73331fae34
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cdce949.h
@@ -0,0 +1,19 @@
+/*
+ * TI CDCE949 off-chip clock synthesizer support
+ *
+ * 2009 (C) Texas Instruments, Inc. http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef _MACH_DAVINCI_CDCE949_H
+#define _MACH_DAVINCI_CDCE949_H
+
+#include <linux/clk.h>
+
+#include <mach/clock.h>
+
+int cdce_set_rate(struct clk *clk, unsigned long rate);
+
+#endif
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 6ca2c9a0a48..50a955f05ef 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -43,7 +43,7 @@ struct davinci_soc_info {
         void __iomem                    *jtag_id_base;
         struct davinci_id               *ids;
         unsigned long                   ids_num;
-        struct davinci_clk              *cpu_clks;
+        struct clk_lookup               *cpu_clks;
         void __iomem                    **psc_bases;
         unsigned long                   psc_bases_num;
         void __iomem                    *pinmux_base;
diff --git a/arch/arm/mach-davinci/include/mach/cpuidle.h b/arch/arm/mach-davinci/include/mach/cpuidle.h
index cbfc6a9c81b..74f088b0edf 100644
--- a/arch/arm/mach-davinci/include/mach/cpuidle.h
+++ b/arch/arm/mach-davinci/include/mach/cpuidle.h
@@ -12,6 +12,7 @@
 
 struct davinci_cpuidle_config {
         u32 ddr2_pdown;
+        void __iomem *ddr2_ctlr_base;
 };
 
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 90704910d34..cc9be7fee62 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -13,15 +13,17 @@
 
 #include <video/da8xx-fb.h>
 
+#include <linux/davinci_emac.h>
 #include <mach/serial.h>
 #include <mach/edma.h>
 #include <mach/i2c.h>
-#include <mach/emac.h>
 #include <mach/asp.h>
 #include <mach/mmc.h>
 #include <mach/usb.h>
+#include <mach/pm.h>
 
-extern void __iomem *da8xx_syscfg_base;
+extern void __iomem *da8xx_syscfg0_base;
+extern void __iomem *da8xx_syscfg1_base;
 
 /*
  * The cp_intc interrupt controller for the da8xx isn't in the same
@@ -34,13 +36,17 @@ extern void __iomem *da8xx_syscfg_base;
 #define DA8XX_CP_INTC_SIZE      SZ_8K
 #define DA8XX_CP_INTC_VIRT      (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
 
-#define DA8XX_SYSCFG_BASE       (IO_PHYS + 0x14000)
-#define DA8XX_SYSCFG_VIRT(x)    (da8xx_syscfg_base + (x))
+#define DA8XX_SYSCFG0_BASE      (IO_PHYS + 0x14000)
+#define DA8XX_SYSCFG0_VIRT(x)   (da8xx_syscfg0_base + (x))
 #define DA8XX_JTAG_ID_REG       0x18
 #define DA8XX_CFGCHIP0_REG      0x17c
 #define DA8XX_CFGCHIP2_REG      0x184
 #define DA8XX_CFGCHIP3_REG      0x188
 
+#define DA8XX_SYSCFG1_BASE      (IO_PHYS + 0x22C000)
+#define DA8XX_SYSCFG1_VIRT(x)   (da8xx_syscfg1_base + (x))
+#define DA8XX_DEEPSLEEP_REG     0x8
+
 #define DA8XX_PSC0_BASE         0x01c10000
 #define DA8XX_PLL0_BASE         0x01c11000
 #define DA8XX_TIMER64P0_BASE    0x01c20000
@@ -48,11 +54,13 @@ extern void __iomem *da8xx_syscfg_base;
 #define DA8XX_GPIO_BASE         0x01e26000
 #define DA8XX_PSC1_BASE         0x01e27000
 #define DA8XX_LCD_CNTRL_BASE    0x01e13000
+#define DA8XX_PLL1_BASE         0x01e1a000
 #define DA8XX_MMCSD0_BASE       0x01c40000
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
 #define DA8XX_AEMIF_CTL_BASE    0x68000000
 #define DA8XX_DDR2_CTL_BASE     0xb0000000
+#define DA8XX_ARM_RAM_BASE      0xffff0000
 
 #define PINMUX0                 0x00
 #define PINMUX1                 0x04
@@ -90,6 +98,8 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
 int da8xx_register_rtc(void);
 int da850_register_cpufreq(void);
 int da8xx_register_cpuidle(void);
+void __iomem * __init da8xx_get_mem_ctlr(void);
+int da850_register_pm(struct platform_device *pdev);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 9fc5a64a536..3a37b5a6983 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -14,8 +14,8 @@
 #define __ASM_ARCH_DM665_H
 
 #include <linux/platform_device.h>
+#include <linux/davinci_emac.h>
 #include <mach/hardware.h>
-#include <mach/emac.h>
 #include <mach/asp.h>
 #include <mach/keyscan.h>
 #include <media/davinci/vpfe_capture.h>
@@ -32,10 +32,17 @@
 
 #define DM365_RTC_BASE                  (0x01C69000)
 
+#define DAVINCI_DM365_VC_BASE           (0x01D0C000)
+#define DAVINCI_DMA_VC_TX               2
+#define DAVINCI_DMA_VC_RX               3
+
 void __init dm365_init(void);
 void __init dm365_init_asp(struct snd_platform_data *pdata);
+void __init dm365_init_vc(struct snd_platform_data *pdata);
 void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
 void __init dm365_init_rtc(void);
+void dm365_init_spi0(unsigned chipselect_mask,
+                        struct spi_board_info *info, unsigned len);
 
 void dm365_set_vpfe_config(struct vpfe_config *cfg);
 #endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 44e8f0fae9e..1a8b09ccc3c 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -22,8 +22,8 @@
 #ifndef __ASM_ARCH_DM644X_H
 #define __ASM_ARCH_DM644X_H
 
+#include <linux/davinci_emac.h>
 #include <mach/hardware.h>
-#include <mach/emac.h>
 #include <mach/asp.h>
 #include <media/davinci/vpfe_capture.h>
 
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 8cec746ae9d..846da98b619 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -12,10 +12,11 @@
 #define __ASM_ARCH_DM646X_H
 
 #include <mach/hardware.h>
-#include <mach/emac.h>
 #include <mach/asp.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
+#include <linux/clk.h>
+#include <linux/davinci_emac.h>
 
 #define DM646X_EMAC_BASE                (0x01C80000)
 #define DM646X_EMAC_CNTRL_OFFSET        (0x0000)
@@ -30,6 +31,7 @@ void __init dm646x_init(void);
 void __init dm646x_init_ide(void);
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
 void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
+void __init dm646x_board_setup_refclk(struct clk *clk);
 
 void dm646x_video_init(void);
 
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index eb8bfd7925e..ced3092af5b 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -280,8 +280,6 @@ struct edma_soc_info {
         unsigned        n_cc;
         enum dma_event_q        default_queue;
 
-        /* list of channels with no even trigger; terminated by "-1" */
-        const s8        *noevent;
         const s8        (*queue_tc_mapping)[2];
         const s8        (*queue_priority_mapping)[2];
 };
diff --git a/arch/arm/mach-davinci/include/mach/emac.h b/arch/arm/mach-davinci/include/mach/emac.h
deleted file mode 100644
index beff4fb7c84..00000000000
--- a/arch/arm/mach-davinci/include/mach/emac.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * TI DaVinci EMAC platform support
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef _MACH_DAVINCI_EMAC_H
-#define _MACH_DAVINCI_EMAC_H
-
-#include <linux/if_ether.h>
-#include <linux/memory.h>
-
-struct emac_platform_data {
-        char mac_addr[ETH_ALEN];
-        u32 ctrl_reg_offset;
-        u32 ctrl_mod_reg_offset;
-        u32 ctrl_ram_offset;
-        u32 mdio_reg_offset;
-        u32 ctrl_ram_size;
-        u32 phy_mask;
-        u32 mdio_max_freq;
-        u8 rmii_en;
-        u8 version;
-};
-
-enum {
-        EMAC_VERSION_1, /* DM644x */
-        EMAC_VERSION_2, /* DM646x */
-};
-
-void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context);
-#endif
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index c248e9b7e82..39fdceac841 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -16,6 +16,8 @@
 struct davinci_i2c_platform_data {
         unsigned int    bus_freq;       /* standard bus frequency (kHz) */
         unsigned int    bus_delay;      /* post-transaction delay (usec) */
+        unsigned int    sda_pin;        /* GPIO pin ID to use for SDA */
+        unsigned int    scl_pin;        /* GPIO pin ID to use for SCL */
 };
 
 /* for board setup code */
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index 80309aed534..a91edfb8bee 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -31,6 +31,11 @@
 #define PHYS_OFFSET DAVINCI_DDR_BASE
 #endif
 
+#define DDR2_SDRCR_OFFSET       0xc
+#define DDR2_SRPD_BIT           BIT(23)
+#define DDR2_MCLKSTOPEN_BIT     BIT(30)
+#define DDR2_LPMODEN_BIT        BIT(31)
+
 /*
  * Increase size of DMA-consistent memory region
  */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index b60c693985f..2a68c1d8a24 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -327,6 +327,8 @@ enum davinci_dm365_index {
         /* EDMA event muxing */
         DM365_EVT2_ASP_TX,
         DM365_EVT3_ASP_RX,
+        DM365_EVT2_VC_TX,
+        DM365_EVT3_VC_RX,
         DM365_EVT26_MMC0_RX,
 };
 
@@ -899,6 +901,7 @@ enum davinci_da850_index {
         DA850_GPIO2_15,
         DA850_GPIO4_0,
         DA850_GPIO4_1,
+        DA850_RTC_ALARM,
 };
 
 #ifdef CONFIG_DAVINCI_MUX
diff --git a/arch/arm/mach-davinci/include/mach/pm.h b/arch/arm/mach-davinci/include/mach/pm.h
new file mode 100644
index 00000000000..37b19bf35a8
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/pm.h
@@ -0,0 +1,54 @@
+/*
+ * TI DaVinci platform support for power management.
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef _MACH_DAVINCI_PM_H
+#define _MACH_DAVINCI_PM_H
+
+/*
+ * Caution: Assembly code in sleep.S makes assumtion on the order
+ * of the members of this structure.
+ */
+struct davinci_pm_config {
+        void __iomem *ddr2_ctlr_base;
+        void __iomem *ddrpsc_reg_base;
+        int ddrpsc_num;
+        void __iomem *ddrpll_reg_base;
+        void __iomem *deepsleep_reg;
+        void __iomem *cpupll_reg_base;
+        /*
+         * Note on SLEEPCOUNT:
+         * The SLEEPCOUNT feature is mainly intended for cases in which
+         * the internal oscillator is used. The internal oscillator is
+         * fully disabled in deep sleep mode.  When you exist deep sleep
+         * mode, the oscillator will be turned on and will generate very
+         * small oscillations which will not be detected by the deep sleep
+         * counter.  Eventually those oscillations will grow to an amplitude
+         * large enough to start incrementing the deep sleep counter.
+         * In this case recommendation from hardware engineers is that the
+         * SLEEPCOUNT be set to 4096.  This means that 4096 valid clock cycles
+         * must be detected before the clock is passed to the rest of the
+         * system.
+         * In the case that the internal oscillator is not used and the
+         * clock is generated externally, the SLEEPCOUNT value can be very
+         * small since the clock input is assumed to be stable before SoC
+         * is taken out of deepsleep mode.  A value of 128 would be more than
+         * adequate.
+         */
+        int sleepcount;
+};
+
+extern unsigned int davinci_cpu_suspend_sz;
+extern void davinci_cpu_suspend(struct davinci_pm_config *);
+
+#endif
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 171173c1dba..651f6d8158f 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -180,8 +180,23 @@
 #define DA8XX_LPSC1_CR_P3_SS            26
 #define DA8XX_LPSC1_L3_CBA_RAM          31
 
+/* PSC register offsets */
+#define EPCPR           0x070
+#define PTCMD           0x120
+#define PTSTAT          0x128
+#define PDSTAT          0x200
+#define PDCTL1          0x304
+#define MDSTAT          0x800
+#define MDCTL           0xA00
+
+#define MDSTAT_STATE_MASK 0x1f
+
+#ifndef __ASSEMBLER__
+
 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, char enable);
 
+#endif
+
 #endif /* __ASM_ARCH_PSC_H */
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
new file mode 100644
index 00000000000..910efbf099c
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2009 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ARCH_ARM_DAVINCI_SPI_H
+#define __ARCH_ARM_DAVINCI_SPI_H
+
+enum {
+        SPI_VERSION_1, /* For DM355/DM365/DM6467 */
+        SPI_VERSION_2, /* For DA8xx */
+};
+
+struct davinci_spi_platform_data {
+        u8      version;
+        u8      num_chipselect;
+        u8      wdelay;
+        u8      odd_parity;
+        u8      parity_enable;
+        u8      wait_enable;
+        u8      timer_disable;
+        u8      clk_internal;
+        u8      cs_hold;
+        u8      intr_level;
+        u8      poll_mode;
+        u8      use_dma;
+        u8      c2tdelay;
+        u8      t2cdelay;
+};
+
+#endif  /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/arch/arm/mach-davinci/include/mach/timex.h b/arch/arm/mach-davinci/include/mach/timex.h
index 52827567841..9b885298f10 100644
--- a/arch/arm/mach-davinci/include/mach/timex.h
+++ b/arch/arm/mach-davinci/include/mach/timex.h
@@ -11,7 +11,12 @@
 #ifndef __ASM_ARCH_TIMEX_H
 #define __ASM_ARCH_TIMEX_H
 
-/* The source frequency for the timers is the 27MHz clock */
+/*
+ * Alert: Not all timers of the DaVinci family run at a frequency of 27MHz,
+ * but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/
+ * linux/jiffies.h) are not used directly in code. Currently none of the
+ * code relevant to DaVinci platform depends on these values directly.
+ */
 #define CLOCK_TICK_RATE 27000000
 
 #endif /* __ASM_ARCH_TIMEX_H__ */