diff options
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 553b7cf17bf..ab14c0a5d21 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1051,6 +1051,18 @@ config ARM_ERRATA_460075 | |||
1051 | ACTLR register. Note that setting specific bits in the ACTLR register | 1051 | ACTLR register. Note that setting specific bits in the ACTLR register |
1052 | may not be available in non-secure mode. | 1052 | may not be available in non-secure mode. |
1053 | 1053 | ||
1054 | config ARM_ERRATA_742230 | ||
1055 | bool "ARM errata: DMB operation may be faulty" | ||
1056 | depends on CPU_V7 && SMP | ||
1057 | help | ||
1058 | This option enables the workaround for the 742230 Cortex-A9 | ||
1059 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | ||
1060 | between two write operations may not ensure the correct visibility | ||
1061 | ordering of the two writes. This workaround sets a specific bit in | ||
1062 | the diagnostic register of the Cortex-A9 which causes the DMB | ||
1063 | instruction to behave as a DSB, ensuring the correct behaviour of | ||
1064 | the two writes. | ||
1065 | |||
1054 | config PL310_ERRATA_588369 | 1066 | config PL310_ERRATA_588369 |
1055 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | 1067 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" |
1056 | depends on CACHE_L2X0 && ARCH_OMAP4 | 1068 | depends on CACHE_L2X0 && ARCH_OMAP4 |