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-rw-r--r--arch/mips/alchemy/xxs1500/board_setup.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
index a2634fabc50..4de2d48caed 100644
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -23,6 +23,7 @@
23 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 24 */
25 25
26#include <linux/gpio.h>
26#include <linux/init.h> 27#include <linux/init.h>
27#include <linux/delay.h> 28#include <linux/delay.h>
28 29
@@ -50,6 +51,9 @@ void __init board_setup(void)
50 } 51 }
51#endif 52#endif
52 53
54 alchemy_gpio1_input_enable();
55 alchemy_gpio2_enable();
56
53 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */ 57 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
54 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3; 58 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
55 pin_func |= SYS_PF_UR3; 59 pin_func |= SYS_PF_UR3;
@@ -65,20 +69,19 @@ void __init board_setup(void)
65 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */ 69 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
66 70
67#ifdef CONFIG_PCMCIA_XXS1500 71#ifdef CONFIG_PCMCIA_XXS1500
68 /* Setup PCMCIA signals */
69 au_writel(0, SYS_PININPUTEN);
70
71 /* GPIO 0, 1, and 4 are inputs */ 72 /* GPIO 0, 1, and 4 are inputs */
72 au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR); 73 alchemy_gpio_direction_input(0);
74 alchemy_gpio_direction_input(1);
75 alchemy_gpio_direction_input(4);
73 76
74 /* Enable GPIO2 if not already enabled */
75 au_writel(1, GPIO2_ENABLE);
76 /* GPIO2 208/9/10/11 are inputs */ 77 /* GPIO2 208/9/10/11 are inputs */
77 au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR); 78 alchemy_gpio_direction_input(208);
79 alchemy_gpio_direction_input(209);
80 alchemy_gpio_direction_input(210);
81 alchemy_gpio_direction_input(211);
78 82
79 /* Turn off power */ 83 /* Turn off power */
80 au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30), 84 alchemy_gpio_direction_output(214, 0);
81 GPIO2_OUTPUT);
82#endif 85#endif
83 86
84#ifdef CONFIG_PCI 87#ifdef CONFIG_PCI