diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_grctx.c | 24 |
3 files changed, 21 insertions, 19 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index cf2f6aa920b..f03c17a10ab 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
@@ -334,8 +334,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
334 | case 0xc0: | 334 | case 0xc0: |
335 | if (priv->tp_total == 11) { /* 465, 3/4/4/0, 4 */ | 335 | if (priv->tp_total == 11) { /* 465, 3/4/4/0, 4 */ |
336 | priv->magic_not_rop_nr = 0x07; | 336 | priv->magic_not_rop_nr = 0x07; |
337 | priv->magic419bd0 = 0x0a360000; | ||
338 | priv->magic419be4 = 0x04c33a54; | ||
339 | /* filled values up to tp_total, the rest 0 */ | 337 | /* filled values up to tp_total, the rest 0 */ |
340 | priv->magicgpc980[0] = 0x22111000; | 338 | priv->magicgpc980[0] = 0x22111000; |
341 | priv->magicgpc980[1] = 0x00000233; | 339 | priv->magicgpc980[1] = 0x00000233; |
@@ -345,8 +343,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
345 | } else | 343 | } else |
346 | if (priv->tp_total == 14) { /* 470, 3/3/4/4, 5 */ | 344 | if (priv->tp_total == 14) { /* 470, 3/3/4/4, 5 */ |
347 | priv->magic_not_rop_nr = 0x05; | 345 | priv->magic_not_rop_nr = 0x05; |
348 | priv->magic419bd0 = 0x043c0000; | ||
349 | priv->magic419be4 = 0x09041208; | ||
350 | priv->magicgpc980[0] = 0x11110000; | 346 | priv->magicgpc980[0] = 0x11110000; |
351 | priv->magicgpc980[1] = 0x00233222; | 347 | priv->magicgpc980[1] = 0x00233222; |
352 | priv->magicgpc980[2] = 0x00000000; | 348 | priv->magicgpc980[2] = 0x00000000; |
@@ -355,8 +351,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
355 | } else | 351 | } else |
356 | if (priv->tp_total == 15) { /* 480, 3/4/4/4, 6 */ | 352 | if (priv->tp_total == 15) { /* 480, 3/4/4/4, 6 */ |
357 | priv->magic_not_rop_nr = 0x06; | 353 | priv->magic_not_rop_nr = 0x06; |
358 | priv->magic419bd0 = 0x023e0000; | ||
359 | priv->magic419be4 = 0x10414104; | ||
360 | priv->magicgpc980[0] = 0x11110000; | 354 | priv->magicgpc980[0] = 0x11110000; |
361 | priv->magicgpc980[1] = 0x03332222; | 355 | priv->magicgpc980[1] = 0x03332222; |
362 | priv->magicgpc980[2] = 0x00000000; | 356 | priv->magicgpc980[2] = 0x00000000; |
@@ -366,8 +360,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
366 | break; | 360 | break; |
367 | case 0xc3: /* 450, 4/0/0/0, 2 */ | 361 | case 0xc3: /* 450, 4/0/0/0, 2 */ |
368 | priv->magic_not_rop_nr = 0x03; | 362 | priv->magic_not_rop_nr = 0x03; |
369 | priv->magic419bd0 = 0x00500000; | ||
370 | priv->magic419be4 = 0x00000000; | ||
371 | priv->magicgpc980[0] = 0x00003210; | 363 | priv->magicgpc980[0] = 0x00003210; |
372 | priv->magicgpc980[1] = 0x00000000; | 364 | priv->magicgpc980[1] = 0x00000000; |
373 | priv->magicgpc980[2] = 0x00000000; | 365 | priv->magicgpc980[2] = 0x00000000; |
@@ -376,8 +368,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
376 | break; | 368 | break; |
377 | case 0xc4: /* 460, 3/4/0/0, 4 */ | 369 | case 0xc4: /* 460, 3/4/0/0, 4 */ |
378 | priv->magic_not_rop_nr = 0x01; | 370 | priv->magic_not_rop_nr = 0x01; |
379 | priv->magic419bd0 = 0x045c0000; | ||
380 | priv->magic419be4 = 0x09041208; | ||
381 | priv->magicgpc980[0] = 0x02321100; | 371 | priv->magicgpc980[0] = 0x02321100; |
382 | priv->magicgpc980[1] = 0x00000000; | 372 | priv->magicgpc980[1] = 0x00000000; |
383 | priv->magicgpc980[2] = 0x00000000; | 373 | priv->magicgpc980[2] = 0x00000000; |
@@ -386,14 +376,12 @@ nvc0_graph_create(struct drm_device *dev) | |||
386 | break; | 376 | break; |
387 | } | 377 | } |
388 | 378 | ||
389 | if (!priv->magic419bd0) { | 379 | if (!priv->magic_not_rop_nr) { |
390 | NV_ERROR(dev, "PGRAPH: unknown config: %d/%d/%d/%d, %d\n", | 380 | NV_ERROR(dev, "PGRAPH: unknown config: %d/%d/%d/%d, %d\n", |
391 | priv->tp_nr[0], priv->tp_nr[1], priv->tp_nr[2], | 381 | priv->tp_nr[0], priv->tp_nr[1], priv->tp_nr[2], |
392 | priv->tp_nr[3], priv->rop_nr); | 382 | priv->tp_nr[3], priv->rop_nr); |
393 | /* use 0xc3's values... */ | 383 | /* use 0xc3's values... */ |
394 | priv->magic_not_rop_nr = 0x03; | 384 | priv->magic_not_rop_nr = 0x03; |
395 | priv->magic419bd0 = 0x00500000; | ||
396 | priv->magic419be4 = 0x00000000; | ||
397 | priv->magicgpc980[0] = 0x00003210; | 385 | priv->magicgpc980[0] = 0x00003210; |
398 | priv->magicgpc980[1] = 0x00000000; | 386 | priv->magicgpc980[1] = 0x00000000; |
399 | priv->magicgpc980[2] = 0x00000000; | 387 | priv->magicgpc980[2] = 0x00000000; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h b/drivers/gpu/drm/nouveau/nvc0_graph.h index 1e1f24f3fd3..40e26f9c56c 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.h +++ b/drivers/gpu/drm/nouveau/nvc0_graph.h | |||
@@ -46,8 +46,6 @@ struct nvc0_graph_priv { | |||
46 | struct nouveau_gpuobj *unk4188b8; | 46 | struct nouveau_gpuobj *unk4188b8; |
47 | 47 | ||
48 | u8 magic_not_rop_nr; | 48 | u8 magic_not_rop_nr; |
49 | u32 magic419bd0; | ||
50 | u32 magic419be4; | ||
51 | u32 magicgpc980[4]; | 49 | u32 magicgpc980[4]; |
52 | u32 magicgpc918; | 50 | u32 magicgpc918; |
53 | }; | 51 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c b/drivers/gpu/drm/nouveau/nvc0_grctx.c index 88fa6211ac1..fddfab73a58 100644 --- a/drivers/gpu/drm/nouveau/nvc0_grctx.c +++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c | |||
@@ -1875,9 +1875,11 @@ nvc0_grctx_generate(struct nouveau_channel *chan) | |||
1875 | } | 1875 | } |
1876 | 1876 | ||
1877 | if (1) { | 1877 | if (1) { |
1878 | u32 data[6] = {}; | 1878 | u32 data[6] = {}, data2[2] = {}; |
1879 | u8 tpnr[GPC_MAX]; | 1879 | u8 tpnr[GPC_MAX]; |
1880 | u8 shift, ntpcv; | ||
1880 | 1881 | ||
1882 | /* calculate first set of magics */ | ||
1881 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); | 1883 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); |
1882 | 1884 | ||
1883 | for (tp = 0; tp < priv->tp_total; tp++) { | 1885 | for (tp = 0; tp < priv->tp_total; tp++) { |
@@ -1892,6 +1894,20 @@ nvc0_grctx_generate(struct nouveau_channel *chan) | |||
1892 | for (; tp < 32; tp++) | 1894 | for (; tp < 32; tp++) |
1893 | data[tp / 6] |= 7 << ((tp % 6) * 5); | 1895 | data[tp / 6] |= 7 << ((tp % 6) * 5); |
1894 | 1896 | ||
1897 | /* and the second... */ | ||
1898 | shift = 0; | ||
1899 | ntpcv = priv->tp_total; | ||
1900 | while (!(ntpcv & (1 << 4))) { | ||
1901 | ntpcv <<= 1; | ||
1902 | shift++; | ||
1903 | } | ||
1904 | |||
1905 | data2[0] = (ntpcv << 16); | ||
1906 | data2[0] |= (shift << 21); | ||
1907 | data2[0] |= (((1 << (0 + 5)) % ntpcv) << 24); | ||
1908 | for (i = 1; i < 7; i++) | ||
1909 | data2[1] |= ((1 << (i + 5)) % ntpcv) << ((i - 1) * 5); | ||
1910 | |||
1895 | // GPC_BROADCAST | 1911 | // GPC_BROADCAST |
1896 | nv_wr32(dev, 0x418bb8, (priv->tp_total << 8) | | 1912 | nv_wr32(dev, 0x418bb8, (priv->tp_total << 8) | |
1897 | priv->magic_not_rop_nr); | 1913 | priv->magic_not_rop_nr); |
@@ -1900,9 +1916,9 @@ nvc0_grctx_generate(struct nouveau_channel *chan) | |||
1900 | 1916 | ||
1901 | // GPC_BROADCAST.TP_BROADCAST | 1917 | // GPC_BROADCAST.TP_BROADCAST |
1902 | nv_wr32(dev, 0x419bd0, (priv->tp_total << 8) | | 1918 | nv_wr32(dev, 0x419bd0, (priv->tp_total << 8) | |
1903 | priv->magic_not_rop_nr | | 1919 | priv->magic_not_rop_nr | |
1904 | priv->magic419bd0); | 1920 | data2[0]); |
1905 | nv_wr32(dev, 0x419be4, priv->magic419be4); | 1921 | nv_wr32(dev, 0x419be4, data2[1]); |
1906 | for (i = 0; i < 6; i++) | 1922 | for (i = 0; i < 6; i++) |
1907 | nv_wr32(dev, 0x419b00 + (i * 4), data[i]); | 1923 | nv_wr32(dev, 0x419b00 + (i * 4), data[i]); |
1908 | 1924 | ||