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-rw-r--r--arch/arm/plat-omap/gpio.c59
1 files changed, 47 insertions, 12 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 955597fd6d3..dc2ac42d631 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -138,7 +138,11 @@
138#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040 138#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
139#define OMAP4_GPIO_IRQWAKEN0 0x0044 139#define OMAP4_GPIO_IRQWAKEN0 0x0044
140#define OMAP4_GPIO_IRQWAKEN1 0x0048 140#define OMAP4_GPIO_IRQWAKEN1 0x0048
141#define OMAP4_GPIO_SYSSTATUS 0x0104 141#define OMAP4_GPIO_SYSSTATUS 0x0114
142#define OMAP4_GPIO_IRQENABLE1 0x011c
143#define OMAP4_GPIO_WAKE_EN 0x0120
144#define OMAP4_GPIO_IRQSTATUS2 0x0128
145#define OMAP4_GPIO_IRQENABLE2 0x012c
142#define OMAP4_GPIO_CTRL 0x0130 146#define OMAP4_GPIO_CTRL 0x0130
143#define OMAP4_GPIO_OE 0x0134 147#define OMAP4_GPIO_OE 0x0134
144#define OMAP4_GPIO_DATAIN 0x0138 148#define OMAP4_GPIO_DATAIN 0x0138
@@ -149,6 +153,10 @@
149#define OMAP4_GPIO_FALLINGDETECT 0x014c 153#define OMAP4_GPIO_FALLINGDETECT 0x014c
150#define OMAP4_GPIO_DEBOUNCENABLE 0x0150 154#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
151#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 155#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
156#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
157#define OMAP4_GPIO_SETIRQENABLE1 0x0164
158#define OMAP4_GPIO_CLEARWKUENA 0x0180
159#define OMAP4_GPIO_SETWKUENA 0x0184
152#define OMAP4_GPIO_CLEARDATAOUT 0x0190 160#define OMAP4_GPIO_CLEARDATAOUT 0x0190
153#define OMAP4_GPIO_SETDATAOUT 0x0194 161#define OMAP4_GPIO_SETDATAOUT 0x0194
154/* 162/*
@@ -591,12 +599,16 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
591 reg += OMAP7XX_GPIO_DATA_OUTPUT; 599 reg += OMAP7XX_GPIO_DATA_OUTPUT;
592 break; 600 break;
593#endif 601#endif
594#ifdef CONFIG_ARCH_OMAP2PLUS 602#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
595 case METHOD_GPIO_24XX: 603 case METHOD_GPIO_24XX:
596 case METHOD_GPIO_44XX:
597 reg += OMAP24XX_GPIO_DATAOUT; 604 reg += OMAP24XX_GPIO_DATAOUT;
598 break; 605 break;
599#endif 606#endif
607#ifdef CONFIG_ARCH_OMAP4
608 case METHOD_GPIO_44XX:
609 reg += OMAP4_GPIO_DATAOUT;
610 break;
611#endif
600 default: 612 default:
601 return -EINVAL; 613 return -EINVAL;
602 } 614 }
@@ -1213,11 +1225,17 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
1213#endif 1225#endif
1214 if (!cpu_class_is_omap1()) { 1226 if (!cpu_class_is_omap1()) {
1215 if (!bank->mod_usage) { 1227 if (!bank->mod_usage) {
1228 void __iomem *reg = bank->base;
1216 u32 ctrl; 1229 u32 ctrl;
1217 ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); 1230
1218 ctrl &= 0xFFFFFFFE; 1231 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1232 reg += OMAP24XX_GPIO_CTRL;
1233 else if (cpu_is_omap44xx())
1234 reg += OMAP4_GPIO_CTRL;
1235 ctrl = __raw_readl(reg);
1219 /* Module is enabled, clocks are not gated */ 1236 /* Module is enabled, clocks are not gated */
1220 __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL); 1237 ctrl &= 0xFFFFFFFE;
1238 __raw_writel(ctrl, reg);
1221 } 1239 }
1222 bank->mod_usage |= 1 << offset; 1240 bank->mod_usage |= 1 << offset;
1223 } 1241 }
@@ -1239,22 +1257,34 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
1239 __raw_writel(1 << offset, reg); 1257 __raw_writel(1 << offset, reg);
1240 } 1258 }
1241#endif 1259#endif
1242#ifdef CONFIG_ARCH_OMAP2PLUS 1260#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
1243 if ((bank->method == METHOD_GPIO_24XX) || 1261 if (bank->method == METHOD_GPIO_24XX) {
1244 (bank->method == METHOD_GPIO_44XX)) {
1245 /* Disable wake-up during idle for dynamic tick */ 1262 /* Disable wake-up during idle for dynamic tick */
1246 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1263 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1247 __raw_writel(1 << offset, reg); 1264 __raw_writel(1 << offset, reg);
1248 } 1265 }
1249#endif 1266#endif
1267#ifdef CONFIG_ARCH_OMAP4
1268 if (bank->method == METHOD_GPIO_44XX) {
1269 /* Disable wake-up during idle for dynamic tick */
1270 void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
1271 __raw_writel(1 << offset, reg);
1272 }
1273#endif
1250 if (!cpu_class_is_omap1()) { 1274 if (!cpu_class_is_omap1()) {
1251 bank->mod_usage &= ~(1 << offset); 1275 bank->mod_usage &= ~(1 << offset);
1252 if (!bank->mod_usage) { 1276 if (!bank->mod_usage) {
1277 void __iomem *reg = bank->base;
1253 u32 ctrl; 1278 u32 ctrl;
1254 ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); 1279
1280 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1281 reg += OMAP24XX_GPIO_CTRL;
1282 else if (cpu_is_omap44xx())
1283 reg += OMAP4_GPIO_CTRL;
1284 ctrl = __raw_readl(reg);
1255 /* Module is disabled, clocks are gated */ 1285 /* Module is disabled, clocks are gated */
1256 ctrl |= 1; 1286 ctrl |= 1;
1257 __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL); 1287 __raw_writel(ctrl, reg);
1258 } 1288 }
1259 } 1289 }
1260 _reset_gpio(bank, bank->chip.base + offset); 1290 _reset_gpio(bank, bank->chip.base + offset);
@@ -1583,9 +1613,14 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
1583 reg += OMAP7XX_GPIO_DIR_CONTROL; 1613 reg += OMAP7XX_GPIO_DIR_CONTROL;
1584 break; 1614 break;
1585 case METHOD_GPIO_24XX: 1615 case METHOD_GPIO_24XX:
1586 case METHOD_GPIO_44XX:
1587 reg += OMAP24XX_GPIO_OE; 1616 reg += OMAP24XX_GPIO_OE;
1588 break; 1617 break;
1618 case METHOD_GPIO_44XX:
1619 reg += OMAP4_GPIO_OE;
1620 break;
1621 default:
1622 WARN_ONCE(1, "gpio_is_input: incorrect OMAP GPIO method");
1623 return -EINVAL;
1589 } 1624 }
1590 return __raw_readl(reg) & mask; 1625 return __raw_readl(reg) & mask;
1591} 1626}