diff options
| -rw-r--r-- | drivers/video/omap2/dss/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/dpi.c | 81 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/dsi.c | 7 |
3 files changed, 42 insertions, 54 deletions
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig index 5b45c0c33e1..7a49a7514a2 100644 --- a/drivers/video/omap2/dss/Kconfig +++ b/drivers/video/omap2/dss/Kconfig | |||
| @@ -90,14 +90,6 @@ config OMAP2_DSS_DSI | |||
| 90 | 90 | ||
| 91 | See http://www.mipi.org/ for DSI spesifications. | 91 | See http://www.mipi.org/ for DSI spesifications. |
| 92 | 92 | ||
| 93 | config OMAP2_DSS_USE_DSI_PLL | ||
| 94 | bool "Use DSI PLL for PCLK (EXPERIMENTAL)" | ||
| 95 | default n | ||
| 96 | depends on OMAP2_DSS_DSI | ||
| 97 | help | ||
| 98 | Use DSI PLL to generate pixel clock. Currently only for DPI output. | ||
| 99 | DSI PLL can be used to generate higher and more precise pixel clocks. | ||
| 100 | |||
| 101 | config OMAP2_DSS_FAKE_VSYNC | 93 | config OMAP2_DSS_FAKE_VSYNC |
| 102 | bool "Fake VSYNC irq from manual update displays" | 94 | bool "Fake VSYNC irq from manual update displays" |
| 103 | default n | 95 | default n |
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index dc6046402c8..4a2a1e1b195 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c | |||
| @@ -39,7 +39,17 @@ static struct { | |||
| 39 | struct regulator *vdds_dsi_reg; | 39 | struct regulator *vdds_dsi_reg; |
| 40 | } dpi; | 40 | } dpi; |
| 41 | 41 | ||
| 42 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 42 | static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev) |
| 43 | { | ||
| 44 | if (dssdev->clocks.dispc.dispc_fclk_src == | ||
| 45 | OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC || | ||
| 46 | dssdev->clocks.dispc.channel.lcd_clk_src == | ||
| 47 | OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC) | ||
| 48 | return true; | ||
| 49 | else | ||
| 50 | return false; | ||
| 51 | } | ||
| 52 | |||
| 43 | static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, | 53 | static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, |
| 44 | unsigned long pck_req, unsigned long *fck, int *lck_div, | 54 | unsigned long pck_req, unsigned long *fck, int *lck_div, |
| 45 | int *pck_div) | 55 | int *pck_div) |
| @@ -69,7 +79,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, | |||
| 69 | 79 | ||
| 70 | return 0; | 80 | return 0; |
| 71 | } | 81 | } |
| 72 | #else | 82 | |
| 73 | static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft, | 83 | static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft, |
| 74 | unsigned long pck_req, unsigned long *fck, int *lck_div, | 84 | unsigned long pck_req, unsigned long *fck, int *lck_div, |
| 75 | int *pck_div) | 85 | int *pck_div) |
| @@ -96,13 +106,12 @@ static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft, | |||
| 96 | 106 | ||
| 97 | return 0; | 107 | return 0; |
| 98 | } | 108 | } |
| 99 | #endif | ||
| 100 | 109 | ||
| 101 | static int dpi_set_mode(struct omap_dss_device *dssdev) | 110 | static int dpi_set_mode(struct omap_dss_device *dssdev) |
| 102 | { | 111 | { |
| 103 | struct omap_video_timings *t = &dssdev->panel.timings; | 112 | struct omap_video_timings *t = &dssdev->panel.timings; |
| 104 | int lck_div, pck_div; | 113 | int lck_div = 0, pck_div = 0; |
| 105 | unsigned long fck; | 114 | unsigned long fck = 0; |
| 106 | unsigned long pck; | 115 | unsigned long pck; |
| 107 | bool is_tft; | 116 | bool is_tft; |
| 108 | int r = 0; | 117 | int r = 0; |
| @@ -114,13 +123,12 @@ static int dpi_set_mode(struct omap_dss_device *dssdev) | |||
| 114 | 123 | ||
| 115 | is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; | 124 | is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; |
| 116 | 125 | ||
| 117 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 126 | if (dpi_use_dsi_pll(dssdev)) |
| 118 | r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck, | 127 | r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, |
| 119 | &lck_div, &pck_div); | 128 | &fck, &lck_div, &pck_div); |
| 120 | #else | 129 | else |
| 121 | r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck, | 130 | r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, |
| 122 | &lck_div, &pck_div); | 131 | &fck, &lck_div, &pck_div); |
| 123 | #endif | ||
| 124 | if (r) | 132 | if (r) |
| 125 | goto err0; | 133 | goto err0; |
| 126 | 134 | ||
| @@ -179,12 +187,13 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) | |||
| 179 | if (r) | 187 | if (r) |
| 180 | goto err2; | 188 | goto err2; |
| 181 | 189 | ||
| 182 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 190 | if (dpi_use_dsi_pll(dssdev)) { |
| 183 | dss_clk_enable(DSS_CLK_SYSCK); | 191 | dss_clk_enable(DSS_CLK_SYSCK); |
| 184 | r = dsi_pll_init(dssdev, 0, 1); | 192 | r = dsi_pll_init(dssdev, 0, 1); |
| 185 | if (r) | 193 | if (r) |
| 186 | goto err3; | 194 | goto err3; |
| 187 | #endif | 195 | } |
| 196 | |||
| 188 | r = dpi_set_mode(dssdev); | 197 | r = dpi_set_mode(dssdev); |
| 189 | if (r) | 198 | if (r) |
| 190 | goto err4; | 199 | goto err4; |
| @@ -196,11 +205,11 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) | |||
| 196 | return 0; | 205 | return 0; |
| 197 | 206 | ||
| 198 | err4: | 207 | err4: |
| 199 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 208 | if (dpi_use_dsi_pll(dssdev)) |
| 200 | dsi_pll_uninit(); | 209 | dsi_pll_uninit(); |
| 201 | err3: | 210 | err3: |
| 202 | dss_clk_disable(DSS_CLK_SYSCK); | 211 | if (dpi_use_dsi_pll(dssdev)) |
| 203 | #endif | 212 | dss_clk_disable(DSS_CLK_SYSCK); |
| 204 | err2: | 213 | err2: |
| 205 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); | 214 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); |
| 206 | if (cpu_is_omap34xx()) | 215 | if (cpu_is_omap34xx()) |
| @@ -216,11 +225,11 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) | |||
| 216 | { | 225 | { |
| 217 | dssdev->manager->disable(dssdev->manager); | 226 | dssdev->manager->disable(dssdev->manager); |
| 218 | 227 | ||
| 219 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 228 | if (dpi_use_dsi_pll(dssdev)) { |
| 220 | dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); | 229 | dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); |
| 221 | dsi_pll_uninit(); | 230 | dsi_pll_uninit(); |
| 222 | dss_clk_disable(DSS_CLK_SYSCK); | 231 | dss_clk_disable(DSS_CLK_SYSCK); |
| 223 | #endif | 232 | } |
| 224 | 233 | ||
| 225 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); | 234 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); |
| 226 | 235 | ||
| @@ -251,6 +260,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev, | |||
| 251 | int lck_div, pck_div; | 260 | int lck_div, pck_div; |
| 252 | unsigned long fck; | 261 | unsigned long fck; |
| 253 | unsigned long pck; | 262 | unsigned long pck; |
| 263 | struct dispc_clock_info dispc_cinfo; | ||
| 254 | 264 | ||
| 255 | if (!dispc_lcd_timings_ok(timings)) | 265 | if (!dispc_lcd_timings_ok(timings)) |
| 256 | return -EINVAL; | 266 | return -EINVAL; |
| @@ -260,10 +270,8 @@ int dpi_check_timings(struct omap_dss_device *dssdev, | |||
| 260 | 270 | ||
| 261 | is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; | 271 | is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; |
| 262 | 272 | ||
| 263 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 273 | if (dpi_use_dsi_pll(dssdev)) { |
| 264 | { | ||
| 265 | struct dsi_clock_info dsi_cinfo; | 274 | struct dsi_clock_info dsi_cinfo; |
| 266 | struct dispc_clock_info dispc_cinfo; | ||
| 267 | r = dsi_pll_calc_clock_div_pck(is_tft, | 275 | r = dsi_pll_calc_clock_div_pck(is_tft, |
| 268 | timings->pixel_clock * 1000, | 276 | timings->pixel_clock * 1000, |
| 269 | &dsi_cinfo, &dispc_cinfo); | 277 | &dsi_cinfo, &dispc_cinfo); |
| @@ -272,13 +280,8 @@ int dpi_check_timings(struct omap_dss_device *dssdev, | |||
| 272 | return r; | 280 | return r; |
| 273 | 281 | ||
| 274 | fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; | 282 | fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; |
| 275 | lck_div = dispc_cinfo.lck_div; | 283 | } else { |
| 276 | pck_div = dispc_cinfo.pck_div; | ||
| 277 | } | ||
| 278 | #else | ||
| 279 | { | ||
| 280 | struct dss_clock_info dss_cinfo; | 284 | struct dss_clock_info dss_cinfo; |
| 281 | struct dispc_clock_info dispc_cinfo; | ||
| 282 | r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000, | 285 | r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000, |
| 283 | &dss_cinfo, &dispc_cinfo); | 286 | &dss_cinfo, &dispc_cinfo); |
| 284 | 287 | ||
| @@ -286,10 +289,10 @@ int dpi_check_timings(struct omap_dss_device *dssdev, | |||
| 286 | return r; | 289 | return r; |
| 287 | 290 | ||
| 288 | fck = dss_cinfo.fck; | 291 | fck = dss_cinfo.fck; |
| 289 | lck_div = dispc_cinfo.lck_div; | ||
| 290 | pck_div = dispc_cinfo.pck_div; | ||
| 291 | } | 292 | } |
| 292 | #endif | 293 | |
| 294 | lck_div = dispc_cinfo.lck_div; | ||
| 295 | pck_div = dispc_cinfo.pck_div; | ||
| 293 | 296 | ||
| 294 | pck = fck / lck_div / pck_div / 1000; | 297 | pck = fck / lck_div / pck_div / 1000; |
| 295 | 298 | ||
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index accc530f2fb..47b2f4339ca 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
| @@ -1417,12 +1417,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk, | |||
| 1417 | 1417 | ||
| 1418 | DSSDBG("PLL init\n"); | 1418 | DSSDBG("PLL init\n"); |
| 1419 | 1419 | ||
| 1420 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | ||
| 1421 | /* | ||
| 1422 | * HACK: this is just a quick hack to get the USE_DSI_PLL | ||
| 1423 | * option working. USE_DSI_PLL is itself a big hack, and | ||
| 1424 | * should be removed. | ||
| 1425 | */ | ||
| 1426 | if (dsi.vdds_dsi_reg == NULL) { | 1420 | if (dsi.vdds_dsi_reg == NULL) { |
| 1427 | struct regulator *vdds_dsi; | 1421 | struct regulator *vdds_dsi; |
| 1428 | 1422 | ||
| @@ -1435,7 +1429,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk, | |||
| 1435 | 1429 | ||
| 1436 | dsi.vdds_dsi_reg = vdds_dsi; | 1430 | dsi.vdds_dsi_reg = vdds_dsi; |
| 1437 | } | 1431 | } |
| 1438 | #endif | ||
| 1439 | 1432 | ||
| 1440 | enable_clocks(1); | 1433 | enable_clocks(1); |
| 1441 | dsi_enable_pll_clock(1); | 1434 | dsi_enable_pll_clock(1); |
