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-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c5
-rw-r--r--drivers/net/wireless/ath/ath5k/rfbuffer.h27
2 files changed, 29 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 61d3800c811..df5cd0fd69d 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -824,6 +824,11 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
824 824
825 g_step = &go->go_step[ah->ah_gain.g_step_idx]; 825 g_step = &go->go_step[ah->ah_gain.g_step_idx];
826 826
827 /* Set turbo mode (N/A on RF5413) */
828 if ((ah->ah_bwmode == AR5K_BWMODE_40MHZ) &&
829 (ah->ah_radio != AR5K_RF5413))
830 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_TURBO, false);
831
827 /* Bank Modifications (chip-specific) */ 832 /* Bank Modifications (chip-specific) */
828 if (ah->ah_radio == AR5K_RF5111) { 833 if (ah->ah_radio == AR5K_RF5111) {
829 834
diff --git a/drivers/net/wireless/ath/ath5k/rfbuffer.h b/drivers/net/wireless/ath/ath5k/rfbuffer.h
index 70356bacd5d..16b67e84906 100644
--- a/drivers/net/wireless/ath/ath5k/rfbuffer.h
+++ b/drivers/net/wireless/ath/ath5k/rfbuffer.h
@@ -79,8 +79,10 @@ struct ath5k_rf_reg {
79 * life easier by using an index for each register 79 * life easier by using an index for each register
80 * instead of a full rfb_field */ 80 * instead of a full rfb_field */
81enum ath5k_rf_regs_idx { 81enum ath5k_rf_regs_idx {
82 /* BANK 2 */
83 AR5K_RF_TURBO = 0,
82 /* BANK 6 */ 84 /* BANK 6 */
83 AR5K_RF_OB_2GHZ = 0, 85 AR5K_RF_OB_2GHZ,
84 AR5K_RF_OB_5GHZ, 86 AR5K_RF_OB_5GHZ,
85 AR5K_RF_DB_2GHZ, 87 AR5K_RF_DB_2GHZ,
86 AR5K_RF_DB_5GHZ, 88 AR5K_RF_DB_5GHZ,
@@ -134,6 +136,9 @@ enum ath5k_rf_regs_idx {
134* RF5111 (Sombrero) * 136* RF5111 (Sombrero) *
135\*******************/ 137\*******************/
136 138
139/* BANK 2 len pos col */
140#define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
141
137/* BANK 6 len pos col */ 142/* BANK 6 len pos col */
138#define AR5K_RF5111_OB_2GHZ { 3, 119, 0 } 143#define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
139#define AR5K_RF5111_DB_2GHZ { 3, 122, 0 } 144#define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
@@ -158,6 +163,7 @@ enum ath5k_rf_regs_idx {
158#define AR5K_RF5111_MAX_TIME { 2, 49, 0 } 163#define AR5K_RF5111_MAX_TIME { 2, 49, 0 }
159 164
160static const struct ath5k_rf_reg rf_regs_5111[] = { 165static const struct ath5k_rf_reg rf_regs_5111[] = {
166 {2, AR5K_RF_TURBO, AR5K_RF5111_RF_TURBO},
161 {6, AR5K_RF_OB_2GHZ, AR5K_RF5111_OB_2GHZ}, 167 {6, AR5K_RF_OB_2GHZ, AR5K_RF5111_OB_2GHZ},
162 {6, AR5K_RF_DB_2GHZ, AR5K_RF5111_DB_2GHZ}, 168 {6, AR5K_RF_DB_2GHZ, AR5K_RF5111_DB_2GHZ},
163 {6, AR5K_RF_OB_5GHZ, AR5K_RF5111_OB_5GHZ}, 169 {6, AR5K_RF_OB_5GHZ, AR5K_RF5111_OB_5GHZ},
@@ -231,6 +237,9 @@ static const struct ath5k_ini_rfbuffer rfb_5111[] = {
231* RF5112/RF2112 (Derby) * 237* RF5112/RF2112 (Derby) *
232\***********************/ 238\***********************/
233 239
240/* BANK 2 (Common) len pos col */
241#define AR5K_RF5112X_RF_TURBO { 1, 1, 2 }
242
234/* BANK 7 (Common) len pos col */ 243/* BANK 7 (Common) len pos col */
235#define AR5K_RF5112X_GAIN_I { 6, 14, 0 } 244#define AR5K_RF5112X_GAIN_I { 6, 14, 0 }
236#define AR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 } 245#define AR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 }
@@ -262,6 +271,7 @@ static const struct ath5k_ini_rfbuffer rfb_5111[] = {
262#define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 } 271#define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 }
263 272
264static const struct ath5k_rf_reg rf_regs_5112[] = { 273static const struct ath5k_rf_reg rf_regs_5112[] = {
274 {2, AR5K_RF_TURBO, AR5K_RF5112X_RF_TURBO},
265 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112_OB_2GHZ}, 275 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112_OB_2GHZ},
266 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112_DB_2GHZ}, 276 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112_DB_2GHZ},
267 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112_OB_5GHZ}, 277 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112_OB_5GHZ},
@@ -378,6 +388,7 @@ static const struct ath5k_ini_rfbuffer rfb_5112[] = {
378#define AR5K_RF5112A_XB5_LVL { 2, 3, 3 } 388#define AR5K_RF5112A_XB5_LVL { 2, 3, 3 }
379 389
380static const struct ath5k_rf_reg rf_regs_5112a[] = { 390static const struct ath5k_rf_reg rf_regs_5112a[] = {
391 {2, AR5K_RF_TURBO, AR5K_RF5112X_RF_TURBO},
381 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112A_OB_2GHZ}, 392 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112A_OB_2GHZ},
382 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112A_DB_2GHZ}, 393 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112A_DB_2GHZ},
383 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112A_OB_5GHZ}, 394 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112A_OB_5GHZ},
@@ -481,11 +492,15 @@ static const struct ath5k_ini_rfbuffer rfb_5112a[] = {
481* RF2413 (Griffin) * 492* RF2413 (Griffin) *
482\******************/ 493\******************/
483 494
495/* BANK 2 len pos col */
496#define AR5K_RF2413_RF_TURBO { 1, 1, 2 }
497
484/* BANK 6 len pos col */ 498/* BANK 6 len pos col */
485#define AR5K_RF2413_OB_2GHZ { 3, 168, 0 } 499#define AR5K_RF2413_OB_2GHZ { 3, 168, 0 }
486#define AR5K_RF2413_DB_2GHZ { 3, 165, 0 } 500#define AR5K_RF2413_DB_2GHZ { 3, 165, 0 }
487 501
488static const struct ath5k_rf_reg rf_regs_2413[] = { 502static const struct ath5k_rf_reg rf_regs_2413[] = {
503 {2, AR5K_RF_TURBO, AR5K_RF2413_RF_TURBO},
489 {6, AR5K_RF_OB_2GHZ, AR5K_RF2413_OB_2GHZ}, 504 {6, AR5K_RF_OB_2GHZ, AR5K_RF2413_OB_2GHZ},
490 {6, AR5K_RF_DB_2GHZ, AR5K_RF2413_DB_2GHZ}, 505 {6, AR5K_RF_DB_2GHZ, AR5K_RF2413_DB_2GHZ},
491}; 506};
@@ -536,11 +551,15 @@ static const struct ath5k_ini_rfbuffer rfb_2413[] = {
536* RF2315/RF2316 (Cobra SoC) * 551* RF2315/RF2316 (Cobra SoC) *
537\***************************/ 552\***************************/
538 553
554/* BANK 2 len pos col */
555#define AR5K_RF2316_RF_TURBO { 1, 1, 2 }
556
539/* BANK 6 len pos col */ 557/* BANK 6 len pos col */
540#define AR5K_RF2316_OB_2GHZ { 3, 178, 0 } 558#define AR5K_RF2316_OB_2GHZ { 3, 178, 0 }
541#define AR5K_RF2316_DB_2GHZ { 3, 175, 0 } 559#define AR5K_RF2316_DB_2GHZ { 3, 175, 0 }
542 560
543static const struct ath5k_rf_reg rf_regs_2316[] = { 561static const struct ath5k_rf_reg rf_regs_2316[] = {
562 {2, AR5K_RF_TURBO, AR5K_RF2316_RF_TURBO},
544 {6, AR5K_RF_OB_2GHZ, AR5K_RF2316_OB_2GHZ}, 563 {6, AR5K_RF_OB_2GHZ, AR5K_RF2316_OB_2GHZ},
545 {6, AR5K_RF_DB_2GHZ, AR5K_RF2316_DB_2GHZ}, 564 {6, AR5K_RF_DB_2GHZ, AR5K_RF2316_DB_2GHZ},
546}; 565};
@@ -665,17 +684,20 @@ static const struct ath5k_ini_rfbuffer rfb_5413[] = {
665* AR2317 (Spider SoC) * 684* AR2317 (Spider SoC) *
666\***************************/ 685\***************************/
667 686
687/* BANK 2 len pos col */
688#define AR5K_RF2425_RF_TURBO { 1, 1, 2 }
689
668/* BANK 6 len pos col */ 690/* BANK 6 len pos col */
669#define AR5K_RF2425_OB_2GHZ { 3, 193, 0 } 691#define AR5K_RF2425_OB_2GHZ { 3, 193, 0 }
670#define AR5K_RF2425_DB_2GHZ { 3, 190, 0 } 692#define AR5K_RF2425_DB_2GHZ { 3, 190, 0 }
671 693
672static const struct ath5k_rf_reg rf_regs_2425[] = { 694static const struct ath5k_rf_reg rf_regs_2425[] = {
695 {2, AR5K_RF_TURBO, AR5K_RF2425_RF_TURBO},
673 {6, AR5K_RF_OB_2GHZ, AR5K_RF2425_OB_2GHZ}, 696 {6, AR5K_RF_OB_2GHZ, AR5K_RF2425_OB_2GHZ},
674 {6, AR5K_RF_DB_2GHZ, AR5K_RF2425_DB_2GHZ}, 697 {6, AR5K_RF_DB_2GHZ, AR5K_RF2425_DB_2GHZ},
675}; 698};
676 699
677/* Default mode specific settings 700/* Default mode specific settings
678 * XXX: a/aTurbo ?
679 */ 701 */
680static const struct ath5k_ini_rfbuffer rfb_2425[] = { 702static const struct ath5k_ini_rfbuffer rfb_2425[] = {
681 /* BANK / C.R. A/XR B G */ 703 /* BANK / C.R. A/XR B G */
@@ -764,7 +786,6 @@ static const struct ath5k_ini_rfbuffer rfb_2317[] = {
764/* 786/*
765 * TODO: Handle the few differences with swan during 787 * TODO: Handle the few differences with swan during
766 * bank modification and get rid of this 788 * bank modification and get rid of this
767 * XXX: a/aTurbo ?
768 */ 789 */
769static const struct ath5k_ini_rfbuffer rfb_2417[] = { 790static const struct ath5k_ini_rfbuffer rfb_2417[] = {
770 /* BANK / C.R. A/XR B G */ 791 /* BANK / C.R. A/XR B G */