Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Au1200: MMC resource size off by one
  [MIPS] TANBAC: Update defconfig
  [MIPS] Vr41xx: Initialize PCI io_map_base
  [MIPS] Malta: Always compile MTD platform device registration code.
  [MIPS] Malta: Fix build errors for 64-bit kernels
  [MIPS] Lasat: sysctl fixup
  [MIPS] Fix buggy use of kmap_coherent.
  [MIPS] Lasat: bring back from the dead
  [MIPS] vpe_id is required for VSMP and SMTC builds
  [MIPS] Export smp_call_function and smp_call_function_single.
  [MIPS] Bring the SWARM defconfig up to date
  [MIPS] Sibyte: Build RTC support as an object
  [MIPS] Fix the fix for divide by zero error in build_{clear,copy}_page
  [MIPS] Fix build for PNX platforms.
  [MIPS] Add RM200 with R5000 CPU to known ARC machines
  [MIPS] Better load address for big endian SNI RM
  [MIPS] SB1250: Initialize io_map_base
  [MIPS] Alchemy: Add au1500 reserved interrupt
  [MIPS] Export empty_zero_page for sake of the ext4 module.

5 files changed, 7 insertions, 8 deletions

diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 0c5a358863f..2de73dbb2e9 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
         struct cache_desc       tcache; /* Tertiary/split secondary cache */
         int                     srsets; /* Shadow register sets */
         int                     core;   /* physical core number */
-#if defined(CONFIG_MIPS_MT_SMTC)
+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
         /*
          * In the MIPS MT "SMTC" model, each TC is considered
          * to be a "CPU" for the purposes of scheduling, but
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
          * to all TCs within the same VPE.
          */
         int                     vpe_id;  /* Virtual Processor number */
-#endif /* CONFIG_MIPS_MT */
+#endif
 #ifdef CONFIG_MIPS_MT_SMTC
         int                     tc_id;   /* Thread Context number */
 #endif
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h
index 3a492f225f0..954807d9d66 100644
--- a/include/asm-mips/gic.h
+++ b/include/asm-mips/gic.h
@@ -24,8 +24,8 @@
 
 #define MSK(n) ((1 << (n)) - 1)
 #define REG32(addr)             (*(volatile unsigned int *) (addr))
-#define REG(base, offs)         REG32((unsigned int)(base) + offs##_##OFS)
-#define REGP(base, phys)        REG32((unsigned int)(base) + (phys))
+#define REG(base, offs)         REG32((unsigned long)(base) + offs##_##OFS)
+#define REGP(base, phys)        REG32((unsigned long)(base) + (phys))
 
 /* Accessors */
 #define GIC_REG(segment, offset) \
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
index bafe68b1061..1c37d70579b 100644
--- a/include/asm-mips/lasat/serial.h
+++ b/include/asm-mips/lasat/serial.h
@@ -4,10 +4,10 @@
 #define LASAT_BASE_BAUD_100             (7372800 / 16)
 #define LASAT_UART_REGS_BASE_100        0x1c8b0000
 #define LASAT_UART_REGS_SHIFT_100       2
-#define LASATINT_UART_100               8
+#define LASATINT_UART_100               16
 
 /* * LASAT 200 boards serial configuration */
 #define LASAT_BASE_BAUD_200             (100000000 / 16 / 12)
 #define LASAT_UART_REGS_BASE_200        (Vrc5074_PHYS_BASE + 0x0300)
 #define LASAT_UART_REGS_SHIFT_200       3
-#define LASATINT_UART_200               13
+#define LASATINT_UART_200               21
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 1b5064dac00..0d302bad449 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -615,6 +615,7 @@ enum soc_au1500_ints {
         AU1000_RTC_MATCH1_INT,
         AU1000_RTC_MATCH2_INT,
         AU1500_PCI_ERR_INT,
+        AU1500_RESERVED_INT,
         AU1000_USB_DEV_REQ_INT,
         AU1000_USB_DEV_SUS_INT,
         AU1000_USB_HOST_INT,
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 60e2f9338fc..51b34a48c84 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -134,6 +134,4 @@
 
 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
 
-#define CONF_CM_DEFAULT         (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
-
 #endif /* _ASM_PGTABLE_BITS_H */