diff options
author | Michael Neuling <mikey@neuling.org> | 2010-06-08 00:57:02 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-06-09 04:34:55 -0400 |
commit | 532cb4c401e225b084c14d6bd6a2f8ee561de2f1 (patch) | |
tree | 0ce57c2e21cd12ee05561ab2b9c4b66729da8e5a /include | |
parent | 9d5efe05eb0c904545a28b19c18b949f23334de0 (diff) |
sched: Add asymmetric group packing option for sibling domain
Check to see if the group is packed in a sched doman.
This is primarily intended to used at the sibling level. Some cores
like POWER7 prefer to use lower numbered SMT threads. In the case of
POWER7, it can move to lower SMT modes only when higher threads are
idle. When in lower SMT modes, the threads will perform better since
they share less core resources. Hence when we have idle threads, we
want them to be the higher ones.
This adds a hook into f_b_g() called check_asym_packing() to check the
packing. This packing function is run on idle threads. It checks to
see if the busiest CPU in this domain (core in the P7 case) has a
higher CPU number than what where the packing function is being run
on. If it is, calculate the imbalance and return the higher busier
thread as the busiest group to f_b_g(). Here we are assuming a lower
CPU number will be equivalent to a lower SMT thread number.
It also creates a new SD_ASYM_PACKING flag to enable this feature at
any scheduler domain level.
It also creates an arch hook to enable this feature at the sibling
level. The default function doesn't enable this feature.
Based heavily on patch from Peter Zijlstra.
Fixes from Srivatsa Vaddagiri.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <20100608045702.2936CCC897@localhost.localdomain>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/sched.h | 4 | ||||
-rw-r--r-- | include/linux/topology.h | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/include/linux/sched.h b/include/linux/sched.h index c731296e5e9..ff154e10752 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h | |||
@@ -801,7 +801,7 @@ enum cpu_idle_type { | |||
801 | #define SD_POWERSAVINGS_BALANCE 0x0100 /* Balance for power savings */ | 801 | #define SD_POWERSAVINGS_BALANCE 0x0100 /* Balance for power savings */ |
802 | #define SD_SHARE_PKG_RESOURCES 0x0200 /* Domain members share cpu pkg resources */ | 802 | #define SD_SHARE_PKG_RESOURCES 0x0200 /* Domain members share cpu pkg resources */ |
803 | #define SD_SERIALIZE 0x0400 /* Only a single load balancing instance */ | 803 | #define SD_SERIALIZE 0x0400 /* Only a single load balancing instance */ |
804 | 804 | #define SD_ASYM_PACKING 0x0800 /* Place busy groups earlier in the domain */ | |
805 | #define SD_PREFER_SIBLING 0x1000 /* Prefer to place tasks in a sibling domain */ | 805 | #define SD_PREFER_SIBLING 0x1000 /* Prefer to place tasks in a sibling domain */ |
806 | 806 | ||
807 | enum powersavings_balance_level { | 807 | enum powersavings_balance_level { |
@@ -836,6 +836,8 @@ static inline int sd_balance_for_package_power(void) | |||
836 | return SD_PREFER_SIBLING; | 836 | return SD_PREFER_SIBLING; |
837 | } | 837 | } |
838 | 838 | ||
839 | extern int __weak arch_sd_sibiling_asym_packing(void); | ||
840 | |||
839 | /* | 841 | /* |
840 | * Optimise SD flags for power savings: | 842 | * Optimise SD flags for power savings: |
841 | * SD_BALANCE_NEWIDLE helps agressive task consolidation and power savings. | 843 | * SD_BALANCE_NEWIDLE helps agressive task consolidation and power savings. |
diff --git a/include/linux/topology.h b/include/linux/topology.h index c44df50a05a..cf57f30d0dc 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h | |||
@@ -103,6 +103,7 @@ int arch_update_cpu_topology(void); | |||
103 | | 1*SD_SHARE_PKG_RESOURCES \ | 103 | | 1*SD_SHARE_PKG_RESOURCES \ |
104 | | 0*SD_SERIALIZE \ | 104 | | 0*SD_SERIALIZE \ |
105 | | 0*SD_PREFER_SIBLING \ | 105 | | 0*SD_PREFER_SIBLING \ |
106 | | arch_sd_sibiling_asym_packing() \ | ||
106 | , \ | 107 | , \ |
107 | .last_balance = jiffies, \ | 108 | .last_balance = jiffies, \ |
108 | .balance_interval = 1, \ | 109 | .balance_interval = 1, \ |