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authorNicolas Pitre <nico@cam.org>2005-08-06 00:40:46 -0400
committerThomas Gleixner <tglx@mtd.linutronix.de>2005-11-06 14:12:17 -0500
commit638d983840bb64e02c29bdd6160bb9963f4090f7 (patch)
treef07e85847009236731f8cb2b9afcba35d40849b1 /include/mtd/mtd-abi.h
parent4843653cab0db036399f77d9355db31ce39cb8b9 (diff)
{MTD] add support for Intel's "Sibley" flash
This updates the Primary Vendor-Specific Extended Query parsing to version 1.4 in order to get the information about the Configurable Programming Mode regions implemented in the Sibley flash, as well as selecting the appropriate write command code. This flash does not behave like traditional NOR flash when writing data. While mtdblock should just work, further changes are needed for JFFS2 use. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/mtd/mtd-abi.h')
-rw-r--r--include/mtd/mtd-abi.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index 428d9122940..16e74cafd0b 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: mtd-abi.h,v 1.11 2005/05/19 16:08:58 gleixner Exp $ 2 * $Id: mtd-abi.h,v 1.12 2005/08/06 04:40:43 nico Exp $
3 * 3 *
4 * Portions of MTD ABI definition which are shared by kernel and user space 4 * Portions of MTD ABI definition which are shared by kernel and user space
5 */ 5 */
@@ -42,6 +42,7 @@ struct mtd_oob_buf {
42#define MTD_OOB 64 // Out-of-band data (NAND flash) 42#define MTD_OOB 64 // Out-of-band data (NAND flash)
43#define MTD_ECC 128 // Device capable of automatic ECC 43#define MTD_ECC 128 // Device capable of automatic ECC
44#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed 44#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed
45#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions
45 46
46// Some common devices / combinations of capabilities 47// Some common devices / combinations of capabilities
47#define MTD_CAP_ROM 0 48#define MTD_CAP_ROM 0