Apply k4412 kernel from HardKernel for ODROID-X.

110 files changed, 10369 insertions, 153 deletions

diff --git a/include/linux/akm8975.h b/include/linux/akm8975.h
new file mode 100644
index 00000000000..6a7c4326001
--- /dev/null
+++ b/include/linux/akm8975.h
@@ -0,0 +1,87 @@
+/*
+ * Definitions for akm8975 compass chip.
+ */
+#ifndef AKM8975_H
+#define AKM8975_H
+
+#include <linux/ioctl.h>
+
+/*! \name AK8975 operation mode
+ \anchor AK8975_Mode
+ Defines an operation mode of the AK8975.*/
+/*! @{*/
+#define AK8975_MODE_SNG_MEASURE   0x01
+#define AK8975_MODE_SELF_TEST     0x08
+#define AK8975_MODE_FUSE_ACCESS   0x0F
+#define AK8975_MODE_POWER_DOWN    0x00
+/*! @}*/
+
+#define RBUFF_SIZE              8       /* Rx buffer size */
+
+/*! \name AK8975 register address
+\anchor AK8975_REG
+Defines a register address of the AK8975.*/
+/*! @{*/
+#define AK8975_REG_WIA          0x00
+#define AK8975_REG_INFO         0x01
+#define AK8975_REG_ST1          0x02
+#define AK8975_REG_HXL          0x03
+#define AK8975_REG_HXH          0x04
+#define AK8975_REG_HYL          0x05
+#define AK8975_REG_HYH          0x06
+#define AK8975_REG_HZL          0x07
+#define AK8975_REG_HZH          0x08
+#define AK8975_REG_ST2          0x09
+#define AK8975_REG_CNTL         0x0A
+#define AK8975_REG_RSV          0x0B
+#define AK8975_REG_ASTC         0x0C
+#define AK8975_REG_TS1          0x0D
+#define AK8975_REG_TS2          0x0E
+#define AK8975_REG_I2CDIS       0x0F
+/*! @}*/
+
+/*! \name AK8975 fuse-rom address
+\anchor AK8975_FUSE
+Defines a read-only address of the fuse ROM of the AK8975.*/
+/*! @{*/
+#define AK8975_FUSE_ASAX        0x10
+#define AK8975_FUSE_ASAY        0x11
+#define AK8975_FUSE_ASAZ        0x12
+/*! @}*/
+
+#define AKMIO                   0xA1
+
+/* IOCTLs for AKM library */
+#define ECS_IOCTL_WRITE                 _IOW(AKMIO, 0x02, char[5])
+#define ECS_IOCTL_READ                  _IOWR(AKMIO, 0x03, char[5])
+#define ECS_IOCTL_GETDATA               _IOR(AKMIO, 0x08, char[RBUFF_SIZE])
+#define ECS_IOCTL_SET_YPR               _IOW(AKMIO, 0x0C, short[12])
+#define ECS_IOCTL_GET_OPEN_STATUS       _IOR(AKMIO, 0x0D, int)
+#define ECS_IOCTL_GET_CLOSE_STATUS      _IOR(AKMIO, 0x0E, int)
+#define ECS_IOCTL_GET_DELAY             _IOR(AKMIO, 0x30, short)
+
+/* IOCTLs for APPs */
+#define ECS_IOCTL_APP_SET_MFLAG         _IOW(AKMIO, 0x11, short)
+#define ECS_IOCTL_APP_GET_MFLAG         _IOW(AKMIO, 0x12, short)
+#define ECS_IOCTL_APP_SET_AFLAG         _IOW(AKMIO, 0x13, short)
+#define ECS_IOCTL_APP_GET_AFLAG         _IOR(AKMIO, 0x14, short)
+#define ECS_IOCTL_APP_SET_DELAY         _IOW(AKMIO, 0x18, short)
+#define ECS_IOCTL_APP_GET_DELAY         ECS_IOCTL_GET_DELAY
+/* Set raw magnetic vector flag */
+#define ECS_IOCTL_APP_SET_MVFLAG        _IOW(AKMIO, 0x19, short)
+/* Get raw magnetic vector flag */
+#define ECS_IOCTL_APP_GET_MVFLAG        _IOR(AKMIO, 0x1A, short)
+#define ECS_IOCTL_APP_SET_TFLAG         _IOR(AKMIO, 0x15, short)
+
+
+struct akm8975_platform_data {
+        int intr;
+
+        int (*init)(void);
+        void (*exit)(void);
+        int (*power_on)(void);
+        int (*power_off)(void);
+};
+
+#endif
+
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 21114810c7c..60c737f7bda 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -5,6 +5,15 @@
 #define AMBA_MMCI_H
 
 #include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/sdio_func.h>
+
+struct embedded_sdio_data {
+        struct sdio_cis cis;
+        struct sdio_cccr cccr;
+        struct sdio_embedded_func *funcs;
+        int num_funcs;
+};
 
 /* Just some dummy forwarding */
 struct dma_chan;
@@ -55,6 +64,9 @@ struct mmci_platform_data {
         bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
         void *dma_rx_param;
         void *dma_tx_param;
+        unsigned int status_irq;
+        struct embedded_sdio_data *embedded_sdio;
+        int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
 };
 
 #endif
diff --git a/include/linux/android_aid.h b/include/linux/android_aid.h
new file mode 100644
index 00000000000..0f904b3ba7f
--- /dev/null
+++ b/include/linux/android_aid.h
@@ -0,0 +1,28 @@
+/* include/linux/android_aid.h
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ANDROID_AID_H
+#define _LINUX_ANDROID_AID_H
+
+/* AIDs that the kernel treats differently */
+#define AID_NET_BT_ADMIN 3001
+#define AID_NET_BT       3002
+#define AID_INET         3003
+#define AID_NET_RAW      3004
+#define AID_NET_ADMIN    3005
+#define AID_NET_BW_STATS 3006  /* read bandwidth statistics */
+#define AID_NET_BW_ACCT  3007  /* change bandwidth statistics accounting */
+
+#endif
diff --git a/include/linux/android_alarm.h b/include/linux/android_alarm.h
new file mode 100644
index 00000000000..f8f14e793db
--- /dev/null
+++ b/include/linux/android_alarm.h
@@ -0,0 +1,106 @@
+/* include/linux/android_alarm.h
+ *
+ * Copyright (C) 2006-2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ANDROID_ALARM_H
+#define _LINUX_ANDROID_ALARM_H
+
+#include <linux/ioctl.h>
+#include <linux/time.h>
+
+enum android_alarm_type {
+        /* return code bit numbers or set alarm arg */
+        ANDROID_ALARM_RTC_WAKEUP,
+        ANDROID_ALARM_RTC,
+        ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP,
+        ANDROID_ALARM_ELAPSED_REALTIME,
+        ANDROID_ALARM_SYSTEMTIME,
+
+        ANDROID_ALARM_TYPE_COUNT,
+
+        /* return code bit numbers */
+        /* ANDROID_ALARM_TIME_CHANGE = 16 */
+};
+
+#ifdef __KERNEL__
+
+#include <linux/ktime.h>
+#include <linux/rbtree.h>
+
+/*
+ * The alarm interface is similar to the hrtimer interface but adds support
+ * for wakeup from suspend. It also adds an elapsed realtime clock that can
+ * be used for periodic timers that need to keep runing while the system is
+ * suspended and not be disrupted when the wall time is set.
+ */
+
+/**
+ * struct alarm - the basic alarm structure
+ * @node:       red black tree node for time ordered insertion
+ * @type:       alarm type. rtc/elapsed-realtime/systemtime, wakeup/non-wakeup.
+ * @softexpires: the absolute earliest expiry time of the alarm.
+ * @expires:    the absolute expiry time.
+ * @function:   alarm expiry callback function
+ *
+ * The alarm structure must be initialized by alarm_init()
+ *
+ */
+
+struct alarm {
+        struct rb_node          node;
+        enum android_alarm_type type;
+        ktime_t                 softexpires;
+        ktime_t                 expires;
+        void                    (*function)(struct alarm *);
+};
+
+void alarm_init(struct alarm *alarm,
+        enum android_alarm_type type, void (*function)(struct alarm *));
+void alarm_start_range(struct alarm *alarm, ktime_t start, ktime_t end);
+int alarm_try_to_cancel(struct alarm *alarm);
+int alarm_cancel(struct alarm *alarm);
+ktime_t alarm_get_elapsed_realtime(void);
+
+/* set rtc while preserving elapsed realtime */
+int alarm_set_rtc(const struct timespec ts);
+
+#endif
+
+enum android_alarm_return_flags {
+        ANDROID_ALARM_RTC_WAKEUP_MASK = 1U << ANDROID_ALARM_RTC_WAKEUP,
+        ANDROID_ALARM_RTC_MASK = 1U << ANDROID_ALARM_RTC,
+        ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK =
+                                1U << ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP,
+        ANDROID_ALARM_ELAPSED_REALTIME_MASK =
+                                1U << ANDROID_ALARM_ELAPSED_REALTIME,
+        ANDROID_ALARM_SYSTEMTIME_MASK = 1U << ANDROID_ALARM_SYSTEMTIME,
+        ANDROID_ALARM_TIME_CHANGE_MASK = 1U << 16
+};
+
+/* Disable alarm */
+#define ANDROID_ALARM_CLEAR(type)           _IO('a', 0 | ((type) << 4))
+
+/* Ack last alarm and wait for next */
+#define ANDROID_ALARM_WAIT                  _IO('a', 1)
+
+#define ALARM_IOW(c, type, size)            _IOW('a', (c) | ((type) << 4), size)
+/* Set alarm */
+#define ANDROID_ALARM_SET(type)             ALARM_IOW(2, type, struct timespec)
+#define ANDROID_ALARM_SET_AND_WAIT(type)    ALARM_IOW(3, type, struct timespec)
+#define ANDROID_ALARM_GET_TIME(type)        ALARM_IOW(4, type, struct timespec)
+#define ANDROID_ALARM_SET_RTC               _IOW('a', 5, struct timespec)
+#define ANDROID_ALARM_BASE_CMD(cmd)         (cmd & ~(_IOC(0, 0, 0xf0, 0)))
+#define ANDROID_ALARM_IOCTL_TO_TYPE(cmd)    (_IOC_NR(cmd) >> 4)
+
+#endif
diff --git a/include/linux/ashmem.h b/include/linux/ashmem.h
new file mode 100644
index 00000000000..1976b10ef93
--- /dev/null
+++ b/include/linux/ashmem.h
@@ -0,0 +1,48 @@
+/*
+ * include/linux/ashmem.h
+ *
+ * Copyright 2008 Google Inc.
+ * Author: Robert Love
+ *
+ * This file is dual licensed.  It may be redistributed and/or modified
+ * under the terms of the Apache 2.0 License OR version 2 of the GNU
+ * General Public License.
+ */
+
+#ifndef _LINUX_ASHMEM_H
+#define _LINUX_ASHMEM_H
+
+#include <linux/limits.h>
+#include <linux/ioctl.h>
+
+#define ASHMEM_NAME_LEN         256
+
+#define ASHMEM_NAME_DEF         "dev/ashmem"
+
+/* Return values from ASHMEM_PIN: Was the mapping purged while unpinned? */
+#define ASHMEM_NOT_PURGED       0
+#define ASHMEM_WAS_PURGED       1
+
+/* Return values from ASHMEM_GET_PIN_STATUS: Is the mapping pinned? */
+#define ASHMEM_IS_UNPINNED      0
+#define ASHMEM_IS_PINNED        1
+
+struct ashmem_pin {
+        __u32 offset;   /* offset into region, in bytes, page-aligned */
+        __u32 len;      /* length forward from offset, in bytes, page-aligned */
+};
+
+#define __ASHMEMIOC             0x77
+
+#define ASHMEM_SET_NAME         _IOW(__ASHMEMIOC, 1, char[ASHMEM_NAME_LEN])
+#define ASHMEM_GET_NAME         _IOR(__ASHMEMIOC, 2, char[ASHMEM_NAME_LEN])
+#define ASHMEM_SET_SIZE         _IOW(__ASHMEMIOC, 3, size_t)
+#define ASHMEM_GET_SIZE         _IO(__ASHMEMIOC, 4)
+#define ASHMEM_SET_PROT_MASK    _IOW(__ASHMEMIOC, 5, unsigned long)
+#define ASHMEM_GET_PROT_MASK    _IO(__ASHMEMIOC, 6)
+#define ASHMEM_PIN              _IOW(__ASHMEMIOC, 7, struct ashmem_pin)
+#define ASHMEM_UNPIN            _IOW(__ASHMEMIOC, 8, struct ashmem_pin)
+#define ASHMEM_GET_PIN_STATUS   _IO(__ASHMEMIOC, 9)
+#define ASHMEM_PURGE_ALL_CACHES _IO(__ASHMEMIOC, 10)
+
+#endif  /* _LINUX_ASHMEM_H */
diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h
index 96f4094b706..b1038bd686a 100644
--- a/include/linux/backing-dev.h
+++ b/include/linux/backing-dev.h
@@ -16,7 +16,7 @@
 #include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/writeback.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
 
 struct page;
 struct device;
@@ -40,6 +40,8 @@ typedef int (congested_fn)(void *, int);
 enum bdi_stat_item {
         BDI_RECLAIMABLE,
         BDI_WRITEBACK,
+        BDI_DIRTIED,
+        BDI_WRITTEN,
         NR_BDI_STAT_ITEMS
 };
 
@@ -57,6 +59,7 @@ struct bdi_writeback {
         struct list_head b_dirty;       /* dirty inodes */
         struct list_head b_io;          /* parked for writeback */
         struct list_head b_more_io;     /* parked for more writeback */
+        spinlock_t list_lock;           /* protects the b_* lists */
 };
 
 struct backing_dev_info {
@@ -71,6 +74,21 @@ struct backing_dev_info {
 
         struct percpu_counter bdi_stat[NR_BDI_STAT_ITEMS];
 
+        unsigned long bw_time_stamp;    /* last time write bw is updated */
+        unsigned long dirtied_stamp;
+        unsigned long written_stamp;    /* pages written at bw_time_stamp */
+        unsigned long write_bandwidth;  /* the estimated write bandwidth */
+        unsigned long avg_write_bandwidth; /* further smoothed write bw */
+
+        /*
+         * The base dirty throttle rate, re-calculated on every 200ms.
+         * All the bdi tasks' dirty rate will be curbed under it.
+         * @dirty_ratelimit tracks the estimated @balanced_dirty_ratelimit
+         * in small steps and is much more smooth/stable than the latter.
+         */
+        unsigned long dirty_ratelimit;
+        unsigned long balanced_dirty_ratelimit;
+
         struct prop_local_percpu completions;
         int dirty_exceeded;
 
@@ -100,12 +118,14 @@ int bdi_register(struct backing_dev_info *bdi, struct device *parent,
 int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev);
 void bdi_unregister(struct backing_dev_info *bdi);
 int bdi_setup_and_register(struct backing_dev_info *, char *, unsigned int);
-void bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages);
+void bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages,
+                        enum wb_reason reason);
 void bdi_start_background_writeback(struct backing_dev_info *bdi);
 int bdi_writeback_thread(void *data);
 int bdi_has_dirty_io(struct backing_dev_info *bdi);
 void bdi_arm_supers_timer(void);
 void bdi_wakeup_thread_delayed(struct backing_dev_info *bdi);
+void bdi_lock_two(struct bdi_writeback *wb1, struct bdi_writeback *wb2);
 
 extern spinlock_t bdi_lock;
 extern struct list_head bdi_list;
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index dcafe0bf000..50e2c16b20f 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -45,6 +45,7 @@
  * bitmap_set(dst, pos, nbits)                  Set specified bit area
  * bitmap_clear(dst, pos, nbits)                Clear specified bit area
  * bitmap_find_next_zero_area(buf, len, pos, n, mask)   Find bit free area
+ * bitmap_find_next_zero_area_off(buf, len, pos, n, mask)       as above
  * bitmap_shift_right(dst, src, n, nbits)       *dst = *src >> n
  * bitmap_shift_left(dst, src, n, nbits)        *dst = *src << n
  * bitmap_remap(dst, src, old, new, nbits)      *dst = map(old, new)(src)
@@ -114,11 +115,24 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits);
 
 extern void bitmap_set(unsigned long *map, int i, int len);
 extern void bitmap_clear(unsigned long *map, int start, int nr);
-extern unsigned long bitmap_find_next_zero_area(unsigned long *map,
-                                         unsigned long size,
-                                         unsigned long start,
-                                         unsigned int nr,
-                                         unsigned long align_mask);
+
+extern unsigned long bitmap_find_next_zero_area_off(unsigned long *map,
+                                                    unsigned long size,
+                                                    unsigned long start,
+                                                    unsigned int nr,
+                                                    unsigned long align_mask,
+                                                    unsigned long align_offset);
+
+static inline unsigned long
+bitmap_find_next_zero_area(unsigned long *map,
+                           unsigned long size,
+                           unsigned long start,
+                           unsigned int nr,
+                           unsigned long align_mask)
+{
+        return bitmap_find_next_zero_area_off(map, size, start, nr,
+                                              align_mask, 0);
+}
 
 extern int bitmap_scnprintf(char *buf, unsigned int len,
                         const unsigned long *src, int nbits);
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 1b130216ccd..fd467be1eb6 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -393,7 +393,7 @@ struct request_queue
 #define QUEUE_FLAG_ELVSWITCH    6       /* don't use elevator, just do FIFO */
 #define QUEUE_FLAG_BIDI         7       /* queue supports bidi requests */
 #define QUEUE_FLAG_NOMERGES     8       /* disable merge attempts */
-#define QUEUE_FLAG_SAME_COMP    9       /* force complete on same CPU */
+#define QUEUE_FLAG_SAME_COMP    9       /* complete on same CPU-group */
 #define QUEUE_FLAG_FAIL_IO     10       /* fake timeout */
 #define QUEUE_FLAG_STACKABLE   11       /* supports request stacking */
 #define QUEUE_FLAG_NONROT      12       /* non-rotational device (SSD) */
@@ -403,6 +403,7 @@ struct request_queue
 #define QUEUE_FLAG_NOXMERGES   15       /* No extended merges */
 #define QUEUE_FLAG_ADD_RANDOM  16       /* Contributes to random pool */
 #define QUEUE_FLAG_SECDISCARD  17       /* supports SECDISCARD */
+#define QUEUE_FLAG_SAME_FORCE  18       /* force complete on same CPU */
 
 #define QUEUE_FLAG_DEFAULT      ((1 << QUEUE_FLAG_IO_STAT) |            \
                                  (1 << QUEUE_FLAG_STACKABLE)    |       \
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index ab4ac0ccb85..543250e4840 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -84,12 +84,6 @@ enum {
         CSS_REMOVED, /* This CSS is dead */
 };
 
-/* Caller must verify that the css is not for root cgroup */
-static inline void __css_get(struct cgroup_subsys_state *css, int count)
-{
-        atomic_add(count, &css->refcnt);
-}
-
 /*
  * Call css_get() to hold a reference on the css; it can be used
  * for a reference obtained via:
@@ -97,6 +91,7 @@ static inline void __css_get(struct cgroup_subsys_state *css, int count)
  * - task->cgroups for a locked task
  */
 
+extern void __css_get(struct cgroup_subsys_state *css, int count);
 static inline void css_get(struct cgroup_subsys_state *css)
 {
         /* We don't need to reference count the root state */
@@ -143,10 +138,7 @@ static inline void css_put(struct cgroup_subsys_state *css)
 enum {
         /* Control Group is dead */
         CGRP_REMOVED,
-        /*
-         * Control Group has previously had a child cgroup or a task,
-         * but no longer (only if CGRP_NOTIFY_ON_RELEASE is set)
-         */
+        /* Control Group has ever had a child cgroup or a task */
         CGRP_RELEASABLE,
         /* Control Group requires release notifications to userspace */
         CGRP_NOTIFY_ON_RELEASE,
@@ -287,6 +279,7 @@ struct css_set {
 
         /* For RCU-protected deletion */
         struct rcu_head rcu_head;
+        struct work_struct work;
 };
 
 /*
@@ -466,6 +459,7 @@ struct cgroup_subsys {
                                                   struct cgroup *cgrp);
         int (*pre_destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
         void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
+        int (*allow_attach)(struct cgroup *cgrp, struct task_struct *tsk);
         int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
                           struct task_struct *tsk);
         int (*can_attach_task)(struct cgroup *cgrp, struct task_struct *tsk);
diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h
index ac663c18776..c966638399e 100644
--- a/include/linux/cgroup_subsys.h
+++ b/include/linux/cgroup_subsys.h
@@ -64,3 +64,9 @@ SUBSYS(perf)
 #endif
 
 /* */
+
+#ifdef CONFIG_CGROUP_BFQIO
+SUBSYS(bfqio)
+#endif
+
+/* */
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 18a1baf31f2..ddafbffd84b 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -202,6 +202,7 @@ struct clocksource {
 #define CLOCK_SOURCE_WATCHDOG                   0x10
 #define CLOCK_SOURCE_VALID_FOR_HRES             0x20
 #define CLOCK_SOURCE_UNSTABLE                   0x40
+#define CLOCK_SOURCE_SCHED_CLOCK                0x80
 
 /* simplify initialization of mask field */
 #define CLOCKSOURCE_MASK(bits) (cycle_t)((bits) < 64 ? ((1ULL<<(bits))-1) : -1)
diff --git a/include/linux/cma.h b/include/linux/cma.h
new file mode 100644
index 00000000000..0287f4e9bec
--- /dev/null
+++ b/include/linux/cma.h
@@ -0,0 +1,493 @@
+#ifndef __LINUX_CMA_H
+#define __LINUX_CMA_H
+
+/* linux/include/linux/cma.h
+ *
+ * Contiguous Memory Allocator framework
+ * Copyright (c) 2010 by Samsung Electronics.
+ * Written by Michal Nazarewicz (m.nazarewicz@samsung.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of  the GNU General Public License version 2 as
+ * published by the Free Software Foundation
+ */
+
+/*
+ * See Documentation/contiguous-memory.txt for details.
+ */
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+
+#define CMA_MAGIC (('c' << 24) | ('M' << 16) | ('a' << 8) | 0x42)
+
+enum {
+        CMA_REQ_DEV_KIND,
+        CMA_REQ_FROM_REG
+};
+
+/**
+ * An information about area exportable to user space.
+ * @magic:      must always be CMA_MAGIC.
+ * @type:       type of the request.
+ * @spec:       either "dev/kind\0" or "regions\0" depending on @type.
+ *              In any case, the string must be NUL terminated.
+ *              additionally, in the latter case scanning stops at
+ *              semicolon (';').
+ * @size:       size of the chunk to allocate.
+ * @alignment:  desired alignment of the chunk (must be power of two or zero).
+ * @start:      when ioctl() finishes this stores physical address of the chunk.
+ */
+struct cma_alloc_request {
+        __u32 magic;
+        __u32 type;
+
+        /* __u64 to be compatible accross 32 and 64 bit systems. */
+        __u64 size;
+        __u64 alignment;
+        __u64 start;
+
+        char spec[32];
+};
+
+#define IOCTL_CMA_ALLOC    _IOWR('p', 0, struct cma_alloc_request)
+
+
+/***************************** Kernel level API *****************************/
+
+#ifdef __KERNEL__
+
+#include <linux/rbtree.h>
+#include <linux/list.h>
+#if defined CONFIG_CMA_SYSFS
+#  include <linux/kobject.h>
+#endif
+
+
+struct device;
+struct cma_info;
+
+/*
+ * Don't call it directly, use cma_alloc(), cma_alloc_from() or
+ * cma_alloc_from_region().
+ */
+dma_addr_t __must_check
+__cma_alloc(const struct device *dev, const char *type,
+            size_t size, dma_addr_t alignment);
+
+/* Don't call it directly, use cma_info() or cma_info_about(). */
+int
+__cma_info(struct cma_info *info, const struct device *dev, const char *type);
+
+
+/**
+ * cma_alloc - allocates contiguous chunk of memory.
+ * @dev:        The device to perform allocation for.
+ * @type:       A type of memory to allocate.  Platform may define
+ *              several different types of memory and device drivers
+ *              can then request chunks of different types.  Usually it's
+ *              safe to pass NULL here which is the same as passing
+ *              "common".
+ * @size:       Size of the memory to allocate in bytes.
+ * @alignment:  Desired alignment in bytes.  Must be a power of two or
+ *              zero.  If alignment is less then a page size it will be
+ *              set to page size. If unsure, pass zero here.
+ *
+ * On error returns a negative error cast to dma_addr_t.  Use
+ * IS_ERR_VALUE() to check if returned value is indeed an error.
+ * Otherwise bus address of the chunk is returned.
+ */
+static inline dma_addr_t __must_check
+cma_alloc(const struct device *dev, const char *type,
+          size_t size, dma_addr_t alignment)
+{
+        return dev ? __cma_alloc(dev, type, size, alignment) : -EINVAL;
+}
+
+
+/**
+ * struct cma_info - information about regions returned by cma_info().
+ * @lower_bound:        The smallest address that is possible to be
+ *                      allocated for given (dev, type) pair.
+ * @upper_bound:        The one byte after the biggest address that is
+ *                      possible to be allocated for given (dev, type)
+ *                      pair.
+ * @total_size: Total size of regions mapped to (dev, type) pair.
+ * @free_size:  Total free size in all of the regions mapped to (dev, type)
+ *              pair.  Because of possible race conditions, it is not
+ *              guaranteed that the value will be correct -- it gives only
+ *              an approximation.
+ * @count:      Number of regions mapped to (dev, type) pair.
+ */
+struct cma_info {
+        dma_addr_t lower_bound, upper_bound;
+        size_t total_size, free_size;
+        unsigned count;
+};
+
+/**
+ * cma_info - queries information about regions.
+ * @info:       Pointer to a structure where to save the information.
+ * @dev:        The device to query information for.
+ * @type:       A type of memory to query information for.
+ *              If unsure, pass NULL here which is equal to passing
+ *              "common".
+ *
+ * On error returns a negative error, zero otherwise.
+ */
+static inline int
+cma_info(struct cma_info *info, const struct device *dev, const char *type)
+{
+        return dev ? __cma_info(info, dev, type) : -EINVAL;
+}
+
+
+/**
+ * cma_free - frees a chunk of memory.
+ * @addr:       Beginning of the chunk.
+ *
+ * Returns -ENOENT if there is no chunk at given location; otherwise
+ * zero.  In the former case issues a warning.
+ */
+int cma_free(dma_addr_t addr);
+
+/**
+ * cma_get_virt - frees virtual address of cma memory.
+ * @phys:       physical addrress
+ * @size:               size of memory
+ * @noncached : 0 is cached, 1 is non-cached.
+ *
+ * Returns -ENOENT if there is no chunk at given location; otherwise
+ * zero.  In the former case issues a warning.
+ */
+void *cma_get_virt(dma_addr_t phys, dma_addr_t size, int noncached);
+
+
+/****************************** Lower lever API *****************************/
+
+/**
+ * cma_alloc_from - allocates contiguous chunk of memory from named regions.
+ * @regions:    Comma separated list of region names.  Terminated by NUL
+ *              byte or a semicolon.
+ * @size:       Size of the memory to allocate in bytes.
+ * @alignment:  Desired alignment in bytes.  Must be a power of two or
+ *              zero.  If alignment is less then a page size it will be
+ *              set to page size. If unsure, pass zero here.
+ *
+ * On error returns a negative error cast to dma_addr_t.  Use
+ * IS_ERR_VALUE() to check if returned value is indeed an error.
+ * Otherwise bus address of the chunk is returned.
+ */
+static inline dma_addr_t __must_check
+cma_alloc_from(const char *regions, size_t size, dma_addr_t alignment)
+{
+        return __cma_alloc(NULL, regions, size, alignment);
+}
+
+/**
+ * cma_info_about - queries information about named regions.
+ * @info:       Pointer to a structure where to save the information.
+ * @regions:    Comma separated list of region names.  Terminated by NUL
+ *              byte or a semicolon.
+ *
+ * On error returns a negative error, zero otherwise.
+ */
+static inline int
+cma_info_about(struct cma_info *info, const const char *regions)
+{
+        return __cma_info(info, NULL, regions);
+}
+
+
+
+struct cma_allocator;
+
+/**
+ * struct cma_region - a region reserved for CMA allocations.
+ * @name:       Unique name of the region.  Read only.
+ * @start:      Bus address of the region in bytes.  Always aligned at
+ *              least to a full page.  Read only.
+ * @size:       Size of the region in bytes.  Multiply of a page size.
+ *              Read only.
+ * @free_space: Free space in the region.  Read only.
+ * @alignment:  Desired alignment of the region in bytes.  A power of two,
+ *              always at least page size.  Early.
+ * @alloc:      Allocator used with this region.  NULL means allocator is
+ *              not attached.  Private.
+ * @alloc_name: Allocator name read from cmdline.  Private.  This may be
+ *              different from @alloc->name.
+ * @private_data:       Allocator's private data.
+ * @users:      Number of chunks allocated in this region.
+ * @list:       Entry in list of regions.  Private.
+ * @used:       Whether region was already used, ie. there was at least
+ *              one allocation request for.  Private.
+ * @registered: Whether this region has been registered.  Read only.
+ * @reserved:   Whether this region has been reserved.  Early.  Read only.
+ * @copy_name:  Whether @name and @alloc_name needs to be copied when
+ *              this region is converted from early to normal.  Early.
+ *              Private.
+ * @free_alloc_name:    Whether @alloc_name was kmalloced().  Private.
+ *
+ * Regions come in two types: an early region and normal region.  The
+ * former can be reserved or not-reserved.  Fields marked as "early"
+ * are only meaningful in early regions.
+ *
+ * Early regions are important only during initialisation.  The list
+ * of early regions is built from the "cma" command line argument or
+ * platform defaults.  Platform initialisation code is responsible for
+ * reserving space for unreserved regions that are placed on
+ * cma_early_regions list.
+ *
+ * Later, during CMA initialisation all reserved regions from the
+ * cma_early_regions list are registered as normal regions and can be
+ * used using standard mechanisms.
+ */
+struct cma_region {
+        const char *name;
+        dma_addr_t start;
+        size_t size;
+        union {
+                size_t free_space;      /* Normal region */
+                dma_addr_t alignment;   /* Early region */
+        };
+
+        struct cma_allocator *alloc;
+        const char *alloc_name;
+        void *private_data;
+
+        unsigned users;
+        struct list_head list;
+
+#if defined CONFIG_CMA_SYSFS
+        struct kobject kobj;
+#endif
+
+        unsigned used:1;
+        unsigned registered:1;
+        unsigned reserved:1;
+        unsigned copy_name:1;
+        unsigned free_alloc_name:1;
+};
+
+
+/**
+ * cma_region_register() - registers a region.
+ * @reg:        Region to region.
+ *
+ * Region's start and size must be set.
+ *
+ * If name is set the region will be accessible using normal mechanism
+ * like mapping or cma_alloc_from() function otherwise it will be
+ * a private region and accessible only using the
+ * cma_alloc_from_region() function.
+ *
+ * If alloc is set function will try to initialise given allocator
+ * (and will return error if it failes).  Otherwise alloc_name may
+ * point to a name of an allocator to use (if not set, the default
+ * will be used).
+ *
+ * All other fields are ignored and/or overwritten.
+ *
+ * Returns zero or negative error.  In particular, -EADDRINUSE if
+ * region overlap with already existing region.
+ */
+int __must_check cma_region_register(struct cma_region *reg);
+
+/**
+ * cma_region_unregister() - unregisters a region.
+ * @reg:        Region to unregister.
+ *
+ * Region is unregistered only if there are no chunks allocated for
+ * it.  Otherwise, function returns -EBUSY.
+ *
+ * On success returs zero.
+ */
+int __must_check cma_region_unregister(struct cma_region *reg);
+
+
+/**
+ * cma_alloc_from_region() - allocates contiguous chunk of memory from region.
+ * @reg:        Region to allocate chunk from.
+ * @size:       Size of the memory to allocate in bytes.
+ * @alignment:  Desired alignment in bytes.  Must be a power of two or
+ *              zero.  If alignment is less then a page size it will be
+ *              set to page size. If unsure, pass zero here.
+ *
+ * On error returns a negative error cast to dma_addr_t.  Use
+ * IS_ERR_VALUE() to check if returned value is indeed an error.
+ * Otherwise bus address of the chunk is returned.
+ */
+dma_addr_t __must_check
+cma_alloc_from_region(struct cma_region *reg,
+                      size_t size, dma_addr_t alignment);
+
+
+
+/****************************** Allocators API ******************************/
+
+/**
+ * struct cma_chunk - an allocated contiguous chunk of memory.
+ * @start:      Bus address in bytes.
+ * @size:       Size in bytes.
+ * @free_space: Free space in region in bytes.  Read only.
+ * @reg:        Region this chunk belongs to.
+ * @by_start:   A node in an red-black tree with all chunks sorted by
+ *              start address.
+ *
+ * The cma_allocator::alloc() operation need to set only the @start
+ * and @size fields.  The rest is handled by the caller (ie. CMA
+ * glue).
+ */
+struct cma_chunk {
+        dma_addr_t start;
+        size_t size;
+
+        struct cma_region *reg;
+        struct rb_node by_start;
+};
+
+
+/**
+ * struct cma_allocator - a CMA allocator.
+ * @name:       Allocator's unique name
+ * @init:       Initialises an allocator on given region.
+ * @cleanup:    Cleans up after init.  May assume that there are no chunks
+ *              allocated in given region.
+ * @alloc:      Allocates a chunk of memory of given size in bytes and
+ *              with given alignment.  Alignment is a power of
+ *              two (thus non-zero) and callback does not need to check it.
+ *              May also assume that it is the only call that uses given
+ *              region (ie. access to the region is synchronised with
+ *              a mutex).  This has to allocate the chunk object (it may be
+ *              contained in a bigger structure with allocator-specific data.
+ *              Required.
+ * @free:       Frees allocated chunk.  May also assume that it is the only
+ *              call that uses given region.  This has to free() the chunk
+ *              object as well.  Required.
+ * @list:       Entry in list of allocators.  Private.
+ */
+struct cma_allocator {
+        const char *name;
+
+        int (*init)(struct cma_region *reg);
+        void (*cleanup)(struct cma_region *reg);
+        struct cma_chunk *(*alloc)(struct cma_region *reg, size_t size,
+                                   dma_addr_t alignment);
+        void (*free)(struct cma_chunk *chunk);
+
+        struct list_head list;
+};
+
+
+/**
+ * cma_allocator_register() - Registers an allocator.
+ * @alloc:      Allocator to register.
+ *
+ * Adds allocator to the list of allocators managed by CMA.
+ *
+ * All of the fields of cma_allocator structure must be set except for
+ * the optional name and the list's head which will be overriden
+ * anyway.
+ *
+ * Returns zero or negative error code.
+ */
+int cma_allocator_register(struct cma_allocator *alloc);
+
+
+/**************************** Initialisation API ****************************/
+
+/**
+ * cma_set_defaults() - specifies default command line parameters.
+ * @regions:    A zero-sized entry terminated list of early regions.
+ *              This array must not be placed in __initdata section.
+ * @map:        Map attribute.
+ *
+ * This function should be called prior to cma_early_regions_reserve()
+ * and after early parameters have been parsed.
+ *
+ * Returns zero or negative error.
+ */
+int __init cma_set_defaults(struct cma_region *regions, const char *map);
+
+
+/**
+ * cma_early_regions - a list of early regions.
+ *
+ * Platform needs to allocate space for each of the region before
+ * initcalls are executed.  If space is reserved, the reserved flag
+ * must be set.  Platform initialisation code may choose to use
+ * cma_early_regions_allocate().
+ *
+ * Later, during CMA initialisation all reserved regions from the
+ * cma_early_regions list are registered as normal regions and can be
+ * used using standard mechanisms.
+ */
+extern struct list_head cma_early_regions __initdata;
+
+
+/**
+ * cma_early_region_register() - registers an early region.
+ * @reg:        Region to add.
+ *
+ * Region's size, start and alignment must be set (however the last
+ * two can be zero).  If name is set the region will be accessible
+ * using normal mechanism like mapping or cma_alloc_from() function
+ * otherwise it will be a private region accessible only using the
+ * cma_alloc_from_region().
+ *
+ * During platform initialisation, space is reserved for early
+ * regions.  Later, when CMA initialises, the early regions are
+ * "converted" into normal regions.  If cma_region::alloc is set, CMA
+ * will then try to setup given allocator on the region.  Failure to
+ * do so will result in the region not being registered even though
+ * the space for it will still be reserved.  If cma_region::alloc is
+ * not set, allocator will be attached to the region on first use and
+ * the value of cma_region::alloc_name will be taken into account if
+ * set.
+ *
+ * All other fields are ignored and/or overwritten.
+ *
+ * Returns zero or negative error.  No checking if regions overlap is
+ * performed.
+ */
+int __init __must_check cma_early_region_register(struct cma_region *reg);
+
+
+/**
+ * cma_early_region_reserve() - reserves a physically contiguous memory region.
+ * @reg:        Early region to reserve memory for.
+ *
+ * If platform supports bootmem this is the first allocator this
+ * function tries to use.  If that failes (or bootmem is not
+ * supported) function tries to use memblec if it is available.
+ *
+ * On success sets reg->reserved flag.
+ *
+ * Returns zero or negative error.
+ */
+int __init cma_early_region_reserve(struct cma_region *reg);
+
+/**
+ * cma_early_regions_reserve() - helper function for reserving early regions.
+ * @reserve:    Callbac function used to reserve space for region.  Needs
+ *              to return non-negative if allocation succeeded, negative
+ *              error otherwise.  NULL means cma_early_region_alloc() will
+ *              be used.
+ *
+ * This function traverses the %cma_early_regions list and tries to
+ * reserve memory for each early region.  It uses the @reserve
+ * callback function for that purpose.  The reserved flag of each
+ * region is updated accordingly.
+ */
+void __init cma_early_regions_reserve(int (*reserve)(struct cma_region *reg));
+
+#else
+
+#define cma_set_defaults(regions, map)     ((int)0)
+#define cma_early_region_reserve(region)   ((int)-EOPNOTSUPP)
+#define cma_early_regions_reserve(reserve) do { } while (0)
+
+#endif
+
+#endif
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 42af2eae880..111797a0919 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -175,4 +175,11 @@ static inline int disable_nonboot_cpus(void) { return 0; }
 static inline void enable_nonboot_cpus(void) {}
 #endif /* !CONFIG_PM_SLEEP_SMP */
 
+#define IDLE_START 1
+#define IDLE_END 2
+
+void idle_notifier_register(struct notifier_block *n);
+void idle_notifier_unregister(struct notifier_block *n);
+void idle_notifier_call_chain(unsigned long val);
+
 #endif /* _LINUX_CPU_H_ */
diff --git a/include/linux/cpuacct.h b/include/linux/cpuacct.h
new file mode 100644
index 00000000000..8f68e733fe1
--- /dev/null
+++ b/include/linux/cpuacct.h
@@ -0,0 +1,43 @@
+/* include/linux/cpuacct.h
+ *
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _CPUACCT_H_
+#define _CPUACCT_H_
+
+#include <linux/cgroup.h>
+
+#ifdef CONFIG_CGROUP_CPUACCT
+
+/*
+ * Platform specific CPU frequency hooks for cpuacct. These functions are
+ * called from the scheduler.
+ */
+struct cpuacct_charge_calls {
+        /*
+         * Platforms can take advantage of this data and use
+         * per-cpu allocations if necessary.
+         */
+        void (*init) (void **cpuacct_data);
+        void (*charge) (void *cpuacct_data,  u64 cputime, unsigned int cpu);
+        void (*cpufreq_show) (void *cpuacct_data, struct cgroup_map_cb *cb);
+        /* Returns power consumed in milliWatt seconds */
+        u64 (*power_usage) (void *cpuacct_data);
+};
+
+int cpuacct_charge_register(struct cpuacct_charge_calls *fn);
+
+#endif /* CONFIG_CGROUP_CPUACCT */
+
+#endif // _CPUACCT_H_
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 11be48e0d16..ce207b8097b 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -358,6 +358,12 @@ extern struct cpufreq_governor cpufreq_gov_ondemand;
 #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
 extern struct cpufreq_governor cpufreq_gov_conservative;
 #define CPUFREQ_DEFAULT_GOVERNOR        (&cpufreq_gov_conservative)
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE)
+extern struct cpufreq_governor cpufreq_gov_interactive;
+#define CPUFREQ_DEFAULT_GOVERNOR        (&cpufreq_gov_interactive)
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ADAPTIVE)
+extern struct cpufreq_governor cpufreq_gov_adaptive;
+#define CPUFREQ_DEFAULT_GOVERNOR        (&cpufreq_gov_adaptive)
 #endif
 
 
diff --git a/include/linux/crc32.h b/include/linux/crc32.h
index 391a259b2cc..68267b64bb9 100644
--- a/include/linux/crc32.h
+++ b/include/linux/crc32.h
@@ -11,6 +11,8 @@
 extern u32  crc32_le(u32 crc, unsigned char const *p, size_t len);
 extern u32  crc32_be(u32 crc, unsigned char const *p, size_t len);
 
+extern u32  __crc32c_le(u32 crc, unsigned char const *p, size_t len);
+
 #define crc32(seed, data, length)  crc32_le(seed, (unsigned char const *)(data), length)
 
 /*
diff --git a/include/linux/cryptohash.h b/include/linux/cryptohash.h
index d2984fbebbc..2cd9f1cf9fa 100644
--- a/include/linux/cryptohash.h
+++ b/include/linux/cryptohash.h
@@ -3,7 +3,7 @@
 
 #define SHA_DIGEST_WORDS 5
 #define SHA_MESSAGE_BYTES (512 /*bits*/ / 8)
-#define SHA_WORKSPACE_WORDS 80
+#define SHA_WORKSPACE_WORDS 16
 
 void sha_init(__u32 *buf);
 void sha_transform(__u32 *digest, const char *data, __u32 *W);
diff --git a/include/linux/earlysuspend.h b/include/linux/earlysuspend.h
new file mode 100644
index 00000000000..8343b817af3
--- /dev/null
+++ b/include/linux/earlysuspend.h
@@ -0,0 +1,56 @@
+/* include/linux/earlysuspend.h
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_EARLYSUSPEND_H
+#define _LINUX_EARLYSUSPEND_H
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/list.h>
+#endif
+
+/* The early_suspend structure defines suspend and resume hooks to be called
+ * when the user visible sleep state of the system changes, and a level to
+ * control the order. They can be used to turn off the screen and input
+ * devices that are not used for wakeup.
+ * Suspend handlers are called in low to high level order, resume handlers are
+ * called in the opposite order. If, when calling register_early_suspend,
+ * the suspend handlers have already been called without a matching call to the
+ * resume handlers, the suspend handler will be called directly from
+ * register_early_suspend. This direct call can violate the normal level order.
+ */
+enum {
+        EARLY_SUSPEND_LEVEL_BLANK_SCREEN = 50,
+        EARLY_SUSPEND_LEVEL_STOP_DRAWING = 100,
+        EARLY_SUSPEND_LEVEL_DISABLE_FB = 150,
+};
+struct early_suspend {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+        struct list_head link;
+        int level;
+        void (*suspend)(struct early_suspend *h);
+        void (*resume)(struct early_suspend *h);
+#endif
+};
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void register_early_suspend(struct early_suspend *handler);
+void unregister_early_suspend(struct early_suspend *handler);
+#else
+#define register_early_suspend(handler) do { } while (0)
+#define unregister_early_suspend(handler) do { } while (0)
+#endif
+
+#endif
+
diff --git a/include/linux/elevator.h b/include/linux/elevator.h
index 21a8ebf2dc3..d800d514218 100644
--- a/include/linux/elevator.h
+++ b/include/linux/elevator.h
@@ -146,7 +146,7 @@ extern struct request *elv_rb_latter_request(struct request_queue *, struct requ
 /*
  * rb support functions.
  */
-extern struct request *elv_rb_add(struct rb_root *, struct request *);
+extern void elv_rb_add(struct rb_root *, struct request *);
 extern void elv_rb_del(struct rb_root *, struct request *);
 extern struct request *elv_rb_find(struct rb_root *, sector_t);
 
diff --git a/include/linux/exynos_mem.h b/include/linux/exynos_mem.h
new file mode 100644
index 00000000000..0cc9bea4c53
--- /dev/null
+++ b/include/linux/exynos_mem.h
@@ -0,0 +1,24 @@
+/* linux/include/linux/exynos_mem.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __INCLUDE_EXYNOS_MEM_H
+#define __INCLUDE_EXYNOS_MEM_H __FILE__
+
+/* IOCTL commands */
+#define EXYNOS_MEM_SET_CACHEABLE        _IOW('M', 200, bool)
+#define EXYNOS_MEM_PADDR_CACHE_FLUSH    _IOW('M', 201, struct exynos_mem_flush_range)
+#define EXYNOS_MEM_PADDR_CACHE_CLEAN    _IOW('M', 203, struct exynos_mem_flush_range)
+
+struct exynos_mem_flush_range {
+        phys_addr_t     start;
+        size_t          length;
+};
+
+#endif /* __INCLUDE_EXYNOS_MEM_H */
diff --git a/include/linux/genalloc.h b/include/linux/genalloc.h
index 5bbebda78b0..af44e88d0b0 100644
--- a/include/linux/genalloc.h
+++ b/include/linux/genalloc.h
@@ -11,28 +11,11 @@
 
 #ifndef __GENALLOC_H__
 #define __GENALLOC_H__
-/*
- *  General purpose special memory pool descriptor.
- */
-struct gen_pool {
-        rwlock_t lock;
-        struct list_head chunks;        /* list of chunks in this pool */
-        int min_alloc_order;            /* minimum allocation order */
-};
 
-/*
- *  General purpose special memory pool chunk descriptor.
- */
-struct gen_pool_chunk {
-        spinlock_t lock;
-        struct list_head next_chunk;    /* next chunk in pool */
-        phys_addr_t phys_addr;          /* physical starting address of memory chunk */
-        unsigned long start_addr;       /* starting address of memory chunk */
-        unsigned long end_addr;         /* ending address of memory chunk */
-        unsigned long bits[0];          /* bitmap for allocating memory chunk */
-};
-
-extern struct gen_pool *gen_pool_create(int, int);
+struct gen_pool;
+
+struct gen_pool *__must_check gen_pool_create(unsigned order, int nid);
+
 extern phys_addr_t gen_pool_virt_to_phys(struct gen_pool *pool, unsigned long);
 extern int gen_pool_add_virt(struct gen_pool *, unsigned long, phys_addr_t,
                              size_t, int);
@@ -53,7 +36,26 @@ static inline int gen_pool_add(struct gen_pool *pool, unsigned long addr,
 {
         return gen_pool_add_virt(pool, addr, -1, size, nid);
 }
-extern void gen_pool_destroy(struct gen_pool *);
-extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
-extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
+
+void gen_pool_destroy(struct gen_pool *pool);
+
+unsigned long __must_check
+gen_pool_alloc_aligned(struct gen_pool *pool, size_t size,
+                       unsigned alignment_order);
+
+/**
+ * gen_pool_alloc() - allocate special memory from the pool
+ * @pool:       Pool to allocate from.
+ * @size:       Number of bytes to allocate from the pool.
+ *
+ * Allocate the requested number of bytes from the specified pool.
+ * Uses a first-fit algorithm.
+ */
+static inline unsigned long __must_check
+gen_pool_alloc(struct gen_pool *pool, size_t size)
+{
+        return gen_pool_alloc_aligned(pool, size, 0);
+}
+
+void gen_pool_free(struct gen_pool *pool, unsigned long addr, size_t size);
 #endif /* __GENALLOC_H__ */
diff --git a/include/linux/gpio_event.h b/include/linux/gpio_event.h
new file mode 100644
index 00000000000..2613fc5e4a9
--- /dev/null
+++ b/include/linux/gpio_event.h
@@ -0,0 +1,170 @@
+/* include/linux/gpio_event.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_GPIO_EVENT_H
+#define _LINUX_GPIO_EVENT_H
+
+#include <linux/input.h>
+
+struct gpio_event_input_devs {
+        int count;
+        struct input_dev *dev[];
+};
+enum {
+        GPIO_EVENT_FUNC_UNINIT  = 0x0,
+        GPIO_EVENT_FUNC_INIT    = 0x1,
+        GPIO_EVENT_FUNC_SUSPEND = 0x2,
+        GPIO_EVENT_FUNC_RESUME  = 0x3,
+};
+struct gpio_event_info {
+        int (*func)(struct gpio_event_input_devs *input_devs,
+                    struct gpio_event_info *info,
+                    void **data, int func);
+        int (*event)(struct gpio_event_input_devs *input_devs,
+                     struct gpio_event_info *info,
+                     void **data, unsigned int dev, unsigned int type,
+                     unsigned int code, int value); /* out events */
+        bool no_suspend;
+};
+
+struct gpio_event_platform_data {
+        const char *name;
+        struct gpio_event_info **info;
+        size_t info_count;
+        int (*power)(const struct gpio_event_platform_data *pdata, bool on);
+        const char *names[]; /* If name is NULL, names contain a NULL */
+                             /* terminated list of input devices to create */
+};
+
+#define GPIO_EVENT_DEV_NAME "gpio-event"
+
+/* Key matrix */
+
+enum gpio_event_matrix_flags {
+        /* unset: drive active output low, set: drive active output high */
+        GPIOKPF_ACTIVE_HIGH              = 1U << 0,
+        GPIOKPF_DEBOUNCE                 = 1U << 1,
+        GPIOKPF_REMOVE_SOME_PHANTOM_KEYS = 1U << 2,
+        GPIOKPF_REMOVE_PHANTOM_KEYS      = GPIOKPF_REMOVE_SOME_PHANTOM_KEYS |
+                                           GPIOKPF_DEBOUNCE,
+        GPIOKPF_DRIVE_INACTIVE           = 1U << 3,
+        GPIOKPF_LEVEL_TRIGGERED_IRQ      = 1U << 4,
+        GPIOKPF_PRINT_UNMAPPED_KEYS      = 1U << 16,
+        GPIOKPF_PRINT_MAPPED_KEYS        = 1U << 17,
+        GPIOKPF_PRINT_PHANTOM_KEYS       = 1U << 18,
+};
+
+#define MATRIX_CODE_BITS (10)
+#define MATRIX_KEY_MASK ((1U << MATRIX_CODE_BITS) - 1)
+#define MATRIX_KEY(dev, code) \
+        (((dev) << MATRIX_CODE_BITS) | (code & MATRIX_KEY_MASK))
+
+extern int gpio_event_matrix_func(struct gpio_event_input_devs *input_devs,
+                        struct gpio_event_info *info, void **data, int func);
+struct gpio_event_matrix_info {
+        /* initialize to gpio_event_matrix_func */
+        struct gpio_event_info info;
+        /* size must be ninputs * noutputs */
+        const unsigned short *keymap;
+        unsigned int *input_gpios;
+        unsigned int *output_gpios;
+        unsigned int ninputs;
+        unsigned int noutputs;
+        /* time to wait before reading inputs after driving each output */
+        ktime_t settle_time;
+        /* time to wait before scanning the keypad a second time */
+        ktime_t debounce_delay;
+        ktime_t poll_time;
+        unsigned flags;
+};
+
+/* Directly connected inputs and outputs */
+
+enum gpio_event_direct_flags {
+        GPIOEDF_ACTIVE_HIGH         = 1U << 0,
+/*      GPIOEDF_USE_DOWN_IRQ        = 1U << 1, */
+/*      GPIOEDF_USE_IRQ             = (1U << 2) | GPIOIDF_USE_DOWN_IRQ, */
+        GPIOEDF_PRINT_KEYS          = 1U << 8,
+        GPIOEDF_PRINT_KEY_DEBOUNCE  = 1U << 9,
+        GPIOEDF_PRINT_KEY_UNSTABLE  = 1U << 10,
+};
+
+struct gpio_event_direct_entry {
+        uint32_t gpio:16;
+        uint32_t code:10;
+        uint32_t dev:6;
+};
+
+/* inputs */
+extern int gpio_event_input_func(struct gpio_event_input_devs *input_devs,
+                        struct gpio_event_info *info, void **data, int func);
+struct gpio_event_input_info {
+        /* initialize to gpio_event_input_func */
+        struct gpio_event_info info;
+        ktime_t debounce_time;
+        ktime_t poll_time;
+        uint16_t flags;
+        uint16_t type;
+        const struct gpio_event_direct_entry *keymap;
+        size_t keymap_size;
+};
+
+/* outputs */
+extern int gpio_event_output_func(struct gpio_event_input_devs *input_devs,
+                        struct gpio_event_info *info, void **data, int func);
+extern int gpio_event_output_event(struct gpio_event_input_devs *input_devs,
+                        struct gpio_event_info *info, void **data,
+                        unsigned int dev, unsigned int type,
+                        unsigned int code, int value);
+struct gpio_event_output_info {
+        /* initialize to gpio_event_output_func and gpio_event_output_event */
+        struct gpio_event_info info;
+        uint16_t flags;
+        uint16_t type;
+        const struct gpio_event_direct_entry *keymap;
+        size_t keymap_size;
+};
+
+
+/* axes */
+
+enum gpio_event_axis_flags {
+        GPIOEAF_PRINT_UNKNOWN_DIRECTION  = 1U << 16,
+        GPIOEAF_PRINT_RAW                = 1U << 17,
+        GPIOEAF_PRINT_EVENT              = 1U << 18,
+};
+
+extern int gpio_event_axis_func(struct gpio_event_input_devs *input_devs,
+                        struct gpio_event_info *info, void **data, int func);
+struct gpio_event_axis_info {
+        /* initialize to gpio_event_axis_func */
+        struct gpio_event_info info;
+        uint8_t  count; /* number of gpios for this axis */
+        uint8_t  dev; /* device index when using multiple input devices */
+        uint8_t  type; /* EV_REL or EV_ABS */
+        uint16_t code;
+        uint16_t decoded_size;
+        uint16_t (*map)(struct gpio_event_axis_info *info, uint16_t in);
+        uint32_t *gpio;
+        uint32_t flags;
+};
+#define gpio_axis_2bit_gray_map gpio_axis_4bit_gray_map
+#define gpio_axis_3bit_gray_map gpio_axis_4bit_gray_map
+uint16_t gpio_axis_4bit_gray_map(
+                        struct gpio_event_axis_info *info, uint16_t in);
+uint16_t gpio_axis_5bit_singletrack_map(
+                        struct gpio_event_axis_info *info, uint16_t in);
+
+#endif
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index ba362171e8a..de48bdad279 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -139,7 +139,13 @@ static inline void account_system_vtime(struct task_struct *tsk)
 extern void account_system_vtime(struct task_struct *tsk);
 #endif
 
-#if defined(CONFIG_NO_HZ)
+#if defined(CONFIG_JRCU)
+extern int rcu_nmi_seen;
+# define rcu_irq_enter() do { } while (0)
+# define rcu_irq_exit() do { } while (0)
+# define rcu_nmi_enter() do { rcu_nmi_seen = 1; } while (0)
+# define rcu_nmi_exit() do { } while (0)
+#elif defined(CONFIG_NO_HZ)
 #if defined(CONFIG_TINY_RCU) || defined(CONFIG_TINY_PREEMPT_RCU)
 extern void rcu_enter_nohz(void);
 extern void rcu_exit_nohz(void);
diff --git a/include/linux/hid.h b/include/linux/hid.h
index 42f7e2fb501..4bfb4cac4b6 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -597,6 +597,8 @@ struct hid_usage_id {
  * @input_mapping: invoked on input registering before mapping an usage
  * @input_mapped: invoked on input registering after mapping an usage
  * @feature_mapping: invoked on feature registering
+ * @input_register: called just before input device is registered after reports
+ *                  are parsed.
  * @suspend: invoked on suspend (NULL means nop)
  * @resume: invoked on resume if device was not reset (NULL means nop)
  * @reset_resume: invoked on resume if device was reset (NULL means nop)
@@ -643,6 +645,8 @@ struct hid_driver {
         void (*feature_mapping)(struct hid_device *hdev,
                         struct hid_field *field,
                         struct hid_usage *usage);
+        int (*input_register)(struct hid_device *hdev, struct hid_input
+                        *hidinput);
 #ifdef CONFIG_PM
         int (*suspend)(struct hid_device *hdev, pm_message_t message);
         int (*resume)(struct hid_device *hdev);
diff --git a/include/linux/if_pppolac.h b/include/linux/if_pppolac.h
new file mode 100644
index 00000000000..c06bd6c8ba2
--- /dev/null
+++ b/include/linux/if_pppolac.h
@@ -0,0 +1,33 @@
+/* include/linux/if_pppolac.h
+ *
+ * Header for PPP on L2TP Access Concentrator / PPPoLAC Socket (RFC 2661)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_IF_PPPOLAC_H
+#define __LINUX_IF_PPPOLAC_H
+
+#include <linux/socket.h>
+#include <linux/types.h>
+
+struct sockaddr_pppolac {
+        sa_family_t     sa_family;      /* AF_PPPOX */
+        unsigned int    sa_protocol;    /* PX_PROTO_OLAC */
+        int             udp_socket;
+        struct __attribute__((packed)) {
+                __u16   tunnel, session;
+        } local, remote;
+} __attribute__((packed));
+
+#endif /* __LINUX_IF_PPPOLAC_H */
diff --git a/include/linux/if_pppopns.h b/include/linux/if_pppopns.h
new file mode 100644
index 00000000000..0cf34b4d551
--- /dev/null
+++ b/include/linux/if_pppopns.h
@@ -0,0 +1,32 @@
+/* include/linux/if_pppopns.h
+ *
+ * Header for PPP on PPTP Network Server / PPPoPNS Socket (RFC 2637)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_IF_PPPOPNS_H
+#define __LINUX_IF_PPPOPNS_H
+
+#include <linux/socket.h>
+#include <linux/types.h>
+
+struct sockaddr_pppopns {
+        sa_family_t     sa_family;      /* AF_PPPOX */
+        unsigned int    sa_protocol;    /* PX_PROTO_OPNS */
+        int             tcp_socket;
+        __u16           local;
+        __u16           remote;
+} __attribute__((packed));
+
+#endif /* __LINUX_IF_PPPOPNS_H */
diff --git a/include/linux/if_pppox.h b/include/linux/if_pppox.h
index 397921b09ef..999ccd3fff3 100644
--- a/include/linux/if_pppox.h
+++ b/include/linux/if_pppox.h
@@ -27,6 +27,8 @@
 #include <linux/ppp_channel.h>
 #endif /* __KERNEL__ */
 #include <linux/if_pppol2tp.h>
+#include <linux/if_pppolac.h>
+#include <linux/if_pppopns.h>
 
 /* For user-space programs to pick up these definitions
  * which they wouldn't get otherwise without defining __KERNEL__
@@ -60,7 +62,9 @@ struct pptp_addr {
 #define PX_PROTO_OE    0 /* Currently just PPPoE */
 #define PX_PROTO_OL2TP 1 /* Now L2TP also */
 #define PX_PROTO_PPTP  2
-#define PX_MAX_PROTO   3
+#define PX_PROTO_OLAC  3
+#define PX_PROTO_OPNS  4
+#define PX_MAX_PROTO   5
 
 struct sockaddr_pppox {
         sa_family_t     sa_family;            /* address family, AF_PPPOX */
@@ -167,6 +171,25 @@ struct pptp_opt {
         u32 seq_sent, seq_recv;
         int ppp_flags;
 };
+
+struct pppolac_opt {
+        __u32           local;
+        __u32           remote;
+        __u32           recv_sequence;
+        __u32           xmit_sequence;
+        atomic_t        sequencing;
+        int             (*backlog_rcv)(struct sock *sk_udp, struct sk_buff *skb);
+};
+
+struct pppopns_opt {
+        __u16           local;
+        __u16           remote;
+        __u32           recv_sequence;
+        __u32           xmit_sequence;
+        void            (*data_ready)(struct sock *sk_raw, int length);
+        int             (*backlog_rcv)(struct sock *sk_raw, struct sk_buff *skb);
+};
+
 #include <net/sock.h>
 
 struct pppox_sock {
@@ -177,6 +200,8 @@ struct pppox_sock {
         union {
                 struct pppoe_opt pppoe;
                 struct pptp_opt  pptp;
+                struct pppolac_opt lac;
+                struct pppopns_opt pns;
         } proto;
         __be16                  num;
 };
diff --git a/include/linux/input/isa1200.h b/include/linux/input/isa1200.h
new file mode 100644
index 00000000000..c72f736d4e3
--- /dev/null
+++ b/include/linux/input/isa1200.h
@@ -0,0 +1,30 @@
+/*
+ * ISA1200 Haptic Driver
+ */
+
+#ifndef __LINUX_ISA1200_H
+#define __LINUX_ISA1200_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+#define ISA1200_POWERDOWN_MODE          (0<<3)
+#define ISA1200_PWM_INPUT_MODE          (1<<3)
+#define ISA1200_PWM_GEN_MODE            (2<<3)
+#define ISA1200_WAVE_GEN_MODE           (3<<3)
+
+struct isa1200_platform_data {
+
+        int gpio_hen;
+        int gpio_len;
+        unsigned char mode_sel;
+
+        int pwm_gpio;
+        int pwm_func;
+
+        int pwm_id;
+        unsigned short pwm_periode_ns;
+        unsigned short pwm_duty;
+};
+
+#endif /* __LINUX_ISA1200_H */
diff --git a/include/linux/input/odroidq-touch.h b/include/linux/input/odroidq-touch.h
new file mode 100644
index 00000000000..979f45e5d5f
--- /dev/null
+++ b/include/linux/input/odroidq-touch.h
@@ -0,0 +1,247 @@
+//[*]--------------------------------------------------------------------------------------------------[*]
+//
+//
+// 
+//  I2C Touchscreen driver (platform data struct)
+//  2012.01.17
+// 
+//
+//[*]--------------------------------------------------------------------------------------------------[*]
+#ifndef __ODROIDQ_TOUCH_H__
+#define __ODROIDQ_TOUCH_H__
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#ifdef CONFIG_HAS_EARLYSUSPEND
+        #include <linux/earlysuspend.h>
+#endif
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define IRQ_MODE_EVENT
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#if defined(CONFIG_ANDROID_PARANOID_NETWORK)
+    #define SOFT_AVR_FILTER_ENABLE
+#endif
+
+#if defined(SOFT_AVR_FILTER_ENABLE)
+    #define SOFT_AVR_COUNT              10
+    #define SOFT_AVR_MOVE_TOL_X         20   // First move tol
+    #define SOFT_AVR_MOVE_TOL_Y         20   // First move tol
+    #define SOFT_AVR_ENABLE_SPEED       5
+#endif
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_MOVE_TOL          0x01            // 0x53 Register (0x00 ~ 0xFF : 0x10 default)
+#define X_TRACKING                      0x80            // 0x54 Register (0x00 ~ 0xFF : 0x80 default)
+#define Y_TRACKING                      0x80            // 0x55 Register (0x00 ~ 0xFF : 0x80 default)
+
+#if defined(SOFT_AVR_FILTER_ENABLE)
+    #define     MOVE_AVR_FILTER         0x00            // 0x56 Register (0x00 ~ 0x03 : 0x00 default)
+#else    
+    //#define   MOVE_AVR_FILTER         0x01            // 0x56 Register (0x00 ~ 0x03 : 0x00 default)
+    #define     MOVE_AVR_FILTER         0x02            // 0x56 Register (0x00 ~ 0x03 : 0x00 default)
+    //#define   MOVE_AVR_FILTER         0x03            // 0x56 Register (0x00 ~ 0x03 : 0x00 default)
+#endif
+
+#define SCAN_MODE                       0x01            // 0x26 Register (0x00 ~ ?? : 0x02 default)
+//#define       SCAN_MODE                       0x0F            // 0x26 Register (0x00 ~ ?? : 0x02 default)
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define MAX_FINGERS                     10
+#define RESOULATION                     64
+
+#define DRIVE_LINE_COUNT        23
+#define SENSE_LINE_COUNT        38
+
+//#define       DRIVE_DATA_MAX          (DRIVE_LINE_COUNT * RESOULATION)
+//#define       SENSE_DATA_MAX          (SENSE_LINE_COUNT * RESOULATION)
+
+#define DRIVE_DATA_MAX          800
+#define SENSE_DATA_MAX          1280
+
+#define TRANSPOSE_XY            0x04
+#define INVERT_Y                        0x01
+#define INVERT_X                        0x02
+
+// 0x65 Register (0x00 ~ 0x07 : 0x00 default)
+#define ORIENTATION                     0x00
+
+#define TRACKING_ID_MAX         16
+
+#define PRESSURE_MAX            16
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+// Register Define
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define NOP                                             0x00    
+#define DEVICE_ID                               0x02    
+#define VERSION_ID                              0x03    
+#define SLEEP_OUT_REG                   0x04    
+#define SLEEP_IN_REG                    0x05
+#define DRIVE_NO_REG                    0x06
+#define SENSE_NO_REG                    0x07
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define DRIVE_LINE0_REG                 0x08
+#define DRIVE_LINE1_REG                 0x09
+#define DRIVE_LINE2_REG                 0x0A
+#define DRIVE_LINE3_REG                 0x0B
+#define DRIVE_LINE4_REG                 0x0C
+#define DRIVE_LINE5_REG                 0x0D
+#define DRIVE_LINE6_REG                 0x0E
+#define DRIVE_LINE7_REG                 0x0F
+#define DRIVE_LINE8_REG                 0x10
+#define DRIVE_LINE9_REG                 0x11
+#define DRIVE_LINE10_REG                0x12
+#define DRIVE_LINE11_REG                0x13
+#define DRIVE_LINE12_REG                0x14
+#define DRIVE_LINE13_REG                0x15
+#define DRIVE_LINE14_REG                0x16
+#define DRIVE_LINE15_REG                0x17
+#define DRIVE_LINE16_REG                0x18
+#define DRIVE_LINE17_REG                0x19
+#define DRIVE_LINE18_REG                0x1A
+#define DRIVE_LINE19_REG                0x1B
+#define DRIVE_LINE20_REG                0x1C
+#define DRIVE_LINE21_REG                0x1D
+#define DRIVE_LINE22_REG                0x1E
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define WOP_MODE_REG                    0x25
+#define ROP_MODE_REG                    0x26
+#define DOWN_TIME_REG                   0x27
+#define FRAME_ESC_REG                   0x28
+#define SCAN_FRAME_REG                  0x2A
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define MEDIAN_FILTER_SEL_REG   0x2C
+#define INT_GAIN_REG                    0x2F
+#define START_INT_REG                   0x30
+#define END_INT_REG                             0x31
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define MIN_AREA_REG                    0x33
+#define MIN_LEVEL_REG                   0x34
+#define MIN_WEIGHT_REG                  0x35
+#define MAX_AREA_REG                    0x36
+#define SEG_DEPTH_REG                   0x37
+#define CG_METHOD_REG                   0x39
+#define HYBRID_SELECT_REG               0x3A
+#define INT_BYPASS_REG                  0x3C
+#define FILTER_SEL_REG                  0x3D
+#define CALIBRATE_OFF_REG               0x3E
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_MOVE_TOL_REG              0x53
+#define X_TRACKING_TOL_REG              0x54
+#define Y_TRACKING_TOL_REG              0x55
+#define MOV_AVG_FILTER_REG              0x56
+#define ORIENTATION_REG                 0x65
+#define X_SCALING_REG                   0x66
+#define Y_SCALING_REG                   0x67
+#define X_OFFSET_REG                    0x68
+#define Y_OFFSET_REG                    0x69
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define TOUCH_STATUS                    0x79
+
+typedef struct  status__t       {
+        unsigned short  fifo_valid              :1;
+        unsigned short  fifo_overflow   :1;
+        unsigned short  large_object    :1;
+        unsigned short  abnomal_status  :1;
+        unsigned short  fingers                 :10;
+        unsigned short  reserved                :2;
+}       __attribute__ ((packed))        status_t;
+
+typedef union   status__u       {
+        unsigned char   byte[sizeof(status_t)];
+        status_t                bits;
+}       __attribute__ ((packed))        status_u;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define BUTTON_STATUS                   0xB9
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_MASK_REG                  0x7A
+#define IRQ_MASK_REG                    0x7B
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define FINGER00_REG                    0x7C
+#define FINGER01_REG                    0x7D
+#define FINGER02_REG                    0x7E
+#define FINGER03_REG                    0x7F
+#define FINGER04_REG                    0x80
+#define FINGER05_REG                    0x81
+#define FINGER06_REG                    0x82
+#define FINGER07_REG                    0x83
+#define FINGER08_REG                    0x84
+#define FINGER09_REG                    0x85
+
+typedef struct  finger_data__t  {       
+        unsigned char   speed           :4;     // LSB
+        unsigned char   pressure        :4;
+        unsigned char   msb_y           :4;
+        unsigned char   msb_x           :4;
+        unsigned char   lsb_y           :8;
+        unsigned char   lsb_x           :8;     // MSB
+}       __attribute__ ((packed))        finger_data_t;
+
+typedef union   finger_data__u  {
+        unsigned char   byte[sizeof(finger_data_t)];
+        finger_data_t   bits;
+}       __attribute__ ((packed))        finger_data_u;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_STACK                             0x86
+
+typedef struct  event_stack__t  {       
+        unsigned char   speed           :4;     // LSB
+        unsigned char   pressure        :4;
+        unsigned char   msb_y           :4;
+        unsigned char   msb_x           :4;
+        unsigned char   lsb_y           :8;
+        unsigned char   lsb_x           :8;
+        unsigned char   event           :4;
+        unsigned char   number          :4;     // MSB
+}       __attribute__ ((packed))        event_stack_t;
+
+typedef union   event_stack__u  {
+        unsigned char   byte[sizeof(event_stack_t)];
+        event_stack_t   bits;
+}       __attribute__ ((packed))        event_stack_u;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_FIFO_SCLR                 0x87
+#define TOUCH_IRQ_MODE                  0x89            // 0 -> event, 1 -> frame
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define INIT_RST                                0xA2
+#define DRIVE_LEVEL_REG                 0xD5
+#define ADC_RANGE_SEL_REG               0xD7
+#define BIAS_RES                                0xD8
+#define INTG_CAP_REG                    0xDB
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define EVENT_UNKNOWN                   0x00
+#define EVENT_PRESS                             0x03
+#define EVENT_MOVE                              0x04
+#define EVENT_RELEASE                   0x05
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+//[*]--------------------------------------------------------------------------------------------------[*]
+//
+// ODROID-Q Control Function define
+//
+//[*]--------------------------------------------------------------------------------------------------[*]
+extern  int                     odroidq_calibration     (struct touch *ts);
+extern  int                     odroidq_i2c_read        (struct i2c_client *client, unsigned char *cmd, unsigned int cmd_len, unsigned char *data, unsigned int len);
+extern  void                    odroidq_work            (struct touch *ts);
+extern  void                    odroidq_enable          (struct touch *ts);
+extern  void                    odroidq_disable         (struct touch *ts);
+extern  int                             odroidq_early_probe     (struct touch *ts);
+extern  int                             odroidq_probe           (struct touch *ts);
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#endif /* __ODROIDQ_TOUCH_H__ */
+//[*]--------------------------------------------------------------------------------------------------[*]
+//[*]--------------------------------------------------------------------------------------------------[*]
diff --git a/include/linux/input/touch-pdata.h b/include/linux/input/touch-pdata.h
new file mode 100644
index 00000000000..fed2d3b4e78
--- /dev/null
+++ b/include/linux/input/touch-pdata.h
@@ -0,0 +1,186 @@
+//[*]--------------------------------------------------------------------------------------------------[*]
+//
+//
+// 
+//  I2C Touchscreen driver (platform data struct)
+//  2012.01.17
+// 
+//
+//[*]--------------------------------------------------------------------------------------------------[*]
+#ifndef __TOUCH_PDATA_H__
+#define __TOUCH_PDATA_H__
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#ifdef CONFIG_HAS_EARLYSUSPEND
+        #include <linux/earlysuspend.h>
+#endif
+
+#include <linux/interrupt.h>
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define I2C_TOUCH_NAME          "odroid-ts"
+
+#define I2C_SEND_MAX_SIZE       512                             // I2C Send/Receive data max size
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+// Button struct (1 = press, 0 = release)
+//[*]--------------------------------------------------------------------------------------------------[*]
+typedef struct  button__t       {
+        unsigned char   bt0_press       :1;             // lsb
+        unsigned char   bt1_press       :1;             
+        unsigned char   bt2_press       :1;
+        unsigned char   bt3_press       :1;
+        unsigned char   bt4_press       :1;
+        unsigned char   bt5_press       :1;
+        unsigned char   bt6_press       :1;
+        unsigned char   bt7_press       :1;             // msb
+}       __attribute__ ((packed))        button_t;
+
+typedef union   button__u       {
+        unsigned char   ubyte;
+        button_t                bits;
+}       __attribute__ ((packed))        button_u;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+// Touch Event type define
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define TS_EVENT_UNKNOWN        0x00
+#define TS_EVENT_PRESS          0x01
+#define TS_EVENT_MOVE           0x02
+#define TS_EVENT_RELEASE        0x03
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+typedef struct  finger__t       {
+        unsigned int    status;                 // true : ts data updated, false : no update data
+        unsigned int    event;                  // ts event type
+        unsigned int    id;                             // ts received id
+        unsigned int    x;                              // ts data x
+        unsigned int    y;                              // ts data y
+        unsigned int    area;                   // ts finger area
+        unsigned int    pressure;               // ts finger pressure
+}       __attribute__ ((packed))        finger_t;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+struct touch {
+        int                                     irq;
+        struct i2c_client       *client;
+        struct touch_pdata      *pdata;
+        struct input_dev        *input;
+        char                            phys[32];
+
+        // finger data
+        finger_t                        *finger;
+
+        // sysfs control flags
+        unsigned char           disabled;               // interrupt status
+        unsigned char           fw_version;
+        
+        unsigned char           *fw_buf;
+        unsigned int            fw_size;
+        int                                     fw_status;
+
+        // irq func used
+        struct workqueue_struct         *work_queue;
+        struct work_struct              work;
+        
+        // noise filter work
+        struct delayed_work             filter_dwork;
+
+#if     defined(CONFIG_HAS_EARLYSUSPEND)
+        struct  early_suspend           power;
+#endif  
+};
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+struct  i2c_client;
+struct  input_dev;
+struct  device;
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#define IRQ_MODE_THREAD         0
+#define IRQ_MODE_NORMAL         1
+#define IRQ_MODE_POLLING        2
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+// IRQ type & trigger action
+//[*]--------------------------------------------------------------------------------------------------[*]
+//
+// IRQF_TRIGGER_RISING, IRQF_TRIGGER_FALLING, IRQF_TRIGGER_HIGH, IRQF_TRIGGER_LOW
+// IRQF_DISABLED, IRQF_SHARED, IRQF_IRQPOLL, IRQF_ONESHOT, IRQF_NO_THREAD
+//
+//[*]--------------------------------------------------------------------------------------------------[*]
+struct touch_pdata      {
+        char    *name;                          /* input drv name */
+
+        int     irq_gpio;                       /* irq gpio define */
+        int     reset_gpio;                     /* reset gpio define */
+        int     reset_level;            /* reset level setting (1 = High reset, 0 = Low reset) */
+
+        int             irq_mode;                       /* IRQ_MODE_THREAD, IRQ_MODE_NORMAL, IRQ_MODE_POLLING */
+        int     irq_flags;                      /* irq flags setup : Therad irq mode(IRQF_TRIGGER_HIGH | IRQF_ONESHOT) */
+
+        int             abs_max_x, abs_max_y;
+        int     abs_min_x, abs_min_y;
+        
+        int     area_max, area_min;
+        int             press_max, press_min;
+        int             id_max, id_min;
+        
+        int             vendor, product, version;
+
+        int             max_fingers;
+        
+        int             *keycode, keycnt;
+
+        //--------------------------------------------
+        // Control function 
+        //--------------------------------------------
+        void            (*gpio_init)            (void); /* gpio early-init function */
+
+        irqreturn_t     (*irq_func)                     (int irq, void *handle);
+        void            (*touch_work)           (struct touch *ts);
+        
+        void            (*report)                       (struct touch *ts);
+        void            (*key_report)           (struct touch *ts, unsigned char button_data);
+
+        int                     (*early_probe)          (struct touch *ts);
+        int                     (*probe)                        (struct touch *ts);
+        void            (*enable)                       (struct touch *ts);
+        void            (*disable)                      (struct touch *ts);
+        int             (*input_open)           (struct input_dev *input);
+        void            (*input_close)          (struct input_dev *input);
+
+        void            (*event_clear)          (struct touch *ts);
+
+#ifdef  CONFIG_HAS_EARLYSUSPEND
+        void            (*resume)                       (struct early_suspend *h);
+        void            (*suspend)                      (struct early_suspend *h);
+#endif
+
+        //--------------------------------------------
+        // I2C control function
+        //--------------------------------------------
+        int             (*i2c_write)                    (struct i2c_client *client, unsigned char *cmd, unsigned int cmd_len, unsigned char *data, unsigned int len);
+        int             (*i2c_read)                             (struct i2c_client *client, unsigned char *cmd, unsigned int cmd_len, unsigned char *data, unsigned int len);
+
+        //--------------------------------------------
+        // Firmware update control function
+        //--------------------------------------------
+        char    *fw_filename;
+        int             fw_filesize;
+        
+        int             (*i2c_boot_write)               (struct i2c_client *client, unsigned char *cmd, unsigned int cmd_len, unsigned char *data, unsigned int len);
+        int             (*i2c_boot_read)                (struct i2c_client *client, unsigned char *cmd, unsigned int cmd_len, unsigned char *data, unsigned int len);
+        int             (*fw_control)                   (struct touch *ts, unsigned int fw_status);
+        int             (*flash_firmware)               (struct device *dev, const char *fw_name);
+
+        //--------------------------------------------
+        // Calibration control func
+        //--------------------------------------------
+        int             (*calibration)                  (struct touch *ts);
+};
+
+//[*]--------------------------------------------------------------------------------------------------[*]
+#endif /* __TOUCH_PDATA_H__ */
+//[*]--------------------------------------------------------------------------------------------------[*]
+//[*]--------------------------------------------------------------------------------------------------[*]
+
diff --git a/include/linux/iocontext.h b/include/linux/iocontext.h
index b2eee896dcb..7cbace3e14f 100644
--- a/include/linux/iocontext.h
+++ b/include/linux/iocontext.h
@@ -1,14 +1,14 @@
 #ifndef IOCONTEXT_H
 #define IOCONTEXT_H
 
+#include <linux/bitmap.h>
 #include <linux/radix-tree.h>
 #include <linux/rcupdate.h>
 
-struct cfq_queue;
 struct cfq_io_context {
         void *key;
 
-        struct cfq_queue *cfqq[2];
+        void *cfqq[2];
 
         struct io_context *ioc;
 
@@ -28,6 +28,16 @@ struct cfq_io_context {
 };
 
 /*
+ * Indexes into the ioprio_changed bitmap.  A bit set indicates that
+ * the corresponding I/O scheduler needs to see a ioprio update.
+ */
+enum {
+        IOC_CFQ_IOPRIO_CHANGED,
+        IOC_BFQ_IOPRIO_CHANGED,
+        IOC_IOPRIO_CHANGED_BITS
+};
+
+/*
  * I/O subsystem state of the associated processes.  It is refcounted
  * and kmalloc'ed. These could be shared between processes.
  */
@@ -39,7 +49,7 @@ struct io_context {
         spinlock_t lock;
 
         unsigned short ioprio;
-        unsigned short ioprio_changed;
+        DECLARE_BITMAP(ioprio_changed, IOC_IOPRIO_CHANGED_BITS);
 
 #if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
         unsigned short cgroup_changed;
@@ -53,6 +63,8 @@ struct io_context {
 
         struct radix_tree_root radix_root;
         struct hlist_head cic_list;
+        struct radix_tree_root bfq_radix_root;
+        struct hlist_head bfq_cic_list;
         void __rcu *ioc_data;
 };
 
diff --git a/include/linux/ion.h b/include/linux/ion.h
new file mode 100644
index 00000000000..fc3cf2809a4
--- /dev/null
+++ b/include/linux/ion.h
@@ -0,0 +1,418 @@
+/*
+ * include/linux/ion.h
+ *
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ION_H
+#define _LINUX_ION_H
+
+#include <linux/types.h>
+
+struct ion_handle;
+/**
+ * enum ion_heap_types - list of all possible types of heaps
+ * @ION_HEAP_TYPE_SYSTEM:        memory allocated via vmalloc
+ * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
+ * @ION_HEAP_TYPE_CARVEOUT:      memory allocated from a prereserved
+ *                               carveout heap, allocations are physically
+ *                               contiguous
+ * @ION_HEAP_END:                helper for iterating over heaps
+ */
+enum ion_heap_type {
+        ION_HEAP_TYPE_SYSTEM,
+        ION_HEAP_TYPE_SYSTEM_CONTIG,
+        ION_HEAP_TYPE_CARVEOUT,
+        ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always
+                                 are at the end of this enum */
+#ifdef CONFIG_ION_EXYNOS
+        ION_HEAP_TYPE_EXYNOS,
+        ION_HEAP_TYPE_EXYNOS_CONTIG,
+        ION_HEAP_TYPE_EXYNOS_USER,
+#endif
+        ION_NUM_HEAPS,
+};
+
+#define ION_HEAP_SYSTEM_MASK            (1 << ION_HEAP_TYPE_SYSTEM)
+#define ION_HEAP_SYSTEM_CONTIG_MASK     (1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
+#define ION_HEAP_CARVEOUT_MASK          (1 << ION_HEAP_TYPE_CARVEOUT)
+
+#ifdef CONFIG_ION_EXYNOS
+#define ION_HEAP_EXYNOS_MASK            (1 << ION_HEAP_TYPE_EXYNOS)
+#define ION_HEAP_EXYNOS_CONTIG_MASK     (1 << ION_HEAP_TYPE_EXYNOS_CONTIG)
+#define ION_HEAP_EXYNOS_USER_MASK       (1 << ION_HEAP_TYPE_EXYNOS_USER)
+#define ION_EXYNOS_WRITE_MASK           (1 << (BITS_PER_LONG - 1))
+#endif
+
+#ifdef __KERNEL__
+struct ion_device;
+struct ion_heap;
+struct ion_mapper;
+struct ion_client;
+struct ion_buffer;
+
+/* This should be removed some day when phys_addr_t's are fully
+   plumbed in the kernel, and all instances of ion_phys_addr_t should
+   be converted to phys_addr_t.  For the time being many kernel interfaces
+   do not accept phys_addr_t's that would have to */
+#define ion_phys_addr_t unsigned long
+
+/**
+ * struct ion_platform_heap - defines a heap in the given platform
+ * @type:       type of the heap from ion_heap_type enum
+ * @id:         unique identifier for heap.  When allocating (lower numbers 
+ *              will be allocated from first)
+ * @name:       used for debug purposes
+ * @base:       base address of heap in physical memory if applicable
+ * @size:       size of the heap in bytes if applicable
+ *
+ * Provided by the board file.
+ */
+struct ion_platform_heap {
+        enum ion_heap_type type;
+        unsigned int id;
+        const char *name;
+        ion_phys_addr_t base;
+        size_t size;
+};
+
+/**
+ * struct ion_platform_data - array of platform heaps passed from board file
+ * @nr:         number of structures in the array
+ * @heaps:      array of platform_heap structions
+ *
+ * Provided by the board file in the form of platform data to a platform device.
+ */
+struct ion_platform_data {
+        int nr;
+        struct ion_platform_heap heaps[];
+};
+
+/**
+ * ion_client_create() -  allocate a client and returns it
+ * @dev:        the global ion device
+ * @heap_mask:  mask of heaps this client can allocate from
+ * @name:       used for debugging
+ */
+struct ion_client *ion_client_create(struct ion_device *dev,
+                                     unsigned int heap_mask, const char *name);
+
+/**
+ * ion_client_destroy() -  free's a client and all it's handles
+ * @client:     the client
+ *
+ * Free the provided client and all it's resources including
+ * any handles it is holding.
+ */
+void ion_client_destroy(struct ion_client *client);
+
+/**
+ * ion_get_client() - obtain a user client from file descriptor from user
+ * @fd:         the user client created by the request from user. This is
+ *              passed from user.
+ *
+ * This function is requested by the device drivers that implement V4L2 and VB2
+ * interfaces. Those device drivers just obtains virtual address of a buffer
+ * even though it is allocated and mapped by ION. While they can retrieve the
+ * handle of the buffer, they are unable to access it because they do not know
+ * what client the handle belongs to.
+ * Note that the client obtained by this function is not released until
+ * ion_put_client() is called and the client is given.
+ */
+struct ion_client *ion_get_user_client(unsigned int fd_client);
+
+/**
+ * ion_put_client() - release the user client obtained by ion_get_client()
+ * @client - The user client to release.
+ */
+void ion_put_user_client(struct ion_client *user_client);
+
+/**
+ * ion_alloc - allocate ion memory
+ * @client:     the client
+ * @len:        size of the allocation
+ * @align:      requested allocation alignment, lots of hardware blocks have
+ *              alignment requirements of some kind
+ * @flags:      mask of heaps to allocate from, if multiple bits are set
+ *              heaps will be tried in order from lowest to highest order bit
+ *
+ * Allocate memory in one of the heaps provided in heap mask and return
+ * an opaque handle to it.
+ */
+struct ion_handle *ion_alloc(struct ion_client *client, size_t len,
+                             size_t align, unsigned int flags);
+
+/**
+ * ion_free - free a handle
+ * @client:     the client
+ * @handle:     the handle to free
+ *
+ * Free the provided handle.
+ */
+void ion_free(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_phys - returns the physical address and len of a handle
+ * @client:     the client
+ * @handle:     the handle
+ * @addr:       a pointer to put the address in
+ * @len:        a pointer to put the length in
+ *
+ * This function queries the heap for a particular handle to get the
+ * handle's physical address.  It't output is only correct if
+ * a heap returns physically contiguous memory -- in other cases
+ * this api should not be implemented -- ion_map_dma should be used
+ * instead.  Returns -EINVAL if the handle is invalid.  This has
+ * no implications on the reference counting of the handle --
+ * the returned value may not be valid if the caller is not
+ * holding a reference.
+ */
+int ion_phys(struct ion_client *client, struct ion_handle *handle,
+             ion_phys_addr_t *addr, size_t *len);
+
+/**
+ * ion_map_kernel - create mapping for the given handle
+ * @client:     the client
+ * @handle:     handle to map
+ *
+ * Map the given handle into the kernel and return a kernel address that
+ * can be used to access this address.
+ */
+void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_unmap_kernel() - destroy a kernel mapping for a handle
+ * @client:     the client
+ * @handle:     handle to unmap
+ */
+void ion_unmap_kernel(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_map_dma - create a dma mapping for a given handle
+ * @client:     the client
+ * @handle:     handle to map
+ *
+ * Return an sglist describing the given handle
+ */
+struct scatterlist *ion_map_dma(struct ion_client *client,
+                                struct ion_handle *handle);
+
+/**
+ * ion_unmap_dma() - destroy a dma mapping for a handle
+ * @client:     the client
+ * @handle:     handle to unmap
+ */
+void ion_unmap_dma(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_share() - given a handle, obtain a buffer to pass to other clients
+ * @client:     the client
+ * @handle:     the handle to share
+ *
+ * Given a handle, return a buffer, which exists in a global name
+ * space, and can be passed to other clients.  Should be passed into ion_import
+ * to obtain a new handle for this buffer.
+ *
+ * NOTE: This function does do not an extra reference.  The burden is on the
+ * caller to make sure the buffer doesn't go away while it's being passed to
+ * another client.  That is, ion_free should not be called on this handle until
+ * the buffer has been imported into the other client.
+ */
+struct ion_buffer *ion_share(struct ion_client *client,
+                             struct ion_handle *handle);
+
+/**
+ * ion_import() - given an buffer in another client, import it
+ * @client:     this blocks client
+ * @buffer:     the buffer to import (as obtained from ion_share)
+ *
+ * Given a buffer, add it to the client and return the handle to use to refer
+ * to it further.  This is called to share a handle from one kernel client to
+ * another.
+ */
+struct ion_handle *ion_import(struct ion_client *client,
+                              struct ion_buffer *buffer);
+
+/**
+ * ion_share_fd() - given a handle, obtain a buffer(fd) to pass to userspace
+ * @client:     the client
+ * @handle:     the handle to share
+ *
+ * Given a handle, return a fd of a buffer which can be passed to userspace.
+ * Should be passed into userspace or ion_import_fd to obtain a new handle for
+ * this buffer.
+ */
+int ion_share_fd(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_import_fd() - given an fd obtained via ION_IOC_SHARE ioctl, import it
+ * @client:     this blocks client
+ * @fd:         the fd
+ *
+ * A helper function for drivers that will be recieving ion buffers shared
+ * with them from userspace.  These buffers are represented by a file
+ * descriptor obtained as the return from the ION_IOC_SHARE ioctl.
+ * This function coverts that fd into the underlying buffer, and returns
+ * the handle to use to refer to it further.
+ */
+struct ion_handle *ion_import_fd(struct ion_client *client, int fd);
+
+/**
+ * ion_import_uva() - given a virtual address from user, that is mmapped on an
+ *                    fd obtained via ION_IOCTL_SHARE ioctl, import it
+ * @client:    this blocks client
+ * @uva:       virtual address in userspace.
+ * @offset:     How many bytes are distant from the beginning of the ION buffer
+ *
+ * A helper function for drivers that will be recieving ion buffers shared
+ * with them from userspace.  These buffers are represented by a virtual
+ * address that is mmaped on a file descriptor obtained as the return from the
+ * ION_IOC_SHARE ioctl.
+ * This function does same job with ion_import_fd().
+ */
+struct ion_handle *ion_import_uva(struct ion_client *client, unsigned long uva,
+                                                                off_t *offset);
+
+#ifdef CONFIG_ION_EXYNOS
+struct ion_handle *ion_exynos_get_user_pages(struct ion_client *client,
+                        unsigned long uvaddr, size_t len, unsigned int flags);
+#else
+#include <linux/err.h>
+static inline struct ion_handle *ion_exynos_get_user_pages(
+                                struct ion_client *client, unsigned long uvaddr,
+                                size_t len, unsigned int flags)
+{
+        return ERR_PTR(-ENOSYS);
+}
+#endif
+
+#endif /* __KERNEL__ */
+
+/**
+ * DOC: Ion Userspace API
+ *
+ * create a client by opening /dev/ion
+ * most operations handled via following ioctls
+ *
+ */
+
+/**
+ * struct ion_allocation_data - metadata passed from userspace for allocations
+ * @len:        size of the allocation
+ * @align:      required alignment of the allocation
+ * @flags:      flags passed to heap
+ * @handle:     pointer that will be populated with a cookie to use to refer
+ *              to this allocation
+ *
+ * Provided by userspace as an argument to the ioctl
+ */
+struct ion_allocation_data {
+        size_t len;
+        size_t align;
+        unsigned int flags;
+        struct ion_handle *handle;
+};
+
+/**
+ * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair
+ * @handle:     a handle
+ * @fd:         a file descriptor representing that handle
+ *
+ * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with
+ * the handle returned from ion alloc, and the kernel returns the file
+ * descriptor to share or map in the fd field.  For ION_IOC_IMPORT, userspace
+ * provides the file descriptor and the kernel returns the handle.
+ */
+struct ion_fd_data {
+        struct ion_handle *handle;
+        int fd;
+};
+
+/**
+ * struct ion_handle_data - a handle passed to/from the kernel
+ * @handle:     a handle
+ */
+struct ion_handle_data {
+        struct ion_handle *handle;
+};
+
+/**
+ * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl
+ * @cmd:        the custom ioctl function to call
+ * @arg:        additional data to pass to the custom ioctl, typically a user
+ *              pointer to a predefined structure
+ *
+ * This works just like the regular cmd and arg fields of an ioctl.
+ */
+struct ion_custom_data {
+        unsigned int cmd;
+        unsigned long arg;
+};
+
+#define ION_IOC_MAGIC           'I'
+
+/**
+ * DOC: ION_IOC_ALLOC - allocate memory
+ *
+ * Takes an ion_allocation_data struct and returns it with the handle field
+ * populated with the opaque handle for the allocation.
+ */
+#define ION_IOC_ALLOC           _IOWR(ION_IOC_MAGIC, 0, \
+                                      struct ion_allocation_data)
+
+/**
+ * DOC: ION_IOC_FREE - free memory
+ *
+ * Takes an ion_handle_data struct and frees the handle.
+ */
+#define ION_IOC_FREE            _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
+
+/**
+ * DOC: ION_IOC_MAP - get a file descriptor to mmap
+ *
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be used as an argument to mmap.
+ */
+#define ION_IOC_MAP             _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
+
+/**
+ * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
+ *
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be passed to another process.  The corresponding opaque handle can
+ * be retrieved via ION_IOC_IMPORT.
+ */
+#define ION_IOC_SHARE           _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
+
+/**
+ * DOC: ION_IOC_IMPORT - imports a shared file descriptor
+ *
+ * Takes an ion_fd_data struct with the fd field populated with a valid file
+ * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle
+ * filed set to the corresponding opaque handle.
+ */
+#define ION_IOC_IMPORT          _IOWR(ION_IOC_MAGIC, 5, int)
+
+/**
+ * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl
+ *
+ * Takes the argument of the architecture specific ioctl to call and
+ * passes appropriate userdata for that ioctl
+ */
+#define ION_IOC_CUSTOM          _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
+
+#endif /* _LINUX_ION_H */
diff --git a/include/linux/jrcu.h b/include/linux/jrcu.h
new file mode 100644
index 00000000000..1c1d6a7059e
--- /dev/null
+++ b/include/linux/jrcu.h
@@ -0,0 +1,80 @@
+/*
+ * JRCU - An RCU suitable for small SMP systems.
+ *
+ * Author: Joe Korty <joe.korty@ccur.com>
+ * Copyright Concurrent Computer Corporation, 2011
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __LINUX_JRCU_H
+#define __LINUX_JRCU_H
+
+#define __rcu_read_lock()                      preempt_disable()
+#define __rcu_read_unlock()                    jrcu_read_unlock()
+extern void jrcu_read_unlock(void);
+
+#define __rcu_read_lock_bh()                   __rcu_read_lock()
+#define __rcu_read_unlock_bh()                 __rcu_read_unlock()
+
+extern void call_rcu_sched(struct rcu_head *head, void (*func)(struct rcu_head *rcu));
+
+#define call_rcu_bh                            call_rcu_sched
+#define call_rcu                               call_rcu_sched
+
+extern void rcu_barrier(void);
+
+#define rcu_barrier_sched                      rcu_barrier
+#define rcu_barrier_bh                         rcu_barrier
+
+extern void synchronize_sched(void);
+
+#define synchronize_rcu                                synchronize_sched
+#define synchronize_rcu_bh                     synchronize_sched
+#define synchronize_rcu_expedited              synchronize_sched
+#define synchronize_rcu_bh_expedited           synchronize_sched
+#define synchronize_sched_expedited            synchronize_sched
+
+#define rcu_init(cpu)                          do { } while (0)
+#define rcu_init_sched()                       do { } while (0)
+#define exit_rcu()                             do { } while (0)
+
+static inline void __rcu_check_callbacks(int cpu, int user) { }
+#define rcu_check_callbacks                    __rcu_check_callbacks
+
+#define rcu_needs_cpu(cpu)                     (0)
+#define rcu_batches_completed()                        (0)
+#define rcu_batches_completed_bh()             (0)
+#define rcu_preempt_depth()                    (0)
+
+extern void rcu_force_quiescent_state(void);
+
+#define rcu_sched_force_quiescent_state                rcu_force_quiescent_state
+#define rcu_bh_force_quiescent_state           rcu_force_quiescent_state
+
+#define rcu_enter_nohz()                       do { } while (0)
+#define rcu_exit_nohz()                                do { } while (0)
+
+extern void rcu_note_context_switch(int cpu);
+
+#define rcu_sched_qs                           rcu_note_context_switch
+#define rcu_bh_qs                              rcu_note_context_switch
+#define rcu_virt_note_context_switch           rcu_note_context_switch
+
+extern void rcu_note_might_resched(void);
+
+extern void rcu_scheduler_starting(void);
+extern int rcu_scheduler_active __read_mostly;
+
+#endif /* __LINUX_JRCU_H */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 3a3925d2aad..ace5de46aef 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -127,11 +127,18 @@ struct completion;
 struct pt_regs;
 struct user;
 
+/* cannot bring in linux/rcupdate.h at this point */
+#ifdef CONFIG_JRCU
+extern void rcu_note_might_resched(void);
+#else
+#define rcu_note_might_resched()
+#endif /*JRCU */
+
 #ifdef CONFIG_PREEMPT_VOLUNTARY
 extern int _cond_resched(void);
-# define might_resched() _cond_resched()
+# define might_resched() do { _cond_resched(); rcu_note_might_resched(); } while (0)
 #else
-# define might_resched() do { } while (0)
+# define might_resched() do { rcu_note_might_resched(); } while (0)
 #endif
 
 #ifdef CONFIG_DEBUG_SPINLOCK_SLEEP
@@ -749,4 +756,7 @@ extern int __build_bug_on_failed;
 # define REBUILD_DUE_TO_FTRACE_MCOUNT_RECORD
 #endif
 
+/* To identify board information in panic logs, set this */
+extern char *mach_panic_string;
+
 #endif
diff --git a/include/linux/keychord.h b/include/linux/keychord.h
new file mode 100644
index 00000000000..856a5850217
--- /dev/null
+++ b/include/linux/keychord.h
@@ -0,0 +1,52 @@
+/*
+ *  Key chord input driver
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+*/
+
+#ifndef __LINUX_KEYCHORD_H_
+#define __LINUX_KEYCHORD_H_
+
+#include <linux/input.h>
+
+#define KEYCHORD_VERSION                1
+
+/*
+ * One or more input_keychord structs are written to /dev/keychord
+ * at once to specify the list of keychords to monitor.
+ * Reading /dev/keychord returns the id of a keychord when the
+ * keychord combination is pressed.  A keychord is signalled when
+ * all of the keys in the keycode list are in the pressed state.
+ * The order in which the keys are pressed does not matter.
+ * The keychord will not be signalled if keys not in the keycode
+ * list are pressed.
+ * Keychords will not be signalled on key release events.
+ */
+struct input_keychord {
+        /* should be KEYCHORD_VERSION */
+        __u16 version;
+        /*
+         * client specified ID, returned from read()
+         * when this keychord is pressed.
+         */
+        __u16 id;
+
+        /* number of keycodes in this keychord */
+        __u16 count;
+
+        /* variable length array of keycodes */
+        __u16 keycodes[];
+};
+
+#endif  /* __LINUX_KEYCHORD_H_ */
diff --git a/include/linux/keyreset.h b/include/linux/keyreset.h
new file mode 100644
index 00000000000..a2ac49e5b68
--- /dev/null
+++ b/include/linux/keyreset.h
@@ -0,0 +1,28 @@
+/*
+ * include/linux/keyreset.h - platform data structure for resetkeys driver
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_KEYRESET_H
+#define _LINUX_KEYRESET_H
+
+#define KEYRESET_NAME "keyreset"
+
+struct keyreset_platform_data {
+        int (*reset_fn)(void);
+        int *keys_up;
+        int keys_down[]; /* 0 terminated */
+};
+
+#endif /* _LINUX_KEYRESET_H */
diff --git a/include/linux/linux_logo.h b/include/linux/linux_logo.h
index ca5bd91d12e..0f054a57b71 100644
--- a/include/linux/linux_logo.h
+++ b/include/linux/linux_logo.h
@@ -34,6 +34,7 @@ struct linux_logo {
 
 extern const struct linux_logo logo_linux_mono;
 extern const struct linux_logo logo_linux_vga16;
+extern const struct linux_logo logo_samsung_clut224;
 extern const struct linux_logo logo_linux_clut224;
 extern const struct linux_logo logo_blackfin_vga16;
 extern const struct linux_logo logo_blackfin_clut224;
diff --git a/include/linux/memcopy.h b/include/linux/memcopy.h
new file mode 100644
index 00000000000..a7b157391fd
--- /dev/null
+++ b/include/linux/memcopy.h
@@ -0,0 +1,226 @@
+/* 
+ * memcopy.h -- definitions for memory copy functions.  Generic C version. 
+ * 
+ * This program is free software; you can redistribute it and/or modify it 
+ * under the terms of the GNU General Public License as published by the Free 
+ * Software Foundation; either version 2.1 of the License, or (at your option) 
+ * any later version. 
+ * 
+ * This program is distributed in the hope that it will be useful, 
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General 
+ * Public License for more details. 
+ * 
+ * You should have received a copy of the GNU General Public License along 
+ * with this program; if not, write to the Free Software Foundation, Inc., 
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 
+ * 
+ * The code is derived from the GNU C Library. 
+ * Copyright (C) 1991, 1992, 1993, 1997, 2004 Free Software Foundation, Inc. 
+ */ 
+#ifndef _LINUX_MEMCOPY_H_ 
+#define _LINUX_MEMCOPY_H_ 
+ 
+/* 
+ * The strategy of the memory functions is: 
+ * 
+ *   1. Copy bytes until the destination pointer is aligned. 
+ * 
+ *   2. Copy words in unrolled loops.  If the source and destination 
+ *      are not aligned in the same way, use word memory operations, 
+ *      but shift and merge two read words before writing. 
+ * 
+ *   3. Copy the few remaining bytes. 
+ * 
+ * This is fast on processors that have at least 10 registers for 
+ * allocation by GCC, and that can access memory at reg+const in one 
+ * instruction. 
+ */ 
+ 
+#include <linux/types.h> 
+#include <linux/compiler.h> 
+#include <asm/byteorder.h> 
+ 
+/* 
+ * The macros defined in this file are: 
+ * 
+ * BYTE_COPY_FWD(dst_beg_ptr, src_beg_ptr, nbytes_to_copy) 
+ * 
+ * BYTE_COPY_BWD(dst_end_ptr, src_end_ptr, nbytes_to_copy) 
+ * 
+ * WORD_COPY_FWD(dst_beg_ptr, src_beg_ptr, nbytes_remaining, nbytes_to_copy) 
+ * 
+ * WORD_COPY_BWD(dst_end_ptr, src_end_ptr, nbytes_remaining, nbytes_to_copy) 
+ * 
+ * MERGE(old_word, sh_1, new_word, sh_2) 
+ * 
+ * MEM_COPY_FWD(dst_beg_ptr, src_beg_ptr, nbytes_to_copy) 
+ * 
+ * MEM_COPY_BWD(dst_end_ptr, src_end_ptr, nbytes_to_copy) 
+ */ 
+ 
+#define OP_T_THRESHOLD    16 
+ 
+/* 
+ * Type to use for aligned memory operations. 
+ * This should normally be the biggest type supported by a single load 
+ * and store. 
+ */ 
+#define    op_t    unsigned long int 
+#define OPSIZ    (sizeof(op_t)) 
+ 
+/* Type to use for unaligned operations.  */ 
+typedef unsigned char byte; 
+ 
+#ifndef MERGE 
+# ifdef __LITTLE_ENDIAN 
+#  define MERGE(w0, sh_1, w1, sh_2) (((w0) >> (sh_1)) | ((w1) << (sh_2))) 
+# elif defined(__BIG_ENDIAN) 
+#  define MERGE(w0, sh_1, w1, sh_2) (((w0) << (sh_1)) | ((w1) >> (sh_2))) 
+# else 
+#  error "Macro MERGE() hasn't defined!" 
+# endif 
+#endif 
+ 
+/* 
+ * Copy exactly NBYTES bytes from SRC_BP to DST_BP, 
+ * without any assumptions about alignment of the pointers. 
+ */ 
+#ifndef BYTE_COPY_FWD 
+#define BYTE_COPY_FWD(dst_bp, src_bp, nbytes)                      \
+do {                                          \
+    size_t __nbytes = (nbytes);                          \
+    while (__nbytes > 0) {                              \
+        byte __x = ((byte *) src_bp)[0];                  \
+        src_bp += 1;                              \
+        __nbytes -= 1;                              \
+        ((byte *) dst_bp)[0] = __x;                      \
+        dst_bp += 1;                              \
+    }                                      \
+} while (0) 
+#endif 
+ 
+/* 
+ * Copy exactly NBYTES_TO_COPY bytes from SRC_END_PTR to DST_END_PTR, 
+ * beginning at the bytes right before the pointers and continuing towards 
+ * smaller addresses.  Don't assume anything about alignment of the 
+ * pointers. 
+ */ 
+#ifndef BYTE_COPY_BWD 
+#define BYTE_COPY_BWD(dst_ep, src_ep, nbytes)                      \
+do {                                          \
+    size_t __nbytes = (nbytes);                          \
+    while (__nbytes > 0) {                              \
+        byte __x;                              \
+        src_ep -= 1;                              \
+        __x = ((byte *) src_ep)[0];                      \
+        dst_ep -= 1;                              \
+        __nbytes -= 1;                              \
+        ((byte *) dst_ep)[0] = __x;                      \
+    }                                      \
+} while (0) 
+#endif 
+/* 
+ * Copy *up to* NBYTES bytes from SRC_BP to DST_BP, with 
+ * the assumption that DST_BP is aligned on an OPSIZ multiple.  If 
+ * not all bytes could be easily copied, store remaining number of bytes 
+ * in NBYTES_LEFT, otherwise store 0. 
+ */ 
+extern void _wordcopy_fwd_aligned(long int, long int, size_t); 
+extern void _wordcopy_fwd_dest_aligned(long int, long int, size_t); 
+#ifndef WORD_COPY_FWD 
+#define WORD_COPY_FWD(dst_bp, src_bp, nbytes_left, nbytes)              \
+do {                                          \
+    if (src_bp % OPSIZ == 0)                          \
+        _wordcopy_fwd_aligned (dst_bp, src_bp, (nbytes) / OPSIZ);     \
+    else                                      \
+        _wordcopy_fwd_dest_aligned (dst_bp, src_bp, (nbytes) / OPSIZ);\
+                                          \
+    src_bp += (nbytes) & -OPSIZ;                          \
+    dst_bp += (nbytes) & -OPSIZ;                          \
+    (nbytes_left) = (nbytes) % OPSIZ;                      \
+} while (0) 
+#endif 
+ 
+/* 
+ * Copy *up to* NBYTES_TO_COPY bytes from SRC_END_PTR to DST_END_PTR, 
+ * beginning at the words (of type op_t) right before the pointers and 
+ * continuing towards smaller addresses.  May take advantage of that 
+ * DST_END_PTR is aligned on an OPSIZ multiple.  If not all bytes could be 
+ * easily copied, store remaining number of bytes in NBYTES_REMAINING, 
+ * otherwise store 0. 
+ */ 
+extern void _wordcopy_bwd_aligned(long int, long int, size_t); 
+extern void _wordcopy_bwd_dest_aligned(long int, long int, size_t); 
+#ifndef WORD_COPY_BWD 
+#define WORD_COPY_BWD(dst_ep, src_ep, nbytes_left, nbytes)              \
+do {                                          \
+    if (src_ep % OPSIZ == 0)                          \
+        _wordcopy_bwd_aligned (dst_ep, src_ep, (nbytes) / OPSIZ);     \
+    else                                      \
+        _wordcopy_bwd_dest_aligned (dst_ep, src_ep, (nbytes) / OPSIZ);\
+                                          \
+    src_ep -= (nbytes) & -OPSIZ;                          \
+    dst_ep -= (nbytes) & -OPSIZ;                          \
+    (nbytes_left) = (nbytes) % OPSIZ;                      \
+} while (0)
+#endif
+ 
+/* Copy memory from the beginning to the end */ 
+#ifndef MEM_COPY_FWD 
+static __always_inline void mem_copy_fwd(unsigned long dstp, 
+                    unsigned long srcp, 
+                    size_t count) 
+{ 
+    /* If there not too few bytes to copy, use word copy. */ 
+    if (count >= OP_T_THRESHOLD) { 
+        /* Copy just a few bytes to make dstp aligned. */ 
+        count -= (-dstp) % OPSIZ; 
+        BYTE_COPY_FWD(dstp, srcp, (-dstp) % OPSIZ); 
+ 
+        /* 
+         * Copy from srcp to dstp taking advantage of the known 
+         * alignment of dstp. Number if bytes remaining is put in 
+         * the third argument. 
+         */ 
+        WORD_COPY_FWD(dstp, srcp, count, count); 
+ 
+        /* Fall out and copy the tail. */ 
+    } 
+ 
+    /* There are just a few bytes to copy. Use byte memory operations. */ 
+    BYTE_COPY_FWD(dstp, srcp, count); 
+} 
+#endif 
+ 
+/* Copy memory from the end to the beginning.  */ 
+#ifndef MEM_COPY_BWD 
+static __always_inline void mem_copy_bwd(unsigned long dstp, 
+                    unsigned long srcp, 
+                    size_t count) 
+{ 
+    srcp += count; 
+    dstp += count; 
+ 
+    /* If there not too few bytes to copy, use word copy. */ 
+    if (count >= OP_T_THRESHOLD) { 
+        /* Copy just a few bytes to make dstp aligned. */ 
+        count -= dstp % OPSIZ; 
+        BYTE_COPY_BWD(dstp, srcp, dstp % OPSIZ); 
+ 
+        /* 
+         * Copy from srcp to dstp taking advantage of the known 
+         * alignment of dstp. Number if bytes remaining is put in 
+         * the third argument. 
+         */ 
+        WORD_COPY_BWD(dstp, srcp, count, count); 
+ 
+        /* Fall out and copy the tail. */ 
+    } 
+ 
+    /* There are just a few bytes to copy. Use byte memory operations. */ 
+    BYTE_COPY_BWD (dstp, srcp, count); 
+} 
+#endif 
+ 
+#endif 
diff --git a/include/linux/mfd/max77686-private.h b/include/linux/mfd/max77686-private.h
new file mode 100644
index 00000000000..33d2c8240fa
--- /dev/null
+++ b/include/linux/mfd/max77686-private.h
@@ -0,0 +1,237 @@
+/*
+ * max77686.h - Voltage regulator driver for the Maxim 77686
+ *
+ *  Copyright (C) 2010 Samsung Electrnoics
+ *  MyungJoo Ham <myungjoo.ham@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_MFD_MAX77686_PRIV_H
+#define __LINUX_MFD_MAX77686_PRIV_H
+
+#include <linux/i2c.h>
+
+#define MAX77686_REG_INVALID    (0xff)
+
+enum max77686_pmic_reg {
+        MAX77686_REG_DEVICE_ID  = 0x00,
+        MAX77686_REG_INTSRC             = 0x01,
+        MAX77686_REG_INT1               = 0x02,
+        MAX77686_REG_INT2               = 0x03,
+        MAX77686_REG_INT1MSK    = 0x04,
+        MAX77686_REG_INT2MSK    = 0x05,
+
+        MAX77686_REG_STATUS1    = 0x06,
+        MAX77686_REG_STATUS2    = 0x07,
+
+        MAX77686_REG_PWRON              = 0x08,
+        MAX77686_REG_ONOFFDELAY = 0x09,
+        MAX77686_REG_MRSTB              = 0x0a,
+
+        MAX77686_REG_BUCK1CTRL  = 0x10,
+        MAX77686_REG_BUCK1OUT   = 0x11,
+
+        MAX77686_REG_BUCK2CTRL1 = 0x12,
+        MAX77686_REG_BUCK234FREQ= 0x13,
+        MAX77686_REG_BUCK2DVS1  = 0x14,
+        MAX77686_REG_BUCK2DVS2  = 0x15,
+        MAX77686_REG_BUCK2DVS3  = 0x16,
+        MAX77686_REG_BUCK2DVS4  = 0x17,
+        MAX77686_REG_BUCK2DVS5  = 0x18,
+        MAX77686_REG_BUCK2DVS6  = 0x19,
+        MAX77686_REG_BUCK2DVS7  = 0x1a,
+        MAX77686_REG_BUCK2DVS8  = 0x1b,
+
+        MAX77686_REG_BUCK3CTRL1 = 0x1c,
+        MAX77686_REG_BUCK3DVS1  = 0x1e,
+        MAX77686_REG_BUCK3DVS2  = 0x1f,
+        MAX77686_REG_BUCK3DVS3  = 0x20,
+        MAX77686_REG_BUCK3DVS4  = 0x21,
+        MAX77686_REG_BUCK3DVS5  = 0x22,
+        MAX77686_REG_BUCK3DVS6  = 0x23,
+        MAX77686_REG_BUCK3DVS7  = 0x24,
+        MAX77686_REG_BUCK3DVS8  = 0x25,
+
+        MAX77686_REG_BUCK4CTRL1 = 0x26,
+        MAX77686_REG_BUCK4DVS1  = 0x28,
+        MAX77686_REG_BUCK4DVS2  = 0x29,
+        MAX77686_REG_BUCK4DVS3  = 0x2a,
+        MAX77686_REG_BUCK4DVS4  = 0x2b,
+        MAX77686_REG_BUCK4DVS5  = 0x2c,
+        MAX77686_REG_BUCK4DVS6  = 0x2d,
+        MAX77686_REG_BUCK4DVS7  = 0x2e,
+        MAX77686_REG_BUCK4DVS8  = 0x2f,
+
+        MAX77686_REG_BUCK5CTRL  = 0x30,
+        MAX77686_REG_BUCK5OUT   = 0x31,
+        MAX77686_REG_BUCK6CTRL  = 0x32,
+        MAX77686_REG_BUCK6OUT   = 0x33,
+        MAX77686_REG_BUCK7CTRL  = 0x34,
+        MAX77686_REG_BUCK7OUT   = 0x35,
+        MAX77686_REG_BUCK8CTRL  = 0x36,
+        MAX77686_REG_BUCK8OUT   = 0x37,
+        MAX77686_REG_BUCK9CTRL  = 0x38,
+        MAX77686_REG_BUCK9OUT   = 0x39,
+
+        MAX77686_REG_LDO1CTRL1  = 0x40,
+        MAX77686_REG_LDO2CTRL1  = 0x41,
+        MAX77686_REG_LDO3CTRL1  = 0x42,
+        MAX77686_REG_LDO4CTRL1  = 0x43,
+        MAX77686_REG_LDO5CTRL1  = 0x44,
+        MAX77686_REG_LDO6CTRL1  = 0x45,
+        MAX77686_REG_LDO7CTRL1  = 0x46,
+        MAX77686_REG_LDO8CTRL1  = 0x47,
+        MAX77686_REG_LDO9CTRL1  = 0x48,
+        MAX77686_REG_LDO10CTRL1 = 0x49,
+        MAX77686_REG_LDO11CTRL1 = 0x4a,
+        MAX77686_REG_LDO12CTRL1 = 0x4b,
+        MAX77686_REG_LDO13CTRL1 = 0x4c,
+        MAX77686_REG_LDO14CTRL1 = 0x4d,
+        MAX77686_REG_LDO15CTRL1 = 0x4e,
+        MAX77686_REG_LDO16CTRL1 = 0x4f,
+        MAX77686_REG_LDO17CTRL1 = 0x50,
+        MAX77686_REG_LDO18CTRL1 = 0x51,
+        MAX77686_REG_LDO19CTRL1 = 0x52,
+        MAX77686_REG_LDO20CTRL1 = 0x53,
+        MAX77686_REG_LDO21CTRL1 = 0x54,
+        MAX77686_REG_LDO22CTRL1 = 0x55,
+        MAX77686_REG_LDO23CTRL1 = 0x56,
+        MAX77686_REG_LDO24CTRL1 = 0x57,
+        MAX77686_REG_LDO25CTRL1 = 0x58,
+        MAX77686_REG_LDO26CTRL1 = 0x59,
+
+        MAX77686_REG_LDO1CTRL2  = 0x60,
+        MAX77686_REG_LDO2CTRL2  = 0x61,
+        MAX77686_REG_LDO3CTRL2  = 0x62,
+        MAX77686_REG_LDO4CTRL2  = 0x63,
+        MAX77686_REG_LDO5CTRL2  = 0x64,
+        MAX77686_REG_LDO6CTRL2  = 0x65,
+        MAX77686_REG_LDO7CTRL2  = 0x66,
+        MAX77686_REG_LDO8CTRL2  = 0x67,
+        MAX77686_REG_LDO9CTRL2  = 0x68,
+        MAX77686_REG_LDO10CTRL2 = 0x69,
+        MAX77686_REG_LDO11CTRL2 = 0x6a,
+        MAX77686_REG_LDO12CTRL2 = 0x6b,
+        MAX77686_REG_LDO13CTRL2 = 0x6c,
+        MAX77686_REG_LDO14CTRL2 = 0x6d,
+        MAX77686_REG_LDO15CTRL2 = 0x6e,
+        MAX77686_REG_LDO16CTRL2 = 0x6f,
+        MAX77686_REG_LDO17CTRL2 = 0x70,
+        MAX77686_REG_LDO18CTRL2 = 0x71,
+        MAX77686_REG_LDO19CTRL2 = 0x72,
+        MAX77686_REG_LDO20CTRL2 = 0x73,
+        MAX77686_REG_LDO21CTRL2 = 0x74,
+        MAX77686_REG_LDO22CTRL2 = 0x75,
+        MAX77686_REG_LDO23CTRL2 = 0x76,
+        MAX77686_REG_LDO24CTRL2 = 0x77,
+        MAX77686_REG_LDO25CTRL2 = 0x78,
+        MAX77686_REG_LDO26CTRL2 = 0x79,
+
+        MAX77686_REG_BBAT_CHARGER= 0x7e,
+        MAX77686_REG_32KHZ              = 0x7f,
+
+        MAX77686_REG_PMIC_END   = 0x80,
+};
+
+/* slave addr = 0x0c: using "2nd part" of rev4 datasheet */
+enum max77686_rtc_reg {
+        MAX77686_RTC_INT                = 0x00,
+        MAX77686_RTC_INTM               = 0x01,
+        MAX77686_RTC_RTCCNTLM   = 0x02,
+        MAX77686_RTC_RTCCNTL    = 0x03,
+        MAX77686_RTC_UPDATE0    = 0x04,
+
+        MAX77686_RTC_SMPL               = 0x06,
+        MAX77686_RTC_SEC                = 0x07,
+        MAX77686_RTC_MIN                = 0x08,
+        MAX77686_RTC_HOUR               = 0x09,
+        MAX77686_RTC_DOW                = 0x0a,
+        MAX77686_RTC_MONTH              = 0x0b,
+        MAX77686_RTC_YEAR               = 0x0c,
+        MAX77686_RTC_DOM                = 0x0d,
+
+        MAX77686_RTC_ALARM1_SEC         = 0x0e,
+        MAX77686_RTC_ALARM1_MIN         = 0x0f,
+        MAX77686_RTC_ALARM1_HOUR        = 0x10,
+        MAX77686_RTC_ALARM1_DOW         = 0x11,
+        MAX77686_RTC_ALARM1_MONTH       = 0x12,
+        MAX77686_RTC_ALARM1_YEAR        = 0x13,
+        MAX77686_RTC_ALARM1_DOM         = 0x14,
+
+        MAX77686_RTC_ALARM2_SEC         = 0x15,
+        MAX77686_RTC_ALARM2_MIN         = 0x16,
+        MAX77686_RTC_ALARM2_HOUR        = 0x17,
+        MAX77686_RTC_ALARM2_DOW         = 0x18,
+        MAX77686_RTC_ALARM2_MONTH       = 0x19,
+        MAX77686_RTC_ALARM2_YEAR        = 0x1a,
+        MAX77686_RTC_ALARM2_DOM         = 0x1b,
+
+};
+
+enum max77686_irq_source {
+        PMIC_INT1 = 0,
+        PMIC_INT2,
+        MAX77686_IRQ_GROUP_NR,
+};
+
+enum max77686_irq {
+        MAX77686_TOPSYSIRQ_PWRONF,
+        MAX77686_TOPSYSIRQ_PWRONR,
+        MAX77686_TOPSYSIRQ_JIGONF,
+        MAX77686_TOPSYSIRQ_JIGONR,
+        MAX77686_TOPSYSIRQ_ACOKBF,
+        MAX77686_TOPSYSIRQ_ACOKBR,
+        MAX77686_TOPSYSIRQ_ONKEY1S,
+        MAX77686_TOPSYSIRQ_MRSTB,
+
+        MAX77686_TOPSYSIRQ_120C,
+        MAX77686_TOPSYSIRQ_140C,
+        MAX77686_IRQ_NR,
+};
+
+#define MAX77686_NUM_GPIO       12
+struct max77686_dev {
+        struct device *dev;
+        struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
+        struct i2c_client *rtc; /* slave addr 0x0c */
+        struct mutex iolock;
+
+        int type;
+        struct platform_device *battery; /* battery control (not fuel gauge) */
+
+        int irq;
+        int ono;
+        int irq_base;
+        struct mutex irqlock;
+        int irq_masks_cur[MAX77686_IRQ_GROUP_NR];
+        int irq_masks_cache[MAX77686_IRQ_GROUP_NR];
+
+        /* For hibernation */
+        u8 reg_dump[MAX77686_REG_PMIC_END];
+
+};
+
+extern int max77686_irq_init(struct max77686_dev *max77686);
+extern void max77686_irq_exit(struct max77686_dev *max77686);
+extern int max77686_irq_resume(struct max77686_dev *max77686);
+
+extern int max77686_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
+extern int max77686_bulk_read(struct i2c_client *i2c, u8 reg, int count, u8 *buf);
+extern int max77686_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
+extern int max77686_bulk_write(struct i2c_client *i2c, u8 reg, int count, u8 *buf);
+extern int max77686_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
+
+#endif /*  __LINUX_MFD_MAX77686_PRIV_H */
diff --git a/include/linux/mfd/max77686.h b/include/linux/mfd/max77686.h
new file mode 100644
index 00000000000..bf718541369
--- /dev/null
+++ b/include/linux/mfd/max77686.h
@@ -0,0 +1,117 @@
+/*
+ * max77686.h - Driver for the Maxim 77686
+ *
+ *  Copyright (C) 2009-2010 Samsung Electrnoics
+ *  MyungJoo Ham <myungjoo.ham@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * This driver is based on max77686.h
+ *
+ * MAX77686 has PMIC, MUIC, HAPTIC, RTC, FLASH, and Fuel Gauge devices.
+ * Except Fuel Gauge, every device shares the same I2C bus and included in
+ * this mfd driver. Although the fuel gauge is included in the chip, it is
+ * excluded from the driver because a) it has a different I2C bus from
+ * others and b) it can be enabled simply by using MAX17042 driver.
+ */
+
+#ifndef __LINUX_MFD_MAX77686_H
+#define __LINUX_MFD_MAX77686_H
+
+#include <linux/regulator/consumer.h>
+
+/* MAX77686 regulator IDs */
+enum max77686_regulators {
+        MAX77686_LDO1 = 0,
+        MAX77686_LDO2,
+        MAX77686_LDO3,
+        MAX77686_LDO4,
+        MAX77686_LDO5,
+        MAX77686_LDO6,
+        MAX77686_LDO7,
+        MAX77686_LDO8,
+        MAX77686_LDO9,
+        MAX77686_LDO10,
+        MAX77686_LDO11,
+        MAX77686_LDO12,
+        MAX77686_LDO13,
+        MAX77686_LDO14,
+        MAX77686_LDO15,
+        MAX77686_LDO16,
+        MAX77686_LDO17,
+        MAX77686_LDO18,
+        MAX77686_LDO19,
+        MAX77686_LDO20,
+        MAX77686_LDO21,
+        MAX77686_LDO22,
+        MAX77686_LDO23,
+        MAX77686_LDO24,
+        MAX77686_LDO25,
+        MAX77686_LDO26,
+        MAX77686_BUCK1,
+        MAX77686_BUCK2,
+        MAX77686_BUCK3,
+        MAX77686_BUCK4,
+        MAX77686_BUCK5,
+        MAX77686_BUCK6,
+        MAX77686_BUCK7,
+        MAX77686_BUCK8,
+        MAX77686_BUCK9,
+
+        MAX77686_EN32KHZ_AP,
+        MAX77686_EN32KHZ_CP,
+
+        MAX77686_REG_MAX,
+};
+
+struct max77686_regulator_data {
+        int id;
+        struct regulator_init_data *initdata;
+};
+
+struct max77686_platform_data {
+        /* IRQ */
+        int irq_base;
+        int ono;
+        int wakeup;
+
+        /* ---- PMIC ---- */
+        struct max77686_regulator_data *regulators;
+        int num_regulators;
+
+        /*
+         * SET1~3 DVS GPIOs control Buck1, 2, and 5 simultaneously. Therefore,
+         * With buckx_gpiodvs enabled, the buckx cannot be controlled
+         * independently. To control buckx (of 1, 2, and 5) independently,
+         * disable buckx_gpiodvs and control with BUCKxDVS1 register.
+         *
+         * When buckx_gpiodvs and bucky_gpiodvs are both enabled, set_voltage
+         * on buckx will change the voltage of bucky at the same time.
+         *
+         */
+        bool ignore_gpiodvs_side_effect;
+        int buck234_gpios[3]; /* GPIO of [0]SET1, [1]SET2, [2]SET3 */
+        int buck234_default_idx; /* Default value of SET1, 2, 3 */
+        unsigned int buck2_voltage[8]; /* buckx_voltage in uV */
+        bool buck2_gpiodvs;
+        unsigned int buck3_voltage[8];
+        bool buck3_gpiodvs;
+        unsigned int buck4_voltage[8];
+        bool buck4_gpiodvs;
+
+        /* RTC: Not implemented */
+};
+
+#endif /* __LINUX_MFD_MAX77686_H */
diff --git a/include/linux/mfd/max8698-private.h b/include/linux/mfd/max8698-private.h
new file mode 100644
index 00000000000..332b04c25b2
--- /dev/null
+++ b/include/linux/mfd/max8698-private.h
@@ -0,0 +1,117 @@
+/*
+ * max8698.h - Voltage regulator driver for the Maxim 8698
+ *
+ *  Copyright (C) 2009-2010 Samsung Electrnoics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
+ *  Marek Szyprowski <m.szyprowski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *  2010.10.25
+ *  Modified by Taekki Kim <taekki.kim@samsung.com>
+ */
+
+#ifndef __LINUX_MFD_MAX8698_PRIV_H
+#define __LINUX_MFD_MAX8698_PRIV_H
+
+/* MAX 8698 registers */
+enum {
+        MAX8698_REG_ONOFF1,
+        MAX8698_REG_ONOFF2,
+        MAX8698_REG_ADISCHG_EN1,
+        MAX8698_REG_ADISCHG_EN2,
+        MAX8698_REG_DVSARM12,
+        MAX8698_REG_DVSARM34,
+        MAX8698_REG_DVSINT12,
+        MAX8698_REG_BUCK3,
+        MAX8698_REG_LDO2_LDO3,
+        MAX8698_REG_LDO4,
+        MAX8698_REG_LDO5,
+        MAX8698_REG_LDO6,
+        MAX8698_REG_LDO7,
+        MAX8698_REG_LDO8_BKCHAR,
+        MAX8698_REG_LDO9,
+        MAX8698_REG_LBCNFG,
+};
+
+/* ONOFF1 */
+#define MAX8698_SHIFT_EN1       7
+#define MAX8698_SHIFT_EN2       6
+#define MAX8698_SHIFT_EN3       5
+#define MAX8698_SHIFT_ELDO2     4
+#define MAX8698_SHIFT_ELDO3     3
+#define MAX8698_SHIFT_ELDO4     2
+#define MAX8698_SHIFT_ELDO5     1
+
+#define MAX8698_MASK_EN1        (0x1 << MAX8698_SHIFT_EN1)
+#define MAX8698_MASK_EN2        (0x1 << MAX8698_SHIFT_EN2)
+#define MAX8698_MASK_EN3        (0x1 << MAX8698_SHIFT_EN3)
+#define MAX8698_MASK_ELDO2      (0x1 << MAX8698_SHIFT_ELDO2)
+#define MAX8698_MASK_ELDO3      (0x1 << MAX8698_SHIFT_ELDO3)
+#define MAX8698_MASK_ELDO4      (0x1 << MAX8698_SHIFT_ELDO4)
+#define MAX8698_MASK_ELDO5      (0x1 << MAX8698_SHIFT_ELDO5)
+
+/* ONOFF2 */
+#define MAX8698_SHIFT_ELDO6     7
+#define MAX8698_SHIFT_ELDO7     6
+#define MAX8698_SHIFT_ELDO8     5
+#define MAX8698_SHIFT_ELDO9     4
+#define MAX8698_SHIFT_ELBCNFG   0
+
+#define MAX8698_MASK_ELDO6      (0x1 << MAX8698_SHIFT_ELDO6)
+#define MAX8698_MASK_ELDO7      (0x1 << MAX8698_SHIFT_ELDO7)
+#define MAX8698_MASK_ELDO8      (0x1 << MAX8698_SHIFT_ELDO8)
+#define MAX8698_MASK_ELDO9      (0x1 << MAX8698_SHIFT_ELDO9)
+#define MAX8698_MASK_ELBCNFG    (0x1 << MAX8698_SHIFT_ELBCNFG)
+
+
+/**
+ * struct max8698_dev - max8698 master device for sub-drivers
+ * @dev: master device of the chip (can be used to access platform data)
+ * @i2c_client: i2c client private data
+ * @dev_read(): chip register read function
+ * @dev_write(): chip register write function
+ * @dev_update(): chip register update function
+ * @iolock: mutex for serializing io access
+ */
+
+struct max8698_dev {
+        struct device *dev;
+        struct i2c_client *i2c_client;
+        int (*dev_read)(struct max8698_dev *max8698, u8 reg, u8 *dest);
+        int (*dev_write)(struct max8698_dev *max8698, u8 reg, u8 val);
+        int (*dev_update)(struct max8698_dev *max8698, u8 reg, u8 val, u8 mask);
+        struct mutex iolock;
+};
+
+static inline int max8698_read_reg(struct max8698_dev *max8698, u8 reg,
+                                   u8 *value)
+{
+        return max8698->dev_read(max8698, reg, value);
+}
+
+static inline int max8698_write_reg(struct max8698_dev *max8698, u8 reg,
+                                    u8 value)
+{
+        return max8698->dev_write(max8698, reg, value);
+}
+
+static inline int max8698_update_reg(struct max8698_dev *max8698, u8 reg,
+                                     u8 value, u8 mask)
+{
+        return max8698->dev_update(max8698, reg, value, mask);
+}
+
+#endif /*  __LINUX_MFD_MAX8698_PRIV_H */
diff --git a/include/linux/mfd/max8698.h b/include/linux/mfd/max8698.h
new file mode 100644
index 00000000000..9a1b52a5e27
--- /dev/null
+++ b/include/linux/mfd/max8698.h
@@ -0,0 +1,78 @@
+/*
+ * max8698.h - Voltage regulator driver for the Maxim 8698
+ *
+ *  Copyright (C) 2009-2010 Samsung Electrnoics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
+ *  Marek Szyprowski <m.szyprowski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *  2010.10.25
+ *  Modified by Taekki Kim <taekki.kim@samsung.com>
+ */
+
+#ifndef __LINUX_MFD_MAX8698_H
+#define __LINUX_MFD_MAX8698_H
+
+#include <linux/regulator/machine.h>
+
+/* MAX 8698 regulator ids */
+enum {
+        MAX8698_LDO1 = 1,
+        MAX8698_LDO2,
+        MAX8698_LDO3,
+        MAX8698_LDO4,
+        MAX8698_LDO5,
+        MAX8698_LDO6,
+        MAX8698_LDO7,
+        MAX8698_LDO8,
+        MAX8698_LDO9,
+        MAX8698_BUCK1,
+        MAX8698_BUCK2,
+        MAX8698_BUCK3,
+};
+
+/**
+ * max8698_regulator_data - regulator data
+ * @id: regulator id
+ * @initdata: regulator init data (contraints, supplies, ...)
+ */
+struct max8698_regulator_data {
+        int                             id;
+        struct regulator_init_data      *initdata;
+};
+
+/**
+ * struct max8698_board - packages regulator init data
+ * @num_regulators: number of regultors used
+ * @regulators: array of defined regulators
+ */
+
+struct max8698_platform_data {
+        int                             num_regulators;
+        struct max8698_regulator_data   *regulators;
+
+       int              dvsarm1;
+       int              dvsarm2;
+       int              dvsarm3;
+       int              dvsarm4;
+       int              dvsint1;
+       int              dvsint2;
+       int              set1;
+       int              set2;
+       int              set3;
+};
+
+#endif /*  __LINUX_MFD_MAX8698_H */
diff --git a/include/linux/mfd/max8997-private.h b/include/linux/mfd/max8997-private.h
index 5ff2400ad46..3f4deb62d6b 100644
--- a/include/linux/mfd/max8997-private.h
+++ b/include/linux/mfd/max8997-private.h
@@ -326,7 +326,6 @@ struct max8997_dev {
         int irq;
         int ono;
         int irq_base;
-        bool wakeup;
         struct mutex irqlock;
         int irq_masks_cur[MAX8997_IRQ_GROUP_NR];
         int irq_masks_cache[MAX8997_IRQ_GROUP_NR];
diff --git a/include/linux/mfd/s5m87xx/s5m-core.h b/include/linux/mfd/s5m87xx/s5m-core.h
new file mode 100644
index 00000000000..797f7207905
--- /dev/null
+++ b/include/linux/mfd/s5m87xx/s5m-core.h
@@ -0,0 +1,377 @@
+/*
+ * s5m-core.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *              http://www.samsung.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#ifndef __LINUX_MFD_S5M_CORE_H
+#define __LINUX_MFD_S5M_CORE_H
+
+#define NUM_IRQ_REGS    4
+
+enum s5m_device_type {
+        S5M8751X,
+        S5M8763X,
+        S5M8767X,
+};
+
+/* S5M8767 registers */
+enum s5m8767_reg {
+        S5M8767_REG_ID,
+        S5M8767_REG_INT1,
+        S5M8767_REG_INT2,
+        S5M8767_REG_INT3,
+        S5M8767_REG_INT1M,
+        S5M8767_REG_INT2M,
+        S5M8767_REG_INT3M,
+        S5M8767_REG_STATUS1,
+        S5M8767_REG_STATUS2,
+        S5M8767_REG_STATUS3,
+        S5M8767_REG_CTRL1,
+        S5M8767_REG_CTRL2,
+        S5M8767_REG_LOWBAT1,
+        S5M8767_REG_LOWBAT2,
+        S5M8767_REG_BUCHG,
+        S5M8767_REG_DVSRAMP,
+        S5M8767_REG_DVSTIMER2 = 0x10,
+        S5M8767_REG_DVSTIMER3,
+        S5M8767_REG_DVSTIMER4,
+        S5M8767_REG_LDO1,
+        S5M8767_REG_LDO2,
+        S5M8767_REG_LDO3,
+        S5M8767_REG_LDO4,
+        S5M8767_REG_LDO5,
+        S5M8767_REG_LDO6,
+        S5M8767_REG_LDO7,
+        S5M8767_REG_LDO8,
+        S5M8767_REG_LDO9,
+        S5M8767_REG_LDO10,
+        S5M8767_REG_LDO11,
+        S5M8767_REG_LDO12,
+        S5M8767_REG_LDO13,
+        S5M8767_REG_LDO14 = 0x20,
+        S5M8767_REG_LDO15,
+        S5M8767_REG_LDO16,
+        S5M8767_REG_LDO17,
+        S5M8767_REG_LDO18,
+        S5M8767_REG_LDO19,
+        S5M8767_REG_LDO20,
+        S5M8767_REG_LDO21,
+        S5M8767_REG_LDO22,
+        S5M8767_REG_LDO23,
+        S5M8767_REG_LDO24,
+        S5M8767_REG_LDO25,
+        S5M8767_REG_LDO26,
+        S5M8767_REG_LDO27,
+        S5M8767_REG_LDO28,
+        S5M8767_REG_UVLO = 0x31,
+        S5M8767_REG_BUCK1CTRL1,
+        S5M8767_REG_BUCK1CTRL2,
+        S5M8767_REG_BUCK2CTRL,
+        S5M8767_REG_BUCK2DVS1,
+        S5M8767_REG_BUCK2DVS2,
+        S5M8767_REG_BUCK2DVS3,
+        S5M8767_REG_BUCK2DVS4,
+        S5M8767_REG_BUCK2DVS5,
+        S5M8767_REG_BUCK2DVS6,
+        S5M8767_REG_BUCK2DVS7,
+        S5M8767_REG_BUCK2DVS8,
+        S5M8767_REG_BUCK3CTRL,
+        S5M8767_REG_BUCK3DVS1,
+        S5M8767_REG_BUCK3DVS2,
+        S5M8767_REG_BUCK3DVS3,
+        S5M8767_REG_BUCK3DVS4,
+        S5M8767_REG_BUCK3DVS5,
+        S5M8767_REG_BUCK3DVS6,
+        S5M8767_REG_BUCK3DVS7,
+        S5M8767_REG_BUCK3DVS8,
+        S5M8767_REG_BUCK4CTRL,
+        S5M8767_REG_BUCK4DVS1,
+        S5M8767_REG_BUCK4DVS2,
+        S5M8767_REG_BUCK4DVS3,
+        S5M8767_REG_BUCK4DVS4,
+        S5M8767_REG_BUCK4DVS5,
+        S5M8767_REG_BUCK4DVS6,
+        S5M8767_REG_BUCK4DVS7,
+        S5M8767_REG_BUCK4DVS8,
+        S5M8767_REG_BUCK5CTRL1,
+        S5M8767_REG_BUCK5CTRL2,
+        S5M8767_REG_BUCK5CTRL3,
+        S5M8767_REG_BUCK5CTRL4,
+        S5M8767_REG_BUCK5CTRL5,
+        S5M8767_REG_BUCK6CTRL1,
+        S5M8767_REG_BUCK6CTRL2,
+        S5M8767_REG_BUCK7CTRL1,
+        S5M8767_REG_BUCK7CTRL2,
+        S5M8767_REG_BUCK8CTRL1,
+        S5M8767_REG_BUCK8CTRL2,
+        S5M8767_REG_BUCK9CTRL1,
+        S5M8767_REG_BUCK9CTRL2,
+        S5M8767_REG_LDO1CTRL,
+        S5M8767_REG_LDO2_1CTRL,
+        S5M8767_REG_LDO2_2CTRL,
+        S5M8767_REG_LDO2_3CTRL,
+        S5M8767_REG_LDO2_4CTRL,
+        S5M8767_REG_LDO3CTRL,
+        S5M8767_REG_LDO4CTRL,
+        S5M8767_REG_LDO5CTRL,
+        S5M8767_REG_LDO6CTRL,
+        S5M8767_REG_LDO7CTRL,
+        S5M8767_REG_LDO8CTRL,
+        S5M8767_REG_LDO9CTRL,
+        S5M8767_REG_LDO10CTRL,
+        S5M8767_REG_LDO11CTRL,
+        S5M8767_REG_LDO12CTRL,
+        S5M8767_REG_LDO13CTRL,
+        S5M8767_REG_LDO14CTRL,
+        S5M8767_REG_LDO15CTRL,
+        S5M8767_REG_LDO16CTRL,
+        S5M8767_REG_LDO17CTRL,
+        S5M8767_REG_LDO18CTRL,
+        S5M8767_REG_LDO19CTRL,
+        S5M8767_REG_LDO20CTRL,
+        S5M8767_REG_LDO21CTRL,
+        S5M8767_REG_LDO22CTRL,
+        S5M8767_REG_LDO23CTRL,
+        S5M8767_REG_LDO24CTRL,
+        S5M8767_REG_LDO25CTRL,
+        S5M8767_REG_LDO26CTRL,
+        S5M8767_REG_LDO27CTRL,
+        S5M8767_REG_LDO28CTRL,
+};
+
+/* S5M8763 registers */
+enum s5m8763_reg {
+        S5M8763_REG_IRQ1,
+        S5M8763_REG_IRQ2,
+        S5M8763_REG_IRQ3,
+        S5M8763_REG_IRQ4,
+        S5M8763_REG_IRQM1,
+        S5M8763_REG_IRQM2,
+        S5M8763_REG_IRQM3,
+        S5M8763_REG_IRQM4,
+        S5M8763_REG_STATUS1,
+        S5M8763_REG_STATUS2,
+        S5M8763_REG_STATUSM1,
+        S5M8763_REG_STATUSM2,
+        S5M8763_REG_CHGR1,
+        S5M8763_REG_CHGR2,
+        S5M8763_REG_LDO_ACTIVE_DISCHARGE1,
+        S5M8763_REG_LDO_ACTIVE_DISCHARGE2,
+        S5M8763_REG_BUCK_ACTIVE_DISCHARGE3,
+        S5M8763_REG_ONOFF1,
+        S5M8763_REG_ONOFF2,
+        S5M8763_REG_ONOFF3,
+        S5M8763_REG_ONOFF4,
+        S5M8763_REG_BUCK1_VOLTAGE1,
+        S5M8763_REG_BUCK1_VOLTAGE2,
+        S5M8763_REG_BUCK1_VOLTAGE3,
+        S5M8763_REG_BUCK1_VOLTAGE4,
+        S5M8763_REG_BUCK2_VOLTAGE1,
+        S5M8763_REG_BUCK2_VOLTAGE2,
+        S5M8763_REG_BUCK3,
+        S5M8763_REG_BUCK4,
+        S5M8763_REG_LDO1_LDO2,
+        S5M8763_REG_LDO3,
+        S5M8763_REG_LDO4,
+        S5M8763_REG_LDO5,
+        S5M8763_REG_LDO6,
+        S5M8763_REG_LDO7,
+        S5M8763_REG_LDO7_LDO8,
+        S5M8763_REG_LDO9_LDO10,
+        S5M8763_REG_LDO11,
+        S5M8763_REG_LDO12,
+        S5M8763_REG_LDO13,
+        S5M8763_REG_LDO14,
+        S5M8763_REG_LDO15,
+        S5M8763_REG_LDO16,
+        S5M8763_REG_BKCHR,
+        S5M8763_REG_LBCNFG1,
+        S5M8763_REG_LBCNFG2,
+};
+
+enum s5m8767_irq {
+        S5M8767_IRQ_PWRR,
+        S5M8767_IRQ_PWRF,
+        S5M8767_IRQ_PWR1S,
+        S5M8767_IRQ_JIGR,
+        S5M8767_IRQ_JIGF,
+        S5M8767_IRQ_LOWBAT2,
+        S5M8767_IRQ_LOWBAT1,
+
+        S5M8767_IRQ_MRB,
+        S5M8767_IRQ_DVSOK2,
+        S5M8767_IRQ_DVSOK3,
+        S5M8767_IRQ_DVSOK4,
+
+        S5M8767_IRQ_RTC60S,
+        S5M8767_IRQ_RTCA1,
+        S5M8767_IRQ_RTCA2,
+        S5M8767_IRQ_SMPL,
+        S5M8767_IRQ_RTC1S,
+        S5M8767_IRQ_WTSR,
+
+        S5M8767_IRQ_NR,
+};
+
+#define S5M8767_IRQ_PWRR_MASK           (1 << 0)
+#define S5M8767_IRQ_PWRF_MASK           (1 << 1)
+#define S5M8767_IRQ_PWR1S_MASK          (1 << 3)
+#define S5M8767_IRQ_JIGR_MASK           (1 << 4)
+#define S5M8767_IRQ_JIGF_MASK           (1 << 5)
+#define S5M8767_IRQ_LOWBAT2_MASK        (1 << 6)
+#define S5M8767_IRQ_LOWBAT1_MASK        (1 << 7)
+
+#define S5M8767_IRQ_MRB_MASK            (1 << 2)
+#define S5M8767_IRQ_DVSOK2_MASK         (1 << 3)
+#define S5M8767_IRQ_DVSOK3_MASK         (1 << 4)
+#define S5M8767_IRQ_DVSOK4_MASK         (1 << 5)
+
+#define S5M8767_IRQ_RTC60S_MASK         (1 << 0)
+#define S5M8767_IRQ_RTCA1_MASK          (1 << 1)
+#define S5M8767_IRQ_RTCA2_MASK          (1 << 2)
+#define S5M8767_IRQ_SMPL_MASK           (1 << 3)
+#define S5M8767_IRQ_RTC1S_MASK          (1 << 4)
+#define S5M8767_IRQ_WTSR_MASK           (1 << 5)
+
+enum s5m8763_irq {
+        S5M8763_IRQ_DCINF,
+        S5M8763_IRQ_DCINR,
+        S5M8763_IRQ_JIGF,
+        S5M8763_IRQ_JIGR,
+        S5M8763_IRQ_PWRONF,
+        S5M8763_IRQ_PWRONR,
+
+        S5M8763_IRQ_WTSREVNT,
+        S5M8763_IRQ_SMPLEVNT,
+        S5M8763_IRQ_ALARM1,
+        S5M8763_IRQ_ALARM0,
+
+        S5M8763_IRQ_ONKEY1S,
+        S5M8763_IRQ_TOPOFFR,
+        S5M8763_IRQ_DCINOVPR,
+        S5M8763_IRQ_CHGRSTF,
+        S5M8763_IRQ_DONER,
+        S5M8763_IRQ_CHGFAULT,
+
+        S5M8763_IRQ_LOBAT1,
+        S5M8763_IRQ_LOBAT2,
+
+        S5M8763_IRQ_NR,
+};
+
+#define S5M8763_IRQ_DCINF_MASK          (1 << 2)
+#define S5M8763_IRQ_DCINR_MASK          (1 << 3)
+#define S5M8763_IRQ_JIGF_MASK           (1 << 4)
+#define S5M8763_IRQ_JIGR_MASK           (1 << 5)
+#define S5M8763_IRQ_PWRONF_MASK         (1 << 6)
+#define S5M8763_IRQ_PWRONR_MASK         (1 << 7)
+
+#define S5M8763_IRQ_WTSREVNT_MASK       (1 << 0)
+#define S5M8763_IRQ_SMPLEVNT_MASK       (1 << 1)
+#define S5M8763_IRQ_ALARM1_MASK         (1 << 2)
+#define S5M8763_IRQ_ALARM0_MASK         (1 << 3)
+
+#define S5M8763_IRQ_ONKEY1S_MASK        (1 << 0)
+#define S5M8763_IRQ_TOPOFFR_MASK        (1 << 2)
+#define S5M8763_IRQ_DCINOVPR_MASK       (1 << 3)
+#define S5M8763_IRQ_CHGRSTF_MASK        (1 << 4)
+#define S5M8763_IRQ_DONER_MASK          (1 << 5)
+#define S5M8763_IRQ_CHGFAULT_MASK       (1 << 7)
+
+#define S5M8763_IRQ_LOBAT1_MASK         (1 << 0)
+#define S5M8763_IRQ_LOBAT2_MASK         (1 << 1)
+
+#define S5M8763_ENRAMP                  (1 << 4)
+
+/**
+ * struct s5m87xx_dev - s5m87xx master device for sub-drivers
+ * @dev: master device of the chip (can be used to access platform data)
+ * @i2c: i2c client private data for regulator
+ * @rtc: i2c client private data for rtc
+ * @iolock: mutex for serializing io access
+ * @irqlock: mutex for buslock
+ * @irq_base: base IRQ number for s5m87xx, required for IRQs
+ * @irq: generic IRQ number for s5m87xx
+ * @ono: power onoff IRQ number for s5m87xx
+ * @irq_masks_cur: currently active value
+ * @irq_masks_cache: cached hardware value
+ * @type: indicate which s5m87xx "variant" is used
+ */
+struct s5m87xx_dev {
+        struct device *dev;
+        struct i2c_client *i2c;
+        struct i2c_client *rtc;
+        struct mutex iolock;
+        struct mutex irqlock;
+
+        int device_type;
+        int irq_base;
+        int irq;
+        int ono;
+        u8 irq_masks_cur[NUM_IRQ_REGS];
+        u8 irq_masks_cache[NUM_IRQ_REGS];
+        int type;
+        bool wakeup;
+        bool wtsr_smpl;
+};
+
+int s5m_irq_init(struct s5m87xx_dev *s5m87xx);
+void s5m_irq_exit(struct s5m87xx_dev *s5m87xx);
+int s5m_irq_resume(struct s5m87xx_dev *s5m87xx);
+
+extern int s5m_reg_read(struct i2c_client *i2c, u8 reg, u8 *dest);
+extern int s5m_bulk_read(struct i2c_client *i2c, u8 reg, int count, u8 *buf);
+extern int s5m_reg_write(struct i2c_client *i2c, u8 reg, u8 value);
+extern int s5m_bulk_write(struct i2c_client *i2c, u8 reg, int count, u8 *buf);
+extern int s5m_reg_update(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
+
+struct s5m_platform_data {
+        struct s5m_regulator_data       *regulators;
+        struct s5m_opmode_data          *opmode_data;
+
+        int                             device_type;
+        int                             num_regulators;
+
+        int                             irq_base;
+        int                             (*cfg_pmic_irq)(void);
+
+        int                             ono;
+        bool                            wakeup;
+        bool                            buck_voltage_lock;
+
+        int                             buck_gpios[3];
+        int                             buck2_voltage[8];
+        bool                            buck2_gpiodvs;
+        int                             buck3_voltage[8];
+        bool                            buck3_gpiodvs;
+        int                             buck4_voltage[8];
+        bool                            buck4_gpiodvs;
+
+        int                             buck_set1;
+        int                             buck_set2;
+        int                             buck_set3;
+        int                             buck2_enable;
+        int                             buck3_enable;
+        int                             buck4_enable;
+        int                             buck_default_idx;
+        int                             buck2_default_idx;
+        int                             buck3_default_idx;
+        int                             buck4_default_idx;
+
+        int                             buck_ramp_delay;
+        bool                            buck2_ramp_enable;
+        bool                            buck3_ramp_enable;
+        bool                            buck4_ramp_enable;
+
+        bool                            wtsr_smpl;
+};
+
+#endif /*  __LINUX_MFD_S5M_CORE_H */
diff --git a/include/linux/mfd/s5m87xx/s5m-pmic.h b/include/linux/mfd/s5m87xx/s5m-pmic.h
new file mode 100644
index 00000000000..ba878df7c15
--- /dev/null
+++ b/include/linux/mfd/s5m87xx/s5m-pmic.h
@@ -0,0 +1,115 @@
+/* s5m87xx.h
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __LINUX_MFD_S5M_PMIC_H
+#define __LINUX_MFD_S5M_PMIC_H
+
+#include <linux/regulator/machine.h>
+
+/* S5M8767 regulator ids */
+enum s5m8767_regulators {
+        S5M8767_LDO1,
+        S5M8767_LDO2,
+        S5M8767_LDO3,
+        S5M8767_LDO4,
+        S5M8767_LDO5,
+        S5M8767_LDO6,
+        S5M8767_LDO7,
+        S5M8767_LDO8,
+        S5M8767_LDO9,
+        S5M8767_LDO10,
+        S5M8767_LDO11,
+        S5M8767_LDO12,
+        S5M8767_LDO13,
+        S5M8767_LDO14,
+        S5M8767_LDO15,
+        S5M8767_LDO16,
+        S5M8767_LDO17,
+        S5M8767_LDO18,
+        S5M8767_LDO19,
+        S5M8767_LDO20,
+        S5M8767_LDO21,
+        S5M8767_LDO22,
+        S5M8767_LDO23,
+        S5M8767_LDO24,
+        S5M8767_LDO25,
+        S5M8767_LDO26,
+        S5M8767_LDO27,
+        S5M8767_LDO28,
+        S5M8767_BUCK1,
+        S5M8767_BUCK2,
+        S5M8767_BUCK3,
+        S5M8767_BUCK4,
+        S5M8767_BUCK5,
+        S5M8767_BUCK6,
+        S5M8767_BUCK7,
+        S5M8767_BUCK8,
+        S5M8767_BUCK9,
+        S5M8767_AP_EN32KHZ,
+        S5M8767_CP_EN32KHZ,
+        S5M8767_BT_EN32KHZ,
+
+        S5M8767_REG_MAX,
+};
+
+
+#define S5M8767_PMIC_EN_SHIFT   6
+
+/* S5M8763 regulator ids */
+enum s5m8763_regulators {
+        S5M8763_LDO1,
+        S5M8763_LDO2,
+        S5M8763_LDO3,
+        S5M8763_LDO4,
+        S5M8763_LDO5,
+        S5M8763_LDO6,
+        S5M8763_LDO7,
+        S5M8763_LDO8,
+        S5M8763_LDO9,
+        S5M8763_LDO10,
+        S5M8763_LDO11,
+        S5M8763_LDO12,
+        S5M8763_LDO13,
+        S5M8763_LDO14,
+        S5M8763_LDO15,
+        S5M8763_LDO16,
+        S5M8763_BUCK1,
+        S5M8763_BUCK2,
+        S5M8763_BUCK3,
+        S5M8763_BUCK4,
+        S5M8763_AP_EN32KHZ,
+        S5M8763_CP_EN32KHZ,
+        S5M8763_ENCHGVI,
+        S5M8763_ESAFEUSB1,
+        S5M8763_ESAFEUSB2,
+};
+
+/**
+ * s5m87xx_regulator_data - regulator data
+ * @id: regulator id
+ * @initdata: regulator init data (contraints, supplies, ...)
+ */
+struct s5m_regulator_data {
+        int                             id;
+        struct regulator_init_data      *initdata;
+};
+
+struct s5m_opmode_data {
+        int id;
+        int mode;
+};
+
+enum s5m_opmode {
+        S5M_OPMODE_NORMAL,
+        S5M_OPMODE_LP,
+        S5M_OPMODE_STANDBY,
+};
+
+#endif /*  __LINUX_MFD_S5M_PMIC_H */
diff --git a/include/linux/mfd/s5m87xx/s5m-rtc.h b/include/linux/mfd/s5m87xx/s5m-rtc.h
new file mode 100644
index 00000000000..a1caa971dcd
--- /dev/null
+++ b/include/linux/mfd/s5m87xx/s5m-rtc.h
@@ -0,0 +1,95 @@
+/*
+ * s5m-rtc.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ *              http://www.samsung.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#ifndef __LINUX_MFD_S5M_RTC_H
+#define __LINUX_MFD_S5M_RTC_H
+
+enum s5m87xx_rtc_reg {
+        S5M87XX_RTC_SEC,
+        S5M87XX_RTC_MIN,
+        S5M87XX_RTC_HOUR,
+        S5M87XX_RTC_WEEKDAY,
+        S5M87XX_RTC_DATE,
+        S5M87XX_RTC_MONTH,
+        S5M87XX_RTC_YEAR1,
+        S5M87XX_RTC_YEAR2,
+        S5M87XX_ALARM0_SEC,
+        S5M87XX_ALARM0_MIN,
+        S5M87XX_ALARM0_HOUR,
+        S5M87XX_ALARM0_WEEKDAY,
+        S5M87XX_ALARM0_DATE,
+        S5M87XX_ALARM0_MONTH,
+        S5M87XX_ALARM0_YEAR1,
+        S5M87XX_ALARM0_YEAR2,
+        S5M87XX_ALARM1_SEC,
+        S5M87XX_ALARM1_MIN,
+        S5M87XX_ALARM1_HOUR,
+        S5M87XX_ALARM1_WEEKDAY,
+        S5M87XX_ALARM1_DATE,
+        S5M87XX_ALARM1_MONTH,
+        S5M87XX_ALARM1_YEAR1,
+        S5M87XX_ALARM1_YEAR2,
+        S5M87XX_ALARM0_CONF,
+        S5M87XX_ALARM1_CONF,
+        S5M87XX_RTC_STATUS,
+        S5M87XX_WTSR_SMPL_CNTL,
+        S5M87XX_RTC_UDR_CON,
+};
+
+#define RTC_I2C_ADDR            (0x0C >> 1)
+
+#define HOUR_12                 (1 << 7)
+#define HOUR_AMPM               (1 << 6)
+#define HOUR_PM                 (1 << 5)
+#define ALARM0_STATUS           (1 << 1)
+#define ALARM1_STATUS           (1 << 2)
+#define UPDATE_AD               (1 << 0)
+
+/* RTC Control Register */
+#define BCD_EN_SHIFT            0
+#define BCD_EN_MASK             (1 << BCD_EN_SHIFT)
+#define MODEL24_SHIFT           1
+#define MODEL24_MASK            (1 << MODEL24_SHIFT)
+/* RTC Update Register1 */
+#define RTC_UDR_SHIFT           0
+#define RTC_UDR_MASK            (1 << RTC_UDR_SHIFT)
+#define RTC_TCON_SHIFT          1
+#define RTC_TCON_MASK           (1 << RTC_TCON_SHIFT)
+#define RTC_TIME_EN_SHIFT       3
+#define RTC_TIME_EN_MASK        (1 << RTC_TIME_EN_SHIFT)
+
+/* RTC Hour register */
+#define HOUR_PM_SHIFT           6
+#define HOUR_PM_MASK            (1 << HOUR_PM_SHIFT)
+/* RTC Alarm Enable */
+#define ALARM_ENABLE_SHIFT      7
+#define ALARM_ENABLE_MASK       (1 << ALARM_ENABLE_SHIFT)
+
+#define SMPL_ENABLE_SHIFT       7
+#define SMPL_ENABLE_MASK        (1 << SMPL_ENABLE_SHIFT)
+
+#define WTSR_ENABLE_SHIFT       6
+#define WTSR_ENABLE_MASK        (1 << WTSR_ENABLE_SHIFT)
+
+enum {
+        RTC_SEC = 0,
+        RTC_MIN,
+        RTC_HOUR,
+        RTC_WEEKDAY,
+        RTC_DATE,
+        RTC_MONTH,
+        RTC_YEAR1,
+        RTC_YEAR2,
+};
+
+#endif /*  __LINUX_MFD_S5M_RTC_H */
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 18eea056b47..16b0785f367 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -870,6 +870,7 @@ extern bool skip_free_areas_node(unsigned int flags, int nid);
 
 int shmem_lock(struct file *file, int lock, struct user_struct *user);
 struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags);
+void shmem_set_file(struct vm_area_struct *vma, struct file *file);
 int shmem_zero_setup(struct vm_area_struct *);
 
 extern int can_do_mlock(void);
@@ -995,6 +996,9 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
                         struct page **pages);
 struct page *get_dump_page(unsigned long addr);
 
+extern int fixup_user_fault(struct task_struct *tsk, struct mm_struct *mm,
+                        unsigned long address, unsigned int fault_flags);
+
 extern int try_to_release_page(struct page * page, gfp_t gfp_mask);
 extern void do_invalidatepage(struct page *page, unsigned long offset);
 
@@ -1468,7 +1472,7 @@ int write_one_page(struct page *page, int wait);
 void task_dirty_inc(struct task_struct *tsk);
 
 /* readahead.c */
-#define VM_MAX_READAHEAD        128     /* kbytes */
+#define VM_MAX_READAHEAD        2048    /* kbytes */
 #define VM_MIN_READAHEAD        16      /* kbytes (includes current page) */
 
 int force_page_cache_readahead(struct address_space *mapping, struct file *filp,
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 6ad43554ac0..6ca73e329bd 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -50,8 +50,16 @@ struct mmc_ext_csd {
         u8                      rel_sectors;
         u8                      rel_param;
         u8                      part_config;
+        u8                      boot_part_prot;
+        u8                      rst_n_function;
+        u8                      cache_ctrl;
+        u8                      max_packed_writes;
+        u8                      max_packed_reads;
+        u8                      packed_event_en;
         unsigned int            part_time;              /* Units: ms */
         unsigned int            sa_timeout;             /* Units: 100ns */
+        unsigned int            generic_cmd6_time;      /* Units: 10ms */
+        unsigned int            power_off_longtime;     /* Units: ms */
         unsigned int            hs_max_dtr;
         unsigned int            sectors;
         unsigned int            card_type;
@@ -64,10 +72,15 @@ struct mmc_ext_csd {
         unsigned long long      enhanced_area_offset;   /* Units: Byte */
         unsigned int            enhanced_area_size;     /* Units: KB */
         unsigned int            boot_size;              /* in bytes */
+        unsigned int            cache_size;             /* Units: KB */
+        bool                    hpi_en;                 /* HPI enablebit */
+        bool                    hpi;                    /* HPI support bit */
+        unsigned int            hpi_cmd;                /* cmd used as HPI */
         u8                      raw_partition_support;  /* 160 */
         u8                      raw_erased_mem_count;   /* 181 */
         u8                      raw_ext_csd_structure;  /* 194 */
         u8                      raw_card_type;          /* 196 */
+        u8                      out_of_int_time;        /* 198 */
         u8                      raw_s_a_timeout;                /* 217 */
         u8                      raw_hc_erase_gap_size;  /* 221 */
         u8                      raw_erase_timeout_mult; /* 223 */
@@ -77,6 +90,9 @@ struct mmc_ext_csd {
         u8                      raw_sec_feature_support;/* 231 */
         u8                      raw_trim_mult;          /* 232 */
         u8                      raw_sectors[4];         /* 212 - 4 bytes */
+
+        unsigned int            feature_support;
+#define MMC_DISCARD_FEATURE     BIT(0)                  /* CMD38 feature */
 };
 
 struct sd_scr {
@@ -177,6 +193,8 @@ struct mmc_card {
 #define MMC_STATE_HIGHSPEED_DDR (1<<4)          /* card is in high speed mode */
 #define MMC_STATE_ULTRAHIGHSPEED (1<<5)         /* card is in ultra high speed mode */
 #define MMC_CARD_SDXC           (1<<6)          /* card is SDXC */
+#define MMC_CARD_REMOVED        (1<<7)          /* card has been removed */
+#define MMC_STATE_HIGHSPEED_200 (1<<8)          /* card is in HS200 mode */
         unsigned int            quirks;         /* card quirks */
 #define MMC_QUIRK_LENIENT_FN0   (1<<0)          /* allow SDIO FN0 writes outside of the VS CCCR range */
 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)    /* use func->cur_blksize */
@@ -189,6 +207,12 @@ struct mmc_card {
 #define MMC_QUIRK_INAND_CMD38   (1<<6)          /* iNAND devices have broken CMD38 */
 #define MMC_QUIRK_BLK_NO_CMD23  (1<<7)          /* Avoid CMD23 for regular multiblock */
 
+        unsigned int    poweroff_notify_state;  /* eMMC4.5 notify feature */
+#define MMC_NO_POWER_NOTIFICATION       0
+#define MMC_POWERED_ON                  1
+#define MMC_POWEROFF_SHORT              2
+#define MMC_POWEROFF_LONG               3
+
         unsigned int            erase_size;     /* erase size in sectors */
         unsigned int            erase_shift;    /* if erase unit is power 2 */
         unsigned int            pref_erase;     /* in sectors */
@@ -310,18 +334,24 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
 #define mmc_card_present(c)     ((c)->state & MMC_STATE_PRESENT)
 #define mmc_card_readonly(c)    ((c)->state & MMC_STATE_READONLY)
 #define mmc_card_highspeed(c)   ((c)->state & MMC_STATE_HIGHSPEED)
+#define mmc_card_hs200(c)       ((c)->state & MMC_STATE_HIGHSPEED_200)
 #define mmc_card_blockaddr(c)   ((c)->state & MMC_STATE_BLOCKADDR)
 #define mmc_card_ddr_mode(c)    ((c)->state & MMC_STATE_HIGHSPEED_DDR)
-#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
+#define mmc_card_uhs(c)         ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
+#define mmc_sd_card_uhs(c)      ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
 #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
+#define mmc_card_removed(c)     ((c) && ((c)->state & MMC_CARD_REMOVED))
 
 #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
 #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
 #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
+#define mmc_card_set_hs200(c)   ((c)->state |= MMC_STATE_HIGHSPEED_200)
 #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
 #define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
+#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
 #define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
 #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
+#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
 
 /*
  * Quirk add/remove for MMC products.
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index b6718e549a5..3d055c36e6a 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -18,6 +18,8 @@ struct mmc_request;
 struct mmc_command {
         u32                     opcode;
         u32                     arg;
+#define MMC_CMD23_ARG_REL_WR    (1 << 31)
+#define MMC_CMD23_ARG_PACKED    ((0 << 31) | (1 << 30))
         u32                     resp[4];
         unsigned int            flags;          /* expected response type */
 #define MMC_RSP_PRESENT (1 << 0)
@@ -117,6 +119,7 @@ struct mmc_data {
 
         unsigned int            sg_len;         /* size of scatter list */
         struct scatterlist      *sg;            /* I/O scatter list */
+        s32                     host_cookie;    /* host private data */
 };
 
 struct mmc_request {
@@ -125,23 +128,29 @@ struct mmc_request {
         struct mmc_data         *data;
         struct mmc_command      *stop;
 
-        void                    *done_data;     /* completion data */
+        struct completion       completion;
         void                    (*done)(struct mmc_request *);/* completion function */
 };
 
 struct mmc_host;
 struct mmc_card;
+struct mmc_async_req;
 
+extern struct mmc_async_req *mmc_start_req(struct mmc_host *,
+                                           struct mmc_async_req *, int *);
+extern int mmc_interrupt_hpi(struct mmc_card *);
 extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
 extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
 extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *);
 extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
         struct mmc_command *, int);
 extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
+extern int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd);
 
 #define MMC_ERASE_ARG           0x00000000
 #define MMC_SECURE_ERASE_ARG    0x80000000
 #define MMC_TRIM_ARG            0x00000001
+#define MMC_DISCARD_ARG         0x00000003
 #define MMC_SECURE_TRIM1_ARG    0x80000001
 #define MMC_SECURE_TRIM2_ARG    0x80008000
 
@@ -152,11 +161,17 @@ extern int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr,
                      unsigned int arg);
 extern int mmc_can_erase(struct mmc_card *card);
 extern int mmc_can_trim(struct mmc_card *card);
+extern int mmc_can_discard(struct mmc_card *card);
+extern int mmc_can_sanitize(struct mmc_card *card);
 extern int mmc_can_secure_erase_trim(struct mmc_card *card);
 extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from,
                                    unsigned int nr);
+extern unsigned int mmc_calc_max_discard(struct mmc_card *card);
 
 extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
+extern int mmc_hw_reset(struct mmc_host *host);
+extern int mmc_hw_reset_check(struct mmc_host *host);
+extern int mmc_can_reset(struct mmc_card *card);
 
 extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
 extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
@@ -166,6 +181,10 @@ extern void mmc_release_host(struct mmc_host *host);
 extern void mmc_do_release_host(struct mmc_host *host);
 extern int mmc_try_claim_host(struct mmc_host *host);
 
+extern int mmc_flush_cache(struct mmc_card *);
+
+extern int mmc_detect_card_removed(struct mmc_host *host);
+
 /**
  *      mmc_claim_host - exclusively claim a host
  *      @host: mmc host to claim
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index bdd7ceeb99e..99df3199ccb 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -14,6 +14,8 @@
 #ifndef _LINUX_MMC_DW_MMC_H_
 #define _LINUX_MMC_DW_MMC_H_
 
+#include <linux/scatterlist.h>
+
 #define MAX_MCI_SLOTS   2
 
 enum dw_mci_state {
@@ -35,6 +37,11 @@ enum {
 
 struct mmc_data;
 
+struct dw_mci_next {
+        unsigned int    sg_len;
+        s32             cookie;
+};
+
 /**
  * struct dw_mci - MMC controller state shared between all slots
  * @lock: Spinlock protecting the queue and associated data.
@@ -74,6 +81,7 @@ struct mmc_data;
  * @pdev: Platform device associated with the MMC controller.
  * @pdata: Platform data associated with the MMC controller.
  * @slot: Slots sharing this MMC controller.
+ * @fifo_depth: depth of FIFO.
  * @data_shift: log2 of FIFO item size.
  * @push_data: Pointer to FIFO push function.
  * @pull_data: Pointer to FIFO pull function.
@@ -108,19 +116,24 @@ struct dw_mci {
         void __iomem            *regs;
 
         struct scatterlist      *sg;
-        unsigned int            pio_offset;
+        struct sg_mapping_iter  sg_miter;
 
         struct dw_mci_slot      *cur_slot;
         struct mmc_request      *mrq;
         struct mmc_command      *cmd;
         struct mmc_data         *data;
+        struct clk          *hclk;
+        struct clk          *cclk;
+        bool                    prv_err;
 
         /* DMA interface members*/
         int                     use_dma;
+        int                     using_dma;
 
         dma_addr_t              sg_dma;
         void                    *sg_cpu;
         struct dw_mci_dma_ops   *dma_ops;
+        unsigned int            buf_size;
 #ifdef CONFIG_MMC_DW_IDMAC
         unsigned int            ring_size;
 #else
@@ -141,11 +154,14 @@ struct dw_mci {
         u32                     current_speed;
         u32                     num_slots;
         u32                     fifoth_val;
+        u16                     verid;
+        u16                     data_offset;
         struct platform_device  *pdev;
         struct dw_mci_board     *pdata;
         struct dw_mci_slot      *slot[MAX_MCI_SLOTS];
 
         /* FIFO push and pull */
+        int                     fifo_depth;
         int                     data_shift;
         void (*push_data)(struct dw_mci *host, void *buf, int cnt);
         void (*pull_data)(struct dw_mci *host, void *buf, int cnt);
@@ -154,6 +170,7 @@ struct dw_mci {
         u32                     quirks;
 
         struct regulator        *vmmc;  /* Power regulator */
+        struct dw_mci_next      next_data;
 };
 
 /* DMA ops for Internal/External DMAC interface */
@@ -177,6 +194,13 @@ struct dw_mci_dma_ops {
 /* Unreliable card detection */
 #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION      BIT(3)
 
+enum dw_mci_cd_types {
+        DW_MCI_CD_INTERNAL,  /* use mmc internal CD line */
+        DW_MCI_CD_EXTERNAL,  /* use external callback */
+        DW_MCI_CD_GPIO,      /* use external gpio pin for CD line */
+        DW_MCI_CD_NONE,      /* no CD line, use polling to detect card */
+        DW_MCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
+};
 
 struct dma_pdata;
 
@@ -196,15 +220,49 @@ struct dw_mci_board {
         unsigned int bus_hz; /* Bus speed */
 
         unsigned int caps;      /* Capabilities */
+        unsigned int caps2;     /* More capabilities */
+        /*
+         * Override fifo depth. If 0, autodetect it from the FIFOTH register,
+         * but note that this may not be reliable after a bootloader has used
+         * it.
+         */
+        unsigned int fifo_depth;
+
+        unsigned int buf_size;  /* Buffer size */
 
         /* delay in mS before detecting cards after interrupt */
         u32 detect_delay_ms;
 
+        char *hclk_name;
+        char *cclk_name;
+
         int (*init)(u32 slot_id, irq_handler_t , void *);
         int (*get_ro)(u32 slot_id);
         int (*get_cd)(u32 slot_id);
         int (*get_ocr)(u32 slot_id);
         int (*get_bus_wd)(u32 slot_id);
+        void (*cfg_gpio)(int width);
+        void (*set_io_timing)(void *data, unsigned char timing);
+
+        /* Phase Shift Value */
+        unsigned int sdr_timing;
+        unsigned int ddr_timing;
+
+        /* cd_type: Type of Card Detection method (see cd_types enum above) */
+
+        enum dw_mci_cd_types cd_type;
+
+        /* ext_cd_cleanup: Cleanup external card detect subsystem.
+         * ext_cd_init: Initialize external card detect subsystem.
+         *              notify_func argument is a callback to the dwmci driver
+         *              that triggers the card detection event. Callback arguments:
+         *              dev is pointer to platform device of the host controller,
+         *              state is new state of the card (0 - removed, 1 - inserted).
+         */
+
+        int (*ext_cd_init)(void (*notify_func)(struct platform_device *, int state));
+        int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *,int state));
+
         /*
          * Enable power to selected slot and set voltage to desired level.
          * Voltage levels are specified using MMC_VDD_xxx defines defined
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f8d1e741d80..56d81029b48 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -12,6 +12,7 @@
 
 #include <linux/leds.h>
 #include <linux/sched.h>
+#include <linux/wakelock.h>
 
 #include <linux/mmc/core.h>
 #include <linux/mmc/pm.h>
@@ -55,12 +56,15 @@ struct mmc_ios {
 #define MMC_TIMING_UHS_SDR50    3
 #define MMC_TIMING_UHS_SDR104   4
 #define MMC_TIMING_UHS_DDR50    5
+#define MMC_TIMING_MMC_HS200    6
 
         unsigned char   ddr;                    /* dual data rate used */
 
 #define MMC_SDR_MODE            0
 #define MMC_1_2V_DDR_MODE       1
 #define MMC_1_8V_DDR_MODE       2
+#define MMC_1_2V_SDR_MODE       3
+#define MMC_1_8V_SDR_MODE       4
 
         unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
 
@@ -106,6 +110,15 @@ struct mmc_host_ops {
          */
         int (*enable)(struct mmc_host *host);
         int (*disable)(struct mmc_host *host, int lazy);
+        /*
+         * It is optional for the host to implement pre_req and post_req in
+         * order to support double buffering of requests (prepare one
+         * request while another request is active).
+         */
+        void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
+                            int err);
+        void    (*pre_req)(struct mmc_host *host, struct mmc_request *req,
+                           bool is_first_req);
         void    (*request)(struct mmc_host *host, struct mmc_request *req);
         /*
          * Avoid calling these three functions too often or in a "fast path",
@@ -137,13 +150,27 @@ struct mmc_host_ops {
         void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 
         int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
-        int     (*execute_tuning)(struct mmc_host *host);
+
+        /* The tuning command opcode value is different for SD and eMMC cards */
+        int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
         void    (*enable_preset_value)(struct mmc_host *host, bool enable);
+        int     (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
+        void    (*hw_reset)(struct mmc_host *host);
 };
 
 struct mmc_card;
 struct device;
 
+struct mmc_async_req {
+        /* active mmc request */
+        struct mmc_request      *mrq;
+        /*
+         * Check error status of completed mmc request.
+         * Returns 0 if success otherwise non zero.
+         */
+        int (*err_check) (struct mmc_card *, struct mmc_async_req *);
+};
+
 struct mmc_host {
         struct device           *parent;
         struct device           class_dev;
@@ -211,17 +238,40 @@ struct mmc_host {
 #define MMC_CAP_MAX_CURRENT_600 (1 << 28)       /* Host max current limit is 600mA */
 #define MMC_CAP_MAX_CURRENT_800 (1 << 29)       /* Host max current limit is 800mA */
 #define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
+#define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
+
+        unsigned int            caps2;          /* More host capabilities */
+
+#define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
+#define MMC_CAP2_CACHE_CTRL     (1 << 1)        /* Allow cache control */
+#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2)       /* Notify poweroff supported */
+#define MMC_CAP2_PACKED_RD      (1 << 3)        /* Allow packed read */
+#define MMC_CAP2_PACKED_WR      (1 << 4)        /* Allow packed write */
+#define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
+                                 MMC_CAP2_PACKED_WR) /* Allow packed commands */
+#define MMC_CAP2_NO_MULTI_READ  (1 << 5)        /* Multiblock reads don't work */
+#define MMC_CAP2_NO_SLEEP_CMD   (1 << 6)        /* Don't allow sleep command */
+#define MMC_CAP2_HS200_1_8V_SDR (1 << 7)        /* can support */
+#define MMC_CAP2_HS200_1_2V_SDR (1 << 8)        /* can support */
+#define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
+                                 MMC_CAP2_HS200_1_2V_SDR)
 
         mmc_pm_flag_t           pm_caps;        /* supported pm features */
+        unsigned int        power_notify_type;
+#define MMC_HOST_PW_NOTIFY_NONE         0
+#define MMC_HOST_PW_NOTIFY_SHORT        1
+#define MMC_HOST_PW_NOTIFY_LONG         2
 
 #ifdef CONFIG_MMC_CLKGATE
         int                     clk_requests;   /* internal reference counter */
         unsigned int            clk_delay;      /* number of MCI clk hold cycles */
         bool                    clk_gated;      /* clock gated */
-        struct work_struct      clk_gate_work; /* delayed clock gate */
+        struct delayed_work     clk_gate_work; /* delayed clock gate */
         unsigned int            clk_old;        /* old clock value cache */
         spinlock_t              clk_lock;       /* lock for clk fields */
         struct mutex            clk_gate_mutex; /* mutex for clock gating */
+        struct device_attribute clkgate_delay_attr;
+        unsigned long           clkgate_delay;
 #endif
 
         /* host specific block data */
@@ -231,6 +281,7 @@ struct mmc_host {
         unsigned int            max_req_size;   /* maximum number of bytes in one req */
         unsigned int            max_blk_size;   /* maximum size of one mmc block */
         unsigned int            max_blk_count;  /* maximum number of blocks in one req */
+        unsigned int            max_discard_to; /* max. discard timeout in ms */
 
         /* private data */
         spinlock_t              lock;           /* lock for claim and bus ops */
@@ -245,6 +296,22 @@ struct mmc_host {
 #ifdef CONFIG_MMC_DEBUG
         unsigned int            removed:1;      /* host is being removed */
 #endif
+        unsigned int            state;          /* card slot state for SD */
+#define MMC_SD_STATE_PRESENT    (1<<0)          /* present state for SD */
+#define MMC_SD_INIT_STATUS      (1<<1)          /* present state for SD */
+#define MMC_SD_PREV_STATUS      (1<<2)          /* present state for SD */
+
+#define mmc_host_sd_present(h)          ((h)->state & MMC_SD_STATE_PRESENT)
+#define mmc_host_sd_set_present(h)      ((h)->state |= MMC_SD_STATE_PRESENT)
+#define mmc_host_sd_clear_present(h)    ((h)->state &= ~MMC_SD_STATE_PRESENT)
+
+#define mmc_host_sd_init_stat(h)        ((h)->state & MMC_SD_INIT_STATUS)
+#define mmc_host_sd_set_init_stat(h)    ((h)->state |= MMC_SD_INIT_STATUS)
+#define mmc_host_sd_clear_init_stat(h)  ((h)->state &= ~MMC_SD_INIT_STATUS)
+
+#define mmc_host_sd_prev_stat(h)        ((h)->state & MMC_SD_PREV_STATUS)
+#define mmc_host_sd_set_prev_stat(h)    ((h)->state |= MMC_SD_PREV_STATUS)
+#define mmc_host_sd_clear_prev_stat(h)  ((h)->state &= ~MMC_SD_PREV_STATUS)
 
         /* Only used with MMC_CAP_DISABLE */
         int                     enabled;        /* host is enabled */
@@ -261,10 +328,16 @@ struct mmc_host {
         int                     claim_cnt;      /* "claim" nesting count */
 
         struct delayed_work     detect;
+        int                     detect_change;  /* card detect flag */
+        struct wake_lock        detect_wake_lock;
 
         const struct mmc_bus_ops *bus_ops;      /* current bus driver */
         unsigned int            bus_refs;       /* reference counter */
 
+        unsigned int            bus_resume_flags;
+#define MMC_BUSRESUME_MANUAL_RESUME     (1 << 0)
+#define MMC_BUSRESUME_NEEDS_RESUME      (1 << 1)
+
         unsigned int            sdio_irqs;
         struct task_struct      *sdio_irq_thread;
         bool                    sdio_irq_pending;
@@ -282,6 +355,17 @@ struct mmc_host {
 
         struct dentry           *debugfs_root;
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+        struct {
+                struct sdio_cis                 *cis;
+                struct sdio_cccr                *cccr;
+                struct sdio_embedded_func       *funcs;
+                int                             num_funcs;
+        } embedded_sdio_data;
+#endif
+
+        struct mmc_async_req    *areq;          /* active async req */
+
         unsigned long           private[0] ____cacheline_aligned;
 };
 
@@ -290,6 +374,14 @@ extern int mmc_add_host(struct mmc_host *);
 extern void mmc_remove_host(struct mmc_host *);
 extern void mmc_free_host(struct mmc_host *);
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+extern void mmc_set_embedded_sdio_data(struct mmc_host *host,
+                                       struct sdio_cis *cis,
+                                       struct sdio_cccr *cccr,
+                                       struct sdio_embedded_func *funcs,
+                                       int num_funcs);
+#endif
+
 static inline void *mmc_priv(struct mmc_host *host)
 {
         return (void *)host->private;
@@ -300,6 +392,18 @@ static inline void *mmc_priv(struct mmc_host *host)
 #define mmc_dev(x)      ((x)->parent)
 #define mmc_classdev(x) (&(x)->class_dev)
 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
+#define mmc_bus_needs_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_NEEDS_RESUME)
+#define mmc_bus_manual_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_MANUAL_RESUME)
+
+static inline void mmc_set_bus_resume_policy(struct mmc_host *host, int manual)
+{
+        if (manual)
+                host->bus_resume_flags |= MMC_BUSRESUME_MANUAL_RESUME;
+        else
+                host->bus_resume_flags &= ~MMC_BUSRESUME_MANUAL_RESUME;
+}
+
+extern int mmc_resume_bus(struct mmc_host *host);
 
 extern int mmc_suspend_host(struct mmc_host *);
 extern int mmc_resume_host(struct mmc_host *);
@@ -310,6 +414,8 @@ extern int mmc_power_restore_host(struct mmc_host *host);
 extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
 extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
 
+extern int mmc_cache_ctrl(struct mmc_host *, u8);
+
 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 {
         host->ops->enable_sdio_irq(host, 0);
@@ -375,5 +481,29 @@ static inline int mmc_host_cmd23(struct mmc_host *host)
 {
         return host->caps & MMC_CAP_CMD23;
 }
-#endif
 
+static inline int mmc_boot_partition_access(struct mmc_host *host)
+{
+        return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
+}
+
+#ifdef CONFIG_MMC_CLKGATE
+void mmc_host_clk_hold(struct mmc_host *host);
+void mmc_host_clk_release(struct mmc_host *host);
+unsigned int mmc_host_clk_rate(struct mmc_host *host);
+
+#else
+static inline void mmc_host_clk_hold(struct mmc_host *host)
+{
+}
+
+static inline void mmc_host_clk_release(struct mmc_host *host)
+{
+}
+
+static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
+{
+        return host->ios.clock;
+}
+#endif
+#endif /* LINUX_MMC_HOST_H */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index ac26a685cca..df020caf560 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -51,6 +51,7 @@
 #define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
 #define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
 #define MMC_SEND_TUNING_BLOCK    19   /* adtc                    R1  */
+#define MMC_SEND_TUNING_BLOCK_HS200     21      /* adtc R1  */
 
   /* class 3 */
 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
@@ -138,8 +139,19 @@ static inline bool mmc_op_multi(u32 opcode)
 #define R1_CURRENT_STATE(x)     ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
 #define R1_READY_FOR_DATA       (1 << 8)        /* sx, a */
 #define R1_SWITCH_ERROR         (1 << 7)        /* sx, c */
+#define R1_EXP_EVENT            (1 << 6)        /* sr, a */
 #define R1_APP_CMD              (1 << 5)        /* sr, c */
 
+#define R1_STATE_IDLE   0
+#define R1_STATE_READY  1
+#define R1_STATE_IDENT  2
+#define R1_STATE_STBY   3
+#define R1_STATE_TRAN   4
+#define R1_STATE_DATA   5
+#define R1_STATE_RCV    6
+#define R1_STATE_PRG    7
+#define R1_STATE_DIS    8
+
 /*
  * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
  * R1 is the low order byte; R2 is the next highest byte, when present.
@@ -260,18 +272,35 @@ struct _mmc_csd {
  * EXT_CSD fields
  */
 
+#define EXT_CSD_FLUSH_CACHE             32      /* W */
+#define EXT_CSD_CACHE_CTRL              33      /* R/W */
+#define EXT_CSD_POWER_OFF_NOTIFICATION  34      /* R/W */
+#define EXT_CSD_PACKED_FAILURE_INDEX    35      /* RO */
+#define EXT_CSD_PACKED_CMD_STATUS       36      /* RO */
+#define EXT_CSD_EXP_EVENTS_STATUS       54      /* RO, 2 bytes */
+#define EXT_CSD_EXP_EVENTS_CTRL         56      /* R/W, 2 bytes */
 #define EXT_CSD_PARTITION_ATTRIBUTE     156     /* R/W */
 #define EXT_CSD_PARTITION_SUPPORT       160     /* RO */
+#define EXT_CSD_HPI_MGMT                161     /* R/W */
+#define EXT_CSD_RST_N_FUNCTION          162     /* R/W */
+#define EXT_CSD_SANITIZE_START          165     /* W */
 #define EXT_CSD_WR_REL_PARAM            166     /* RO */
 #define EXT_CSD_ERASE_GROUP_DEF         175     /* R/W */
+#define EXT_CSD_BOOT_CONFIG_PROT        178     /* R/W */
 #define EXT_CSD_PART_CONFIG             179     /* R/W */
 #define EXT_CSD_ERASED_MEM_CONT         181     /* RO */
 #define EXT_CSD_BUS_WIDTH               183     /* R/W */
 #define EXT_CSD_HS_TIMING               185     /* R/W */
+#define EXT_CSD_POWER_CLASS             187     /* R/W */
 #define EXT_CSD_REV                     192     /* RO */
 #define EXT_CSD_STRUCTURE               194     /* RO */
 #define EXT_CSD_CARD_TYPE               196     /* RO */
+#define EXT_CSD_OUT_OF_INTERRUPT_TIME   198     /* RO */
 #define EXT_CSD_PART_SWITCH_TIME        199     /* RO */
+#define EXT_CSD_PWR_CL_52_195           200     /* RO */
+#define EXT_CSD_PWR_CL_26_195           201     /* RO */
+#define EXT_CSD_PWR_CL_52_360           202     /* RO */
+#define EXT_CSD_PWR_CL_26_360           203     /* RO */
 #define EXT_CSD_SEC_CNT                 212     /* RO, 4 bytes */
 #define EXT_CSD_S_A_TIMEOUT             217     /* RO */
 #define EXT_CSD_REL_WR_SEC_C            222     /* RO */
@@ -283,6 +312,16 @@ struct _mmc_csd {
 #define EXT_CSD_SEC_ERASE_MULT          230     /* RO */
 #define EXT_CSD_SEC_FEATURE_SUPPORT     231     /* RO */
 #define EXT_CSD_TRIM_MULT               232     /* RO */
+#define EXT_CSD_PWR_CL_200_195          236     /* RO */
+#define EXT_CSD_PWR_CL_200_360          237     /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_195       238     /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_360       239     /* RO */
+#define EXT_CSD_POWER_OFF_LONG_TIME     247     /* RO */
+#define EXT_CSD_GENERIC_CMD6_TIME       248     /* RO */
+#define EXT_CSD_CACHE_SIZE              249     /* RO, 4 bytes */
+#define EXT_CSD_MAX_PACKED_WRITES       500     /* RO */
+#define EXT_CSD_MAX_PACKED_READS        501     /* RO */
+#define EXT_CSD_HPI_FEATURES            503     /* RO */
 
 /*
  * EXT_CSD field definitions
@@ -300,13 +339,76 @@ struct _mmc_csd {
 
 #define EXT_CSD_CARD_TYPE_26    (1<<0)  /* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52    (1<<1)  /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_MASK  0xF     /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_MASK  0x3F    /* Mask out reserved bits */
 #define EXT_CSD_CARD_TYPE_DDR_1_8V  (1<<2)   /* Card can run at 52MHz */
                                              /* DDR mode @1.8V or 3V I/O */
 #define EXT_CSD_CARD_TYPE_DDR_1_2V  (1<<3)   /* Card can run at 52MHz */
                                              /* DDR mode @1.2V I/O */
 #define EXT_CSD_CARD_TYPE_DDR_52       (EXT_CSD_CARD_TYPE_DDR_1_8V  \
                                         | EXT_CSD_CARD_TYPE_DDR_1_2V)
+#define EXT_CSD_CARD_TYPE_SDR_1_8V      (1<<4)  /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_SDR_1_2V      (1<<5)  /* Card can run at 200MHz */
+                                                /* SDR mode @1.2V I/O */
+
+#define EXT_CSD_CARD_TYPE_SDR_200       (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+                                         EXT_CSD_CARD_TYPE_SDR_1_2V)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL       (EXT_CSD_CARD_TYPE_SDR_200 | \
+                                         EXT_CSD_CARD_TYPE_52 | \
+                                         EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_ALL  (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+                                         EXT_CSD_CARD_TYPE_52 | \
+                                         EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_ALL  (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+                                         EXT_CSD_CARD_TYPE_52 | \
+                                         EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V     (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V     (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V     (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V     (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52       (EXT_CSD_CARD_TYPE_SDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_52 | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52       (EXT_CSD_CARD_TYPE_SDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_DDR_52 | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V      (EXT_CSD_CARD_TYPE_SDR_200 | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_8V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V      (EXT_CSD_CARD_TYPE_SDR_200 | \
+                                                 EXT_CSD_CARD_TYPE_DDR_1_2V | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
+
+#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52        (EXT_CSD_CARD_TYPE_SDR_200 | \
+                                                 EXT_CSD_CARD_TYPE_DDR_52 | \
+                                                 EXT_CSD_CARD_TYPE_52 | \
+                                                 EXT_CSD_CARD_TYPE_26)
 
 #define EXT_CSD_BUS_WIDTH_1     0       /* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4     1       /* Card is in 4 bit mode */
@@ -317,6 +419,27 @@ struct _mmc_csd {
 #define EXT_CSD_SEC_ER_EN       BIT(0)
 #define EXT_CSD_SEC_BD_BLK_EN   BIT(2)
 #define EXT_CSD_SEC_GB_CL_EN    BIT(4)
+#define EXT_CSD_SEC_SANITIZE    BIT(6)  /* v4.5 only */
+
+#define EXT_CSD_RST_N_EN_MASK   0x3
+#define EXT_CSD_RST_N_ENABLED   1       /* RST_n is enabled on card */
+
+#define EXT_CSD_NO_POWER_NOTIFICATION   0
+#define EXT_CSD_POWER_ON                1
+#define EXT_CSD_POWER_OFF_SHORT         2
+#define EXT_CSD_POWER_OFF_LONG          3
+
+#define EXT_CSD_PWR_CL_8BIT_MASK        0xF0    /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_4BIT_MASK        0x0F    /* 8 bit PWR CLS */
+#define EXT_CSD_PWR_CL_8BIT_SHIFT       4
+#define EXT_CSD_PWR_CL_4BIT_SHIFT       0
+
+#define EXT_CSD_PACKED_EVENT_EN (1 << 3)
+
+#define EXT_CSD_PACKED_FAILURE  (1 << 3)
+
+#define EXT_CSD_PACKED_GENERIC_ERROR    (1 << 0)
+#define EXT_CSD_PACKED_INDEXED_ERROR    (1 << 1)
 
 /*
  * MMC_SWITCH access modes
diff --git a/include/linux/mmc/pm.h b/include/linux/mmc/pm.h
index d37aac49cf9..66ac136c638 100644
--- a/include/linux/mmc/pm.h
+++ b/include/linux/mmc/pm.h
@@ -26,5 +26,9 @@ typedef unsigned int mmc_pm_flag_t;
 
 #define MMC_PM_KEEP_POWER       (1 << 0)        /* preserve card power during suspend */
 #define MMC_PM_WAKE_SDIO_IRQ    (1 << 1)        /* wake up host system on SDIO IRQ assertion */
+#define MMC_PM_IGNORE_PM_NOTIFY (1 << 2)        /* ignore mmc pm notify */
+
+/* ignore mmc suspend.resume for BCM WIFI */
+#define MMC_PM_IGNORE_SUSPEND_RESUME    (1 << 30)
 
 #endif
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 6a68c4eb4e4..636c932166b 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -94,6 +94,7 @@ struct sdhci_host {
         const struct sdhci_ops *ops;    /* Low level hw interface */
 
         struct regulator *vmmc; /* Power regulator */
+        char *vmmc_name;        /* Power regulator's name */
 
         /* Internal data */
         struct mmc_host *mmc;   /* MMC structure */
diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h
index 245cdacee54..c83115efea9 100644
--- a/include/linux/mmc/sdio.h
+++ b/include/linux/mmc/sdio.h
@@ -38,6 +38,7 @@
  *      [8:0] Byte/block count
  */
 
+#define R4_18V_PRESENT (1<<24)
 #define R4_MEMORY_PRESENT (1 << 27)
 
 /*
@@ -72,17 +73,20 @@
 #define  SDIO_CCCR_REV_1_00     0       /* CCCR/FBR Version 1.00 */
 #define  SDIO_CCCR_REV_1_10     1       /* CCCR/FBR Version 1.10 */
 #define  SDIO_CCCR_REV_1_20     2       /* CCCR/FBR Version 1.20 */
+#define  SDIO_CCCR_REV_3_00     3       /* CCCR/FBR Version 3.00 */
 
 #define  SDIO_SDIO_REV_1_00     0       /* SDIO Spec Version 1.00 */
 #define  SDIO_SDIO_REV_1_10     1       /* SDIO Spec Version 1.10 */
 #define  SDIO_SDIO_REV_1_20     2       /* SDIO Spec Version 1.20 */
 #define  SDIO_SDIO_REV_2_00     3       /* SDIO Spec Version 2.00 */
+#define  SDIO_SDIO_REV_3_00     4       /* SDIO Spec Version 3.00 */
 
 #define SDIO_CCCR_SD            0x01
 
 #define  SDIO_SD_REV_1_01       0       /* SD Physical Spec Version 1.01 */
 #define  SDIO_SD_REV_1_10       1       /* SD Physical Spec Version 1.10 */
 #define  SDIO_SD_REV_2_00       2       /* SD Physical Spec Version 2.00 */
+#define  SDIO_SD_REV_3_00       3       /* SD Physical Spev Version 3.00 */
 
 #define SDIO_CCCR_IOEx          0x02
 #define SDIO_CCCR_IORx          0x03
@@ -132,8 +136,31 @@
 #define SDIO_CCCR_SPEED         0x13
 
 #define  SDIO_SPEED_SHS         0x01    /* Supports High-Speed mode */
-#define  SDIO_SPEED_EHS         0x02    /* Enable High-Speed mode */
-
+#define  SDIO_SPEED_BSS_SHIFT   1
+#define  SDIO_SPEED_BSS_MASK    (7<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_SDR12       (0<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_SDR25       (1<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_SDR50       (2<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_SDR104      (3<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_DDR50       (4<<SDIO_SPEED_BSS_SHIFT)
+#define  SDIO_SPEED_EHS         SDIO_SPEED_SDR25        /* Enable High-Speed */
+
+#define SDIO_CCCR_UHS           0x14
+#define  SDIO_UHS_SDR50         0x01
+#define  SDIO_UHS_SDR104        0x02
+#define  SDIO_UHS_DDR50         0x04
+
+#define SDIO_CCCR_DRIVE_STRENGTH 0x15
+#define  SDIO_SDTx_MASK         0x07
+#define  SDIO_DRIVE_SDTA        (1<<0)
+#define  SDIO_DRIVE_SDTC        (1<<1)
+#define  SDIO_DRIVE_SDTD        (1<<2)
+#define  SDIO_DRIVE_DTSx_MASK   0x03
+#define  SDIO_DRIVE_DTSx_SHIFT  4
+#define  SDIO_DTSx_SET_TYPE_B   (0 << SDIO_DRIVE_DTSx_SHIFT)
+#define  SDIO_DTSx_SET_TYPE_A   (1 << SDIO_DRIVE_DTSx_SHIFT)
+#define  SDIO_DTSx_SET_TYPE_C   (2 << SDIO_DRIVE_DTSx_SHIFT)
+#define  SDIO_DTSx_SET_TYPE_D   (3 << SDIO_DRIVE_DTSx_SHIFT)
 /*
  * Function Basic Registers (FBR)
  */
diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h
index 31baaf82f45..557acae8cf9 100644
--- a/include/linux/mmc/sdio_func.h
+++ b/include/linux/mmc/sdio_func.h
@@ -23,6 +23,14 @@ struct sdio_func;
 typedef void (sdio_irq_handler_t)(struct sdio_func *);
 
 /*
+ * Structure used to hold embedded SDIO device data from platform layer
+ */
+struct sdio_embedded_func {
+        uint8_t f_class;
+        uint32_t f_maxblksize;
+};
+
+/*
  * SDIO function CIS tuple (unknown to the core)
  */
 struct sdio_func_tuple {
@@ -130,6 +138,8 @@ extern int sdio_release_irq(struct sdio_func *func);
 extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz);
 
 extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret);
+extern u8 sdio_readb_ext(struct sdio_func *func, unsigned int addr, int *err_ret,
+        unsigned in);
 extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret);
 extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret);
 
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index b32f3f9182c..37bc8cc20ac 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -100,6 +100,7 @@ enum zone_stat_item {
         NR_UNSTABLE_NFS,        /* NFS unstable pages */
         NR_BOUNCE,
         NR_VMSCAN_WRITE,
+        NR_VMSCAN_IMMEDIATE,    /* Prioritise for reclaim when writeback ends */
         NR_WRITEBACK_TEMP,      /* Writeback using temporary buffers */
         NR_ISOLATED_ANON,       /* Temporary isolated pages from anon lru */
         NR_ISOLATED_FILE,       /* Temporary isolated pages from file lru */
diff --git a/include/linux/mpu.h b/include/linux/mpu.h
new file mode 100644
index 00000000000..fd66ba0db87
--- /dev/null
+++ b/include/linux/mpu.h
@@ -0,0 +1,366 @@
+/*
+        $License:
+        Copyright (C) 2011 InvenSense Corporation, All Rights Reserved.
+
+        This program is free software; you can redistribute it and/or modify
+        it under the terms of the GNU General Public License as published by
+        the Free Software Foundation; either version 2 of the License, or
+        (at your option) any later version.
+
+        This program is distributed in the hope that it will be useful,
+        but WITHOUT ANY WARRANTY; without even the implied warranty of
+        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+        GNU General Public License for more details.
+
+        You should have received a copy of the GNU General Public License
+        along with this program.  If not, see <http://www.gnu.org/licenses/>.
+        $
+ */
+
+#ifndef __MPU_H_
+#define __MPU_H_
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+/* Number of axes on each sensor */
+#define GYRO_NUM_AXES               (3)
+#define ACCEL_NUM_AXES              (3)
+#define COMPASS_NUM_AXES            (3)
+
+struct mpu_read_write {
+        /* Memory address or register address depending on ioctl */
+        __u16 address;
+        __u16 length;
+        __u8 *data;
+};
+
+enum mpuirq_data_type {
+        MPUIRQ_DATA_TYPE_MPU_IRQ,
+        MPUIRQ_DATA_TYPE_SLAVE_IRQ,
+        MPUIRQ_DATA_TYPE_PM_EVENT,
+        MPUIRQ_DATA_TYPE_NUM_TYPES,
+};
+
+/* User space PM event notification */
+#define MPU_PM_EVENT_SUSPEND_PREPARE (3)
+#define MPU_PM_EVENT_POST_SUSPEND    (4)
+
+struct mpuirq_data {
+        __u32 interruptcount;
+        __u64 irqtime;
+        __u32 data_type;
+        __s32 data;
+};
+
+enum ext_slave_config_key {
+        MPU_SLAVE_CONFIG_ODR_SUSPEND,
+        MPU_SLAVE_CONFIG_ODR_RESUME,
+        MPU_SLAVE_CONFIG_FSR_SUSPEND,
+        MPU_SLAVE_CONFIG_FSR_RESUME,
+        MPU_SLAVE_CONFIG_MOT_THS,
+        MPU_SLAVE_CONFIG_NMOT_THS,
+        MPU_SLAVE_CONFIG_MOT_DUR,
+        MPU_SLAVE_CONFIG_NMOT_DUR,
+        MPU_SLAVE_CONFIG_IRQ_SUSPEND,
+        MPU_SLAVE_CONFIG_IRQ_RESUME,
+        MPU_SLAVE_WRITE_REGISTERS,
+        MPU_SLAVE_READ_REGISTERS,
+        MPU_SLAVE_CONFIG_INTERNAL_REFERENCE,
+        /* AMI 306 specific config keys */
+        MPU_SLAVE_PARAM,
+        MPU_SLAVE_WINDOW,
+        MPU_SLAVE_READWINPARAMS,
+        MPU_SLAVE_SEARCHOFFSET,
+        /* AKM specific config keys */
+        MPU_SLAVE_READ_SCALE,
+        /* MPU3050 and MPU6050 Keys */
+        MPU_SLAVE_INT_CONFIG,
+        MPU_SLAVE_EXT_SYNC,
+        MPU_SLAVE_FULL_SCALE,
+        MPU_SLAVE_LPF,
+        MPU_SLAVE_CLK_SRC,
+        MPU_SLAVE_DIVIDER,
+        MPU_SLAVE_DMP_ENABLE,
+        MPU_SLAVE_FIFO_ENABLE,
+        MPU_SLAVE_DMP_CFG1,
+        MPU_SLAVE_DMP_CFG2,
+        MPU_SLAVE_TC,
+        MPU_SLAVE_GYRO,
+        MPU_SLAVE_ADDR,
+        MPU_SLAVE_PRODUCT_REVISION,
+        MPU_SLAVE_SILICON_REVISION,
+        MPU_SLAVE_PRODUCT_ID,
+        MPU_SLAVE_GYRO_SENS_TRIM,
+        MPU_SLAVE_ACCEL_SENS_TRIM,
+        MPU_SLAVE_RAM,
+        /* -------------------------- */
+        MPU_SLAVE_CONFIG_NUM_CONFIG_KEYS
+};
+
+/* For the MPU_SLAVE_CONFIG_IRQ_SUSPEND and MPU_SLAVE_CONFIG_IRQ_RESUME */
+enum ext_slave_config_irq_type {
+        MPU_SLAVE_IRQ_TYPE_NONE,
+        MPU_SLAVE_IRQ_TYPE_MOTION,
+        MPU_SLAVE_IRQ_TYPE_DATA_READY,
+};
+
+/* Structure for the following IOCTS's
+ * MPU_CONFIG_GYRO
+ * MPU_CONFIG_ACCEL
+ * MPU_CONFIG_COMPASS
+ * MPU_CONFIG_PRESSURE
+ * MPU_GET_CONFIG_GYRO
+ * MPU_GET_CONFIG_ACCEL
+ * MPU_GET_CONFIG_COMPASS
+ * MPU_GET_CONFIG_PRESSURE
+ *
+ * @key one of enum ext_slave_config_key
+ * @len length of data pointed to by data
+ * @apply zero if communication with the chip is not necessary, false otherwise
+ *        This flag can be used to select cached data or to refresh cashed data
+ *        cache data to be pushed later or push immediately.  If true and the
+ *        slave is on the secondary bus the MPU will first enger bypass mode
+ *        before calling the slaves .config or .get_config funcion
+ * @data pointer to the data to confgure or get
+ */
+struct ext_slave_config {
+        __u8 key;
+        __u16 len;
+        __u8 apply;
+        void *data;
+};
+
+enum ext_slave_type {
+        EXT_SLAVE_TYPE_GYROSCOPE,
+        EXT_SLAVE_TYPE_ACCEL,
+        EXT_SLAVE_TYPE_COMPASS,
+        EXT_SLAVE_TYPE_PRESSURE,
+        /*EXT_SLAVE_TYPE_TEMPERATURE */
+
+        EXT_SLAVE_NUM_TYPES
+};
+
+enum ext_slave_id {
+        ID_INVALID = 0,
+
+        ACCEL_ID_LIS331,
+        ACCEL_ID_LSM303DLX,
+        ACCEL_ID_LIS3DH,
+        ACCEL_ID_KXSD9,
+        ACCEL_ID_KXTF9,
+        ACCEL_ID_BMA150,
+        ACCEL_ID_BMA222,
+        ACCEL_ID_BMA250,
+        ACCEL_ID_ADXL34X,
+        ACCEL_ID_MMA8450,
+        ACCEL_ID_MMA845X,
+        ACCEL_ID_MPU6050,
+
+        COMPASS_ID_AK8975,
+        COMPASS_ID_AK8972,
+        COMPASS_ID_AMI30X,
+        COMPASS_ID_AMI306,
+        COMPASS_ID_YAS529,
+        COMPASS_ID_YAS530,
+        COMPASS_ID_HMC5883,
+        COMPASS_ID_LSM303DLH,
+        COMPASS_ID_LSM303DLM,
+        COMPASS_ID_MMC314X,
+        COMPASS_ID_HSCDTD002B,
+        COMPASS_ID_HSCDTD004A,
+
+        PRESSURE_ID_BMA085,
+};
+
+enum ext_slave_endian {
+        EXT_SLAVE_BIG_ENDIAN,
+        EXT_SLAVE_LITTLE_ENDIAN,
+        EXT_SLAVE_FS8_BIG_ENDIAN,
+        EXT_SLAVE_FS16_BIG_ENDIAN,
+};
+
+enum ext_slave_bus {
+        EXT_SLAVE_BUS_INVALID = -1,
+        EXT_SLAVE_BUS_PRIMARY = 0,
+        EXT_SLAVE_BUS_SECONDARY = 1
+};
+
+
+/**
+ *  struct ext_slave_platform_data - Platform data for mpu3050 and mpu6050
+ *  slave devices
+ *
+ *  @type: the type of slave device based on the enum ext_slave_type
+ *         definitions.
+ *  @irq: the irq number attached to the slave if any.
+ *  @adapt_num: the I2C adapter number.
+ *  @bus: the bus the slave is attached to: enum ext_slave_bus
+ *  @address: the I2C slave address of the slave device.
+ *  @orientation: the mounting matrix of the device relative to MPU.
+ *  @irq_data: private data for the slave irq handler
+ *  @private_data: additional data, user customizable.  Not touched by the MPU
+ *                 driver.
+ *
+ * The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation.  The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ */
+struct ext_slave_platform_data {
+        __u8 type;
+        __u32 irq;
+        __u32 adapt_num;
+        __u32 bus;
+        __u8 address;
+        __s8 orientation[9];
+        void *irq_data;
+        void *private_data;
+};
+
+struct fix_pnt_range {
+        __s32 mantissa;
+        __s32 fraction;
+};
+
+static inline long range_fixedpoint_to_long_mg(struct fix_pnt_range rng)
+{
+        return (long)(rng.mantissa * 1000 + rng.fraction / 10);
+}
+
+struct ext_slave_read_trigger {
+        __u8 reg;
+        __u8 value;
+};
+
+/**
+ *  struct ext_slave_descr - Description of the slave device for programming.
+ *
+ *  @suspend:   function pointer to put the device in suspended state
+ *  @resume:    function pointer to put the device in running state
+ *  @read:      function that reads the device data
+ *  @init:      function used to preallocate memory used by the driver
+ *  @exit:      function used to free memory allocated for the driver
+ *  @config:    function used to configure the device
+ *  @get_config:function used to get the device's configuration
+ *
+ *  @name:      text name of the device
+ *  @type:      device type. enum ext_slave_type
+ *  @id:        enum ext_slave_id
+ *  @read_reg:  starting register address to retrieve data.
+ *  @read_len:  length in bytes of the sensor data.  Typically  6.
+ *  @endian:    byte order of the data. enum ext_slave_endian
+ *  @range:     full scale range of the slave ouput: struct fix_pnt_range
+ *  @trigger:   If reading data first requires writing a register this is the
+ *              data to write.
+ *
+ *  Defines the functions and information about the slave the mpu3050 and
+ *  mpu6050 needs to use the slave device.
+ */
+struct ext_slave_descr {
+        int (*init) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata);
+        int (*exit) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata);
+        int (*suspend) (void *mlsl_handle,
+                        struct ext_slave_descr *slave,
+                        struct ext_slave_platform_data *pdata);
+        int (*resume) (void *mlsl_handle,
+                       struct ext_slave_descr *slave,
+                       struct ext_slave_platform_data *pdata);
+        int (*read) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata,
+                     __u8 *data);
+        int (*config) (void *mlsl_handle,
+                       struct ext_slave_descr *slave,
+                       struct ext_slave_platform_data *pdata,
+                       struct ext_slave_config *config);
+        int (*get_config) (void *mlsl_handle,
+                           struct ext_slave_descr *slave,
+                           struct ext_slave_platform_data *pdata,
+                           struct ext_slave_config *config);
+
+        char *name;
+        __u8 type;
+        __u8 id;
+        __u8 read_reg;
+        __u8 read_len;
+        __u8 endian;
+        struct fix_pnt_range range;
+        struct ext_slave_read_trigger *trigger;
+};
+
+/**
+ * struct mpu_platform_data - Platform data for the mpu driver
+ * @int_config:         Bits [7:3] of the int config register.
+ * @level_shifter:      0: VLogic, 1: VDD
+ * @orientation:        Orientation matrix of the gyroscope
+ *
+ * Contains platform specific information on how to configure the MPU3050 to
+ * work on this platform.  The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation.  The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ */
+struct mpu_platform_data {
+        __u8 int_config;
+        __u8 level_shifter;
+        __s8 orientation[GYRO_NUM_AXES * GYRO_NUM_AXES];
+};
+
+#define MPU_IOCTL (0x81) /* Magic number for MPU Iocts */
+/* IOCTL commands for /dev/mpu */
+
+/*--------------------------------------------------------------------------
+ * Deprecated, debugging only
+ */
+#define MPU_SET_MPU_PLATFORM_DATA       \
+        _IOWR(MPU_IOCTL, 0x01, struct mpu_platform_data)
+#define MPU_SET_EXT_SLAVE_PLATFORM_DATA \
+        _IOWR(MPU_IOCTL, 0x01, struct ext_slave_platform_data)
+/*--------------------------------------------------------------------------*/
+#define MPU_GET_EXT_SLAVE_PLATFORM_DATA \
+        _IOWR(MPU_IOCTL, 0x02, struct ext_slave_platform_data)
+#define MPU_GET_MPU_PLATFORM_DATA       \
+        _IOWR(MPU_IOCTL, 0x02, struct mpu_platform_data)
+#define MPU_GET_EXT_SLAVE_DESCR \
+        _IOWR(MPU_IOCTL, 0x02, struct ext_slave_descr)
+
+#define MPU_READ                _IOWR(MPU_IOCTL, 0x10, struct mpu_read_write)
+#define MPU_WRITE               _IOW(MPU_IOCTL,  0x10, struct mpu_read_write)
+#define MPU_READ_MEM            _IOWR(MPU_IOCTL, 0x11, struct mpu_read_write)
+#define MPU_WRITE_MEM           _IOW(MPU_IOCTL,  0x11, struct mpu_read_write)
+#define MPU_READ_FIFO           _IOWR(MPU_IOCTL, 0x12, struct mpu_read_write)
+#define MPU_WRITE_FIFO          _IOW(MPU_IOCTL,  0x12, struct mpu_read_write)
+
+#define MPU_READ_COMPASS        _IOR(MPU_IOCTL, 0x12, __u8)
+#define MPU_READ_ACCEL          _IOR(MPU_IOCTL, 0x13, __u8)
+#define MPU_READ_PRESSURE       _IOR(MPU_IOCTL, 0x14, __u8)
+
+#define MPU_CONFIG_GYRO         _IOW(MPU_IOCTL, 0x20, struct ext_slave_config)
+#define MPU_CONFIG_ACCEL        _IOW(MPU_IOCTL, 0x21, struct ext_slave_config)
+#define MPU_CONFIG_COMPASS      _IOW(MPU_IOCTL, 0x22, struct ext_slave_config)
+#define MPU_CONFIG_PRESSURE     _IOW(MPU_IOCTL, 0x23, struct ext_slave_config)
+
+#define MPU_GET_CONFIG_GYRO     _IOWR(MPU_IOCTL, 0x20, struct ext_slave_config)
+#define MPU_GET_CONFIG_ACCEL    _IOWR(MPU_IOCTL, 0x21, struct ext_slave_config)
+#define MPU_GET_CONFIG_COMPASS  _IOWR(MPU_IOCTL, 0x22, struct ext_slave_config)
+#define MPU_GET_CONFIG_PRESSURE _IOWR(MPU_IOCTL, 0x23, struct ext_slave_config)
+
+#define MPU_SUSPEND             _IOW(MPU_IOCTL, 0x30, __u32)
+#define MPU_RESUME              _IOW(MPU_IOCTL, 0x31, __u32)
+/* Userspace PM Event response */
+#define MPU_PM_EVENT_HANDLED    _IO(MPU_IOCTL, 0x32)
+
+#define MPU_GET_REQUESTED_SENSORS       _IOR(MPU_IOCTL, 0x40, __u8)
+#define MPU_SET_REQUESTED_SENSORS       _IOW(MPU_IOCTL, 0x40, __u8)
+#define MPU_GET_IGNORE_SYSTEM_SUSPEND   _IOR(MPU_IOCTL, 0x41, __u8)
+#define MPU_SET_IGNORE_SYSTEM_SUSPEND   _IOW(MPU_IOCTL, 0x41, __u8)
+#define MPU_GET_MLDL_STATUS             _IOR(MPU_IOCTL, 0x42, __u8)
+#define MPU_GET_I2C_SLAVES_ENABLED      _IOR(MPU_IOCTL, 0x43, __u8)
+
+
+#endif                          /* __MPU_H_ */
diff --git a/include/linux/mpu3050.h b/include/linux/mpu3050.h
new file mode 100644
index 00000000000..a8dcd5a9473
--- /dev/null
+++ b/include/linux/mpu3050.h
@@ -0,0 +1,255 @@
+/*
+ $License:
+    Copyright (C) 2010 InvenSense Corporation, All Rights Reserved.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+  $
+ */
+
+#ifndef __MPU3050_H_
+#define __MPU3050_H_
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#endif
+
+#ifdef M_HW
+#error MPU6000 build including MPU3050 header
+#endif
+
+#define MPU_NAME "mpu3050"
+#define DEFAULT_MPU_SLAVEADDR       0x68
+
+/*==== MPU REGISTER SET ====*/
+enum mpu_register {
+        MPUREG_WHO_AM_I = 0,    /* 00 0x00 */
+        MPUREG_PRODUCT_ID,      /* 01 0x01 */
+        MPUREG_02_RSVD,         /* 02 0x02 */
+        MPUREG_03_RSVD,         /* 03 0x03 */
+        MPUREG_04_RSVD,         /* 04 0x04 */
+        MPUREG_XG_OFFS_TC,      /* 05 0x05 */
+        MPUREG_06_RSVD,         /* 06 0x06 */
+        MPUREG_07_RSVD,         /* 07 0x07 */
+        MPUREG_YG_OFFS_TC,      /* 08 0x08 */
+        MPUREG_09_RSVD,         /* 09 0x09 */
+        MPUREG_0A_RSVD,         /* 10 0x0a */
+        MPUREG_ZG_OFFS_TC,      /* 11 0x0b */
+        MPUREG_X_OFFS_USRH,     /* 12 0x0c */
+        MPUREG_X_OFFS_USRL,     /* 13 0x0d */
+        MPUREG_Y_OFFS_USRH,     /* 14 0x0e */
+        MPUREG_Y_OFFS_USRL,     /* 15 0x0f */
+        MPUREG_Z_OFFS_USRH,     /* 16 0x10 */
+        MPUREG_Z_OFFS_USRL,     /* 17 0x11 */
+        MPUREG_FIFO_EN1,        /* 18 0x12 */
+        MPUREG_FIFO_EN2,        /* 19 0x13 */
+        MPUREG_AUX_SLV_ADDR,    /* 20 0x14 */
+        MPUREG_SMPLRT_DIV,      /* 21 0x15 */
+        MPUREG_DLPF_FS_SYNC,    /* 22 0x16 */
+        MPUREG_INT_CFG,         /* 23 0x17 */
+        MPUREG_ACCEL_BURST_ADDR,/* 24 0x18 */
+        MPUREG_19_RSVD,         /* 25 0x19 */
+        MPUREG_INT_STATUS,      /* 26 0x1a */
+        MPUREG_TEMP_OUT_H,      /* 27 0x1b */
+        MPUREG_TEMP_OUT_L,      /* 28 0x1c */
+        MPUREG_GYRO_XOUT_H,     /* 29 0x1d */
+        MPUREG_GYRO_XOUT_L,     /* 30 0x1e */
+        MPUREG_GYRO_YOUT_H,     /* 31 0x1f */
+        MPUREG_GYRO_YOUT_L,     /* 32 0x20 */
+        MPUREG_GYRO_ZOUT_H,     /* 33 0x21 */
+        MPUREG_GYRO_ZOUT_L,     /* 34 0x22 */
+        MPUREG_23_RSVD,         /* 35 0x23 */
+        MPUREG_24_RSVD,         /* 36 0x24 */
+        MPUREG_25_RSVD,         /* 37 0x25 */
+        MPUREG_26_RSVD,         /* 38 0x26 */
+        MPUREG_27_RSVD,         /* 39 0x27 */
+        MPUREG_28_RSVD,         /* 40 0x28 */
+        MPUREG_29_RSVD,         /* 41 0x29 */
+        MPUREG_2A_RSVD,         /* 42 0x2a */
+        MPUREG_2B_RSVD,         /* 43 0x2b */
+        MPUREG_2C_RSVD,         /* 44 0x2c */
+        MPUREG_2D_RSVD,         /* 45 0x2d */
+        MPUREG_2E_RSVD,         /* 46 0x2e */
+        MPUREG_2F_RSVD,         /* 47 0x2f */
+        MPUREG_30_RSVD,         /* 48 0x30 */
+        MPUREG_31_RSVD,         /* 49 0x31 */
+        MPUREG_32_RSVD,         /* 50 0x32 */
+        MPUREG_33_RSVD,         /* 51 0x33 */
+        MPUREG_34_RSVD,         /* 52 0x34 */
+        MPUREG_DMP_CFG_1,       /* 53 0x35 */
+        MPUREG_DMP_CFG_2,       /* 54 0x36 */
+        MPUREG_BANK_SEL,        /* 55 0x37 */
+        MPUREG_MEM_START_ADDR,  /* 56 0x38 */
+        MPUREG_MEM_R_W,         /* 57 0x39 */
+        MPUREG_FIFO_COUNTH,     /* 58 0x3a */
+        MPUREG_FIFO_COUNTL,     /* 59 0x3b */
+        MPUREG_FIFO_R_W,        /* 60 0x3c */
+        MPUREG_USER_CTRL,       /* 61 0x3d */
+        MPUREG_PWR_MGM,         /* 62 0x3e */
+        MPUREG_3F_RSVD,         /* 63 0x3f */
+        NUM_OF_MPU_REGISTERS    /* 64 0x40 */
+};
+
+/*==== BITS FOR MPU ====*/
+
+/*---- MPU 'FIFO_EN1' register (12) ----*/
+#define BIT_TEMP_OUT                0x80
+#define BIT_GYRO_XOUT               0x40
+#define BIT_GYRO_YOUT               0x20
+#define BIT_GYRO_ZOUT               0x10
+#define BIT_ACCEL_XOUT              0x08
+#define BIT_ACCEL_YOUT              0x04
+#define BIT_ACCEL_ZOUT              0x02
+#define BIT_AUX_1OUT                0x01
+/*---- MPU 'FIFO_EN2' register (13) ----*/
+#define BIT_AUX_2OUT                0x02
+#define BIT_AUX_3OUT                0x01
+/*---- MPU 'DLPF_FS_SYNC' register (16) ----*/
+#define BITS_EXT_SYNC_NONE          0x00
+#define BITS_EXT_SYNC_TEMP          0x20
+#define BITS_EXT_SYNC_GYROX         0x40
+#define BITS_EXT_SYNC_GYROY         0x60
+#define BITS_EXT_SYNC_GYROZ         0x80
+#define BITS_EXT_SYNC_ACCELX        0xA0
+#define BITS_EXT_SYNC_ACCELY        0xC0
+#define BITS_EXT_SYNC_ACCELZ        0xE0
+#define BITS_EXT_SYNC_MASK          0xE0
+#define BITS_FS_250DPS              0x00
+#define BITS_FS_500DPS              0x08
+#define BITS_FS_1000DPS             0x10
+#define BITS_FS_2000DPS             0x18
+#define BITS_FS_MASK                0x18
+#define BITS_DLPF_CFG_256HZ_NOLPF2  0x00
+#define BITS_DLPF_CFG_188HZ         0x01
+#define BITS_DLPF_CFG_98HZ          0x02
+#define BITS_DLPF_CFG_42HZ          0x03
+#define BITS_DLPF_CFG_20HZ          0x04
+#define BITS_DLPF_CFG_10HZ          0x05
+#define BITS_DLPF_CFG_5HZ           0x06
+#define BITS_DLPF_CFG_2100HZ_NOLPF  0x07
+#define BITS_DLPF_CFG_MASK          0x07
+/*---- MPU 'INT_CFG' register (17) ----*/
+#define BIT_ACTL                    0x80
+#define BIT_ACTL_LOW                0x80
+#define BIT_ACTL_HIGH               0x00
+#define BIT_OPEN                    0x40
+#define BIT_OPEN_DRAIN              0x40
+#define BIT_PUSH_PULL               0x00
+#define BIT_LATCH_INT_EN            0x20
+#define BIT_LATCH_INT_EN            0x20
+#define BIT_INT_PULSE_WIDTH_50US    0x00
+#define BIT_INT_ANYRD_2CLEAR        0x10
+#define BIT_INT_STAT_READ_2CLEAR    0x00
+#define BIT_MPU_RDY_EN              0x04
+#define BIT_DMP_INT_EN              0x02
+#define BIT_RAW_RDY_EN              0x01
+/*---- MPU 'INT_STATUS' register (1A) ----*/
+#define BIT_INT_STATUS_FIFO_OVERLOW 0x80
+#define BIT_MPU_RDY                 0x04
+#define BIT_DMP_INT                 0x02
+#define BIT_RAW_RDY                 0x01
+/*---- MPU 'BANK_SEL' register (37) ----*/
+#define BIT_PRFTCH_EN               0x20
+#define BIT_CFG_USER_BANK           0x10
+#define BITS_MEM_SEL                0x0f
+/*---- MPU 'USER_CTRL' register (3D) ----*/
+#define BIT_DMP_EN                  0x80
+#define BIT_FIFO_EN                 0x40
+#define BIT_AUX_IF_EN               0x20
+#define BIT_AUX_RD_LENG             0x10
+#define BIT_AUX_IF_RST              0x08
+#define BIT_DMP_RST                 0x04
+#define BIT_FIFO_RST                0x02
+#define BIT_GYRO_RST                0x01
+/*---- MPU 'PWR_MGM' register (3E) ----*/
+#define BIT_H_RESET                 0x80
+#define BIT_SLEEP                   0x40
+#define BIT_STBY_XG                 0x20
+#define BIT_STBY_YG                 0x10
+#define BIT_STBY_ZG                 0x08
+#define BITS_CLKSEL                 0x07
+
+/*---- MPU Silicon Revision ----*/
+#define MPU_SILICON_REV_A4           1  /* MPU A4 Device */
+#define MPU_SILICON_REV_B1           2  /* MPU B1 Device */
+#define MPU_SILICON_REV_B4           3  /* MPU B4 Device */
+#define MPU_SILICON_REV_B6           4  /* MPU B6 Device */
+
+/*---- MPU Memory ----*/
+#define MPU_MEM_BANK_SIZE           (256)
+#define FIFO_HW_SIZE                (512)
+
+enum MPU_MEMORY_BANKS {
+        MPU_MEM_RAM_BANK_0 = 0,
+        MPU_MEM_RAM_BANK_1,
+        MPU_MEM_RAM_BANK_2,
+        MPU_MEM_RAM_BANK_3,
+        MPU_MEM_NUM_RAM_BANKS,
+        MPU_MEM_OTP_BANK_0 = MPU_MEM_NUM_RAM_BANKS,
+        /* This one is always last */
+        MPU_MEM_NUM_BANKS
+};
+
+#define MPU_NUM_AXES (3)
+
+/*---- structure containing control variables used by MLDL ----*/
+/*---- MPU clock source settings ----*/
+/*---- MPU filter selections ----*/
+enum mpu_filter {
+        MPU_FILTER_256HZ_NOLPF2 = 0,
+        MPU_FILTER_188HZ,
+        MPU_FILTER_98HZ,
+        MPU_FILTER_42HZ,
+        MPU_FILTER_20HZ,
+        MPU_FILTER_10HZ,
+        MPU_FILTER_5HZ,
+        MPU_FILTER_2100HZ_NOLPF,
+        NUM_MPU_FILTER
+};
+
+enum mpu_fullscale {
+        MPU_FS_250DPS = 0,
+        MPU_FS_500DPS,
+        MPU_FS_1000DPS,
+        MPU_FS_2000DPS,
+        NUM_MPU_FS
+};
+
+enum mpu_clock_sel {
+        MPU_CLK_SEL_INTERNAL = 0,
+        MPU_CLK_SEL_PLLGYROX,
+        MPU_CLK_SEL_PLLGYROY,
+        MPU_CLK_SEL_PLLGYROZ,
+        MPU_CLK_SEL_PLLEXT32K,
+        MPU_CLK_SEL_PLLEXT19M,
+        MPU_CLK_SEL_RESERVED,
+        MPU_CLK_SEL_STOP,
+        NUM_CLK_SEL
+};
+
+enum mpu_ext_sync {
+        MPU_EXT_SYNC_NONE = 0,
+        MPU_EXT_SYNC_TEMP,
+        MPU_EXT_SYNC_GYROX,
+        MPU_EXT_SYNC_GYROY,
+        MPU_EXT_SYNC_GYROZ,
+        MPU_EXT_SYNC_ACCELX,
+        MPU_EXT_SYNC_ACCELY,
+        MPU_EXT_SYNC_ACCELZ,
+        NUM_MPU_EXT_SYNC
+};
+
+#define DLPF_FS_SYNC_VALUE(ext_sync, full_scale, lpf) \
+    ((ext_sync << 5) | (full_scale << 3) | lpf)
+
+#endif                          /* __MPU3050_H_ */
diff --git a/include/linux/mpu6000.h b/include/linux/mpu6000.h
new file mode 100644
index 00000000000..5a63c8f07b7
--- /dev/null
+++ b/include/linux/mpu6000.h
@@ -0,0 +1,406 @@
+/*
+ $License:
+    Copyright (C) 2010 InvenSense Corporation, All Rights Reserved.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+  $
+ */
+
+/**
+ * @defgroup
+ * @brief
+ *
+ * @{
+ *      @file     mpu6000.h
+ *      @brief
+ */
+
+#ifndef __MPU6000_H_
+#define __MPU6000_H_
+
+#define MPU_NAME "mpu6000"
+#define DEFAULT_MPU_SLAVEADDR       0x68
+
+/*==== M_HW REGISTER SET ====*/
+enum {
+        MPUREG_XG_OFFS_TC = 0,                  /* 0x00 */
+        MPUREG_YG_OFFS_TC,                      /* 0x00 */
+        MPUREG_ZG_OFFS_TC,                      /* 0x00 */
+        MPUREG_X_FINE_GAIN,                     /* 0x00 */
+        MPUREG_Y_FINE_GAIN,                     /* 0x00 */
+        MPUREG_Z_FINE_GAIN,                     /* 0x00 */
+        MPUREG_XA_OFFS_H,                       /* 0x00 */
+        MPUREG_XA_OFFS_L_TC,                    /* 0x00 */
+        MPUREG_YA_OFFS_H,                       /* 0x00 */
+        MPUREG_YA_OFFS_L_TC,                    /* 0x00 */
+        MPUREG_ZA_OFFS_H,                       /* 0x00 */
+        MPUREG_ZA_OFFS_L_TC,    /* 0xB */
+        MPUREG_0C_RSVD,                 /* 0x00 */
+        MPUREG_0D_RSVD,                 /* 0x00 */
+        MPUREG_0E_RSVD,                 /* 0x00 */
+        MPUREG_0F_RSVD,                 /* 0x00 */
+        MPUREG_10_RSVD,                 /* 0x00 */
+        MPUREG_11_RSVD,                 /* 0x00 */
+        MPUREG_12_RSVD,                 /* 0x00 */
+        MPUREG_XG_OFFS_USRH,                    /* 0x00 */
+        MPUREG_XG_OFFS_USRL,                    /* 0x00 */
+        MPUREG_YG_OFFS_USRH,                    /* 0x00 */
+        MPUREG_YG_OFFS_USRL,                    /* 0x00 */
+        MPUREG_ZG_OFFS_USRH,                    /* 0x00 */
+        MPUREG_ZG_OFFS_USRL,                    /* 0x00 */
+        MPUREG_SMPLRT_DIV,      /* 0x19 */
+        MPUREG_CONFIG,          /* 0x1A ==> DLPF_FS_SYNC */
+        MPUREG_GYRO_CONFIG,                     /* 0x00 */
+        MPUREG_ACCEL_CONFIG,                    /* 0x00 */
+        MPUREG_ACCEL_FF_THR,                    /* 0x00 */
+        MPUREG_ACCEL_FF_DUR,                    /* 0x00 */
+        MPUREG_ACCEL_MOT_THR,                   /* 0x00 */
+        MPUREG_ACCEL_MOT_DUR,                   /* 0x00 */
+        MPUREG_ACCEL_ZRMOT_THR,                 /* 0x00 */
+        MPUREG_ACCEL_ZRMOT_DUR,                 /* 0x00 */
+        MPUREG_FIFO_EN,         /* 0x23 */
+        MPUREG_I2C_MST_CTRL,                    /* 0x00 */
+        MPUREG_I2C_SLV0_ADDR,   /* 0x25 */
+        MPUREG_I2C_SLV0_REG,                    /* 0x00 */
+        MPUREG_I2C_SLV0_CTRL,                   /* 0x00 */
+        MPUREG_I2C_SLV1_ADDR,   /* 0x28 */
+        MPUREG_I2C_SLV1_REG_PASSWORD,                   /* 0x00 */
+        MPUREG_I2C_SLV1_CTRL,                   /* 0x00 */
+        MPUREG_I2C_SLV2_ADDR,   /* 0x2B */
+        MPUREG_I2C_SLV2_REG,                    /* 0x00 */
+        MPUREG_I2C_SLV2_CTRL,                   /* 0x00 */
+        MPUREG_I2C_SLV3_ADDR,   /* 0x2E */
+        MPUREG_I2C_SLV3_REG,                    /* 0x00 */
+        MPUREG_I2C_SLV3_CTRL,                   /* 0x00 */
+        MPUREG_I2C_SLV4_ADDR,   /* 0x31 */
+        MPUREG_I2C_SLV4_REG,                    /* 0x00 */
+        MPUREG_I2C_SLV4_DO,                     /* 0x00 */
+        MPUREG_I2C_SLV4_CTRL,                   /* 0x00 */
+        MPUREG_I2C_SLV4_DI,                     /* 0x00 */
+        MPUREG_I2C_MST_STATUS,  /* 0x36 */
+        MPUREG_INT_PIN_CFG,     /* 0x37 ==> -* INT_CFG */
+        MPUREG_INT_ENABLE,      /* 0x38 ==> / */
+        MPUREG_DMP_INT_STATUS,  /* 0x39 */
+        MPUREG_INT_STATUS,      /* 0x3A */
+        MPUREG_ACCEL_XOUT_H,    /* 0x3B */
+        MPUREG_ACCEL_XOUT_L,                    /* 0x00 */
+        MPUREG_ACCEL_YOUT_H,                    /* 0x00 */
+        MPUREG_ACCEL_YOUT_L,                    /* 0x00 */
+        MPUREG_ACCEL_ZOUT_H,                    /* 0x00 */
+        MPUREG_ACCEL_ZOUT_L,                    /* 0x00 */
+        MPUREG_TEMP_OUT_H,      /* 0x41 */
+        MPUREG_TEMP_OUT_L,                      /* 0x00 */
+        MPUREG_GYRO_XOUT_H,     /* 0x43 */
+        MPUREG_GYRO_XOUT_L,                     /* 0x00 */
+        MPUREG_GYRO_YOUT_H,                     /* 0x00 */
+        MPUREG_GYRO_YOUT_L,                     /* 0x00 */
+        MPUREG_GYRO_ZOUT_H,                     /* 0x00 */
+        MPUREG_GYRO_ZOUT_L,                     /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_00,    /* 0x49 */
+        MPUREG_EXT_SLV_SENS_DATA_01,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_02,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_03,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_04,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_05,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_06,    /* 0x4F */
+        MPUREG_EXT_SLV_SENS_DATA_07,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_08,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_09,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_10,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_11,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_12,    /* 0x55 */
+        MPUREG_EXT_SLV_SENS_DATA_13,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_14,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_15,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_16,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_17,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_18,    /* 0x5B */
+        MPUREG_EXT_SLV_SENS_DATA_19,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_20,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_21,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_22,                    /* 0x00 */
+        MPUREG_EXT_SLV_SENS_DATA_23,                    /* 0x00 */
+        ACCEL_INTEL_STATUS,     /* 0x61 */
+        MPUREG_62_RSVD,                 /* 0x00 */
+        MPUREG_63_RSVD,                 /* 0x00 */
+        MPUREG_64_RSVD,                 /* 0x00 */
+        MPUREG_65_RSVD,                 /* 0x00 */
+        MPUREG_66_RSVD,                 /* 0x00 */
+        MPUREG_67_RSVD,                 /* 0x00 */
+        SIGNAL_PATH_RESET,      /* 0x68 */
+        ACCEL_INTEL_CTRL,       /* 0x69 */
+        MPUREG_USER_CTRL,       /* 0x6A */
+        MPUREG_PWR_MGMT_1,      /* 0x6B */
+        MPUREG_PWR_MGMT_2,                      /* 0x00 */
+        MPUREG_BANK_SEL,        /* 0x6D */
+        MPUREG_MEM_START_ADDR,  /* 0x6E */
+        MPUREG_MEM_R_W,         /* 0x6F */
+        MPUREG_PRGM_STRT_ADDRH,                 /* 0x00 */
+        MPUREG_PRGM_STRT_ADDRL,                 /* 0x00 */
+        MPUREG_FIFO_COUNTH,     /* 0x72 */
+        MPUREG_FIFO_COUNTL,                     /* 0x00 */
+        MPUREG_FIFO_R_W,        /* 0x74 */
+        MPUREG_WHOAMI,          /* 0x75,117 */
+
+        NUM_OF_MPU_REGISTERS    /* = 0x76,118 */
+};
+
+/*==== M_HW MEMORY ====*/
+enum MPU_MEMORY_BANKS {
+        MEM_RAM_BANK_0 = 0,
+        MEM_RAM_BANK_1,
+        MEM_RAM_BANK_2,
+        MEM_RAM_BANK_3,
+        MEM_RAM_BANK_4,
+        MEM_RAM_BANK_5,
+        MEM_RAM_BANK_6,
+        MEM_RAM_BANK_7,
+        MEM_RAM_BANK_8,
+        MEM_RAM_BANK_9,
+        MEM_RAM_BANK_10,
+        MEM_RAM_BANK_11,
+        MPU_MEM_NUM_RAM_BANKS,
+        MPU_MEM_OTP_BANK_0 = 16
+};
+
+
+/*==== M_HW parameters ====*/
+
+#define NUM_REGS            (NUM_OF_MPU_REGISTERS)
+#define START_SENS_REGS     (0x3B)
+#define NUM_SENS_REGS       (0x60-START_SENS_REGS+1)
+
+/*---- MPU Memory ----*/
+#define NUM_BANKS           (MPU_MEM_NUM_RAM_BANKS)
+#define BANK_SIZE           (256)
+#define MEM_SIZE            (NUM_BANKS*BANK_SIZE)
+#define MPU_MEM_BANK_SIZE   (BANK_SIZE) /*alternative name */
+
+#define FIFO_HW_SIZE        (1024)
+
+#define NUM_EXT_SLAVES      (4)
+
+
+/*==== BITS FOR M_HW ====*/
+
+/*---- M_HW 'FIFO_EN' register (23) ----*/
+#define BIT_TEMP_OUT                            0x80
+#define BIT_GYRO_XOUT                           0x40
+#define BIT_GYRO_YOUT                           0x20
+#define BIT_GYRO_ZOUT                           0x10
+#define BIT_ACCEL                               0x08
+#define BIT_SLV_2                               0x04
+#define BIT_SLV_1                               0x02
+#define BIT_SLV_0                               0x01
+/*---- M_HW 'CONFIG' register (1A) ----*/
+/*NONE                                          0xC0 */
+#define BITS_EXT_SYNC_SET                       0x38
+#define BITS_DLPF_CFG                           0x07
+/*---- M_HW 'GYRO_CONFIG' register (1B) ----*/
+/* voluntarily modified label from BITS_FS_SEL to
+ * BITS_GYRO_FS_SEL to avoid confusion with MPU
+ */
+#define BITS_GYRO_FS_SEL                        0x18
+/*NONE                                          0x07 */
+/*---- M_HW 'ACCEL_CONFIG' register (1C) ----*/
+#define BITS_ACCEL_FS_SEL                       0x18
+#define BITS_ACCEL_HPF                          0x07
+/*---- M_HW 'I2C_MST_CTRL' register (24) ----*/
+#define BIT_MULT_MST_DIS                        0x80
+#define BIT_WAIT_FOR_ES                         0x40
+#define BIT_I2C_MST_VDDIO                       0x20
+/*NONE                                          0x10 */
+#define BITS_I2C_MST_CLK                        0x0F
+/*---- M_HW 'I2C_SLV?_CTRL' register (27,2A,2D,30) ----*/
+#define BIT_SLV_ENABLE                          0x80
+#define BIT_SLV_BYTE_SW                         0x40
+/*NONE                                          0x20 */
+#define BIT_SLV_GRP                             0x10
+#define BITS_SLV_LENG                           0x0F
+/*---- M_HW 'I2C_SLV4_ADDR' register (31) ----*/
+#define BIT_I2C_SLV4_RNW                        0x80
+/*---- M_HW 'I2C_SLV4_CTRL' register (34) ----*/
+#define BIT_I2C_SLV4_EN                         0x80
+#define BIT_SLV4_DONE_INT_EN                    0x40
+/*NONE                                          0x3F */
+/*---- M_HW 'I2C_MST_STATUS' register (36) ----*/
+#define BIT_PASSTHROUGH                         0x80
+#define BIT_I2C_SLV4_DONE                       0x40
+#define BIT_I2C_LOST_ARB                        0x20
+#define BIT_I2C_SLV4_NACK                       0x10
+#define BIT_I2C_SLV3_NACK                       0x08
+#define BIT_I2C_SLV2_NACK                       0x04
+#define BIT_I2C_SLV1_NACK                       0x02
+#define BIT_I2C_SLV0_NACK                       0x01
+/*---- M_HW 'INT_PIN_CFG' register (37) ----*/
+#define BIT_ACTL                                0x80
+#define BIT_ACTL_LOW                            0x80
+#define BIT_ACTL_HIGH                           0x00
+#define BIT_OPEN                                0x40
+#define BIT_LATCH_INT_EN                        0x20
+#define BIT_INT_ANYRD_2CLEAR                    0x10
+#define BIT_ACTL_FSYNC                          0x08
+#define BIT_FSYNC_INT_EN                        0x04
+#define BIT_BYPASS_EN                           0x02
+#define BIT_CLKOUT_EN                           0x01
+/*---- M_HW 'INT_ENABLE' register (38) ----*/
+#define BIT_FF_EN                               0x80
+#define BIT_MOT_EN                              0x40
+#define BIT_ZMOT_EN                             0x20
+#define BIT_FIFO_OVERFLOW_EN                    0x10
+#define BIT_I2C_MST_INT_EN                      0x08
+#define BIT_PLL_RDY_EN                          0x04
+#define BIT_DMP_INT_EN                          0x02
+#define BIT_RAW_RDY_EN                          0x01
+/*---- M_HW 'DMP_INT_STATUS' register (39) ----*/
+/*NONE                                          0x80 */
+/*NONE                                          0x40 */
+#define BIT_DMP_INT_5                           0x20
+#define BIT_DMP_INT_4                           0x10
+#define BIT_DMP_INT_3                           0x08
+#define BIT_DMP_INT_2                           0x04
+#define BIT_DMP_INT_1                           0x02
+#define BIT_DMP_INT_0                           0x01
+/*---- M_HW 'INT_STATUS' register (3A) ----*/
+#define BIT_FF_INT                              0x80
+#define BIT_MOT_INT                             0x40
+#define BIT_ZMOT_INT                            0x20
+#define BIT_FIFO_OVERFLOW_INT                   0x10
+#define BIT_I2C_MST_INT                         0x08
+#define BIT_PLL_RDY_INT                         0x04
+#define BIT_DMP_INT                             0x02
+#define BIT_RAW_DATA_RDY_INT                    0x01
+/*---- M_HW 'BANK_SEL' register (6D) ----*/
+#define BIT_PRFTCH_EN                           0x40
+#define BIT_CFG_USER_BANK                       0x20
+#define BITS_MEM_SEL                            0x1f
+/*---- M_HW 'USER_CTRL' register (6A) ----*/
+#define BIT_DMP_EN                              0x80
+#define BIT_FIFO_EN                             0x40
+#define BIT_I2C_MST_EN                          0x20
+#define BIT_I2C_IF_DIS                          0x10
+#define BIT_DMP_RST                             0x08
+#define BIT_FIFO_RST                            0x04
+#define BIT_I2C_MST_RST                         0x02
+#define BIT_SIG_COND_RST                        0x01
+/*---- M_HW 'PWR_MGMT_1' register (6B) ----*/
+#define BIT_H_RESET                             0x80
+#define BITS_PWRSEL                             0x70
+#define BIT_WKUP_INT                            0x08
+#define BITS_CLKSEL                             0x07
+/*---- M_HW 'PWR_MGMT_2' register (6C) ----*/
+#define BITS_LPA_WAKE_CTRL                      0xC0
+#define BIT_STBY_XA                             0x20
+#define BIT_STBY_YA                             0x10
+#define BIT_STBY_ZA                             0x08
+#define BIT_STBY_XG                             0x04
+#define BIT_STBY_YG                             0x02
+#define BIT_STBY_ZG                             0x01
+
+/* although it has 6, this refers to the gyros */
+#define MPU_NUM_AXES     (3)
+
+#define ACCEL_MOT_THR_LSB (32) /* mg */
+#define ACCEL_MOT_DUR_LSB (1)
+#define ACCEL_ZRMOT_THR_LSB_CONVERSION(mg) ((mg *1000)/255)
+#define ACCEL_ZRMOT_DUR_LSB (64)
+
+/*----------------------------------------------------------------------------*/
+/*---- Alternative names to take care of conflicts with current mpu3050.h ----*/
+/*----------------------------------------------------------------------------*/
+
+/*-- registers --*/
+#define MPUREG_DLPF_FS_SYNC        MPUREG_CONFIG                /* 0x1A */
+
+#define MPUREG_PRODUCT_ID          MPUREG_WHOAMI                /* 0x75  HACK!*/
+#define MPUREG_PWR_MGM             MPUREG_PWR_MGMT_1            /* 0x6B */
+#define MPUREG_FIFO_EN1            MPUREG_FIFO_EN               /* 0x23 */
+#define MPUREG_DMP_CFG_1           MPUREG_PRGM_STRT_ADDRH       /* 0x70 */
+#define MPUREG_DMP_CFG_2           MPUREG_PRGM_STRT_ADDRL       /* 0x71 */
+#define MPUREG_INT_CFG             MPUREG_INT_ENABLE            /* 0x38 */
+#define MPUREG_X_OFFS_USRH         MPUREG_XG_OFFS_USRH          /* 0x13 */
+#define MPUREG_WHO_AM_I            MPUREG_WHOAMI                /* 0x75 */
+#define MPUREG_23_RSVD             MPUREG_EXT_SLV_SENS_DATA_00  /* 0x49 */
+#define MPUREG_AUX_SLV_ADDR        MPUREG_I2C_SLV0_ADDR         /* 0x25 */
+#define MPUREG_ACCEL_BURST_ADDR    MPUREG_I2C_SLV0_REG          /* 0x26 */
+
+/*-- bits --*/
+/* 'USER_CTRL' register */
+#define BIT_AUX_IF_EN               BIT_I2C_MST_EN
+#define BIT_AUX_RD_LENG             BIT_I2C_MST_EN
+#define BIT_IME_IF_RST              BIT_I2C_MST_RST
+#define BIT_GYRO_RST                BIT_SIG_COND_RST
+/* 'INT_ENABLE' register */
+#define BIT_RAW_RDY                 BIT_RAW_DATA_RDY_INT
+#define BIT_MPU_RDY_EN              BIT_PLL_RDY_EN
+/* 'INT_STATUS' register */
+#define BIT_INT_STATUS_FIFO_OVERLOW BIT_FIFO_OVERFLOW_INT
+
+
+
+/*---- M_HW Silicon Revisions ----*/
+#define MPU_SILICON_REV_A1           1  /* M_HW A1 Device */
+#define MPU_SILICON_REV_B1           2  /* M_HW B1 Device */
+
+/*---- structure containing control variables used by MLDL ----*/
+/*---- MPU clock source settings ----*/
+/*---- MPU filter selections ----*/
+enum mpu_filter {
+        MPU_FILTER_256HZ_NOLPF2 = 0,
+        MPU_FILTER_188HZ,
+        MPU_FILTER_98HZ,
+        MPU_FILTER_42HZ,
+        MPU_FILTER_20HZ,
+        MPU_FILTER_10HZ,
+        MPU_FILTER_5HZ,
+        MPU_FILTER_2100HZ_NOLPF,
+        NUM_MPU_FILTER
+};
+
+enum mpu_fullscale {
+        MPU_FS_250DPS = 0,
+        MPU_FS_500DPS,
+        MPU_FS_1000DPS,
+        MPU_FS_2000DPS,
+        NUM_MPU_FS
+};
+
+enum mpu_clock_sel {
+        MPU_CLK_SEL_INTERNAL = 0,
+        MPU_CLK_SEL_PLLGYROX,
+        MPU_CLK_SEL_PLLGYROY,
+        MPU_CLK_SEL_PLLGYROZ,
+        MPU_CLK_SEL_PLLEXT32K,
+        MPU_CLK_SEL_PLLEXT19M,
+        MPU_CLK_SEL_RESERVED,
+        MPU_CLK_SEL_STOP,
+        NUM_CLK_SEL
+};
+
+enum mpu_ext_sync {
+        MPU_EXT_SYNC_NONE = 0,
+        MPU_EXT_SYNC_TEMP,
+        MPU_EXT_SYNC_GYROX,
+        MPU_EXT_SYNC_GYROY,
+        MPU_EXT_SYNC_GYROZ,
+        MPU_EXT_SYNC_ACCELX,
+        MPU_EXT_SYNC_ACCELY,
+        MPU_EXT_SYNC_ACCELZ,
+        NUM_MPU_EXT_SYNC
+};
+
+#define DLPF_FS_SYNC_VALUE(ext_sync, full_scale, lpf) \
+    ((ext_sync << 5) | (full_scale << 3) | lpf)
+
+#endif                          /* __IMU6000_H_ */
diff --git a/include/linux/mpu_v3.h b/include/linux/mpu_v3.h
new file mode 100644
index 00000000000..165632f01f4
--- /dev/null
+++ b/include/linux/mpu_v3.h
@@ -0,0 +1,503 @@
+/*
+ $License:
+    Copyright (C) 2010 InvenSense Corporation, All Rights Reserved.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ $
+ */
+
+#ifndef __MPU_H_
+#define __MPU_H_
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#endif
+
+//#define MPL_IUS_BUILD
+
+#ifndef MPL_IUS_BUILD
+#define MPL_IKR_BUILD //IKR local copy
+#endif 
+
+
+/**
+FEATURES DEFIED BY IKR
+*/
+#ifdef MPL_IKR_BUILD
+#define FEATURE_USES_MPU_ACCEL
+#define FEATURE_USES_9AXIS_FUSION
+#define FEATURE_USES_LPF
+#define FEATURE_USES_TIMERIRQ
+#define FEATURAE_USES_GM
+#endif //MPL_IKR_BUILD
+
+
+
+#ifdef M_HW
+#include "mpu6000.h"
+#else
+#include "mpu3050.h"
+#endif
+
+/* Number of axes on each sensor */
+#define GYRO_NUM_AXES               (3)
+#define ACCEL_NUM_AXES              (3)
+#define COMPASS_NUM_AXES            (3)
+
+/* IOCTL commands for /dev/mpu */
+#define MPU_SET_MPU_CONFIG          (0x00)
+#define MPU_SET_INT_CONFIG          (0x01)
+#define MPU_SET_EXT_SYNC            (0x02)
+#define MPU_SET_FULL_SCALE          (0x03)
+#define MPU_SET_LPF                 (0x04)
+#define MPU_SET_CLK_SRC             (0x05)
+#define MPU_SET_DIVIDER             (0x06)
+#define MPU_SET_LEVEL_SHIFTER       (0x07)
+#define MPU_SET_DMP_ENABLE          (0x08)
+#define MPU_SET_FIFO_ENABLE         (0x09)
+#define MPU_SET_DMP_CFG1            (0x0a)
+#define MPU_SET_DMP_CFG2            (0x0b)
+#define MPU_SET_OFFSET_TC           (0x0c)
+#define MPU_SET_RAM                 (0x0d)
+
+#define MPU_SET_PLATFORM_DATA       (0x0e)
+
+#define MPU_GET_MPU_CONFIG          (0x80)
+#define MPU_GET_INT_CONFIG          (0x81)
+#define MPU_GET_EXT_SYNC            (0x82)
+#define MPU_GET_FULL_SCALE          (0x83)
+#define MPU_GET_LPF                 (0x84)
+#define MPU_GET_CLK_SRC             (0x85)
+#define MPU_GET_DIVIDER             (0x86)
+#define MPU_GET_LEVEL_SHIFTER       (0x87)
+#define MPU_GET_DMP_ENABLE          (0x88)
+#define MPU_GET_FIFO_ENABLE         (0x89)
+#define MPU_GET_DMP_CFG1            (0x8a)
+#define MPU_GET_DMP_CFG2            (0x8b)
+#define MPU_GET_OFFSET_TC           (0x8c)
+#define MPU_GET_RAM                 (0x8d)
+
+#define MPU_READ_REGISTER           (0x40)
+#define MPU_WRITE_REGISTER          (0x41)
+#define MPU_READ_MEMORY             (0x42)
+#define MPU_WRITE_MEMORY            (0x43)
+
+#define MPU_SUSPEND                 (0x44)
+#define MPU_RESUME                  (0x45)
+#define MPU_READ_COMPASS            (0x46)
+#define MPU_READ_ACCEL              (0x47)
+#define MPU_READ_PRESSURE           (0x48)
+
+#define MPU_CONFIG_ACCEL            (0x20)
+#define MPU_CONFIG_COMPASS          (0x21)
+#define MPU_CONFIG_PRESSURE         (0x22)
+
+#define MPU_GET_CONFIG_ACCEL        (0x28)
+#define MPU_GET_CONFIG_COMPASS      (0x29)
+#define MPU_GET_CONFIG_PRESSURE     (0x2a)
+
+/* Structure for the following IOCTL's:
+   MPU_SET_RAM
+   MPU_GET_RAM
+   MPU_READ_REGISTER
+   MPU_WRITE_REGISTER
+   MPU_READ_MEMORY
+   MPU_WRITE_MEMORY
+*/
+struct mpu_read_write {
+        unsigned short address;
+        unsigned short length;
+        unsigned char *data;
+};
+
+struct mpuirq_data {
+        int interruptcount;
+        unsigned long long irqtime;
+        int data_type;
+        int data_size;
+        void *data;
+};
+enum ext_slave_config_key {
+        MPU_SLAVE_CONFIG_ODR_SUSPEND,
+        MPU_SLAVE_CONFIG_ODR_RESUME,
+        MPU_SLAVE_CONFIG_FSR_SUSPEND,
+        MPU_SLAVE_CONFIG_FSR_RESUME,
+        MPU_SLAVE_CONFIG_MOT_THS,
+        MPU_SLAVE_CONFIG_NMOT_THS,
+        MPU_SLAVE_CONFIG_MOT_DUR,
+        MPU_SLAVE_CONFIG_NMOT_DUR,
+        MPU_SLAVE_CONFIG_IRQ_SUSPEND,
+        MPU_SLAVE_CONFIG_IRQ_RESUME,
+        MPU_SLAVE_CONFIG_NUM_CONFIG_KEYS,
+};
+
+/* For the MPU_SLAVE_CONFIG_IRQ_SUSPEND and MPU_SLAVE_CONFIG_IRQ_RESUME */
+enum ext_slave_config_irq_type {
+        MPU_SLAVE_IRQ_TYPE_NONE,
+        MPU_SLAVE_IRQ_TYPE_MOTION,
+        MPU_SLAVE_IRQ_TYPE_DATA_READY,
+};
+
+/* Structure for the following IOCTS's
+ * MPU_CONFIG_ACCEL
+ * MPU_CONFIG_COMPASS
+ * MPU_CONFIG_PRESSURE
+ * MPU_GET_CONFIG_ACCEL
+ * MPU_GET_CONFIG_COMPASS
+ * MPU_GET_CONFIG_PRESSURE
+ */
+struct ext_slave_config {
+        int key;
+        int len;
+        int apply;
+        void *data;
+};
+
+enum ext_slave_type {
+        EXT_SLAVE_TYPE_GYROSCOPE,
+        EXT_SLAVE_TYPE_ACCELEROMETER,
+        EXT_SLAVE_TYPE_COMPASS,
+        EXT_SLAVE_TYPE_PRESSURE,
+        /*EXT_SLAVE_TYPE_TEMPERATURE */
+};
+
+enum ext_slave_id {
+        ID_INVALID = 0,
+
+        ACCEL_ID_LIS331,
+        ACCEL_ID_LSM303,
+        ACCEL_ID_KXSD9,
+        ACCEL_ID_KXTF9,
+        ACCEL_ID_BMA150,
+        ACCEL_ID_BMA222,
+        ACCEL_ID_BMA250,        
+        ACCEL_ID_ADI346,
+        ACCEL_ID_MMA8450,
+        ACCEL_ID_MMA845X,
+        ACCEL_ID_MPU6000,
+    ACCEL_ID_LIS3DH,
+
+        COMPASS_ID_AKM,
+        COMPASS_ID_AMI30X,
+        COMPASS_ID_YAS529,
+        COMPASS_ID_YAS530,
+        COMPASS_ID_HMC5883,
+        COMPASS_ID_LSM303,
+        COMPASS_ID_MMC314X,
+        COMPASS_ID_MMC328X, //MEMSIC328X
+        COMPASS_ID_HSCDTD002B,
+        COMPASS_ID_HSCDTD004A,
+        COMPASS_ID_AMS0303,
+
+        PRESSURE_ID_BMA085,
+};
+
+enum ext_slave_endian {
+        EXT_SLAVE_BIG_ENDIAN,
+        EXT_SLAVE_LITTLE_ENDIAN,
+        EXT_SLAVE_FS8_BIG_ENDIAN,
+        EXT_SLAVE_FS16_BIG_ENDIAN,
+};
+
+enum ext_slave_bus {
+        EXT_SLAVE_BUS_INVALID = -1,
+        EXT_SLAVE_BUS_PRIMARY = 0,
+        EXT_SLAVE_BUS_SECONDARY = 1
+};
+
+
+/**
+ *  struct ext_slave_platform_data - Platform data for mpu3050 slave devices
+ *
+ *  @get_slave_descr: Function pointer to retrieve the struct ext_slave_descr
+ *                    for this slave
+ *  @irq: the irq number attached to the slave if any.
+ *  @adapt_num: the I2C adapter number.
+ *  @bus: the bus the slave is attached to: enum ext_slave_bus
+ *  @address: the I2C slave address of the slave device.
+ *  @orientation: the mounting matrix of the device relative to MPU.
+ *  @irq_data: private data for the slave irq handler
+ *  @private_data: additional data, user customizable.  Not touched by the MPU
+ *                 driver.
+ *
+ * The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation.  The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ */
+struct ext_slave_platform_data {
+        struct ext_slave_descr *(*get_slave_descr) (void);
+        int irq;
+        int adapt_num;
+        int bus;
+        unsigned char address;
+        signed char orientation[9];
+        void *irq_data;
+        void *private_data;
+};
+
+
+struct tFixPntRange {
+        long mantissa;
+        long fraction;
+};
+
+/**
+ *  struct ext_slave_descr - Description of the slave device for programming.
+ *
+ *  @suspend:   function pointer to put the device in suspended state
+ *  @resume:    function pointer to put the device in running state
+ *  @read:      function that reads the device data
+ *  @init:      function used to preallocate memory used by the driver
+ *  @exit:      function used to free memory allocated for the driver
+ *  @config:    function used to configure the device
+ *  @get_config:function used to get the device's configuration
+ *
+ *  @name:      text name of the device
+ *  @type:      device type. enum ext_slave_type
+ *  @id:        enum ext_slave_id
+ *  @reg:       starting register address to retrieve data.
+ *  @len:       length in bytes of the sensor data.  Should be 6.
+ *  @endian:    byte order of the data. enum ext_slave_endian
+ *  @range:     full scale range of the slave ouput: struct tFixPntRange
+ *
+ *  Defines the functions and information about the slave the mpu3050 needs to
+ *  use the slave device.
+ */
+struct ext_slave_descr {
+        int (*init) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata);
+        int (*exit) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata);
+        int (*suspend) (void *mlsl_handle,
+                        struct ext_slave_descr *slave,
+                        struct ext_slave_platform_data *pdata);
+        int (*resume) (void *mlsl_handle,
+                       struct ext_slave_descr *slave,
+                       struct ext_slave_platform_data *pdata);
+        int (*read) (void *mlsl_handle,
+                     struct ext_slave_descr *slave,
+                     struct ext_slave_platform_data *pdata,
+                     unsigned char *data);
+        int (*config) (void *mlsl_handle,
+                       struct ext_slave_descr *slave,
+                       struct ext_slave_platform_data *pdata,
+                       struct ext_slave_config *config);
+        int (*get_config) (void *mlsl_handle,
+                           struct ext_slave_descr *slave,
+                           struct ext_slave_platform_data *pdata,
+                           struct ext_slave_config *config);
+
+        char *name;
+        unsigned char type;
+        unsigned char id;
+        unsigned char reg;
+        unsigned int len;
+        unsigned char endian;
+        struct tFixPntRange range;
+};
+
+/**
+ * struct mpu3050_platform_data - Platform data for the mpu3050 driver
+ * @int_config:         Bits [7:3] of the int config register.
+ * @orientation:        Orientation matrix of the gyroscope
+ * @level_shifter:      0: VLogic, 1: VDD
+ * @accel:              Accel platform data
+ * @compass:            Compass platform data
+ * @pressure:           Pressure platform data
+ *
+ * Contains platform specific information on how to configure the MPU3050 to
+ * work on this platform.  The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation.  The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ */
+struct mpu3050_platform_data {
+        unsigned char int_config;
+        signed char orientation[MPU_NUM_AXES * MPU_NUM_AXES];
+        unsigned char level_shifter;
+        struct ext_slave_platform_data accel;
+        struct ext_slave_platform_data compass;
+        struct ext_slave_platform_data pressure;
+};
+
+
+/*
+    Accelerometer
+*/
+#define get_accel_slave_descr NULL
+
+#ifdef CONFIG_MPU_SENSORS_ADXL346_V3    /* ADI accelerometer */
+struct ext_slave_descr *adxl346_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr adxl346_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_BMA150_V3     /* Bosch accelerometer */
+struct ext_slave_descr *bma150_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr bma150_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_BMA222_V3     /* Bosch 222 accelerometer */
+struct ext_slave_descr *bma222_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr bma222_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_BMA250_V3     /* Bosch 250 accelerometer */
+struct ext_slave_descr *bma250_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr bma250_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_KXSD9_V3      /* Kionix accelerometer */
+struct ext_slave_descr *kxsd9_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr kxsd9_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_KXTF9_V3      /* Kionix accelerometer */
+struct ext_slave_descr *kxtf9_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr kxtf9_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_LIS331DLH_V3  /* ST accelerometer */
+struct ext_slave_descr *lis331dlh_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr lis331dlh_get_slave_descr
+#endif
+
+
+#ifdef CONFIG_MPU_SENSORS_LIS3DH_V3     /* ST accelerometer */
+struct ext_slave_descr *lis3dh_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr lis3dh_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_LSM303DLHA_V3 /* ST accelerometer */
+struct ext_slave_descr *lsm303dlha_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr lsm303dlha_get_slave_descr
+#endif
+
+/* MPU6000 Accel */
+#if defined(CONFIG_MPU_SENSORS_MPU6000_V3) || \
+    defined(CONFIG_MPU_SENSORS_MPU6000_MODULE_V3)
+struct ext_slave_descr *mantis_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr mantis_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_MMA8450_V3    /* Freescale accelerometer */
+struct ext_slave_descr *mma8450_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr mma8450_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_MMA845X_V3    /* Freescale accelerometer */
+struct ext_slave_descr *mma845x_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr mma845x_get_slave_descr
+#endif
+
+
+/*
+    Compass
+*/
+#define get_compass_slave_descr NULL
+
+#ifdef CONFIG_MPU_SENSORS_AK8975_V3     /* AKM compass */
+struct ext_slave_descr *ak8975_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr ak8975_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_AMI30X_V3     /* AICHI Steel compass */
+struct ext_slave_descr *ami30x_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr ami30x_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_HMC5883_V3    /* Honeywell compass */
+struct ext_slave_descr *hmc5883_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr hmc5883_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_MMC314X_V3    /* MEMSIC compass */
+struct ext_slave_descr *mmc314x_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr mmc314x_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_MMC328X_V3    /* MEMSIC compass */
+struct ext_slave_descr *mmc328x_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr mmc328x_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_LSM303DLHM_V3 /* ST compass */
+struct ext_slave_descr *lsm303dlhm_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr lsm303dlhm_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_YAS529_V3     /* Yamaha compass */
+struct ext_slave_descr *yas529_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr yas529_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_YAS530_V3     /* Yamaha compass */
+struct ext_slave_descr *yas530_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr yas530_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_HSCDTD002B_V3 /* Alps HSCDTD002B compass */
+struct ext_slave_descr *hscdtd002b_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr hscdtd002b_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_HSCDTD004A_V3 /* Alps HSCDTD004A compass */
+struct ext_slave_descr *hscdtd004a_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr hscdtd004a_get_slave_descr
+#endif
+
+#ifdef CONFIG_MPU_SENSORS_AMS0303_V3    /* Amotech ams0303 compass */
+struct ext_slave_descr *ams0303_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr ams0303_get_slave_descr
+#endif
+
+
+/*
+    Pressure
+*/
+#define get_pressure_slave_descr NULL
+
+#ifdef CONFIG_MPU_SENSORS_BMA085_V3     /* BMA pressure */
+struct ext_slave_descr *bma085_get_slave_descr(void);
+#undef get_pressure_slave_descr
+#define get_pressure_slave_descr bma085_get_slave_descr
+#endif
+
+#endif                          /* __MPU_H_ */
+
diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h
index 34066e65fde..f38d4f0a5ae 100644
--- a/include/linux/msdos_fs.h
+++ b/include/linux/msdos_fs.h
@@ -101,6 +101,7 @@ struct __fat_dirent {
 /* <linux/videotext.h> has used 0x72 ('r') in collision, so skip a few */
 #define FAT_IOCTL_GET_ATTRIBUTES        _IOR('r', 0x10, __u32)
 #define FAT_IOCTL_SET_ATTRIBUTES        _IOW('r', 0x11, __u32)
+#define VFAT_IOCTL_GET_VOLUME_ID        _IOR('r', 0x12, __u32)
 
 struct fat_boot_sector {
         __u8    ignored[3];     /* Boot strap short or near jump */
@@ -138,6 +139,17 @@ struct fat_boot_fsinfo {
         __le32   reserved2[4];
 };
 
+struct fat_boot_bsx {
+        __u8     drive;             /* drive number */
+        __u8     reserved1;
+        __u8     signature;         /* extended boot signature */
+        __u8     vol_id[4];     /* volume ID */
+        __u8     vol_label[11]; /* volume label */
+        __u8     type[8];       /* file system type */
+};
+#define FAT16_BSX_OFFSET        36 /* offset of fat_boot_bsx in FAT12 and FAT16 */
+#define FAT32_BSX_OFFSET        64 /* offset of fat_boot_bsx in FAT32 */
+
 struct msdos_dir_entry {
         __u8    name[MSDOS_NAME];/* name and extension */
         __u8    attr;           /* attribute bits */
diff --git a/include/linux/netfilter/xt_qtaguid.h b/include/linux/netfilter/xt_qtaguid.h
new file mode 100644
index 00000000000..ca60fbdec2f
--- /dev/null
+++ b/include/linux/netfilter/xt_qtaguid.h
@@ -0,0 +1,13 @@
+#ifndef _XT_QTAGUID_MATCH_H
+#define _XT_QTAGUID_MATCH_H
+
+/* For now we just replace the xt_owner.
+ * FIXME: make iptables aware of qtaguid. */
+#include <linux/netfilter/xt_owner.h>
+
+#define XT_QTAGUID_UID    XT_OWNER_UID
+#define XT_QTAGUID_GID    XT_OWNER_GID
+#define XT_QTAGUID_SOCKET XT_OWNER_SOCKET
+#define xt_qtaguid_match_info xt_owner_match_info
+
+#endif /* _XT_QTAGUID_MATCH_H */
diff --git a/include/linux/netfilter/xt_quota2.h b/include/linux/netfilter/xt_quota2.h
new file mode 100644
index 00000000000..eadc6903314
--- /dev/null
+++ b/include/linux/netfilter/xt_quota2.h
@@ -0,0 +1,25 @@
+#ifndef _XT_QUOTA_H
+#define _XT_QUOTA_H
+
+enum xt_quota_flags {
+        XT_QUOTA_INVERT    = 1 << 0,
+        XT_QUOTA_GROW      = 1 << 1,
+        XT_QUOTA_PACKET    = 1 << 2,
+        XT_QUOTA_NO_CHANGE = 1 << 3,
+        XT_QUOTA_MASK      = 0x0F,
+};
+
+struct xt_quota_counter;
+
+struct xt_quota_mtinfo2 {
+        char name[15];
+        u_int8_t flags;
+
+        /* Comparison-invariant */
+        aligned_u64 quota;
+
+        /* Used internally by the kernel */
+        struct xt_quota_counter *master __attribute__((aligned(8)));
+};
+
+#endif /* _XT_QUOTA_H */
diff --git a/include/linux/netfilter/xt_socket.h b/include/linux/netfilter/xt_socket.h
index 26d7217bd4f..63594564831 100644
--- a/include/linux/netfilter/xt_socket.h
+++ b/include/linux/netfilter/xt_socket.h
@@ -11,4 +11,10 @@ struct xt_socket_mtinfo1 {
         __u8 flags;
 };
 
+void xt_socket_put_sk(struct sock *sk);
+struct sock *xt_socket_get4_sk(const struct sk_buff *skb,
+                               struct xt_action_param *par);
+struct sock *xt_socket_get6_sk(const struct sk_buff *skb,
+                               struct xt_action_param *par);
+
 #endif /* _XT_SOCKET_H */
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index 6081493db68..10229f76bcc 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -51,6 +51,9 @@
  * PG_hwpoison indicates that a page got corrupted in hardware and contains
  * data with incorrect ECC bits that triggered a machine check. Accessing is
  * not safe since it may cause another machine check. Don't touch!
+ *
+ * PG_wasactive reflects that a page previously was promoted to active status.
+ * Such pages should be considered higher priority for cleancache backends.
  */
 
 /*
@@ -104,6 +107,9 @@ enum pageflags {
 #ifdef CONFIG_MEMORY_FAILURE
         PG_hwpoison,            /* hardware poisoned page. Don't touch */
 #endif
+#ifdef CONFIG_CLEANCACHE
+        PG_was_active,
+#endif
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
         PG_compound_lock,
 #endif
@@ -212,6 +218,10 @@ PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
 
 __PAGEFLAG(SlobFree, slob_free)
 
+#ifdef CONFIG_CLEANCACHE
+PAGEFLAG(WasActive, was_active)
+#endif
+
 __PAGEFLAG(SlubFrozen, slub_frozen)
 
 /*
diff --git a/include/linux/pda_power.h b/include/linux/pda_power.h
index c9e4d814ff7..2bb62bf296a 100644
--- a/include/linux/pda_power.h
+++ b/include/linux/pda_power.h
@@ -35,6 +35,8 @@ struct pda_power_pdata {
         unsigned int polling_interval; /* msecs, default is 2000 */
 
         unsigned long ac_max_uA; /* current to draw when on AC */
+
+        bool use_otg_notifier;
 };
 
 #endif /* __PDA_POWER_H__ */
diff --git a/include/linux/platform_data/exynos_usb3_drd.h b/include/linux/platform_data/exynos_usb3_drd.h
new file mode 100644
index 00000000000..1bad86fddd5
--- /dev/null
+++ b/include/linux/platform_data/exynos_usb3_drd.h
@@ -0,0 +1,22 @@
+/* inlude/linux/platform_data/exynos_usb3_drd.h
+ *
+ * Copyright (c) 2012 Samsung Electronics Co. Ltd
+ * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
+ *
+ * EXYNOS SuperSpeed USB 3.0 DRD Controller platform data
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef _EXYNOS_USB3_DRD_H_
+#define _EXYNOS_USB3_DRD_H_
+
+struct exynos_usb3_drd_pdata {
+        int phy_type;
+        int (*phy_init)(struct platform_device *pdev, int type);
+        int (*phy_exit)(struct platform_device *pdev, int type);
+};
+
+#endif
diff --git a/include/linux/platform_data/ram_console.h b/include/linux/platform_data/ram_console.h
new file mode 100644
index 00000000000..9f1125c1106
--- /dev/null
+++ b/include/linux/platform_data/ram_console.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_
+#define _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_
+
+struct ram_console_platform_data {
+        const char *bootinfo;
+};
+
+#endif /* _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_ */
diff --git a/include/linux/plist.h b/include/linux/plist.h
index c9b9f322c8d..aa0fb390bd2 100644
--- a/include/linux/plist.h
+++ b/include/linux/plist.h
@@ -77,14 +77,9 @@
 
 #include <linux/kernel.h>
 #include <linux/list.h>
-#include <linux/spinlock_types.h>
 
 struct plist_head {
         struct list_head node_list;
-#ifdef CONFIG_DEBUG_PI_LIST
-        raw_spinlock_t *rawlock;
-        spinlock_t *spinlock;
-#endif
 };
 
 struct plist_node {
@@ -93,37 +88,13 @@ struct plist_node {
         struct list_head        node_list;
 };
 
-#ifdef CONFIG_DEBUG_PI_LIST
-# define PLIST_HEAD_LOCK_INIT(_lock)            .spinlock = _lock
-# define PLIST_HEAD_LOCK_INIT_RAW(_lock)        .rawlock = _lock
-#else
-# define PLIST_HEAD_LOCK_INIT(_lock)
-# define PLIST_HEAD_LOCK_INIT_RAW(_lock)
-#endif
-
-#define _PLIST_HEAD_INIT(head)                          \
-        .node_list = LIST_HEAD_INIT((head).node_list)
-
 /**
  * PLIST_HEAD_INIT - static struct plist_head initializer
  * @head:       struct plist_head variable name
- * @_lock:      lock to initialize for this list
- */
-#define PLIST_HEAD_INIT(head, _lock)                    \
-{                                                       \
-        _PLIST_HEAD_INIT(head),                         \
-        PLIST_HEAD_LOCK_INIT(&(_lock))                  \
-}
-
-/**
- * PLIST_HEAD_INIT_RAW - static struct plist_head initializer
- * @head:       struct plist_head variable name
- * @_lock:      lock to initialize for this list
  */
-#define PLIST_HEAD_INIT_RAW(head, _lock)                \
+#define PLIST_HEAD_INIT(head)                           \
 {                                                       \
-        _PLIST_HEAD_INIT(head),                         \
-        PLIST_HEAD_LOCK_INIT_RAW(&(_lock))              \
+        .node_list = LIST_HEAD_INIT((head).node_list)   \
 }
 
 /**
@@ -141,31 +112,11 @@ struct plist_node {
 /**
  * plist_head_init - dynamic struct plist_head initializer
  * @head:       &struct plist_head pointer
- * @lock:       spinlock protecting the list (debugging)
  */
 static inline void
-plist_head_init(struct plist_head *head, spinlock_t *lock)
+plist_head_init(struct plist_head *head)
 {
         INIT_LIST_HEAD(&head->node_list);
-#ifdef CONFIG_DEBUG_PI_LIST
-        head->spinlock = lock;
-        head->rawlock = NULL;
-#endif
-}
-
-/**
- * plist_head_init_raw - dynamic struct plist_head initializer
- * @head:       &struct plist_head pointer
- * @lock:       raw_spinlock protecting the list (debugging)
- */
-static inline void
-plist_head_init_raw(struct plist_head *head, raw_spinlock_t *lock)
-{
-        INIT_LIST_HEAD(&head->node_list);
-#ifdef CONFIG_DEBUG_PI_LIST
-        head->rawlock = lock;
-        head->spinlock = NULL;
-#endif
 }
 
 /**
diff --git a/include/linux/power/cpupower.h b/include/linux/power/cpupower.h
new file mode 100644
index 00000000000..9bc7039a03f
--- /dev/null
+++ b/include/linux/power/cpupower.h
@@ -0,0 +1,22 @@
+/*
+ * cpupower.h
+ *
+ * Copyright (c) 2011 Vincent Guittot <vincent.guittot@linaro.org>
+ *
+ * This file is released under the GPLv2
+ *
+ */
+
+#ifndef _CPUPOWER_H_
+#define _CPUPOWER_H_
+
+#define ARM_DEFAULT_SCALE 0
+#define ARM_POWER_SCALE 1
+
+struct cputopo_power {
+        int max; /* max idx in the table */
+        unsigned int step; /* frequency step for the table */
+        unsigned int *table; /* table of cpu_power */
+};
+
+#endif
diff --git a/include/linux/power/max17047_battery.h b/include/linux/power/max17047_battery.h
new file mode 100644
index 00000000000..9806eeca524
--- /dev/null
+++ b/include/linux/power/max17047_battery.h
@@ -0,0 +1,16 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MAX17047_BATTERY_H_
+#define __MAX17047_BATTERY_H_
+
+struct max17047_platform_data {
+        int (*battery_online)(void);
+        int (*charger_online)(void);
+        int (*charger_enable)(void);
+};
+
+#endif /* __MAX17047_BATTERY_H_ */
diff --git a/include/linux/power/max8677_charger.h b/include/linux/power/max8677_charger.h
new file mode 100644
index 00000000000..c7f20b630dc
--- /dev/null
+++ b/include/linux/power/max8677_charger.h
@@ -0,0 +1,39 @@
+/*
+ * max8903_charger.h - Maxim 8903 USB/Adapter Charger Driver
+ *
+ * Copyright (C) 2011 Samsung Electronics
+ * MyungJoo Ham <myungjoo.ham@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef __MAX8677_CHARGER_H__
+#define __MAX8677_CHARGER_H__
+
+struct max8677_pdata {
+        /*
+         * GPIOs
+         * cen, chg, flt, and usus are optional.
+         * dok, dcm, and uok are not optional depending on the status of
+         * dc_valid and usb_valid.
+         */
+        int cen;        /* Charger Enable input */
+        int uok;        /* USB Power OK output */
+        int chg;        /* Charger status output */
+        int done;       /* Charging Done flag */
+};
+
+#endif /* __MAX8677_CHARGER_H__ */
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index 204c18dfdc9..2287c321413 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -14,6 +14,7 @@
 #define __LINUX_POWER_SUPPLY_H__
 
 #include <linux/device.h>
+#include <linux/wakelock.h>
 #include <linux/workqueue.h>
 #include <linux/leds.h>
 
@@ -163,6 +164,9 @@ struct power_supply {
         /* private */
         struct device *dev;
         struct work_struct changed_work;
+        spinlock_t changed_lock;
+        bool changed;
+        struct wake_lock work_wake_lock;
 
 #ifdef CONFIG_LEDS_TRIGGERS
         struct led_trigger *charging_full_trig;
diff --git a/include/linux/preempt.h b/include/linux/preempt.h
index 2e681d9555b..35872aa6554 100644
--- a/include/linux/preempt.h
+++ b/include/linux/preempt.h
@@ -10,18 +10,45 @@
 #include <linux/linkage.h>
 #include <linux/list.h>
 
+/* cannot include rcupdate.h here, so open-code this */
+
+#if defined(CONFIG_JRCU)
+# define __add_preempt_count(val) do { \
+        int newval = (preempt_count() += (val)); \
+        if (newval == (val)) \
+                smp_wmb(); \
+} while (0)
+#else
+# define __add_preempt_count(val) do { preempt_count() += (val); } while (0)
+#endif
+
+#if defined(CONFIG_JRCU_LAZY) || !defined(CONFIG_JRCU)
+# define __sub_preempt_count(val) do { preempt_count() -= (val); } while (0)
+#else
+# define __sub_preempt_count(val) do { \
+        int newval = (preempt_count() -= (val)); \
+        if (newval == 0) { \
+                /* race with preemption OK, preempt will do the mb for us */ \
+                smp_wmb(); \
+        } \
+} while (0)
+#endif
+
 #if defined(CONFIG_DEBUG_PREEMPT) || defined(CONFIG_PREEMPT_TRACER)
   extern void add_preempt_count(int val);
   extern void sub_preempt_count(int val);
 #else
-# define add_preempt_count(val) do { preempt_count() += (val); } while (0)
-# define sub_preempt_count(val) do { preempt_count() -= (val); } while (0)
+# define add_preempt_count(val) __add_preempt_count(val)
+# define sub_preempt_count(val) __sub_preempt_count(val)
 #endif
 
 #define inc_preempt_count() add_preempt_count(1)
 #define dec_preempt_count() sub_preempt_count(1)
 
 #define preempt_count() (current_thread_info()->preempt_count)
+#ifdef CONFIG_PREEMPT_COUNT_CPU
+extern int preempt_count_cpu(int cpu);
+#endif
 
 #ifdef CONFIG_PREEMPT
 
diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h
index 033b507b33b..fcda1b2195f 100644
--- a/include/linux/rbtree.h
+++ b/include/linux/rbtree.h
@@ -130,6 +130,17 @@ static inline void rb_set_color(struct rb_node *rb, int color)
 }
 
 #define RB_ROOT (struct rb_root) { NULL, }
+
+static inline void rb_root_init(struct rb_root *root, struct rb_node *node)
+{
+        root->rb_node = node;
+        if (node) {
+                node->rb_parent_color = RB_BLACK; /* black, no parent */
+                node->rb_left  = NULL;
+                node->rb_right = NULL;
+        }
+}
+
 #define rb_entry(ptr, type, member) container_of(ptr, type, member)
 
 #define RB_EMPTY_ROOT(root)     ((root)->rb_node == NULL)
diff --git a/include/linux/rcu_types.h b/include/linux/rcu_types.h
new file mode 100644
index 00000000000..fd3570d0e6c
--- /dev/null
+++ b/include/linux/rcu_types.h
@@ -0,0 +1,18 @@
+#ifndef __LINUX_RCU_TYPES_H
+#define __LINUX_RCU_TYPES_H
+
+#ifdef __KERNEL__
+
+/**
+ * struct rcu_head - callback structure for use with RCU
+ * @next: next update requests in a list
+ * @func: actual update function to call after the grace period.
+ */
+struct rcu_head {
+        struct rcu_head *next;
+        void (*func)(struct rcu_head *head);
+};
+
+#endif
+
+#endif
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 99f9aa7c280..d13d2d577d2 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -33,6 +33,7 @@
 #ifndef __LINUX_RCUPDATE_H
 #define __LINUX_RCUPDATE_H
 
+#include <linux/rcu_types.h>
 #include <linux/cache.h>
 #include <linux/spinlock.h>
 #include <linux/threads.h>
@@ -64,16 +65,6 @@ static inline void rcutorture_record_progress(unsigned long vernum)
 #define ULONG_CMP_GE(a, b)      (ULONG_MAX / 2 >= (a) - (b))
 #define ULONG_CMP_LT(a, b)      (ULONG_MAX / 2 < (a) - (b))
 
-/**
- * struct rcu_head - callback structure for use with RCU
- * @next: next update requests in a list
- * @func: actual update function to call after the grace period.
- */
-struct rcu_head {
-        struct rcu_head *next;
-        void (*func)(struct rcu_head *head);
-};
-
 /* Exported common interfaces */
 extern void call_rcu_sched(struct rcu_head *head,
                            void (*func)(struct rcu_head *rcu));
@@ -156,6 +147,8 @@ static inline void rcu_exit_nohz(void)
 #include <linux/rcutree.h>
 #elif defined(CONFIG_TINY_RCU) || defined(CONFIG_TINY_PREEMPT_RCU)
 #include <linux/rcutiny.h>
+#elif defined(CONFIG_JRCU)
+#include <linux/jrcu.h>
 #else
 #error "Unknown RCU implementation specified to kernel configuration"
 #endif
diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h
index 8d522ffeda3..de17134244f 100644
--- a/include/linux/rtmutex.h
+++ b/include/linux/rtmutex.h
@@ -66,7 +66,7 @@ struct hrtimer_sleeper;
 
 #define __RT_MUTEX_INITIALIZER(mutexname) \
         { .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \
-        , .wait_list = PLIST_HEAD_INIT_RAW(mutexname.wait_list, mutexname.wait_lock) \
+        , .wait_list = PLIST_HEAD_INIT(mutexname.wait_list) \
         , .owner = NULL \
         __DEBUG_RT_MUTEX_INITIALIZER(mutexname)}
 
@@ -100,7 +100,7 @@ extern void rt_mutex_unlock(struct rt_mutex *lock);
 
 #ifdef CONFIG_RT_MUTEXES
 # define INIT_RT_MUTEXES(tsk)                                           \
-        .pi_waiters     = PLIST_HEAD_INIT(tsk.pi_waiters, tsk.pi_lock), \
+        .pi_waiters     = PLIST_HEAD_INIT(tsk.pi_waiters),      \
         INIT_RT_MUTEX_DEBUG(tsk)
 #else
 # define INIT_RT_MUTEXES(tsk)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 443ec43bebe..1c44f22adae 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -901,6 +901,7 @@ struct sched_group_power {
          * single CPU.
          */
         unsigned int power, power_orig;
+        unsigned long next_update;
 };
 
 struct sched_group {
@@ -1526,6 +1527,13 @@ struct task_struct {
         int make_it_fail;
 #endif
         struct prop_local_single dirties;
+        /*
+         * when (nr_dirtied >= nr_dirtied_pause), it's time to call
+         * balance_dirty_pages() for some dirty throttling pause
+         */
+        int nr_dirtied;
+        int nr_dirtied_pause;
+
 #ifdef CONFIG_LATENCYTOP
         int latency_record_count;
         struct latency_record latency_record[LT_SAVECOUNT];
@@ -1754,6 +1762,9 @@ static inline void put_task_struct(struct task_struct *t)
 extern void task_times(struct task_struct *p, cputime_t *ut, cputime_t *st);
 extern void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st);
 
+extern int task_free_register(struct notifier_block *n);
+extern int task_free_unregister(struct notifier_block *n);
+
 /*
  * Per process flags
  */
@@ -1886,6 +1897,7 @@ static inline int set_cpus_allowed(struct task_struct *p, cpumask_t new_mask)
  * Please use one of the three interfaces below.
  */
 extern unsigned long long notrace sched_clock(void);
+extern unsigned long long notrace sched_clock_clksrc(void);
 /*
  * See the comment in kernel/sched_clock.c
  */
@@ -1960,6 +1972,8 @@ extern void wake_up_idle_cpu(int cpu);
 static inline void wake_up_idle_cpu(int cpu) { }
 #endif
 
+extern void force_cpu_resched(int cpu);
+
 extern unsigned int sysctl_sched_latency;
 extern unsigned int sysctl_sched_min_granularity;
 extern unsigned int sysctl_sched_wakeup_granularity;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index a5c31146a33..0d239897b2f 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -245,6 +245,7 @@ struct uart_ops {
         void            (*pm)(struct uart_port *, unsigned int state,
                               unsigned int oldstate);
         int             (*set_wake)(struct uart_port *, unsigned int state);
+        void            (*wake_peer)(struct uart_port *);
 
         /*
          * Return a string describing the type of the port
diff --git a/include/linux/slab.h b/include/linux/slab.h
index ad4dd1c8d30..3ea67d7bba6 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -79,6 +79,10 @@
 /* The following flags affect the page allocator grouping pages by mobility */
 #define SLAB_RECLAIM_ACCOUNT    0x00020000UL            /* Objects are reclaimable */
 #define SLAB_TEMPORARY          SLAB_RECLAIM_ACCOUNT    /* Objects are short-lived */
+
+/* Following flags should only be used by allocator specific flags */
+#define SLAB_ALLOC_PRIVATE      0x000000ffUL
+
 /*
  * ZERO_SIZE_PTR will be returned for zero sized kmalloc requests.
  *
@@ -163,6 +167,8 @@ size_t ksize(const void *);
  */
 #ifdef CONFIG_SLUB
 #include <linux/slub_def.h>
+#elif defined(CONFIG_SLQB)
+#include <linux/slqb_def.h>
 #elif defined(CONFIG_SLOB)
 #include <linux/slob_def.h>
 #else
@@ -265,7 +271,7 @@ static inline void *kmem_cache_alloc_node(struct kmem_cache *cachep,
  * allocator where we care about the real place the memory allocation
  * request comes from.
  */
-#if defined(CONFIG_DEBUG_SLAB) || defined(CONFIG_SLUB) || \
+#if defined(CONFIG_DEBUG_SLAB) || defined(CONFIG_SLUB) || defined(CONFIG_SLQB_DEBUG) || \
         (defined(CONFIG_SLAB) && defined(CONFIG_TRACING))
 extern void *__kmalloc_track_caller(size_t, gfp_t, unsigned long);
 #define kmalloc_track_caller(size, flags) \
@@ -284,7 +290,7 @@ extern void *__kmalloc_track_caller(size_t, gfp_t, unsigned long);
  * standard allocator where we care about the real place the memory
  * allocation request comes from.
  */
-#if defined(CONFIG_DEBUG_SLAB) || defined(CONFIG_SLUB) || \
+#if defined(CONFIG_DEBUG_SLAB) || defined(CONFIG_SLUB) || defined(CONFIG_SLQB_DEBUG) || \
         (defined(CONFIG_SLAB) && defined(CONFIG_TRACING))
 extern void *__kmalloc_node_track_caller(size_t, gfp_t, int, unsigned long);
 #define kmalloc_node_track_caller(size, flags, node) \
diff --git a/include/linux/slqb_def.h b/include/linux/slqb_def.h
new file mode 100644
index 00000000000..1cb68cc9663
--- /dev/null
+++ b/include/linux/slqb_def.h
@@ -0,0 +1,300 @@
+#ifndef _LINUX_SLQB_DEF_H
+#define _LINUX_SLQB_DEF_H
+
+/*
+ * SLQB : A slab allocator with object queues.
+ *
+ * (C) 2008 Nick Piggin <npiggin@suse.de>
+ */
+#include <linux/types.h>
+#include <linux/gfp.h>
+#include <linux/workqueue.h>
+#include <linux/kobject.h>
+#include <linux/rcu_types.h>
+#include <linux/mm_types.h>
+#include <linux/kernel.h>
+
+#define SLAB_NUMA               0x00000001UL    /* shortcut */
+
+enum stat_item {
+        ALLOC,                  /* Allocation count */
+        ALLOC_SLAB_FILL,        /* Fill freelist from page list */
+        ALLOC_SLAB_NEW,         /* New slab acquired from page allocator */
+        FREE,                   /* Free count */
+        FREE_REMOTE,            /* NUMA: freeing to remote list */
+        FLUSH_FREE_LIST,        /* Freelist flushed */
+        FLUSH_FREE_LIST_OBJECTS, /* Objects flushed from freelist */
+        FLUSH_FREE_LIST_REMOTE, /* Objects flushed from freelist to remote */
+        FLUSH_SLAB_PARTIAL,     /* Freeing moves slab to partial list */
+        FLUSH_SLAB_FREE,        /* Slab freed to the page allocator */
+        FLUSH_RFREE_LIST,       /* Rfree list flushed */
+        FLUSH_RFREE_LIST_OBJECTS, /* Rfree objects flushed */
+        CLAIM_REMOTE_LIST,      /* Remote freed list claimed */
+        CLAIM_REMOTE_LIST_OBJECTS, /* Remote freed objects claimed */
+        NR_SLQB_STAT_ITEMS
+};
+
+/*
+ * Singly-linked list with head, tail, and nr
+ */
+struct kmlist {
+        unsigned long   nr;
+        void            **head;
+        void            **tail;
+};
+
+/*
+ * Every kmem_cache_list has a kmem_cache_remote_free structure, by which
+ * objects can be returned to the kmem_cache_list from remote CPUs.
+ */
+struct kmem_cache_remote_free {
+        spinlock_t      lock;
+        struct kmlist   list;
+} ____cacheline_aligned;
+
+/*
+ * A kmem_cache_list manages all the slabs and objects allocated from a given
+ * source. Per-cpu kmem_cache_lists allow node-local allocations. Per-node
+ * kmem_cache_lists allow off-node allocations (but require locking).
+ */
+struct kmem_cache_list {
+                                /* Fastpath LIFO freelist of objects */
+        struct kmlist           freelist;
+#ifdef CONFIG_SMP
+                                /* remote_free has reached a watermark */
+        int                     remote_free_check;
+#endif
+                                /* kmem_cache corresponding to this list */
+        struct kmem_cache       *cache;
+
+                                /* Number of partial slabs (pages) */
+        unsigned long           nr_partial;
+
+                                /* Slabs which have some free objects */
+        struct list_head        partial;
+
+                                /* Total number of slabs allocated */
+        unsigned long           nr_slabs;
+
+                                /* Protects nr_partial, nr_slabs, and partial */
+        spinlock_t              page_lock;
+
+#ifdef CONFIG_SMP
+        /*
+         * In the case of per-cpu lists, remote_free is for objects freed by
+         * non-owner CPU back to its home list. For per-node lists, remote_free
+         * is always used to free objects.
+         */
+        struct kmem_cache_remote_free remote_free;
+#endif
+
+#ifdef CONFIG_SLQB_STATS
+        unsigned long           stats[NR_SLQB_STAT_ITEMS];
+#endif
+} ____cacheline_aligned;
+
+/*
+ * Primary per-cpu, per-kmem_cache structure.
+ */
+struct kmem_cache_cpu {
+        struct kmem_cache_list  list;           /* List for node-local slabs */
+        unsigned int            colour_next;    /* Next colour offset to use */
+
+#ifdef CONFIG_SMP
+        /*
+         * rlist is a list of objects that don't fit on list.freelist (ie.
+         * wrong node). The objects all correspond to a given kmem_cache_list,
+         * remote_cache_list. To free objects to another list, we must first
+         * flush the existing objects, then switch remote_cache_list.
+         *
+         * An NR_CPUS or MAX_NUMNODES array would be nice here, but then we
+         * get to O(NR_CPUS^2) memory consumption situation.
+         */
+        struct kmlist           rlist;
+        struct kmem_cache_list  *remote_cache_list;
+#endif
+} ____cacheline_aligned_in_smp;
+
+/*
+ * Per-node, per-kmem_cache structure. Used for node-specific allocations.
+ */
+struct kmem_cache_node {
+        struct kmem_cache_list  list;
+        spinlock_t              list_lock;      /* protects access to list */
+} ____cacheline_aligned;
+
+/*
+ * Management object for a slab cache.
+ */
+struct kmem_cache {
+        unsigned long   flags;
+        int             hiwater;        /* LIFO list high watermark */
+        int             freebatch;      /* LIFO freelist batch flush size */
+#ifdef CONFIG_SMP
+        struct kmem_cache_cpu   **cpu_slab; /* dynamic per-cpu structures */
+#else
+        struct kmem_cache_cpu   cpu_slab;
+#endif
+        int             objsize;        /* Size of object without meta data */
+        int             offset;         /* Free pointer offset. */
+        int             objects;        /* Number of objects in slab */
+
+#ifdef CONFIG_NUMA
+        struct kmem_cache_node  **node_slab; /* dynamic per-node structures */
+#endif
+
+        int             size;           /* Size of object including meta data */
+        int             order;          /* Allocation order */
+        gfp_t           allocflags;     /* gfp flags to use on allocation */
+        unsigned int    colour_range;   /* range of colour counter */
+        unsigned int    colour_off;     /* offset per colour */
+        void            (*ctor)(void *);
+
+        const char      *name;          /* Name (only for display!) */
+        struct list_head list;          /* List of slab caches */
+
+        int             align;          /* Alignment */
+        int             inuse;          /* Offset to metadata */
+
+#ifdef CONFIG_SLQB_SYSFS
+        struct kobject  kobj;           /* For sysfs */
+#endif
+} ____cacheline_aligned;
+
+/*
+ * Kmalloc subsystem.
+ */
+#if defined(ARCH_KMALLOC_MINALIGN) && ARCH_KMALLOC_MINALIGN > 8
+#define KMALLOC_MIN_SIZE ARCH_KMALLOC_MINALIGN
+#else
+#define KMALLOC_MIN_SIZE 8
+#endif
+
+#define KMALLOC_SHIFT_LOW ilog2(KMALLOC_MIN_SIZE)
+#define KMALLOC_SHIFT_SLQB_HIGH (PAGE_SHIFT +                   \
+                                 ((9 <= (MAX_ORDER - 1)) ? 9 : (MAX_ORDER - 1)))
+
+extern struct kmem_cache kmalloc_caches[KMALLOC_SHIFT_SLQB_HIGH + 1];
+extern struct kmem_cache kmalloc_caches_dma[KMALLOC_SHIFT_SLQB_HIGH + 1];
+
+/*
+ * Constant size allocations use this path to find index into kmalloc caches
+ * arrays. get_slab() function is used for non-constant sizes.
+ */
+static __always_inline int kmalloc_index(size_t size)
+{
+        extern int ____kmalloc_too_large(void);
+
+        if (unlikely(size <= KMALLOC_MIN_SIZE))
+                return KMALLOC_SHIFT_LOW;
+
+#if L1_CACHE_BYTES < 64
+        if (size > 64 && size <= 96)
+                return 1;
+#endif
+#if L1_CACHE_BYTES < 128
+        if (size > 128 && size <= 192)
+                return 2;
+#endif
+        if (size <=       8) return 3;
+        if (size <=      16) return 4;
+        if (size <=      32) return 5;
+        if (size <=      64) return 6;
+        if (size <=     128) return 7;
+        if (size <=     256) return 8;
+        if (size <=     512) return 9;
+        if (size <=       1024) return 10;
+        if (size <=   2 * 1024) return 11;
+        if (size <=   4 * 1024) return 12;
+        if (size <=   8 * 1024) return 13;
+        if (size <=  16 * 1024) return 14;
+        if (size <=  32 * 1024) return 15;
+        if (size <=  64 * 1024) return 16;
+        if (size <= 128 * 1024) return 17;
+        if (size <= 256 * 1024) return 18;
+        if (size <= 512 * 1024) return 19;
+        if (size <= 1024 * 1024) return 20;
+        if (size <=  2 * 1024 * 1024) return 21;
+        if (size <=  4 * 1024 * 1024) return 22;
+        if (size <=  8 * 1024 * 1024) return 23;
+        if (size <=  16 * 1024 * 1024) return 24;
+        if (size <=  32 * 1024 * 1024) return 25;
+        return ____kmalloc_too_large();
+}
+
+#ifdef CONFIG_ZONE_DMA
+#define SLQB_DMA __GFP_DMA
+#else
+/* Disable "DMA slabs" */
+#define SLQB_DMA (__force gfp_t)0
+#endif
+
+/*
+ * Find the kmalloc slab cache for a given combination of allocation flags and
+ * size. Should really only be used for constant 'size' arguments, due to
+ * bloat.
+ */
+static __always_inline struct kmem_cache *kmalloc_slab(size_t size, gfp_t flags)
+{
+        int index;
+
+        if (unlikely(size > 1UL << KMALLOC_SHIFT_SLQB_HIGH))
+                return NULL;
+        if (unlikely(!size))
+                return ZERO_SIZE_PTR;
+
+        index = kmalloc_index(size);
+        if (likely(!(flags & SLQB_DMA)))
+                return &kmalloc_caches[index];
+        else
+                return &kmalloc_caches_dma[index];
+}
+
+void *kmem_cache_alloc(struct kmem_cache *, gfp_t);
+void *__kmalloc(size_t size, gfp_t flags);
+
+#ifndef ARCH_KMALLOC_MINALIGN
+#define ARCH_KMALLOC_MINALIGN __alignof__(unsigned long long)
+#endif
+
+#ifndef ARCH_SLAB_MINALIGN
+#define ARCH_SLAB_MINALIGN __alignof__(unsigned long long)
+#endif
+
+#define KMALLOC_HEADER (ARCH_KMALLOC_MINALIGN < sizeof(void *) ?        \
+                                sizeof(void *) : ARCH_KMALLOC_MINALIGN)
+
+static __always_inline void *kmalloc(size_t size, gfp_t flags)
+{
+        if (__builtin_constant_p(size)) {
+                struct kmem_cache *s;
+
+                s = kmalloc_slab(size, flags);
+                if (unlikely(ZERO_OR_NULL_PTR(s)))
+                        return s;
+
+                return kmem_cache_alloc(s, flags);
+        }
+        return __kmalloc(size, flags);
+}
+
+#ifdef CONFIG_NUMA
+void *__kmalloc_node(size_t size, gfp_t flags, int node);
+void *kmem_cache_alloc_node(struct kmem_cache *, gfp_t flags, int node);
+
+static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node)
+{
+        if (__builtin_constant_p(size)) {
+                struct kmem_cache *s;
+
+                s = kmalloc_slab(size, flags);
+                if (unlikely(ZERO_OR_NULL_PTR(s)))
+                        return s;
+
+                return kmem_cache_alloc_node(s, flags, node);
+        }
+        return __kmalloc_node(size, flags, node);
+}
+#endif
+
+#endif /* _LINUX_SLQB_DEF_H */
diff --git a/include/linux/sockios.h b/include/linux/sockios.h
index 7997a506ad4..f7ffe36db03 100644
--- a/include/linux/sockios.h
+++ b/include/linux/sockios.h
@@ -65,6 +65,7 @@
 #define SIOCDIFADDR     0x8936          /* delete PA address            */
 #define SIOCSIFHWBROADCAST      0x8937  /* set hardware broadcast addr  */
 #define SIOCGIFCOUNT    0x8938          /* get number of devices */
+#define SIOCKILLADDR    0x8939          /* kill sockets with this local addr */
 
 #define SIOCGIFBR       0x8940          /* Bridging support             */
 #define SIOCSIFBR       0x8941          /* Set bridging options         */
diff --git a/include/linux/splice.h b/include/linux/splice.h
index 997c3b4c212..26e5b613ded 100644
--- a/include/linux/splice.h
+++ b/include/linux/splice.h
@@ -88,5 +88,7 @@ extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *,
 extern int splice_grow_spd(struct pipe_inode_info *, struct splice_pipe_desc *);
 extern void splice_shrink_spd(struct pipe_inode_info *,
                                 struct splice_pipe_desc *);
+extern void spd_release_page(struct splice_pipe_desc *, unsigned int);
 
+extern const struct pipe_buf_operations page_cache_pipe_buf_ops;
 #endif
diff --git a/include/linux/switch.h b/include/linux/switch.h
new file mode 100644
index 00000000000..3e4c748e343
--- /dev/null
+++ b/include/linux/switch.h
@@ -0,0 +1,53 @@
+/*
+ *  Switch class driver
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+*/
+
+#ifndef __LINUX_SWITCH_H__
+#define __LINUX_SWITCH_H__
+
+struct switch_dev {
+        const char      *name;
+        struct device   *dev;
+        int             index;
+        int             state;
+
+        ssize_t (*print_name)(struct switch_dev *sdev, char *buf);
+        ssize_t (*print_state)(struct switch_dev *sdev, char *buf);
+};
+
+struct gpio_switch_platform_data {
+        const char *name;
+        unsigned        gpio;
+
+        /* if NULL, switch_dev.name will be printed */
+        const char *name_on;
+        const char *name_off;
+        /* if NULL, "0" or "1" will be printed */
+        const char *state_on;
+        const char *state_off;
+};
+
+extern int switch_dev_register(struct switch_dev *sdev);
+extern void switch_dev_unregister(struct switch_dev *sdev);
+
+static inline int switch_get_state(struct switch_dev *sdev)
+{
+        return sdev->state;
+}
+
+extern void switch_set_state(struct switch_dev *sdev, int state);
+
+#endif /* __LINUX_SWITCH_H__ */
diff --git a/include/linux/synaptics_i2c_rmi.h b/include/linux/synaptics_i2c_rmi.h
new file mode 100644
index 00000000000..5539cc52077
--- /dev/null
+++ b/include/linux/synaptics_i2c_rmi.h
@@ -0,0 +1,55 @@
+/*
+ * include/linux/synaptics_i2c_rmi.h - platform data structure for f75375s sensor
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_SYNAPTICS_I2C_RMI_H
+#define _LINUX_SYNAPTICS_I2C_RMI_H
+
+#define SYNAPTICS_I2C_RMI_NAME "synaptics-rmi-ts"
+
+enum {
+        SYNAPTICS_FLIP_X = 1UL << 0,
+        SYNAPTICS_FLIP_Y = 1UL << 1,
+        SYNAPTICS_SWAP_XY = 1UL << 2,
+        SYNAPTICS_SNAP_TO_INACTIVE_EDGE = 1UL << 3,
+};
+
+struct synaptics_i2c_rmi_platform_data {
+        uint32_t version;       /* Use this entry for panels with */
+                                /* (major << 8 | minor) version or above. */
+                                /* If non-zero another array entry follows */
+        int (*power)(int on);   /* Only valid in first array entry */
+        uint32_t flags;
+        unsigned long irqflags;
+        uint32_t inactive_left; /* 0x10000 = screen width */
+        uint32_t inactive_right; /* 0x10000 = screen width */
+        uint32_t inactive_top; /* 0x10000 = screen height */
+        uint32_t inactive_bottom; /* 0x10000 = screen height */
+        uint32_t snap_left_on; /* 0x10000 = screen width */
+        uint32_t snap_left_off; /* 0x10000 = screen width */
+        uint32_t snap_right_on; /* 0x10000 = screen width */
+        uint32_t snap_right_off; /* 0x10000 = screen width */
+        uint32_t snap_top_on; /* 0x10000 = screen height */
+        uint32_t snap_top_off; /* 0x10000 = screen height */
+        uint32_t snap_bottom_on; /* 0x10000 = screen height */
+        uint32_t snap_bottom_off; /* 0x10000 = screen height */
+        uint32_t fuzz_x; /* 0x10000 = screen width */
+        uint32_t fuzz_y; /* 0x10000 = screen height */
+        int fuzz_p;
+        int fuzz_w;
+        int8_t sensitivity_adjust;
+};
+
+#endif /* _LINUX_SYNAPTICS_I2C_RMI_H */
diff --git a/include/linux/uid_stat.h b/include/linux/uid_stat.h
new file mode 100644
index 00000000000..6bd6c4e52d1
--- /dev/null
+++ b/include/linux/uid_stat.h
@@ -0,0 +1,29 @@
+/* include/linux/uid_stat.h
+ *
+ * Copyright (C) 2008-2009 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __uid_stat_h
+#define __uid_stat_h
+
+/* Contains definitions for resource tracking per uid. */
+
+#ifdef CONFIG_UID_STAT
+int uid_stat_tcp_snd(uid_t uid, int size);
+int uid_stat_tcp_rcv(uid_t uid, int size);
+#else
+#define uid_stat_tcp_snd(uid, size) do {} while (0);
+#define uid_stat_tcp_rcv(uid, size) do {} while (0);
+#endif
+
+#endif /* _LINUX_UID_STAT_H */
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 6cd15762977..bca6a158e55 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -989,6 +989,9 @@ extern int usb_disabled(void);
 
 /* The following flags are used internally by usbcore and HCDs */
 #define URB_DIR_IN              0x0200  /* Transfer from device to host */
+#ifdef CONFIG_HOST_COMPLIANT_TEST
+#define URB_HCD_DRIVER_TEST     0x0400  /* Do NOT hand back or free this URB. */
+#endif
 #define URB_DIR_OUT             0
 #define URB_DIR_MASK            URB_DIR_IN
 
diff --git a/include/linux/usb/android_composite.h b/include/linux/usb/android_composite.h
new file mode 100644
index 00000000000..7f9000711f4
--- /dev/null
+++ b/include/linux/usb/android_composite.h
@@ -0,0 +1,106 @@
+/*
+ * Platform data for Android USB
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __LINUX_USB_ANDROID_H
+#define __LINUX_USB_ANDROID_H
+
+#include <linux/usb/composite.h>
+#include <linux/if_ether.h>
+
+struct android_usb_function {
+        struct list_head        list;
+        char                    *name;
+        int                     (*bind_config)(struct usb_configuration *c);
+};
+
+struct android_usb_product {
+        /* Vendor ID for this set of functions.
+         * Default vendor_id in platform data will be used if this is zero.
+         */
+        __u16 vendor_id;
+
+        /* Product ID for this set of functions. */
+        __u16 product_id;
+
+        /* List of function names associated with this product.
+         * This is used to compute the USB product ID dynamically
+         * based on which functions are enabled.
+         */
+        int num_functions;
+        char **functions;
+};
+
+struct android_usb_platform_data {
+        /* USB device descriptor fields */
+        __u16 vendor_id;
+
+        /* Default product ID. */
+        __u16 product_id;
+
+        __u16 version;
+
+        char *product_name;
+        char *manufacturer_name;
+        char *serial_number;
+
+        /* List of available USB products.
+         * This is used to compute the USB product ID dynamically
+         * based on which functions are enabled.
+         * if num_products is zero or no match can be found,
+         * we use the default product ID
+         */
+        int num_products;
+        struct android_usb_product *products;
+
+        /* List of all supported USB functions.
+         * This list is used to define the order in which
+         * the functions appear in the configuration's list of USB interfaces.
+         * This is necessary to avoid depending upon the order in which
+         * the individual function drivers are initialized.
+         */
+        int num_functions;
+        char **functions;
+};
+
+/* Platform data for "usb_mass_storage" driver. */
+struct usb_mass_storage_platform_data {
+        /* Contains values for the SC_INQUIRY SCSI command. */
+        char *vendor;
+        char *product;
+        int release;
+
+        /* number of LUNS */
+        int nluns;
+};
+
+/* Platform data for USB ethernet driver. */
+struct usb_ether_platform_data {
+        u8      ethaddr[ETH_ALEN];
+        u32     vendorID;
+        const char *vendorDescr;
+};
+
+/* Platform data for ACM driver. */
+struct acm_platform_data {
+        u8      num_inst;
+};
+
+extern void android_register_function(struct android_usb_function *f);
+
+extern void android_enable_function(struct usb_function *f, int enable);
+
+
+#endif  /* __LINUX_USB_ANDROID_H */
diff --git a/include/linux/usb/ch11.h b/include/linux/usb/ch11.h
index 1eb735b53fc..8d2b5471b97 100644
--- a/include/linux/usb/ch11.h
+++ b/include/linux/usb/ch11.h
@@ -77,6 +77,44 @@
 #define USB_PORT_FEAT_C_BH_PORT_RESET           29
 #define USB_PORT_FEAT_FORCE_LINKPM_ACCEPT       30
 
+#ifdef CONFIG_HOST_COMPLIANT_TEST
+/*
+ * Hub Port Test Mode Selector Codes
+ * See USB 2.0 spec Table 11-24
+ */
+#define USB_PORT_TEST_J                 0x01
+#define USB_PORT_TEST_K                 0x02
+#define USB_PORT_TEST_SE0_NAK           0x03
+#define USB_PORT_TEST_PACKET            0x04
+#define USB_PORT_TEST_FORCE_ENABLE      0x05
+
+/*
+ * Product IDs used to trigger USB Hi-Speed Host Electrical Tests
+ * on the root hub. See USB 2.0 spec 7.1.20 and the
+ * Embedded High-speed Host Electrical Test Procedure.
+ */
+#define EHSET_TEST_SE0_NAK                      0x0101
+#define EHSET_TEST_J                            0x0102
+#define EHSET_TEST_K                            0x0103
+#define EHSET_TEST_PACKET                       0x0104
+/* Note that the FORCE ENABLE test is no longer used in the EHSET spec. */
+#define EHSET_TEST_FORCE_ENABLE                 0x0105
+#define EHSET_HS_HOST_PORT_SUSPEND_RESUME       0x0106
+#define EHSET_SINGLE_STEP_GET_DEV_DESC          0x0107
+#define EHSET_SINGLE_STEP_SET_FEATURE           0x0108
+#define LOW_LEVEL_TEST_J                        0x010a
+#define LOW_LEVEL_TEST_K                        0x010b
+#define LOW_LEVEL_SE0_NAK                       0x010c
+#define LOW_LEVEL_TEST_PACKET                   0x010d
+
+/*
+ * This is used for the Hi-Speed Host Electrical Tests
+ * on the root hub. See USB 2.0 spec 7.1.20 and the
+ * Embedded High-speed Host Electrical Test Procedure.
+ */
+#define USB_PORT_TEST_SINGLE_STEP_SET_FEATURE   0x00
+
+#endif
 /*
  * Hub Status and Hub Change results
  * See USB 2.0 spec Table 11-19 and Table 11-20
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index cf65b5cff72..4b8e1e57685 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -87,6 +87,7 @@
 #define USB_REQ_GET_INTERFACE           0x0A
 #define USB_REQ_SET_INTERFACE           0x0B
 #define USB_REQ_SYNCH_FRAME             0x0C
+#define USB_REQ_SET_SEL                 0x30
 
 #define USB_REQ_SET_ENCRYPTION          0x0D    /* Wireless USB */
 #define USB_REQ_GET_ENCRYPTION          0x0E
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index b78cba466d3..03f19414700 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -36,7 +36,9 @@
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
-
+#ifdef CONFIG_USB_ANDROID
+#include <linux/switch.h>
+#endif
 /*
  * USB function drivers should return USB_GADGET_DELAYED_STATUS if they
  * wish to delay the data/status stages of the control transfer till they
@@ -46,6 +48,9 @@
  */
 #define USB_GADGET_DELAYED_STATUS       0x7fff  /* Impossibly large value */
 
+#ifdef CONFIG_USB_ANDROID
+struct usb_composite_dev;
+#endif
 struct usb_configuration;
 
 /**
@@ -59,6 +64,10 @@ struct usb_configuration;
  * @hs_descriptors: Table of high speed descriptors, using interface and
  *      string identifiers assigned during @bind().  If this pointer is null,
  *      the function will not be available at high speed.
+ * @ss_descriptors: Table of super speed descriptors, using interface and
+ *      string identifiers assigned during @bind(). If this
+ *      pointer is null after initiation, the function will not
+ *      be available at super speed.
  * @config: assigned when @usb_add_function() is called; this is the
  *      configuration with which this function is associated.
  * @bind: Before the gadget can register, all of its functions bind() to the
@@ -77,6 +86,10 @@ struct usb_configuration;
  * @setup: Used for interface-specific control requests.
  * @suspend: Notifies functions when the host stops sending USB traffic.
  * @resume: Notifies functions when the host restarts USB traffic.
+ * @get_status: Returns function status as a reply to
+ *      GetStatus() request when the recepient is Interface.
+ * @func_suspend: callback to be called when
+ *      SetFeature(FUNCTION_SUSPEND) is reseived
  *
  * A single USB function uses one or more interfaces, and should in most
  * cases support operation at both full and high speeds.  Each function is
@@ -106,9 +119,14 @@ struct usb_function {
         struct usb_gadget_strings       **strings;
         struct usb_descriptor_header    **descriptors;
         struct usb_descriptor_header    **hs_descriptors;
+        struct usb_descriptor_header    **ss_descriptors;
 
         struct usb_configuration        *config;
 
+#ifdef CONFIG_USB_ANDROID
+        /* disabled is zero if the function is enabled */
+        int                             disabled;
+#endif
         /* REVISIT:  bind() functions can be marked __init, which
          * makes trouble for section mismatch analysis.  See if
          * we can't restructure things to avoid mismatching.
@@ -132,10 +150,17 @@ struct usb_function {
         void                    (*suspend)(struct usb_function *);
         void                    (*resume)(struct usb_function *);
 
+        int                     (*get_status)(struct usb_function *);
+        int                     (*func_suspend)(struct usb_function *,
+                                                u8 suspend_opt);
+
         /* private: */
         /* internals */
         struct list_head                list;
         DECLARE_BITMAP(endpoints, 32);
+#ifdef CONFIG_USB_ANDROID
+        struct device                   *dev;
+#endif
 };
 
 int usb_add_function(struct usb_configuration *, struct usb_function *);
@@ -145,6 +170,10 @@ int usb_function_activate(struct usb_function *);
 
 int usb_interface_id(struct usb_configuration *, struct usb_function *);
 
+#ifdef CONFIG_USB_ANDROID
+void usb_function_set_enabled(struct usb_function *, int);
+void usb_composite_force_reset(struct usb_composite_dev *);
+#endif
 /**
  * ep_choose - select descriptor endpoint at current device speed
  * @g: gadget, connected and running at some speed
@@ -231,6 +260,7 @@ struct usb_configuration {
         struct list_head        list;
         struct list_head        functions;
         u8                      next_interface_id;
+        unsigned                superspeed:1;
         unsigned                highspeed:1;
         unsigned                fullspeed:1;
         struct usb_function     *interface[MAX_CONFIG_INTERFACES];
@@ -240,6 +270,9 @@ int usb_add_config(struct usb_composite_dev *,
                 struct usb_configuration *,
                 int (*)(struct usb_configuration *));
 
+int usb_remove_config(struct usb_composite_dev *,
+                struct usb_configuration *);
+
 /**
  * struct usb_composite_driver - groups configurations into a gadget
  * @name: For diagnostics, identifies the driver.
@@ -281,6 +314,10 @@ struct usb_composite_driver {
         struct usb_gadget_strings               **strings;
         unsigned                needs_serial:1;
 
+#ifdef CONFIG_USB_ANDROID
+        struct class            *class;
+        atomic_t                function_count;
+#endif
         int                     (*unbind)(struct usb_composite_dev *);
 
         void                    (*disconnect)(struct usb_composite_dev *);
@@ -288,6 +325,10 @@ struct usb_composite_driver {
         /* global suspend hooks */
         void                    (*suspend)(struct usb_composite_dev *);
         void                    (*resume)(struct usb_composite_dev *);
+
+#ifdef CONFIG_USB_ANDROID
+        void                    (*enable_function)(struct usb_function *f, int enable);
+#endif
 };
 
 extern int usb_composite_probe(struct usb_composite_driver *driver,
@@ -358,6 +399,17 @@ struct usb_composite_dev {
 
         /* protects deactivations and delayed_status counts*/
         spinlock_t                      lock;
+
+#ifdef CONFIG_USB_ANDROID
+        /* switch indicating connected/disconnected state */
+        struct switch_dev               sw_connected;
+        /* switch indicating current configuration */
+        struct switch_dev               sw_config;
+        /* current connected state for sw_connected */
+        bool                            connected;
+
+        struct work_struct switch_work;
+#endif
 };
 
 extern int usb_string_id(struct usb_composite_dev *c);
diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
index 7cc95ee3606..b776e1d931c 100644
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -133,8 +133,14 @@ struct ehci_regs {
 #define PORT_WKCONN_E   (1<<20)         /* wake on connect (enable) */
 /* 19:16 for port testing */
 #define PORT_TEST(x)    (((x)&0xf)<<16) /* Port Test Control */
+#ifdef CONFIG_HOST_COMPLIANT_TEST
+#define PORT_TEST_J             PORT_TEST(0x1)
+#define PORT_TEST_K             PORT_TEST(0x2)
+#define PORT_TEST_SE0_NAK       PORT_TEST(0x3)
+#endif
 #define PORT_TEST_PKT   PORT_TEST(0x4)  /* Port Test Control - packet test */
 #define PORT_TEST_FORCE PORT_TEST(0x5)  /* Port Test Control - force enable */
+
 #define PORT_LED_OFF    (0<<14)
 #define PORT_LED_AMBER  (1<<14)
 #define PORT_LED_GREEN  (2<<14)
diff --git a/include/linux/usb/exynos_usb3_drd.h b/include/linux/usb/exynos_usb3_drd.h
new file mode 100644
index 00000000000..d8aa24ff869
--- /dev/null
+++ b/include/linux/usb/exynos_usb3_drd.h
@@ -0,0 +1,396 @@
+/* include/linux/usb/exynos_usb3_drd.h
+ *
+ * Copyright (c) 2012 Samsung Electronics Co. Ltd
+ * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
+ *
+ * Exynos SuperSpeed USB 3.0 DRD Controller global and OTG registers
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_USB_EXYNOS_USB3_DRD_H
+#define __LINUX_USB_EXYNOS_USB3_DRD_H
+
+/* Global registers */
+#define EXYNOS_USB3_GSBUSCFG0           0xC100
+#define EXYNOS_USB3_GSBUSCFG0_SBusStoreAndForward       (1 << 12)
+#define EXYNOS_USB3_GSBUSCFG0_DatBigEnd                 (1 << 11)
+#define EXYNOS_USB3_GSBUSCFG0_INCR256BrstEna            (1 << 7)
+#define EXYNOS_USB3_GSBUSCFG0_INCR128BrstEna            (1 << 6)
+#define EXYNOS_USB3_GSBUSCFG0_INCR64BrstEna             (1 << 5)
+#define EXYNOS_USB3_GSBUSCFG0_INCR32BrstEna             (1 << 4)
+#define EXYNOS_USB3_GSBUSCFG0_INCR16BrstEna             (1 << 3)
+#define EXYNOS_USB3_GSBUSCFG0_INCR8BrstEna              (1 << 2)
+#define EXYNOS_USB3_GSBUSCFG0_INCR4BrstEna              (1 << 1)
+#define EXYNOS_USB3_GSBUSCFG0_INCRBrstEna               (1 << 0)
+
+#define EXYNOS_USB3_GSBUSCFG1           0xC104
+#define EXYNOS_USB3_GSBUSCFG1_EN1KPAGE                  (1 << 12)
+#define EXYNOS_USB3_GSBUSCFG1_BREQLIMIT_MASK            (0xf << 8)
+#define EXYNOS_USB3_GSBUSCFG1_BREQLIMIT_SHIFT           8
+#define EXYNOS_USB3_GSBUSCFG1_BREQLIMIT(_x)             ((_x) << 8)
+
+#define EXYNOS_USB3_GTXTHRCFG           0xC108
+#define EXYNOS_USB3_GTXTHRCFG_USBTxPktCntSel            (1 << 29)
+#define EXYNOS_USB3_GTXTHRCFG_USBTxPktCnt_MASK          (0xf << 24)
+#define EXYNOS_USB3_GTXTHRCFG_USBTxPktCnt_SHIFT         24
+#define EXYNOS_USB3_GTXTHRCFG_USBTxPktCnt(_x)           ((_x) << 24)
+#define EXYNOS_USB3_GTXTHRCFG_USBMaxTxBurstSize_MASK    (0xff << 16)
+#define EXYNOS_USB3_GTXTHRCFG_USBMaxTxBurstSize_SHIFT   16
+#define EXYNOS_USB3_GTXTHRCFG_USBMaxTxBurstSize(_x)     ((_x) << 16)
+
+#define EXYNOS_USB3_GRXTHRCFG           0xC10C
+#define EXYNOS_USB3_GRXTHRCFG_USBRxPktCntSel            (1 << 29)
+#define EXYNOS_USB3_GRXTHRCFG_USBRxPktCnt_MASK          (0xf << 24)
+#define EXYNOS_USB3_GRXTHRCFG_USBRxPktCnt_SHIFT         24
+#define EXYNOS_USB3_GRXTHRCFG_USBRxPktCnt(_x)           ((_x) << 24)
+#define EXYNOS_USB3_GRXTHRCFG_USBMaxRxBurstSize_MASK    (0x1f << 19)
+#define EXYNOS_USB3_GRXTHRCFG_USBMaxRxBurstSize_SHIFT   19
+#define EXYNOS_USB3_GRXTHRCFG_USBMaxRxBurstSize(_x)     ((_x) << 19)
+
+#define EXYNOS_USB3_GCTL                0xC110
+#define EXYNOS_USB3_GCTL_PwrDnScale_MASK                (0x1fff << 19)
+#define EXYNOS_USB3_GCTL_PwrDnScale_SHIFT               19
+#define EXYNOS_USB3_GCTL_PwrDnScale(_x)                 ((_x) << 19)
+#define EXYNOS_USB3_GCTL_U2RSTECN                       (1 << 16)
+#define EXYNOS_USB3_GCTL_FRMSCLDWN_MASK                 (0x3 << 14)
+#define EXYNOS_USB3_GCTL_FRMSCLDWN_SHIFT                14
+#define EXYNOS_USB3_GCTL_FRMSCLDWN(_x)                  ((_x) << 14)
+#define EXYNOS_USB3_GCTL_PrtCapDir_MASK                 (0x3 << 12)
+#define EXYNOS_USB3_GCTL_PrtCapDir_SHIFT                12
+#define EXYNOS_USB3_GCTL_PrtCapDir(_x)                  ((_x) << 12)
+#define EXYNOS_USB3_GCTL_CoreSoftReset                  (1 << 11)
+#define EXYNOS_USB3_GCTL_LocalLpBkEn                    (1 << 10)
+#define EXYNOS_USB3_GCTL_LpbkEn                         (1 << 9)
+#define EXYNOS_USB3_GCTL_DebugAttach                    (1 << 8)
+#define EXYNOS_USB3_GCTL_RAMClkSel_MASK                 (0x3 << 6)
+#define EXYNOS_USB3_GCTL_RAMClkSel_SHIFT                6
+#define EXYNOS_USB3_GCTL_RAMClkSel(_x)                  ((_x) << 6)
+#define EXYNOS_USB3_GCTL_ScaleDown_MASK                 (0x3 << 4)
+#define EXYNOS_USB3_GCTL_ScaleDown_SHIFT                4
+#define EXYNOS_USB3_GCTL_ScaleDown(_x)                  ((_x) << 4)
+#define EXYNOS_USB3_GCTL_DisScramble                    (1 << 3)
+#define EXYNOS_USB3_GCTL_SsPwrClmp                      (1 << 2)
+#define EXYNOS_USB3_GCTL_HsFsLsPwrClmp                  (1 << 1)
+#define EXYNOS_USB3_GCTL_DsblClkGtng                    (1 << 0)
+
+#define EXYNOS_USB3_GEVTEN              0xC114
+#define EXYNOS_USB3_GEVTEN_I2CEvtEn                     (1 << 1)
+#define EXYNOS_USB3_GEVTEN_ULPICKEvtEn                  (1 << 0)
+#define EXYNOS_USB3_GEVTEN_I2CCKEvtEn                   (1 << 0)
+
+#define EXYNOS_USB3_GSTS                0xC118
+#define EXYNOS_USB3_GSTS_CBELT_MASK                     (0xfff << 20)
+#define EXYNOS_USB3_GSTS_CBELT_SHIFT                    20
+#define EXYNOS_USB3_GSTS_CBELT(_x)                      ((_x) << 20)
+#define EXYNOS_USB3_GSTS_OTG_IP                         (1 << 10)
+#define EXYNOS_USB3_GSTS_BC_IP                          (1 << 9)
+#define EXYNOS_USB3_GSTS_ADP_IP                         (1 << 8)
+#define EXYNOS_USB3_GSTS_Host_IP                        (1 << 7)
+#define EXYNOS_USB3_GSTS_Device_IP                      (1 << 6)
+#define EXYNOS_USB3_GSTS_CSRTimeout                     (1 << 5)
+#define EXYNOS_USB3_GSTS_BusErrAddrVld                  (1 << 4)
+#define EXYNOS_USB3_GSTS_CurMod_MASK                    (0x3 << 0)
+#define EXYNOS_USB3_GSTS_CurMod_SHIFT                   0
+#define EXYNOS_USB3_GSTS_CurMod(_x)                     ((_x) << 0)
+
+#define EXYNOS_USB3_GSNPSID             0xC120
+
+#define EXYNOS_USB3_GGPIO               0xC124
+#define EXYNOS_USB3_GGPIO_GPO_MASK                      (0xffff << 16)
+#define EXYNOS_USB3_GGPIO_GPO_SHIFT                     16
+#define EXYNOS_USB3_GGPIO_GPO(_x)                       ((_x) << 16)
+#define EXYNOS_USB3_GGPIO_GPI_MASK                      (0xffff << 0)
+#define EXYNOS_USB3_GGPIO_GPI_SHIFT                     0
+#define EXYNOS_USB3_GGPIO_GPI(_x)                       ((x) << 0)
+
+#define EXYNOS_USB3_GUID                0xC128
+
+#define EXYNOS_USB3_GUCTL               0xC12C
+#define EXYNOS_USB3_GUCTL_SprsCtrlTransEn               (1 << 17)
+#define EXYNOS_USB3_GUCTL_ResBwHSEPS                    (1 << 16)
+#define EXYNOS_USB3_GUCTL_CMdevAddr                     (1 << 15)
+#define EXYNOS_USB3_GUCTL_USBHstInAutoRetryEn           (1 << 14)
+#define EXYNOS_USB3_GUCTL_USBHstInMaxBurst_MASK         (0x7 << 11)
+#define EXYNOS_USB3_GUCTL_USBHstInMaxBurst_SHIFT        11
+#define EXYNOS_USB3_GUCTL_USBHstInMaxBurst(_x)          ((_x) << 11)
+#define EXYNOS_USB3_GUCTL_DTCT_MASK                     (0x3 << 9)
+#define EXYNOS_USB3_GUCTL_DTCT_SHIFT                    9
+#define EXYNOS_USB3_GUCTL_DTCT(_x)                      ((_x) << 9)
+#define EXYNOS_USB3_GUCTL_DTFT_MASK                     (0x1ff << 0)
+#define EXYNOS_USB3_GUCTL_DTFT_SHIFT                    0
+#define EXYNOS_USB3_GUCTL_DTFT(_x)                      ((_x) << 0)
+
+#define EXYNOS_USB3_GBUSERRADDR_31_0    0xC130
+#define EXYNOS_USB3_GBUSERRADDR_63_32   0xC134
+#define EXYNOS_USB3_GPRTBIMAP_31_0      0xC138
+#define EXYNOS_USB3_GPRTBIMAP_63_32     0xC13C
+
+#define EXYNOS_USB3_GHWPARAMS0          0xC140
+#define EXYNOS_USB3_GHWPARAMS1          0xC144
+#define EXYNOS_USB3_GHWPARAMS2          0xC148
+#define EXYNOS_USB3_GHWPARAMS3          0xC14C
+#define EXYNOS_USB3_GHWPARAMS4          0xC150
+#define EXYNOS_USB3_GHWPARAMS5          0xC154
+#define EXYNOS_USB3_GHWPARAMS6          0xC158
+#define EXYNOS_USB3_GHWPARAMS7          0xC15C
+
+#define EXYNOS_USB3_GDBGFIFOSPACE       0xC160
+#define EXYNOS_USB3_GDBGLTSSM           0xC164
+
+#define EXYNOS_USB3_GDBGLSPMUX          0xC170
+#define EXYNOS_USB3_GDBGLSP             0xC174
+#define EXYNOS_USB3_GDBGEPINFO0         0xC178
+#define EXYNOS_USB3_GDBGEPINFO1         0xC17C
+
+#define EXYNOS_USB3_GPRTBIMAP_HS_31_0   0xC180
+#define EXYNOS_USB3_GPRTBIMAP_HS_63_32  0xC184
+#define EXYNOS_USB3_GPRTBIMAP_FS_31_0   0xC188
+#define EXYNOS_USB3_GPRTBIMAP_FS_63_32  0xC18C
+
+#define EXYNOS_USB3_GUSB2PHYCFG(_a)     (0xC200 + ((_a) * 0x04))
+#define EXYNOS_USB3_GUSB2PHYCFGx_PHYSoftRst             (1 << 31)
+#define EXYNOS_USB3_GUSB2PHYCFGx_PhyIntrNum_MASK        (0x3f << 19)
+#define EXYNOS_USB3_GUSB2PHYCFGx_PhyIntrNum_SHIFT       19
+#define EXYNOS_USB3_GUSB2PHYCFGx_PhyIntrNum(_x)         ((_x) << 19)
+#define EXYNOS_USB3_GUSB2PHYCFGx_ULPIExtVbusIndicator   (1 << 18)
+#define EXYNOS_USB3_GUSB2PHYCFGx_ULPIExtVbusDrv         (1 << 17)
+#define EXYNOS_USB3_GUSB2PHYCFGx_ULPIClkSusM            (1 << 16)
+#define EXYNOS_USB3_GUSB2PHYCFGx_ULPIAutoRes            (1 << 15)
+#define EXYNOS_USB3_GUSB2PHYCFGx_PhyLPwrClkSel          (1 << 14)
+#define EXYNOS_USB3_GUSB2PHYCFGx_USBTrdTim_MASK         (0xf << 10)
+#define EXYNOS_USB3_GUSB2PHYCFGx_USBTrdTim_SHIFT        10
+#define EXYNOS_USB3_GUSB2PHYCFGx_USBTrdTim(_x)          ((_x) << 10)
+#define EXYNOS_USB3_GUSB2PHYCFGx_EnblSlpM               (1 << 8)
+#define EXYNOS_USB3_GUSB2PHYCFGx_PHYSel                 (1 << 7)
+#define EXYNOS_USB3_GUSB2PHYCFGx_SusPHY                 (1 << 6)
+#define EXYNOS_USB3_GUSB2PHYCFGx_FSIntf                 (1 << 5)
+#define EXYNOS_USB3_GUSB2PHYCFGx_ULPI_UTMI_Sel          (1 << 4)
+#define EXYNOS_USB3_GUSB2PHYCFGx_PHYIf                  (1 << 3)
+#define EXYNOS_USB3_GUSB2PHYCFGx_TOutCal_MASK           (0x7 << 0)
+#define EXYNOS_USB3_GUSB2PHYCFGx_TOutCal_SHIFT          0
+#define EXYNOS_USB3_GUSB2PHYCFGx_TOutCal(_x)            ((_x) << 0)
+
+#define EXYNOS_USB3_GUSB2I2CCTL(_a)     (0xC240 + ((_a) * 0x04))
+
+#define EXYNOS_USB3_GUSB2PHYACC(_a)     (0xC280 + ((_a) * 0x04))
+#define EXYNOS_USB3_GUSB2PHYACCx_DisUlpiDrvr            (1 << 26)
+#define EXYNOS_USB3_GUSB2PHYACCx_NewRegReq              (1 << 25)
+#define EXYNOS_USB3_GUSB2PHYACCx_VStsDone               (1 << 24)
+#define EXYNOS_USB3_GUSB2PHYACCx_VStsBsy                (1 << 23)
+#define EXYNOS_USB3_GUSB2PHYACCx_RegWr                  (1 << 22)
+#define EXYNOS_USB3_GUSB2PHYACCx_RegAddr_MASK           (0x3f << 16)
+#define EXYNOS_USB3_GUSB2PHYACCx_RegAddr_SHIFT          16
+#define EXYNOS_USB3_GUSB2PHYACCx_RegAddr(_x)            ((_x) << 16)
+/* Next 2 fields are overlaping. Is it error in user manual? */
+#define EXYNOS_USB3_GUSB2PHYACCx_VCtrl_MASK             (0xff << 8)
+#define EXYNOS_USB3_GUSB2PHYACCx_VCtrl_SHIFT            8
+#define EXYNOS_USB3_GUSB2PHYACCx_VCtrl(_x)              ((_x) << 8)
+/*--------*/
+#define EXYNOS_USB3_GUSB2PHYACCx_ExtRegAddr_MASK        (0x3f << 8)
+#define EXYNOS_USB3_GUSB2PHYACCx_ExtRegAddr_SHIFT       8
+#define EXYNOS_USB3_GUSB2PHYACCx_ExtRegAddr(_x)         ((_x) << 8)
+/*--------*/
+#define EXYNOS_USB3_GUSB2PHYACCx_RegData_MASK           (0xff << 0)
+#define EXYNOS_USB3_GUSB2PHYACCx_RegData_SHIFT          0
+#define EXYNOS_USB3_GUSB2PHYACCx_RegData(_x)            ((_x) << 0)
+
+#define EXYNOS_USB3_GUSB3PIPECTL(_a)    (0xC2C0 + ((_a) * 0x04))
+#define EXYNOS_USB3_GUSB3PIPECTLx_PHYSoftRst            (1 << 31)
+#define EXYNOS_USB3_GUSB3PIPECTLx_request_p1p2p3        (1 << 24)
+#define EXYNOS_USB3_GUSB3PIPECTLx_StartRxdetU3RxDet     (1 << 23)
+#define EXYNOS_USB3_GUSB3PIPECTLx_DisRxDetU3RxDet       (1 << 22)
+#define EXYNOS_USB3_GUSB3PIPECTLx_delay_p1p2p3_MASK     (0x7 << 19)
+#define EXYNOS_USB3_GUSB3PIPECTLx_delay_p1p2p3_SHIFT    19
+#define EXYNOS_USB3_GUSB3PIPECTLx_delay_p1p2p3(_x)      ((_x) << 19)
+#define EXYNOS_USB3_GUSB3PIPECTLx_delay_phy_pwr_p1p2p3  (1 << 18)
+#define EXYNOS_USB3_GUSB3PIPECTLx_SuspSSPhy             (1 << 17)
+#define EXYNOS_USB3_GUSB3PIPECTLx_DatWidth_MASK         (0x3 << 15)
+#define EXYNOS_USB3_GUSB3PIPECTLx_DatWidth_SHIFT        15
+#define EXYNOS_USB3_GUSB3PIPECTLx_DatWidth(_x)          ((_x) << 15)
+#define EXYNOS_USB3_GUSB3PIPECTLx_AbortRxDetInU2        (1 << 14)
+#define EXYNOS_USB3_GUSB3PIPECTLx_SkipRxDet             (1 << 13)
+#define EXYNOS_USB3_GUSB3PIPECTLx_LFPSP0Algn            (1 << 12)
+#define EXYNOS_USB3_GUSB3PIPECTLx_P3P2TranOK            (1 << 11)
+#define EXYNOS_USB3_GUSB3PIPECTLx_LFPSFilt              (1 << 9)
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxSwing               (1 << 6)
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxMargin_MASK         (0x7 << 3)
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxMargin_SHIFT        3
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxMargin(_x)          ((_x) << 3)
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxDeemphasis_MASK     (0x3 << 1)
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxDeemphasis_SHIFT    1
+#define EXYNOS_USB3_GUSB3PIPECTLx_TxDeemphasis(_x)      ((_x) << 1)
+#define EXYNOS_USB3_GUSB3PIPECTLx_ElasticBufferMode     (1 << 0)
+
+#define EXYNOS_USB3_GTXFIFOSIZ(_a)      (0xC300 + ((_a) * 0x04))
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFStAddr_n_MASK        (0xffff << 16)
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFStAddr_n_SHIFT       16
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFStAddr_n(_x)         ((_x) << 16)
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFDep_n_MASK           (0xffff << 0)
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFDep_n_SHIFT          0
+#define EXYNOS_USB3_GTXFIFOSIZx_TxFDep_n(_x)            ((_x) << 0)
+
+#define EXYNOS_USB3_GRXFIFOSIZ(_a)      (0xC380 + ((_a) * 0x04))
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFStAddr_n_MASK        (0xffff << 16)
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFStAddr_n_SHIFT       16
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFStAddr_n(_x)         ((_x) << 16)
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFDep_n_MASK           (0xffff << 0)
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFDep_n_SHIFT          0
+#define EXYNOS_USB3_GRXFIFOSIZx_RxFDep_n(_x)            ((_x) << 0)
+
+#define EXYNOS_USB3_GEVNTADR_31_0(_a)   (0xC400 + ((_a) * 0x10))
+#define EXYNOS_USB3_GEVNTADR_63_32(_a)  (0xC404 + ((_a) * 0x10))
+
+#define EXYNOS_USB3_GEVNTSIZ(_a)        (0xC408 + ((_a) * 0x10))
+#define EXYNOS_USB3_GEVNTSIZx_EvntIntMask               (1 << 31)
+#define EXYNOS_USB3_GEVNTSIZx_EVNTSiz_MASK              (0xffff << 0)
+#define EXYNOS_USB3_GEVNTSIZx_EVNTSiz_SHIFT             0
+#define EXYNOS_USB3_GEVNTSIZx_EVNTSiz(x)                ((_x) << 0)
+
+#define EXYNOS_USB3_GEVNTCOUNT(_a)      (0xC40C + ((_a) * 0x10))
+#define EXYNOS_USB3_GEVNTCOUNTx_EVNTCount_MASK          (0xffff << 0)
+#define EXYNOS_USB3_GEVNTCOUNTx_EVNTCount_SHIFT         0
+#define EXYNOS_USB3_GEVNTCOUNTx_EVNTCount(_x)           ((_x) << 0)
+
+/* Event Buffer Content for Device Endpoint-Specific Events (DEPEVT) */
+#define EXYNOS_USB3_DEPEVT_EventParam_MASK              (0xffff << 16)
+#define EXYNOS_USB3_DEPEVT_EventParam_SHIFT             16
+#define EXYNOS_USB3_DEPEVT_EventParam(_x)               ((_x) << 16)
+#define EXYNOS_USB3_DEPEVT_EventStatus_MASK             (0xf << 12)
+#define EXYNOS_USB3_DEPEVT_EventStatus_SHIFT            12
+#define EXYNOS_USB3_DEPEVT_EVENT_MASK                   (0xf << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_SHIFT                  6
+#define EXYNOS_USB3_DEPEVT_EVENT_EPCmdCmplt             (7 << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_StreamEvt              (6 << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_RxTxfifoEvt            (4 << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_XferNotReady           (3 << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_XferInProgress         (2 << 6)
+#define EXYNOS_USB3_DEPEVT_EVENT_XferComplete           (1 << 6)
+#define EXYNOS_USB3_DEPEVT_EPNUM_MASK                   (0x1f << 1)
+#define EXYNOS_USB3_DEPEVT_EPNUM_SHIFT                  1
+#define EXYNOS_USB3_DEPEVT_EPNUM(_x)                    ((_x) << 1)
+
+/* Event Buffer Content for Device-Specific Events (DEVT) */
+#define EXYNOS_USB3_DEVT_EventParam_MASK                (0xf << 16)
+#define EXYNOS_USB3_DEVT_EventParam_SHIFT               16
+#define EXYNOS_USB3_DEVT_EventParam_SS                  (1 << 20)
+#define EXYNOS_USB3_DEVT_EventParam(_x)                 ((_x) << 16)
+#define EXYNOS_USB3_DEVT_EVENT_MASK                     (0xf << 8)
+#define EXYNOS_USB3_DEVT_EVENT_SHIFT                    8
+#define EXYNOS_USB3_DEVT_EVENT_VndrDevTstRcved          (12 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_EvntOverflow             (11 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_CmdCmplt                 (10 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_ErrticErr                (9 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_Sof                      (7 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_EOPF                     (6 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_WkUpEvt                  (4 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_ULStChng                 (3 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_ConnectDone              (2 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_USBRst                   (1 << 8)
+#define EXYNOS_USB3_DEVT_EVENT_DisconnEvt               (0 << 8)
+
+#define EXYNOS_USB3_GHWPARAMS8          0xC600
+
+/* USB 2.0 OTG and Battery Charger registers */
+#define EXYNOS_USB3_OCFG                0xCC00
+#define EXYNOS_USB3_OCFG_OTG_Version                    (1 << 2)
+#define EXYNOS_USB3_OCFG_HNPCap                         (1 << 1)
+#define EXYNOS_USB3_OCFG_SRPCap                         (1 << 0)
+
+#define EXYNOS_USB3_OCTL                0xCC04
+#define EXYNOS_USB3_OCTL_PeriMode                       (1 << 6)
+#define EXYNOS_USB3_OCTL_PrtPwrCtl                      (1 << 5)
+#define EXYNOS_USB3_OCTL_HNPReq                         (1 << 4)
+#define EXYNOS_USB3_OCTL_SesReq                         (1 << 3)
+#define EXYNOS_USB3_OCTL_TermSelDLPulse                 (1 << 2)
+#define EXYNOS_USB3_OCTL_DevSetHNPEn                    (1 << 1)
+#define EXYNOS_USB3_OCTL_HstSetHNPEn                    (1 << 0)
+
+#define EXYNOS_USB3_OEVT                0xCC08
+#define EXYNOS_USB3_OEVT_DeviceMode                     (1 << 31)
+#define EXYNOS_USB3_OEVT_OTGConIDStsChngEvnt            (1 << 24)
+#define EXYNOS_USB3_OEVT_OTGADevBHostEndEvnt            (1 << 20)
+#define EXYNOS_USB3_OEVT_OTGADevHostEvnt                (1 << 19)
+#define EXYNOS_USB3_OEVT_OTGADevHNPChngEvnt             (1 << 18)
+#define EXYNOS_USB3_OEVT_OTGADevSRPDetEvnt              (1 << 17)
+#define EXYNOS_USB3_OEVT_OTGADevSessEndDetEvnt          (1 << 16)
+#define EXYNOS_USB3_OEVT_OTGBDevBHostEndEvnt            (1 << 11)
+#define EXYNOS_USB3_OEVT_OTGBDevHNPChngEvnt             (1 << 10)
+#define EXYNOS_USB3_OEVT_OTGBDevSessVldDetEvnt          (1 << 9)
+#define EXYNOS_USB3_OEVT_OTGBDevVBUSChngEvnt            (1 << 8)
+#define EXYNOS_USB3_OEVT_BSesVld                        (1 << 3)
+#define EXYNOS_USB3_OEVT_HstNegSts                      (1 << 2)
+#define EXYNOS_USB3_OEVT_SesReqSts                      (1 << 1)
+#define EXYNOS_USB3_OEVT_OEVTError                      (1 << 0)
+
+#define EXYNOS_USB3_OEVTEN              0xCC0C
+#define EXYNOS_USB3_OEVTEN_OTGConIDStsChngEvntEn        (1 << 24)
+#define EXYNOS_USB3_OEVTEN_OTGADevBHostEndEvntEn        (1 << 20)
+#define EXYNOS_USB3_OEVTEN_OTGADevHostEvntEn            (1 << 19)
+#define EXYNOS_USB3_OEVTEN_OTGADevHNPChngEvntEn         (1 << 18)
+#define EXYNOS_USB3_OEVTEN_OTGADevSRPDetEvntEn          (1 << 17)
+#define EXYNOS_USB3_OEVTEN_OTGADevSessEndDetEvntEn      (1 << 16)
+#define EXYNOS_USB3_OEVTEN_OTGBDevBHostEndEvntEn        (1 << 11)
+#define EXYNOS_USB3_OEVTEN_OTGBDevHNPChngEvntEn         (1 << 10)
+#define EXYNOS_USB3_OEVTEN_OTGBDevSessVldDetEvntEn      (1 << 9)
+#define EXYNOS_USB3_OEVTEN_OTGBDevVBUSChngEvntEn        (1 << 8)
+
+#define EXYNOS_USB3_OSTS                0xCC10
+#define EXYNOS_USB3_OSTS_OTG_state_MASK                 (0xf << 8)
+#define EXYNOS_USB3_OSTS_OTG_state_SHIFT                8
+#define EXYNOS_USB3_OSTS_OTG_state(_x)                  ((_x) << 8)
+#define EXYNOS_USB3_OSTS_PeripheralState                (1 << 4)
+#define EXYNOS_USB3_OSTS_xHCIPrtPower                   (1 << 3)
+#define EXYNOS_USB3_OSTS_BSesVld                        (1 << 2)
+#define EXYNOS_USB3_OSTS_VbusVld                        (1 << 1)
+#define EXYNOS_USB3_OSTS_ConIDSts                       (1 << 0)
+
+#define EXYNOS_USB3_ADPCFG              0xCC20
+#define EXYNOS_USB3_ADPCFG_PrbPer_MASK                  (0x3 << 30)
+#define EXYNOS_USB3_ADPCFG_PrbPer_SHIFT                 30
+#define EXYNOS_USB3_ADPCFG_PrbPer(_x)                   ((_x) << 30)
+#define EXYNOS_USB3_ADPCFG_PrbDelta_MASK                (0x3 << 28)
+#define EXYNOS_USB3_ADPCFG_PrbDelta_SHIFT               28
+#define EXYNOS_USB3_ADPCFG_PrbDelta(_x)                 ((_x) << 28)
+#define EXYNOS_USB3_ADPCFG_PrbDschg_MASK                (0x3 << 26)
+#define EXYNOS_USB3_ADPCFG_PrbDschg_SHIFT               26
+#define EXYNOS_USB3_ADPCFG_PrbDschg(_x)                 ((_x) << 26)
+
+#define EXYNOS_USB3_ADPCTL              0xCC24
+#define EXYNOS_USB3_ADPCTL_EnaPrb                       (1 << 28)
+#define EXYNOS_USB3_ADPCTL_EnaSns                       (1 << 27)
+#define EXYNOS_USB3_ADPCTL_ADPEn                        (1 << 26)
+#define EXYNOS_USB3_ADPCTL_ADPRes                       (1 << 25)
+#define EXYNOS_USB3_ADPCTL_WB                           (1 << 24)
+
+#define EXYNOS_USB3_ADPEVT              0xCC28
+#define EXYNOS_USB3_ADPEVT_AdpPrbEvnt                   (1 << 28)
+#define EXYNOS_USB3_ADPEVT_AdpSnsEvnt                   (1 << 27)
+#define EXYNOS_USB3_ADPEVT_AdpTmoutEvnt                 (1 << 26)
+#define EXYNOS_USB3_ADPEVT_ADPRstCmpltEvnt              (1 << 25)
+#define EXYNOS_USB3_ADPEVT_RTIM_MASK                    (0x7ff << 0)
+#define EXYNOS_USB3_ADPEVT_RTIM_SHIFT                   0
+#define EXYNOS_USB3_ADPEVT_RTIM(_x)                     ((_x) << 0)
+
+#define EXYNOS_USB3_ADPEVTEN            0xCC2C
+#define EXYNOS_USB3_ADPEVTEN_AdpPrbEvntEn               (1 << 28)
+#define EXYNOS_USB3_ADPEVTEN_AdpSnsEvntEn               (1 << 27)
+#define EXYNOS_USB3_ADPEVTEN_AdpTmoutEvntEn             (1 << 26)
+#define EXYNOS_USB3_ADPEVTEN_ADPRstCmpltEvntEn          (1 << 25)
+
+#define EXYNOS_USB3_BCFG                0xCC30
+#define EXYNOS_USB3_BCFG_IDDIG_SEL                      (1 << 1)
+#define EXYNOS_USB3_BCFG_CHIRP_EN                       (1 << 0)
+
+#define EXYNOS_USB3_BCEVT               0xCC38
+#define EXYNOS_USB3_BCEVT_MV_ChngEvnt                   (1 << 24)
+#define EXYNOS_USB3_BCEVT_MultValIdBc_MASK              (0x1f << 0)
+#define EXYNOS_USB3_BCEVT_MultValIdBc_SHIFT             0
+#define EXYNOS_USB3_BCEVT_MultValIdBc(_x)               ((_x) << 0)
+
+#define EXYNOS_USB3_BCEVTEN             0xCC3C
+#define EXYNOS_USB3_BCEVTEN_MV_ChngEvntEn               (1 << 24)
+
+#endif /* __LINUX_USB_EXYNOS_USB3_DRD_H */
diff --git a/include/linux/usb/f_accessory.h b/include/linux/usb/f_accessory.h
new file mode 100644
index 00000000000..5b2dcf9728e
--- /dev/null
+++ b/include/linux/usb/f_accessory.h
@@ -0,0 +1,83 @@
+/*
+ * Gadget Function Driver for Android USB accessories
+ *
+ * Copyright (C) 2011 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_USB_F_ACCESSORY_H
+#define __LINUX_USB_F_ACCESSORY_H
+
+/* Use Google Vendor ID when in accessory mode */
+#define USB_ACCESSORY_VENDOR_ID 0x18D1
+
+
+/* Product ID to use when in accessory mode */
+#define USB_ACCESSORY_PRODUCT_ID 0x2D00
+
+/* Product ID to use when in accessory mode and adb is enabled */
+#define USB_ACCESSORY_ADB_PRODUCT_ID 0x2D01
+
+/* Indexes for strings sent by the host via ACCESSORY_SEND_STRING */
+#define ACCESSORY_STRING_MANUFACTURER   0
+#define ACCESSORY_STRING_MODEL          1
+#define ACCESSORY_STRING_DESCRIPTION    2
+#define ACCESSORY_STRING_VERSION        3
+#define ACCESSORY_STRING_URI            4
+#define ACCESSORY_STRING_SERIAL         5
+
+/* Control request for retrieving device's protocol version (currently 1)
+ *
+ *      requestType:    USB_DIR_IN | USB_TYPE_VENDOR
+ *      request:        ACCESSORY_GET_PROTOCOL
+ *      value:          0
+ *      index:          0
+ *      data            version number (16 bits little endian)
+ */
+#define ACCESSORY_GET_PROTOCOL  51
+
+/* Control request for host to send a string to the device
+ *
+ *      requestType:    USB_DIR_OUT | USB_TYPE_VENDOR
+ *      request:        ACCESSORY_SEND_STRING
+ *      value:          0
+ *      index:          string ID
+ *      data            zero terminated UTF8 string
+ *
+ *  The device can later retrieve these strings via the
+ *  ACCESSORY_GET_STRING_* ioctls
+ */
+#define ACCESSORY_SEND_STRING   52
+
+/* Control request for starting device in accessory mode.
+ * The host sends this after setting all its strings to the device.
+ *
+ *      requestType:    USB_DIR_OUT | USB_TYPE_VENDOR
+ *      request:        ACCESSORY_START
+ *      value:          0
+ *      index:          0
+ *      data            none
+ */
+#define ACCESSORY_START         53
+
+/* ioctls for retrieving strings set by the host */
+#define ACCESSORY_GET_STRING_MANUFACTURER   _IOW('M', 1, char[256])
+#define ACCESSORY_GET_STRING_MODEL          _IOW('M', 2, char[256])
+#define ACCESSORY_GET_STRING_DESCRIPTION    _IOW('M', 3, char[256])
+#define ACCESSORY_GET_STRING_VERSION        _IOW('M', 4, char[256])
+#define ACCESSORY_GET_STRING_URI            _IOW('M', 5, char[256])
+#define ACCESSORY_GET_STRING_SERIAL         _IOW('M', 6, char[256])
+/* returns 1 if there is a start request pending */
+#define ACCESSORY_IS_START_REQUESTED        _IO('M', 7)
+
+#endif /* __LINUX_USB_F_ACCESSORY_H */
diff --git a/include/linux/usb/f_mtp.h b/include/linux/usb/f_mtp.h
new file mode 100644
index 00000000000..7422b17c6eb
--- /dev/null
+++ b/include/linux/usb/f_mtp.h
@@ -0,0 +1,75 @@
+/*
+ * Gadget Function Driver for MTP
+ *
+ * Copyright (C) 2010 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_USB_F_MTP_H
+#define __LINUX_USB_F_MTP_H
+
+#include <linux/ioctl.h>
+
+#ifdef __KERNEL__
+
+struct mtp_data_header {
+        /* length of packet, including this header */
+        uint32_t        length;
+        /* container type (2 for data packet) */
+        uint16_t        type;
+        /* MTP command code */
+        uint16_t    command;
+        /* MTP transaction ID */
+        uint32_t        transaction_id;
+};
+
+#endif /* __KERNEL__ */
+
+struct mtp_file_range {
+        /* file descriptor for file to transfer */
+        int                     fd;
+        /* offset in file for start of transfer */
+        loff_t          offset;
+        /* number of bytes to transfer */
+        int64_t         length;
+        /* MTP command ID for data header,
+         * used only for MTP_SEND_FILE_WITH_HEADER
+         */
+        uint16_t        command;
+        /* MTP transaction ID for data header,
+         * used only for MTP_SEND_FILE_WITH_HEADER
+         */
+        uint32_t        transaction_id;
+};
+
+struct mtp_event {
+        /* size of the event */
+        size_t          length;
+        /* event data to send */
+        void            *data;
+};
+
+/* Sends the specified file range to the host */
+#define MTP_SEND_FILE              _IOW('M', 0, struct mtp_file_range)
+/* Receives data from the host and writes it to a file.
+ * The file is created if it does not exist.
+ */
+#define MTP_RECEIVE_FILE           _IOW('M', 1, struct mtp_file_range)
+/* Sends an event to the host via the interrupt endpoint */
+#define MTP_SEND_EVENT             _IOW('M', 3, struct mtp_event)
+/* Sends the specified file range to the host,
+ * with a 12 byte MTP data packet header at the beginning.
+ */
+#define MTP_SEND_FILE_WITH_HEADER  _IOW('M', 4, struct mtp_file_range)
+
+#endif /* __LINUX_USB_F_MTP_H */
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index dd1571db55e..e4144c48575 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -131,6 +131,7 @@ struct usb_ep_ops {
  * @maxpacket:The maximum packet size used on this endpoint.  The initial
  *      value can sometimes be reduced (hardware allowing), according to
  *      the endpoint descriptor used to configure the endpoint.
+ * @maxburst: The maximum burst size.
  * @driver_data:for use by the gadget driver.  all other fields are
  *      read-only to gadget drivers.
  *
@@ -145,6 +146,9 @@ struct usb_ep {
         const struct usb_ep_ops *ops;
         struct list_head        ep_list;
         unsigned                maxpacket:16;
+
+        unsigned                numstreams:5;
+        unsigned                maxburst:4;
 };
 
 /*-------------------------------------------------------------------------*/
@@ -416,6 +420,13 @@ static inline void usb_ep_fifo_flush(struct usb_ep *ep)
 
 /*-------------------------------------------------------------------------*/
 
+struct usb_dcd_config_params {
+        __u8  bU1devExitLat;    /* U1 Device exit Latency */
+#define USB_DEFAULT_U1_DEV_EXIT_LAT     0x01    /* Less then 1 microsec */
+        __le16 bU2DevExitLat;   /* U2 Device exit Latency */
+#define USB_DEFAULT_U2_DEV_EXIT_LAT     0x1F4   /* Less then 500 microsec */
+};
+
 struct usb_gadget;
 
 /* the rest of the api to the controller hardware: device operations,
@@ -430,6 +441,7 @@ struct usb_gadget_ops {
         int     (*pullup) (struct usb_gadget *, int is_on);
         int     (*ioctl)(struct usb_gadget *,
                                 unsigned code, unsigned long param);
+        void    (*get_config_params)(struct usb_dcd_config_params *);
 };
 
 /**
@@ -521,6 +533,24 @@ static inline int gadget_is_dualspeed(struct usb_gadget *g)
 }
 
 /**
+ * gadget_is_superspeed() - return true if the hardware handles
+ * supperspeed
+ * @g: controller that might support supper speed
+ */
+static inline int gadget_is_superspeed(struct usb_gadget *g)
+{
+#ifdef CONFIG_USB_GADGET_SUPERSPEED
+        /*
+         * runtime test would check "g->is_superspeed" ... that might be
+         * useful to work around hardware bugs, but is mostly pointless
+         */
+        return 1;
+#else
+        return 0;
+#endif
+}
+
+/**
  * gadget_is_otg - return true iff the hardware is OTG-ready
  * @g: controller that might have a Mini-AB connector
  *
diff --git a/include/linux/usb/hsic_usb3503.h b/include/linux/usb/hsic_usb3503.h
new file mode 100644
index 00000000000..76600efb4b5
--- /dev/null
+++ b/include/linux/usb/hsic_usb3503.h
@@ -0,0 +1,62 @@
+#ifndef __HSIC_USB3503_H__
+#define __HSIC_USB3503_H__
+
+#define         USB3503_VIDL            0x00
+#define         USB3503_VIDM            0x01
+#define         USB3503_PIDL            0x02
+#define         USB3503_PIDM            0x03
+#define         USB3503_DIDL            0x04
+#define         USB3503_DIDM            0x05
+#define         USB3503_CFG1            0x06
+#define         USB3503_CFG2            0x07
+#define         USB3503_CFG3            0x08
+#define         USB3503_NRD                     0x09
+#define         USB3503_PDS                     0x0A
+#define         USB3503_PDB                     0x0B
+#define         USB3503_MAXPS           0x0C
+#define         USB3503_MAXPB           0x0D
+#define         USB3503_HCMCS           0x0E
+#define         USB3503_HCMCB           0x0F
+
+#define         USB3503_PWRT            0x10
+#define         USB3503_LANGIDH         0x11
+#define         USB3503_LANGIDL         0x12
+#define         USB3503_MFRSL           0x13
+#define         USB3503_PRDSL           0x14
+#define         USB3503_SERSL           0x15
+
+#define         USB3503_MANSTR          0x16    // 0x16 ~ 0x53 Manufacture string
+#define         USB3503_PRDSTR          0x54    // 0x54 ~ 0x91 Product string
+#define         USB3503_SERSTR          0x92    // 0x92 ~ 0xCF Serial string
+
+#define         USB3503_BCEN            0xD0
+
+#define         USB3503_PRTPWR          0xE5
+#define         USB3503_OCS                     0xE6
+#define         USB3503_SP_ILOCK        0xE7
+#define         USB3503_INT_STATUS      0xE8
+#define         USB3503_INT_MASK        0xE9
+
+#define         USB3503_CFGP            0xEE
+
+#define         USB3503_VSNSUP3         0xF4
+#define         USB3503_VSNS21          0xF5
+#define         USB3503_BSTUP3          0xF6
+#define         USB3503_BST21           0xF8
+
+#define         USB3503_PRTSP           0xFA
+#define         USB3503_PRTR12          0xFB
+#define         USB3503_PRTR34          0xFC
+
+#define         USB3503_STCD            0xFF
+
+
+struct usb3503_platform_data {
+        int gpio_reset;
+        int gpio_hub_con;
+
+        int sys_irq;
+        int irq_gpio;
+};
+
+#endif //__HSIC_USB3503_H__
diff --git a/include/linux/usb/otg_id.h b/include/linux/usb/otg_id.h
new file mode 100644
index 00000000000..f9f5189a73b
--- /dev/null
+++ b/include/linux/usb/otg_id.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * Author:
+ *      Colin Cross <ccross@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_USB_OTG_ID_H
+#define __LINUX_USB_OTG_ID_H
+
+#include <linux/notifier.h>
+#include <linux/plist.h>
+
+/**
+ * otg_id_notifier_block
+ *
+ * @priority: Order the notifications will be called in.  Higher numbers
+ *    get called first.
+ * @detect: Called during otg_id_notify.  Return OTG_ID_HANDLED if the USB cable
+ *    has been identified
+ * @proxy_wait: Called during otg_id_notify if a previous handler returns
+ *    OTG_ID_PROXY_WAIT.  This should wait on ID change then call otg_id_notify.
+ *    This is used when a handler knows what's connected but can't detect
+ *    the change itself.
+ * @cancel: Called after detect has returned OTG_ID_HANDLED to ask it to
+ *    release detection resources to allow a new identification to occur.
+ */
+
+struct otg_id_notifier_block {
+        int priority;
+        int (*detect)(struct otg_id_notifier_block *otg_id_nb);
+        int (*proxy_wait)(struct otg_id_notifier_block *otg_id_nb);
+        void (*cancel)(struct otg_id_notifier_block *otg_id_nb);
+        struct plist_node p;
+};
+
+#define OTG_ID_PROXY_WAIT 2
+#define OTG_ID_HANDLED 1
+#define OTG_ID_UNHANDLED 0
+
+int otg_id_register_notifier(struct otg_id_notifier_block *otg_id_nb);
+void otg_id_unregister_notifier(struct otg_id_notifier_block *otg_id_nb);
+
+void otg_id_notify(void);
+int otg_id_suspend(void);
+void otg_id_resume(void);
+
+#endif /* __LINUX_USB_OTG_ID_H */
diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h
index 76f439647c4..2a38d4e8c68 100644
--- a/include/linux/usb/usbnet.h
+++ b/include/linux/usb/usbnet.h
@@ -47,6 +47,7 @@ struct usbnet {
         u32                     xid;
         u32                     hard_mtu;       /* count any extra framing */
         size_t                  rx_urb_size;    /* size for rx urbs */
+    int         rx_queue_enable;
         struct mii_if_info      mii;
 
         /* various kinds of pending driver work */
diff --git a/include/linux/v4l2-mediabus.h b/include/linux/v4l2-mediabus.h
index 5ea7f753a34..1a13cf3e582 100644
--- a/include/linux/v4l2-mediabus.h
+++ b/include/linux/v4l2-mediabus.h
@@ -46,6 +46,7 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_BGR565_2X8_LE = 0x1006,
         V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
         V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
+        V4L2_MBUS_FMT_XRGB8888_4X8_LE = 0x1009,
 
         /* YUV (including grey) - next is 0x2014 */
         V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
@@ -65,6 +66,7 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
         V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
         V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
+        V4L2_MBUS_FMT_YUV8_1X24 = 0x2014,
         V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
         V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
 
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index eeeda13b4d5..2abdc21a04c 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -345,11 +345,14 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_NV61    v4l2_fourcc('N', 'V', '6', '1') /* 16  Y/CrCb 4:2:2  */
 
 /* two non contiguous planes - one Y, one Cr + Cb interleaved  */
-#define V4L2_PIX_FMT_NV12M   v4l2_fourcc('N', 'M', '1', '2') /* 12  Y/CbCr 4:2:0  */
-#define V4L2_PIX_FMT_NV12MT  v4l2_fourcc('T', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 64x32 macroblocks */
+#define V4L2_PIX_FMT_NV12M        v4l2_fourcc('N', 'M', '1', '2') /* 12  Y/CbCr 4:2:0  */
+#define V4L2_PIX_FMT_NV21M        v4l2_fourcc('N', 'M', '2', '1') /* 21  Y/CrCb 4:2:0  */
+#define V4L2_PIX_FMT_NV12MT       v4l2_fourcc('T', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 64x32 macroblocks */
+#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 16x16 macroblocks */
 
 /* three non contiguous planes - Y, Cb, Cr */
-#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') /* 12  YUV420 planar */
+#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'U', 'V', 'M') /* 12  YUV420 planar */
+#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'V', 'U', 'M') /* 12  YVU420 planar */
 
 /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
 #define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B', 'A', '8', '1') /*  8  BGBG.. GRGR.. */
@@ -378,6 +381,22 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_DV       v4l2_fourcc('d', 'v', 's', 'd') /* 1394          */
 #define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4    */
 
+
+#define V4L2_PIX_FMT_H264     v4l2_fourcc('H', '2', '6', '4') /* H264    */
+#define V4L2_PIX_FMT_H263     v4l2_fourcc('H', '2', '6', '3') /* H263    */
+#define V4L2_PIX_FMT_MPEG12   v4l2_fourcc('M', 'P', '1', '2') /* MPEG-1/2  */
+#define V4L2_PIX_FMT_MPEG4    v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4  */
+#define V4L2_PIX_FMT_FIMV     v4l2_fourcc('F', 'I', 'M', 'V') /* FIMV  */
+#define V4L2_PIX_FMT_FIMV1    v4l2_fourcc('F', 'I', 'M', '1') /* FIMV1 */
+#define V4L2_PIX_FMT_FIMV2    v4l2_fourcc('F', 'I', 'M', '2') /* FIMV2 */
+#define V4L2_PIX_FMT_FIMV3    v4l2_fourcc('F', 'I', 'M', '3') /* FIMV3 */
+#define V4L2_PIX_FMT_FIMV4    v4l2_fourcc('F', 'I', 'M', '4') /* FIMV4 */
+#define V4L2_PIX_FMT_XVID     v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */
+#define V4L2_PIX_FMT_VC1      v4l2_fourcc('V', 'C', '1', 'A') /* VC-1 */
+#define V4L2_PIX_FMT_VC1_RCV      v4l2_fourcc('V', 'C', '1', 'R') /* VC-1 RCV */
+#define V4L2_PIX_FMT_VP8      v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
+
+
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
 #define V4L2_PIX_FMT_WNVA     v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */
@@ -403,6 +422,13 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_KONICA420  v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */
 #define V4L2_PIX_FMT_JPGL       v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */
 
+#define V4L2_PIX_FMT_JPEG_444     v4l2_fourcc('J', 'P', 'G', '4') /* yuv444 of JFIF JPEG     */
+#define V4L2_PIX_FMT_JPEG_422     v4l2_fourcc('J', 'P', 'G', '2') /* yuv422 of JFIF JPEG     */
+#define V4L2_PIX_FMT_JPEG_420     v4l2_fourcc('J', 'P', 'G', '0') /* yuv420 of JFIF JPEG     */
+#define V4L2_PIX_FMT_JPEG_GRAY     v4l2_fourcc('J', 'P', 'G', 'G') /* grey of JFIF JPEG     */
+#define V4L2_PIX_FMT_YUV444_2P  v4l2_fourcc('Y', 'U', '2', 'P') /* 16  xxxxyyyy uuuuvvvv */
+#define V4L2_PIX_FMT_YVU444_2P  v4l2_fourcc('Y', 'V', '2', 'P') /* 16  xxxxyyyy uuuuvvvv */
+#define V4L2_PIX_FMT_YUV444_3P  v4l2_fourcc('Y', 'U', '3', 'P') /* 16  xxxxyyyy uuuuvvvv */
 /*
  *      F O R M A T   E N U M E R A T I O N
  */
@@ -580,7 +606,9 @@ struct v4l2_plane {
                 unsigned long   userptr;
         } m;
         __u32                   data_offset;
-        __u32                   reserved[11];
+        void                    *cookie;
+        void                    *share;
+        __u32                   reserved[9];
 };
 
 /**
@@ -873,6 +901,34 @@ struct v4l2_dv_enum_preset {
 #define         V4L2_DV_1080P50         17 /* BT.1120 */
 #define         V4L2_DV_1080P60         18 /* BT.1120 */
 
+#define         V4L2_DV_480P60                  19
+#define         V4L2_DV_1080I59_94              20
+#define         V4L2_DV_1080P59_94              21
+
+#define         V4L2_DV_720P60_FP               22
+#define         V4L2_DV_720P60_SB_HALF          23
+#define         V4L2_DV_720P60_TB               24
+#define         V4L2_DV_720P59_94_FP            25
+#define         V4L2_DV_720P59_94_SB_HALF       26
+#define         V4L2_DV_720P59_94_TB            27
+#define         V4L2_DV_720P50_FP               28
+#define         V4L2_DV_720P50_SB_HALF          29
+#define         V4L2_DV_720P50_TB               30
+#define         V4L2_DV_1080P24_FP              31
+#define         V4L2_DV_1080P24_SB_HALF         32
+#define         V4L2_DV_1080P24_TB              33
+#define         V4L2_DV_1080P23_98_FP           34
+#define         V4L2_DV_1080P23_98_SB_HALF      35
+#define         V4L2_DV_1080P23_98_TB           36
+#define         V4L2_DV_1080I60_SB_HALF         37
+#define         V4L2_DV_1080I59_94_SB_HALF      38
+#define         V4L2_DV_1080I50_SB_HALF         39
+#define         V4L2_DV_1080P60_SB_HALF         40
+#define         V4L2_DV_1080P60_TB              41
+#define         V4L2_DV_1080P30_FP              42
+#define         V4L2_DV_1080P30_SB_HALF         43
+#define         V4L2_DV_1080P30_TB              44
+
 /*
  *      D V     B T     T I M I N G S
  */
@@ -1026,6 +1082,7 @@ struct v4l2_ext_controls {
 #define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */
 #define V4L2_CTRL_CLASS_CAMERA 0x009a0000       /* Camera class controls */
 #define V4L2_CTRL_CLASS_FM_TX 0x009b0000        /* FM Modulator control class */
+#define V4L2_CTRL_CLASS_CODEC 0x009c0000        /* Codec control class */
 
 #define V4L2_CTRL_ID_MASK         (0x0fffffff)
 #define V4L2_CTRL_ID2CLASS(id)    ((id) & 0x0fff0000UL)
@@ -1145,8 +1202,36 @@ enum v4l2_colorfx {
 #define V4L2_CID_ILLUMINATORS_1                 (V4L2_CID_BASE+37)
 #define V4L2_CID_ILLUMINATORS_2                 (V4L2_CID_BASE+38)
 
+/*
+ * This is custom CID
+ */
+/* for rgb alpha function */
+#define V4L2_CID_GLOBAL_ALPHA                   (V4L2_CID_BASE+39)
+
+/* cacheable configuration */
+#define V4L2_CID_CACHEABLE                      (V4L2_CID_BASE+40)
+
+/* jpeg captured size */
+#define V4L2_CID_CAM_JPEG_MEMSIZE               (V4L2_CID_BASE+41)
+#define V4L2_CID_CAM_JPEG_ENCODEDSIZE           (V4L2_CID_BASE+42)
+
+#define V4L2_CID_SET_SHAREABLE                  (V4L2_CID_BASE+43)
+
+/* TV configuration */
+#define V4L2_CID_TV_LAYER_BLEND_ENABLE          (V4L2_CID_BASE+44)
+#define V4L2_CID_TV_LAYER_BLEND_ALPHA           (V4L2_CID_BASE+45)
+#define V4L2_CID_TV_PIXEL_BLEND_ENABLE          (V4L2_CID_BASE+46)
+#define V4L2_CID_TV_CHROMA_ENABLE               (V4L2_CID_BASE+47)
+#define V4L2_CID_TV_CHROMA_VALUE                (V4L2_CID_BASE+48)
+#define V4L2_CID_TV_HPD_STATUS                  (V4L2_CID_BASE+49)
+
+/* for color space conversion equation selection */
+#define V4L2_CID_CSC_EQ_MODE                    (V4L2_CID_BASE+50)
+#define V4L2_CID_CSC_EQ                         (V4L2_CID_BASE+51)
+#define V4L2_CID_CSC_RANGE                      (V4L2_CID_BASE+52)
+
 /* last CID + 1 */
-#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+39)
+#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+53)
 
 /*  MPEG-class control IDs defined by V4L2 */
 #define V4L2_CID_MPEG_BASE                      (V4L2_CTRL_CLASS_MPEG | 0x900)
@@ -1360,6 +1445,224 @@ enum v4l2_mpeg_cx2341x_video_median_filter_type {
 #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP    (V4L2_CID_MPEG_CX2341X_BASE+10)
 #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS         (V4L2_CID_MPEG_CX2341X_BASE+11)
 
+/* For codecs */
+
+#define V4L2_CID_CODEC_BASE                     (V4L2_CTRL_CLASS_CODEC | 0x900)
+#define V4L2_CID_CODEC_CLASS                    (V4L2_CTRL_CLASS_CODEC | 1)
+
+/* Codec class control IDs specific to the MFC5X driver */
+#define V4L2_CID_CODEC_MFC5X_BASE               (V4L2_CTRL_CLASS_CODEC | 0x1000)
+
+/* For both decoding and encoding */
+
+/* For decoding */
+
+#define V4L2_CID_CODEC_LOOP_FILTER_MPEG4_ENABLE (V4L2_CID_CODEC_BASE + 110)
+#define V4L2_CID_CODEC_DISPLAY_DELAY            (V4L2_CID_CODEC_BASE + 137)
+#define V4L2_CID_CODEC_REQ_NUM_BUFS             (V4L2_CID_CODEC_BASE + 140)
+#define V4L2_CID_CODEC_SLICE_INTERFACE          (V4L2_CID_CODEC_BASE + 141)
+#define V4L2_CID_CODEC_PACKED_PB                (V4L2_CID_CODEC_BASE + 142)
+#define V4L2_CID_CODEC_FRAME_TAG                (V4L2_CID_CODEC_BASE + 143)
+#define V4L2_CID_CODEC_CRC_ENABLE               (V4L2_CID_CODEC_BASE + 144)
+#define V4L2_CID_CODEC_CRC_DATA_LUMA            (V4L2_CID_CODEC_BASE + 145)
+#define V4L2_CID_CODEC_CRC_DATA_CHROMA          (V4L2_CID_CODEC_BASE + 146)
+#define V4L2_CID_CODEC_CRC_DATA_LUMA_BOT        (V4L2_CID_CODEC_BASE + 147)
+#define V4L2_CID_CODEC_CRC_DATA_CHROMA_BOT      (V4L2_CID_CODEC_BASE + 148)
+#define V4L2_CID_CODEC_CRC_GENERATED            (V4L2_CID_CODEC_BASE + 149)
+#define V4L2_CID_CODEC_FRAME_TYPE               (V4L2_CID_CODEC_BASE + 154)
+#define V4L2_CID_CODEC_CHECK_STATE              (V4L2_CID_CODEC_BASE + 155)
+#define V4L2_CID_CODEC_DISPLAY_STATUS           (V4L2_CID_CODEC_BASE + 156)
+#define V4L2_CID_CODEC_FRAME_PACK_SEI_PARSE     (V4L2_CID_CODEC_BASE + 157)
+#define V4L2_CID_CODEC_FRAME_PACK_SEI_AVAIL     (V4L2_CID_CODEC_BASE + 158)
+#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_ID   (V4L2_CID_CODEC_BASE + 159)
+#define V4L2_CID_CODEC_FRAME_PACK_SEI_INFO      (V4L2_CID_CODEC_BASE + 160)
+#define V4L2_CID_CODEC_FRAME_PACK_GRID_POS      (V4L2_CID_CODEC_BASE + 161)
+
+/* For encoding */
+#define V4L2_CID_CODEC_LOOP_FILTER_H264         (V4L2_CID_CODEC_BASE + 9)
+enum v4l2_cid_codec_loop_filter_h264 {
+        V4L2_CID_CODEC_LOOP_FILTER_H264_ENABLE = 0,
+        V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE = 1,
+        V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE_AT_BOUNDARY = 2,
+};
+
+#define V4L2_CID_CODEC_FRAME_INSERTION          (V4L2_CID_CODEC_BASE + 10)
+enum v4l2_cid_codec_frame_insertion {
+        V4L2_CID_CODEC_FRAME_INSERT_NONE = 0x0,
+        V4L2_CID_CODEC_FRAME_INSERT_I_FRAME = 0x1,
+        V4L2_CID_CODEC_FRAME_INSERT_NOT_CODED = 0x2,
+};
+
+#define V4L2_CID_CODEC_ENCODED_LUMA_ADDR        (V4L2_CID_CODEC_BASE + 11)
+#define V4L2_CID_CODEC_ENCODED_CHROMA_ADDR      (V4L2_CID_CODEC_BASE + 12)
+
+#define V4L2_CID_CODEC_ENCODED_I_PERIOD_CH      V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE
+#define V4L2_CID_CODEC_ENCODED_FRAME_RATE_CH    V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE
+#define V4L2_CID_CODEC_ENCODED_BIT_RATE_CH      V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE
+
+#define V4L2_CID_CODEC_FRAME_PACK_SEI_GEN       (V4L2_CID_CODEC_BASE + 13)
+#define V4L2_CID_CODEC_FRAME_PACK_FRM0_FLAG     (V4L2_CID_CODEC_BASE + 14)
+enum v4l2_codec_mfc5x_enc_flag {
+        V4L2_CODEC_MFC5X_ENC_FLAG_DISABLE = 0,
+        V4L2_CODEC_MFC5X_ENC_FLAG_ENABLE = 1,
+};
+#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_TYPE (V4L2_CID_CODEC_BASE + 15)
+enum v4l2_codec_mfc5x_enc_frame_pack_arrgment_type {
+        V4L2_CODEC_MFC5X_ENC_FRAME_PACK_SIDE_BY_SIDE = 0,
+        V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TOP_AND_BOT = 1,
+        V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TMP_INTER = 2,
+};
+
+/* common */
+enum v4l2_codec_mfc5x_enc_switch {
+        V4L2_CODEC_MFC5X_ENC_SW_DISABLE = 0,
+        V4L2_CODEC_MFC5X_ENC_SW_ENABLE  = 1,
+};
+enum v4l2_codec_mfc5x_enc_switch_inv {
+        V4L2_CODEC_MFC5X_ENC_SW_INV_ENABLE      = 0,
+        V4L2_CODEC_MFC5X_ENC_SW_INV_DISABLE     = 1,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE               (V4L2_CID_CODEC_MFC5X_BASE+300)
+#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MODE       (V4L2_CID_CODEC_MFC5X_BASE+301)
+enum v4l2_codec_mfc5x_enc_multi_slice_mode {
+        V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_DISABLE           = 0,
+        V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_MACROBLOCK_COUNT  = 1,
+        V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_BIT_COUNT         = 3,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MB         (V4L2_CID_CODEC_MFC5X_BASE+302)
+#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_BIT        (V4L2_CID_CODEC_MFC5X_BASE+303)
+#define V4L2_CID_CODEC_MFC5X_ENC_INTRA_REFRESH_MB       (V4L2_CID_CODEC_MFC5X_BASE+304)
+#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CTRL_ENABLE        (V4L2_CID_CODEC_MFC5X_BASE+305)
+#define V4L2_CID_CODEC_MFC5X_ENC_PAD_LUMA_VALUE         (V4L2_CID_CODEC_MFC5X_BASE+306)
+#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CB_VALUE           (V4L2_CID_CODEC_MFC5X_BASE+307)
+#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CR_VALUE           (V4L2_CID_CODEC_MFC5X_BASE+308)
+#define V4L2_CID_CODEC_MFC5X_ENC_RC_FRAME_ENABLE        (V4L2_CID_CODEC_MFC5X_BASE+309)
+#define V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE            (V4L2_CID_CODEC_MFC5X_BASE+310)
+#define V4L2_CID_CODEC_MFC5X_ENC_RC_REACTION_COEFF      (V4L2_CID_CODEC_MFC5X_BASE+311)
+#define V4L2_CID_CODEC_MFC5X_ENC_STREAM_SIZE            (V4L2_CID_CODEC_MFC5X_BASE+312)
+#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_COUNT            (V4L2_CID_CODEC_MFC5X_BASE+313)
+#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_TYPE             (V4L2_CID_CODEC_MFC5X_BASE+314)
+enum v4l2_codec_mfc5x_enc_frame_type {
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_NOT_CODED       = 0,
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_I_FRAME         = 1,
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_P_FRAME         = 2,
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_B_FRAME         = 3,
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_SKIPPED         = 4,
+        V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_OTHERS          = 5,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE       (V4L2_CID_CODEC_MFC5X_BASE+315)
+enum v4l2_codec_mfc5x_enc_force_frame_type {
+        V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_I_FRAME   = 1,
+        V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_NOT_CODED = 2,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_VBV_BUF_SIZE           (V4L2_CID_CODEC_MFC5X_BASE+316)
+#define V4L2_CID_CODEC_MFC5X_ENC_SEQ_HDR_MODE           (V4L2_CID_CODEC_MFC5X_BASE+317)
+enum v4l2_codec_mfc5x_enc_seq_hdr_mode {
+        V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ           = 0,
+        V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ_FRAME     = 1,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_SKIP_MODE        (V4L2_CID_CODEC_MFC5X_BASE+318)
+enum v4l2_codec_mfc5x_enc_frame_skip_mode {
+        V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_DISABLE            = 0,
+        V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_LEVEL              = 1,
+        V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_VBV_BUF_SIZE       = 2,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_RC_FIXED_TARGET_BIT    (V4L2_CID_CODEC_MFC5X_BASE+319)
+#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_DELTA            (V4L2_CID_CODEC_MFC5X_BASE+320)
+
+/* codec specific */
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_B_FRAMES          (V4L2_CID_CODEC_MFC5X_BASE+400)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_PROFILE           (V4L2_CID_CODEC_MFC5X_BASE+401)
+enum v4l2_codec_mfc5x_enc_h264_profile {
+        V4L2_CODEC_MFC5X_ENC_H264_PROFILE_MAIN          = 0,
+        V4L2_CODEC_MFC5X_ENC_H264_PROFILE_HIGH          = 1,
+        V4L2_CODEC_MFC5X_ENC_H264_PROFILE_BASELINE      = 2,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LEVEL             (V4L2_CID_CODEC_MFC5X_BASE+402)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_INTERLACE         (V4L2_CID_CODEC_MFC5X_BASE+403)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_MODE  (V4L2_CID_CODEC_MFC5X_BASE+404)
+enum v4l2_codec_mfc5x_enc_h264_loop_filter {
+        V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ENABLE                    = 0,
+        V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE                   = 1,
+        V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE_AT_BOUNDARY       = 2,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ALPHA (V4L2_CID_CODEC_MFC5X_BASE+405)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_BETA  (V4L2_CID_CODEC_MFC5X_BASE+406)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ENTROPY_MODE      (V4L2_CID_CODEC_MFC5X_BASE+407)
+enum v4l2_codec_mfc5x_enc_h264_entropy_mode {
+        V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CAVLC    = 0,
+        V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CABAC    = 1,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_MAX_REF_PIC       (V4L2_CID_CODEC_MFC5X_BASE+408)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_NUM_REF_PIC_4P    (V4L2_CID_CODEC_MFC5X_BASE+409)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_8X8_TRANSFORM     (V4L2_CID_CODEC_MFC5X_BASE+410)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ENABLE      (V4L2_CID_CODEC_MFC5X_BASE+411)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE     (V4L2_CID_CODEC_MFC5X_BASE+412)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_QP       (V4L2_CID_CODEC_MFC5X_BASE+413)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MIN_QP         (V4L2_CID_CODEC_MFC5X_BASE+414)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MAX_QP         (V4L2_CID_CODEC_MFC5X_BASE+415)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_DARK        (V4L2_CID_CODEC_MFC5X_BASE+416)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_SMOOTH      (V4L2_CID_CODEC_MFC5X_BASE+417)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_STATIC      (V4L2_CID_CODEC_MFC5X_BASE+418)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ACTIVITY    (V4L2_CID_CODEC_MFC5X_BASE+419)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_P_FRAME_QP     (V4L2_CID_CODEC_MFC5X_BASE+420)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_B_FRAME_QP     (V4L2_CID_CODEC_MFC5X_BASE+421)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_ENABLE     (V4L2_CID_CODEC_MFC5X_BASE+422)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_IDC        (V4L2_CID_CODEC_MFC5X_BASE+423)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_WIDTH     (V4L2_CID_CODEC_MFC5X_BASE+424)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_HEIGHT    (V4L2_CID_CODEC_MFC5X_BASE+425)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_OPEN_GOP          (V4L2_CID_CODEC_MFC5X_BASE+426)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_I_PERIOD          (V4L2_CID_CODEC_MFC5X_BASE+427)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_HIER_P_ENABLE     (V4L2_CID_CODEC_MFC5X_BASE+428)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER0_QP         (V4L2_CID_CODEC_MFC5X_BASE+429)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER1_QP         (V4L2_CID_CODEC_MFC5X_BASE+430)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER2_QP         (V4L2_CID_CODEC_MFC5X_BASE+431)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_ENABLE        (V4L2_CID_CODEC_MFC5X_BASE+432)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_ENABLE        (V4L2_CID_CODEC_MFC5X_BASE+433)
+
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_B_FRAMES         (V4L2_CID_CODEC_MFC5X_BASE+440)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_PROFILE          (V4L2_CID_CODEC_MFC5X_BASE+441)
+enum v4l2_codec_mfc5x_enc_mpeg4_profile {
+        V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_SIMPLE               = 0,
+        V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_ADVANCED_SIMPLE      = 1,
+};
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_LEVEL            (V4L2_CID_CODEC_MFC5X_BASE+442)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_FRAME_QP      (V4L2_CID_CODEC_MFC5X_BASE+443)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MIN_QP        (V4L2_CID_CODEC_MFC5X_BASE+444)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MAX_QP        (V4L2_CID_CODEC_MFC5X_BASE+445)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_QUARTER_PIXEL    (V4L2_CID_CODEC_MFC5X_BASE+446)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_P_FRAME_QP    (V4L2_CID_CODEC_MFC5X_BASE+447)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_B_FRAME_QP    (V4L2_CID_CODEC_MFC5X_BASE+448)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_TIME_RES     (V4L2_CID_CODEC_MFC5X_BASE+449)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_FRM_DELTA    (V4L2_CID_CODEC_MFC5X_BASE+450)
+#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MB_ENABLE     (V4L2_CID_CODEC_MFC5X_BASE+451)
+
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_RATE     (V4L2_CID_CODEC_MFC5X_BASE+460)
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_QP       (V4L2_CID_CODEC_MFC5X_BASE+461)
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MIN_QP         (V4L2_CID_CODEC_MFC5X_BASE+462)
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MAX_QP         (V4L2_CID_CODEC_MFC5X_BASE+463)
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_P_FRAME_QP     (V4L2_CID_CODEC_MFC5X_BASE+464)
+#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MB_ENABLE      (V4L2_CID_CODEC_MFC5X_BASE+465)
+
+/* FMO/ASO parameters */
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_MAP_TYPE      (V4L2_CID_CODEC_MFC5X_BASE+480)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_SLICE_NUM     (V4L2_CID_CODEC_MFC5X_BASE+481)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_RUN_LEN1      (V4L2_CID_CODEC_MFC5X_BASE+482)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_RUN_LEN2      (V4L2_CID_CODEC_MFC5X_BASE+483)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_RUN_LEN3      (V4L2_CID_CODEC_MFC5X_BASE+484)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_RUN_LEN4      (V4L2_CID_CODEC_MFC5X_BASE+485)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_SG_DIR        (V4L2_CID_CODEC_MFC5X_BASE+486)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_FMO_SG_RATE       (V4L2_CID_CODEC_MFC5X_BASE+487)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_0    (V4L2_CID_CODEC_MFC5X_BASE+488)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_1    (V4L2_CID_CODEC_MFC5X_BASE+489)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_2    (V4L2_CID_CODEC_MFC5X_BASE+490)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_3    (V4L2_CID_CODEC_MFC5X_BASE+491)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_4    (V4L2_CID_CODEC_MFC5X_BASE+492)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_5    (V4L2_CID_CODEC_MFC5X_BASE+493)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_6    (V4L2_CID_CODEC_MFC5X_BASE+494)
+#define V4L2_CID_CODEC_MFC5X_ENC_H264_ASO_SL_ORDER_7    (V4L2_CID_CODEC_MFC5X_BASE+495)
+
+
 /*  Camera class control IDs */
 #define V4L2_CID_CAMERA_CLASS_BASE      (V4L2_CTRL_CLASS_CAMERA | 0x900)
 #define V4L2_CID_CAMERA_CLASS           (V4L2_CTRL_CLASS_CAMERA | 1)
diff --git a/include/linux/videodev2_exynos_camera.h b/include/linux/videodev2_exynos_camera.h
new file mode 100644
index 00000000000..0c51beff764
--- /dev/null
+++ b/include/linux/videodev2_exynos_camera.h
@@ -0,0 +1,1368 @@
+/*
+ * Video for Linux Two header file for samsung
+ *
+ * Copyright (C) 2009, Dongsoo Nathaniel Kim<dongsoo45.kim@samsung.com>
+ *
+ * This header file contains several v4l2 APIs to be proposed to v4l2
+ * community and until bein accepted, will be used restrictly in Samsung's
+ * camera interface driver FIMC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_VIDEODEV2_SAMSUNG_H
+#define __LINUX_VIDEODEV2_SAMSUNG_H
+
+/* Values for 'capabilities' field */
+/* Object detection device */
+#define V4L2_CAP_OBJ_RECOGNITION        0x10000000
+/* strobe control */
+#define V4L2_CAP_STROBE                 0x20000000
+
+#define V4L2_CID_FOCUS_MODE             (V4L2_CID_CAMERA_CLASS_BASE+17)
+/* Focus Methods */
+enum v4l2_focus_mode {
+        V4L2_FOCUS_MODE_AUTO            = 0,
+        V4L2_FOCUS_MODE_MACRO           = 1,
+        V4L2_FOCUS_MODE_MANUAL          = 2,
+        V4L2_FOCUS_MODE_LASTP           = 2,
+};
+
+#define V4L2_CID_ZOOM_MODE              (V4L2_CID_CAMERA_CLASS_BASE+18)
+/* Zoom Methods */
+enum v4l2_zoom_mode {
+        V4L2_ZOOM_MODE_CONTINUOUS       = 0,
+        V4L2_ZOOM_MODE_OPTICAL          = 1,
+        V4L2_ZOOM_MODE_DIGITAL          = 2,
+        V4L2_ZOOM_MODE_LASTP            = 2,
+};
+
+/* Exposure Methods */
+#define V4L2_CID_PHOTOMETRY             (V4L2_CID_CAMERA_CLASS_BASE+19)
+enum v4l2_photometry_mode {
+        V4L2_PHOTOMETRY_MULTISEG        = 0, /*Multi Segment*/
+        V4L2_PHOTOMETRY_CWA             = 1, /*Centre Weighted Average*/
+        V4L2_PHOTOMETRY_SPOT            = 2,
+        V4L2_PHOTOMETRY_AFSPOT          = 3, /*Spot metering on focused point*/
+        V4L2_PHOTOMETRY_LASTP           = V4L2_PHOTOMETRY_AFSPOT,
+};
+
+/* Manual exposure control items menu type: iris, shutter, iso */
+#define V4L2_CID_CAM_APERTURE   (V4L2_CID_CAMERA_CLASS_BASE+20)
+enum v4l2_aperture_mode {
+        APERTURE_F_AUTO = 0,
+        APERTURE_F_2_8,
+        APERTURE_F_3_2,
+        APERTURE_F_3_6,
+        APERTURE_F_4_0,
+        APERTURE_F_4_5,
+        APERTURE_F_5_1,
+        APERTURE_F_5_7,
+        APERTURE_F_6_4,
+        APERTURE_F_7_2,
+        APERTURE_MAX,
+};
+#define V4L2_CID_CAM_SHUTTER    (V4L2_CID_CAMERA_CLASS_BASE+21)
+#define V4L2_CID_CAM_ISO        (V4L2_CID_CAMERA_CLASS_BASE+22)
+
+/* Following CIDs are menu type */
+#define V4L2_CID_SCENEMODE      (V4L2_CID_CAMERA_CLASS_BASE+23)
+#define V4L2_CID_CAM_STABILIZE  (V4L2_CID_CAMERA_CLASS_BASE+24)
+#define V4L2_CID_CAM_MULTISHOT  (V4L2_CID_CAMERA_CLASS_BASE+25)
+
+/* Control dynamic range */
+#define V4L2_CID_CAM_DR         (V4L2_CID_CAMERA_CLASS_BASE+26)
+
+/* White balance preset control */
+#define V4L2_CID_WHITE_BALANCE_PRESET (V4L2_CID_CAMERA_CLASS_BASE+27)
+#define V4L2_CID_CAM_SENSOR_FW_VER (V4L2_CID_CAMERA_CLASS_BASE + 28)
+#define V4L2_CID_CAM_PHONE_FW_VER (V4L2_CID_CAMERA_CLASS_BASE + 29)
+
+/* CID extensions */
+#define V4L2_CID_ROTATION               (V4L2_CID_PRIVATE_BASE + 0)
+#define V4L2_CID_PADDR_Y                (V4L2_CID_PRIVATE_BASE + 1)
+#define V4L2_CID_PADDR_CB               (V4L2_CID_PRIVATE_BASE + 2)
+#define V4L2_CID_PADDR_CR               (V4L2_CID_PRIVATE_BASE + 3)
+#define V4L2_CID_PADDR_CBCR             (V4L2_CID_PRIVATE_BASE + 4)
+#define V4L2_CID_OVERLAY_AUTO           (V4L2_CID_PRIVATE_BASE + 5)
+#define V4L2_CID_OVERLAY_VADDR0         (V4L2_CID_PRIVATE_BASE + 6)
+#define V4L2_CID_OVERLAY_VADDR1         (V4L2_CID_PRIVATE_BASE + 7)
+#define V4L2_CID_OVERLAY_VADDR2         (V4L2_CID_PRIVATE_BASE + 8)
+#define V4L2_CID_OVLY_MODE              (V4L2_CID_PRIVATE_BASE + 9)
+#define V4L2_CID_DST_INFO               (V4L2_CID_PRIVATE_BASE + 10)
+/* UMP secure id control */
+#define V4L2_CID_GET_UMP_SECURE_ID      (V4L2_CID_PRIVATE_BASE + 11)
+#define V4L2_CID_GET_PHY_SRC_YADDR      (V4L2_CID_PRIVATE_BASE + 12)
+#define V4L2_CID_GET_PHY_SRC_CADDR      (V4L2_CID_PRIVATE_BASE + 13)
+#define V4L2_CID_IMAGE_EFFECT_FN        (V4L2_CID_PRIVATE_BASE + 16)
+#define V4L2_CID_IMAGE_EFFECT_APPLY     (V4L2_CID_PRIVATE_BASE + 17)
+#define V4L2_CID_IMAGE_EFFECT_CB        (V4L2_CID_PRIVATE_BASE + 18)
+#define V4L2_CID_IMAGE_EFFECT_CR        (V4L2_CID_PRIVATE_BASE + 19)
+#define V4L2_CID_RESERVED_MEM_BASE_ADDR (V4L2_CID_PRIVATE_BASE + 20)
+#define V4L2_CID_FIMC_VERSION           (V4L2_CID_PRIVATE_BASE + 21)
+
+#define V4L2_CID_CACHE_FLUSH            (V4L2_CID_PRIVATE_BASE + 61)
+#define V4L2_CID_RESERVED_MEM_SIZE      (V4L2_CID_PRIVATE_BASE + 63)
+#define V4L2_CID_STREAM_PAUSE                   (V4L2_CID_PRIVATE_BASE + 53)
+#define V4L2_CID_CACHE_FLUSH                    (V4L2_CID_PRIVATE_BASE + 61)
+#define V4L2_CID_RESERVED_MEM_SIZE              (V4L2_CID_PRIVATE_BASE + 63)
+
+/* CID Extensions for camera sensor operations */
+#define V4L2_CID_CAM_PREVIEW_ONOFF              (V4L2_CID_PRIVATE_BASE + 64)
+#define V4L2_CID_CAM_CAPTURE                    (V4L2_CID_PRIVATE_BASE + 65)
+/* #define V4L2_CID_CAM_JPEG_MEMSIZE    (V4L2_CID_PRIVATE_BASE + 66) */
+
+#define V4L2_CID_CAM_DATE_INFO_YEAR             (V4L2_CID_PRIVATE_BASE + 14)
+#define V4L2_CID_CAM_DATE_INFO_MONTH            (V4L2_CID_PRIVATE_BASE + 15)
+#define V4L2_CID_CAM_DATE_INFO_DATE             (V4L2_CID_PRIVATE_BASE + 22)
+#define V4L2_CID_CAM_SENSOR_VER                 (V4L2_CID_PRIVATE_BASE + 23)
+#define V4L2_CID_CAM_FW_MINOR_VER               (V4L2_CID_PRIVATE_BASE + 24)
+#define V4L2_CID_CAM_FW_MAJOR_VER               (V4L2_CID_PRIVATE_BASE + 25)
+#define V4L2_CID_CAM_PRM_MINOR_VER              (V4L2_CID_PRIVATE_BASE + 26)
+#define V4L2_CID_CAM_PRM_MAJOR_VER              (V4L2_CID_PRIVATE_BASE + 27)
+#define V4L2_CID_CAM_FW_VER                     (V4L2_CID_PRIVATE_BASE + 28)
+#define V4L2_CID_CAM_SET_FW_ADDR                (V4L2_CID_PRIVATE_BASE + 29)
+#define V4L2_CID_CAM_SET_FW_SIZE                (V4L2_CID_PRIVATE_BASE + 30)
+#define V4L2_CID_CAM_UPDATE_FW  (V4L2_CID_PRIVATE_BASE + 31)
+enum v4l2_firmware_mode {
+        FW_MODE_NONE,
+        FW_MODE_VERSION,
+        FW_MODE_UPDATE,
+        FW_MODE_DUMP,
+};
+
+#define V4L2_CID_CAM_JPEG_MAIN_SIZE             (V4L2_CID_PRIVATE_BASE + 32)
+#define V4L2_CID_CAM_JPEG_MAIN_OFFSET           (V4L2_CID_PRIVATE_BASE + 33)
+#define V4L2_CID_CAM_JPEG_THUMB_SIZE            (V4L2_CID_PRIVATE_BASE + 34)
+#define V4L2_CID_CAM_JPEG_THUMB_OFFSET          (V4L2_CID_PRIVATE_BASE + 35)
+#define V4L2_CID_CAM_JPEG_POSTVIEW_OFFSET       (V4L2_CID_PRIVATE_BASE + 36)
+#define V4L2_CID_CAM_JPEG_QUALITY       (V4L2_CID_PRIVATE_BASE + 37)
+#define V4L2_CID_CAM_SENSOR_MAKER       (V4L2_CID_PRIVATE_BASE + 38)
+#define V4L2_CID_CAM_SENSOR_OPTICAL     (V4L2_CID_PRIVATE_BASE + 39)
+#define V4L2_CID_CAM_AF_VER_LOW         (V4L2_CID_PRIVATE_BASE + 40)
+#define V4L2_CID_CAM_AF_VER_HIGH        (V4L2_CID_PRIVATE_BASE + 41)
+#define V4L2_CID_CAM_GAMMA_RG_LOW       (V4L2_CID_PRIVATE_BASE + 42)
+#define V4L2_CID_CAM_GAMMA_RG_HIGH      (V4L2_CID_PRIVATE_BASE + 43)
+#define V4L2_CID_CAM_GAMMA_BG_LOW       (V4L2_CID_PRIVATE_BASE + 44)
+#define V4L2_CID_CAM_GAMMA_BG_HIGH      (V4L2_CID_PRIVATE_BASE + 45)
+#define V4L2_CID_CAM_DUMP_FW            (V4L2_CID_PRIVATE_BASE + 46)
+#define V4L2_CID_CAM_GET_DUMP_SIZE  (V4L2_CID_PRIVATE_BASE + 47)
+#define V4L2_CID_CAMERA_VT_MODE         (V4L2_CID_PRIVATE_BASE + 48)
+enum cam_vt_mode {
+        CAM_VT_MODE_NONE ,
+        CAM_VT_MODE_3G ,
+        CAM_VT_MODE_VOIP ,
+};
+
+#define V4L2_CID_CAMERA_VGA_BLUR        (V4L2_CID_PRIVATE_BASE + 49)
+#define V4L2_CID_CAMERA_CAPTURE         (V4L2_CID_PRIVATE_BASE + 50)
+#define V4L2_CID_CAMERA_HDR             (V4L2_CID_PRIVATE_BASE + 51)
+#define V4L2_CID_CAMERA_HYBRID          (V4L2_CID_PRIVATE_BASE + 52)
+#define V4L2_CID_CAMERA_HYBRID_CAPTURE          (V4L2_CID_PRIVATE_BASE + 62)
+#define V4L2_CID_CAMERA_POSTVIEW_CAPTURE        (V4L2_CID_PRIVATE_BASE + 67)
+#define V4L2_CID_CAMERA_CAPTURE_MODE            (V4L2_CID_PRIVATE_BASE + 68)
+#define V4L2_CID_CAMERA_YUV_CAPTURE     (V4L2_CID_PRIVATE_BASE + 69)
+
+#define V4L2_CID_MAIN_SW_DATE_INFO_YEAR         (V4L2_CID_PRIVATE_BASE + 54)
+#define V4L2_CID_MAIN_SW_DATE_INFO_MONTH        (V4L2_CID_PRIVATE_BASE + 55)
+#define V4L2_CID_MAIN_SW_DATE_INFO_DATE         (V4L2_CID_PRIVATE_BASE + 56)
+#define V4L2_CID_MAIN_SW_FW_MINOR_VER           (V4L2_CID_PRIVATE_BASE + 57)
+#define V4L2_CID_MAIN_SW_FW_MAJOR_VER           (V4L2_CID_PRIVATE_BASE + 58)
+#define V4L2_CID_MAIN_SW_PRM_MINOR_VER          (V4L2_CID_PRIVATE_BASE + 59)
+#define V4L2_CID_MAIN_SW_PRM_MAJOR_VER          (V4L2_CID_PRIVATE_BASE + 60)
+
+#define V4L2_CID_FIMC_IS_BASE                   (V4L2_CTRL_CLASS_CAMERA | 0x1000)
+#define V4L2_CID_FIMC_IS_TUNE_BASE              (V4L2_CTRL_CLASS_CAMERA | 0x2000)
+
+#define V4L2_CID_IS_LOAD_FW                     (V4L2_CID_FIMC_IS_BASE + 10)
+#define V4L2_CID_IS_INIT_PARAM                  (V4L2_CID_FIMC_IS_BASE + 11)
+#define V4L2_CID_IS_RESET                       (V4L2_CID_FIMC_IS_BASE + 12)
+#define V4L2_CID_IS_S_POWER                     (V4L2_CID_FIMC_IS_BASE + 13)
+enum is_set_power {
+        IS_POWER_OFF,
+        IS_POWER_ON
+};
+
+#define V4L2_CID_IS_S_STREAM                    (V4L2_CID_FIMC_IS_BASE + 14)
+enum is_set_stream {
+        IS_DISABLE_STREAM,
+        IS_ENABLE_STREAM
+};
+
+#define V4L2_CID_IS_S_SCENARIO_MODE             (V4L2_CID_FIMC_IS_BASE + 15)
+#define V4L2_CID_IS_S_FORMAT_SCENARIO           (V4L2_CID_FIMC_IS_BASE + 16)
+enum scenario_mode {
+        IS_MODE_PREVIEW_STILL,
+        IS_MODE_PREVIEW_VIDEO,
+        IS_MODE_CAPTURE_STILL,
+        IS_MODE_CAPTURE_VIDEO,
+        IS_MODE_MAX
+};
+
+/* global */
+#define V4L2_CID_IS_CAMERA_SHOT_MODE_NORMAL     (V4L2_CID_FIMC_IS_BASE + 101)
+/* value : 1 : single shot , >=2 : continuous shot */
+
+#define V4L2_CID_IS_CAMERA_SENSOR_NUM           (V4L2_CID_FIMC_IS_BASE + 201)
+
+#define V4L2_CID_IS_CAMERA_FOCUS_MODE           (V4L2_CID_FIMC_IS_BASE + 401)
+enum is_focus_mode {
+        IS_FOCUS_MODE_AUTO,
+        IS_FOCUS_MODE_MACRO,
+        IS_FOCUS_MODE_INFINITY,
+        IS_FOCUS_MODE_CONTINUOUS,
+        IS_FOCUS_MODE_TOUCH,
+        IS_FOCUS_MODE_FACEDETECT,
+        IS_FOCUS_MODE_IDLE,
+        IS_FOCUS_MODE_MAX,
+};
+
+#define V4L2_CID_IS_CAMERA_FLASH_MODE           (V4L2_CID_FIMC_IS_BASE + 402)
+enum is_flash_mode {
+        IS_FLASH_MODE_OFF,
+        IS_FLASH_MODE_AUTO,
+        IS_FLASH_MODE_AUTO_REDEYE,
+        IS_FLASH_MODE_ON,
+        IS_FLASH_MODE_TORCH,
+        IS_FLASH_MODE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_AWB_MODE             (V4L2_CID_FIMC_IS_BASE + 403)
+enum is_awb_mode {
+        IS_AWB_AUTO,
+        IS_AWB_DAYLIGHT,
+        IS_AWB_CLOUDY,
+        IS_AWB_TUNGSTEN,
+        IS_AWB_FLUORESCENT,
+        IS_AWB_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_IMAGE_EFFECT         (V4L2_CID_FIMC_IS_BASE + 404)
+enum is_image_effect {
+        IS_IMAGE_EFFECT_DISABLE,
+        IS_IMAGE_EFFECT_MONOCHROME,
+        IS_IMAGE_EFFECT_NEGATIVE_MONO,
+        IS_IMAGE_EFFECT_NEGATIVE_COLOR,
+        IS_IMAGE_EFFECT_SEPIA,
+        IS_IMAGE_EFFECT_SEPIA_CB,
+        IS_IMAGE_EFFECT_SEPIA_CR,
+        IS_IMAGE_EFFECT_NEGATIVE,
+        IS_IMAGE_EFFECT_ARTFREEZE,
+        IS_IMAGE_EFFECT_EMBOSSING,
+        IS_IMAGE_EFFECT_SILHOUETTE,
+        IS_IMAGE_EFFECT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_ISO                  (V4L2_CID_FIMC_IS_BASE + 405)
+enum is_iso {
+        IS_ISO_AUTO,
+        IS_ISO_50,
+        IS_ISO_100,
+        IS_ISO_200,
+        IS_ISO_400,
+        IS_ISO_800,
+        IS_ISO_1600,
+        IS_ISO_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_CONTRAST             (V4L2_CID_FIMC_IS_BASE + 406)
+enum is_contrast {
+        IS_CONTRAST_AUTO,
+        IS_CONTRAST_MINUS_2,
+        IS_CONTRAST_MINUS_1,
+        IS_CONTRAST_DEFAULT,
+        IS_CONTRAST_PLUS_1,
+        IS_CONTRAST_PLUS_2,
+        IS_CONTRAST_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_SATURATION           (V4L2_CID_FIMC_IS_BASE + 407)
+enum is_saturation {
+        IS_SATURATION_MINUS_2,
+        IS_SATURATION_MINUS_1,
+        IS_SATURATION_DEFAULT,
+        IS_SATURATION_PLUS_1,
+        IS_SATURATION_PLUS_2,
+        IS_SATURATION_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_SHARPNESS            (V4L2_CID_FIMC_IS_BASE + 408)
+enum is_sharpness {
+        IS_SHARPNESS_MINUS_2,
+        IS_SHARPNESS_MINUS_1,
+        IS_SHARPNESS_DEFAULT,
+        IS_SHARPNESS_PLUS_1,
+        IS_SHARPNESS_PLUS_2,
+        IS_SHARPNESS_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_EXPOSURE             (V4L2_CID_FIMC_IS_BASE + 409)
+enum is_exposure {
+        IS_EXPOSURE_MINUS_4,
+        IS_EXPOSURE_MINUS_3,
+        IS_EXPOSURE_MINUS_2,
+        IS_EXPOSURE_MINUS_1,
+        IS_EXPOSURE_DEFAULT,
+        IS_EXPOSURE_PLUS_1,
+        IS_EXPOSURE_PLUS_2,
+        IS_EXPOSURE_PLUS_3,
+        IS_EXPOSURE_PLUS_4,
+        IS_EXPOSURE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_BRIGHTNESS           (V4L2_CID_FIMC_IS_BASE + 410)
+enum is_brightness {
+        IS_BRIGHTNESS_MINUS_2,
+        IS_BRIGHTNESS_MINUS_1,
+        IS_BRIGHTNESS_DEFAULT,
+        IS_BRIGHTNESS_PLUS_1,
+        IS_BRIGHTNESS_PLUS_2,
+        IS_BRIGHTNESS_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_HUE                  (V4L2_CID_FIMC_IS_BASE + 411)
+enum is_hue {
+        IS_HUE_MINUS_2,
+        IS_HUE_MINUS_1,
+        IS_HUE_DEFAULT,
+        IS_HUE_PLUS_1,
+        IS_HUE_PLUS_2,
+        IS_HUE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_METERING             (V4L2_CID_FIMC_IS_BASE + 412)
+enum is_metering {
+        IS_METERING_AVERAGE,
+        IS_METERING_SPOT,
+        IS_METERING_MATRIX,
+        IS_METERING_CENTER,
+        IS_METERING_MAX
+};
+#define V4L2_CID_IS_CAMERA_METERING_POSITION_X  (V4L2_CID_FIMC_IS_BASE + 500)
+#define V4L2_CID_IS_CAMERA_METERING_POSITION_Y  (V4L2_CID_FIMC_IS_BASE + 501)
+#define V4L2_CID_IS_CAMERA_METERING_WINDOW_X    (V4L2_CID_FIMC_IS_BASE + 502)
+#define V4L2_CID_IS_CAMERA_METERING_WINDOW_Y    (V4L2_CID_FIMC_IS_BASE + 503)
+
+#define V4L2_CID_IS_CAMERA_AFC_MODE             (V4L2_CID_FIMC_IS_BASE + 413)
+enum is_afc_mode {
+        IS_AFC_DISABLE,
+        IS_AFC_AUTO,
+        IS_AFC_MANUAL_50HZ,
+        IS_AFC_MANUAL_60HZ,
+        IS_AFC_MAX
+};
+
+#define V4L2_CID_IS_AWB_LOCK_UNLOCK             (V4L2_CID_FIMC_IS_BASE + 496)
+enum is_awb_lock_unlock {
+        IS_AWB_LOCK,
+        IS_AWB_UNLOCK,
+        IS_AWB_LOCK_UNLOCK_MAX
+};
+
+#define V4L2_CID_IS_AE_LOCK_UNLOCK              (V4L2_CID_FIMC_IS_BASE + 497)
+enum is_ae_lock_unlock {
+        IS_AE_LOCK,
+        IS_AE_UNLOCK,
+        IS_AE_LOCK_UNLOCK_MAX
+};
+
+#define V4L2_CID_IS_FD_GET_FACE_COUNT                   (V4L2_CID_FIMC_IS_BASE + 600)
+#define V4L2_CID_IS_FD_GET_FACE_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 601)
+#define V4L2_CID_IS_FD_GET_FACE_CONFIDENCE              (V4L2_CID_FIMC_IS_BASE + 602)
+#define V4L2_CID_IS_FD_GET_FACE_SMILE_LEVEL             (V4L2_CID_FIMC_IS_BASE + 603)
+#define V4L2_CID_IS_FD_GET_FACE_BLINK_LEVEL             (V4L2_CID_FIMC_IS_BASE + 604)
+#define V4L2_CID_IS_FD_GET_FACE_TOPLEFT_X               (V4L2_CID_FIMC_IS_BASE + 605)
+#define V4L2_CID_IS_FD_GET_FACE_TOPLEFT_Y               (V4L2_CID_FIMC_IS_BASE + 606)
+#define V4L2_CID_IS_FD_GET_FACE_BOTTOMRIGHT_X           (V4L2_CID_FIMC_IS_BASE + 607)
+#define V4L2_CID_IS_FD_GET_FACE_BOTTOMRIGHT_Y           (V4L2_CID_FIMC_IS_BASE + 608)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_TOPLEFT_X           (V4L2_CID_FIMC_IS_BASE + 609)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_TOPLEFT_Y           (V4L2_CID_FIMC_IS_BASE + 610)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_BOTTOMRIGHT_X       (V4L2_CID_FIMC_IS_BASE + 611)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_BOTTOMRIGHT_Y       (V4L2_CID_FIMC_IS_BASE + 612)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_TOPLEFT_X          (V4L2_CID_FIMC_IS_BASE + 613)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_TOPLEFT_Y          (V4L2_CID_FIMC_IS_BASE + 614)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_BOTTOMRIGHT_X      (V4L2_CID_FIMC_IS_BASE + 615)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_BOTTOMRIGHT_Y      (V4L2_CID_FIMC_IS_BASE + 616)
+#define V4L2_CID_IS_FD_GET_MOUTH_TOPLEFT_X              (V4L2_CID_FIMC_IS_BASE + 617)
+#define V4L2_CID_IS_FD_GET_MOUTH_TOPLEFT_Y              (V4L2_CID_FIMC_IS_BASE + 618)
+#define V4L2_CID_IS_FD_GET_MOUTH_BOTTOMRIGHT_X          (V4L2_CID_FIMC_IS_BASE + 619)
+#define V4L2_CID_IS_FD_GET_MOUTH_BOTTOMRIGHT_Y          (V4L2_CID_FIMC_IS_BASE + 620)
+#define V4L2_CID_IS_FD_GET_ANGLE                        (V4L2_CID_FIMC_IS_BASE + 621)
+#define V4L2_CID_IS_FD_GET_YAW_ANGLE                    (V4L2_CID_FIMC_IS_BASE + 622)
+#define V4L2_CID_IS_FD_GET_NEXT                         (V4L2_CID_FIMC_IS_BASE + 623)
+#define V4L2_CID_IS_FD_GET_DATA                         (V4L2_CID_FIMC_IS_BASE + 624)
+
+#define V4L2_CID_IS_FD_SET_MAX_FACE_NUMBER              (V4L2_CID_FIMC_IS_BASE + 650)
+#define V4L2_CID_IS_FD_SET_ROLL_ANGLE                   (V4L2_CID_FIMC_IS_BASE + 651)
+
+enum is_fd_roll_angle {
+        /* 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_BASIC          = 0,
+        /* 0, 30, 0, -30, 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_PRECISE_BASIC  = 1,
+        /* 0, 90, 0, -90 */
+        IS_FD_ROLL_ANGLE_SIDES          = 2,
+        /* 0, 90, 0, -90 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_PRECISE_SIDES  = 3,
+        /* 0, 90, 0, -90, 0, 180 */
+        IS_FD_ROLL_ANGLE_FULL           = 4,
+        /* 0, 90, 0, -90, 0, 180, 0, 135, 0, -135 */
+        IS_FD_ROLL_ANGLE_PRECISE_FULL   = 5,
+};
+
+#define V4L2_CID_IS_FD_SET_YAW_ANGLE    (V4L2_CID_FIMC_IS_BASE + 652)
+enum is_fd_yaw_angle {
+        IS_FD_YAW_ANGLE_0       = 0,
+        IS_FD_YAW_ANGLE_45      = 1,
+        IS_FD_YAW_ANGLE_90      = 2,
+        IS_FD_YAW_ANGLE_45_90   = 3,
+};
+
+#define V4L2_CID_IS_FD_SET_SMILE_MODE   (V4L2_CID_FIMC_IS_BASE + 653)
+enum is_fd_smile_mode {
+        IS_FD_SMILE_MODE_DISABLE        = 0,
+        IS_FD_SMILE_MODE_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_BLINK_MODE   (V4L2_CID_FIMC_IS_BASE + 654)
+enum is_fd_blink_mode {
+        IS_FD_BLINK_MODE_DISABLE        = 0,
+        IS_FD_BLINK_MODE_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_EYE_DETECT_MODE      (V4L2_CID_FIMC_IS_BASE + 655)
+enum is_fd_eye_detect_mode {
+        IS_FD_EYE_DETECT_DISABLE        = 0,
+        IS_FD_EYE_DETECT_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_MOUTH_DETECT_MODE    (V4L2_CID_FIMC_IS_BASE + 656)
+enum is_fd_mouth_detect_mode {
+        IS_FD_MOUTH_DETECT_DISABLE      = 0,
+        IS_FD_MOUTH_DETECT_ENABLE       = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_ORIENTATION_MODE  (V4L2_CID_FIMC_IS_BASE + 657)
+enum is_fd_orientation_mode {
+        IS_FD_ORIENTATION_DISABLE       = 0,
+        IS_FD_ORIENTATION_ENABLE        = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_ORIENTATION  (V4L2_CID_FIMC_IS_BASE + 658)
+#define V4L2_CID_IS_FD_SET_DATA_ADDRESS (V4L2_CID_FIMC_IS_BASE + 659)
+
+#define V4L2_CID_IS_SET_ISP                     (V4L2_CID_FIMC_IS_BASE + 440)
+enum is_isp_bypass_mode {
+        IS_ISP_BYPASS_DISABLE,
+        IS_ISP_BYPASS_ENABLE,
+        IS_ISP_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_DRC                     (V4L2_CID_FIMC_IS_BASE + 441)
+enum is_drc_bypass_mode {
+        IS_DRC_BYPASS_DISABLE,
+        IS_DRC_BYPASS_ENABLE,
+        IS_DRC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_FD                      (V4L2_CID_FIMC_IS_BASE + 442)
+enum is_fd_bypass_mode {
+        IS_FD_BYPASS_DISABLE,
+        IS_FD_BYPASS_ENABLE,
+        IS_FD_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_ODC                     (V4L2_CID_FIMC_IS_BASE + 443)
+enum is_odc_bypass_mode {
+        IS_ODC_BYPASS_DISABLE,
+        IS_ODC_BYPASS_ENABLE,
+        IS_ODC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_DIS                     (V4L2_CID_FIMC_IS_BASE + 444)
+enum is_dis_bypass_mode {
+        IS_DIS_BYPASS_DISABLE,
+        IS_DIS_BYPASS_ENABLE,
+        IS_DIS_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_3DNR                    (V4L2_CID_FIMC_IS_BASE + 445)
+enum is_tdnr_bypass_mode {
+        IS_TDNR_BYPASS_DISABLE,
+        IS_TDNR_BYPASS_ENABLE,
+        IS_TDNR_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_SCALERC                 (V4L2_CID_FIMC_IS_BASE + 446)
+enum is_scalerc_bypass_mode {
+        IS_SCALERC_BYPASS_DISABLE,
+        IS_SCALERC_BYPASS_ENABLE,
+        IS_SCALERC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_SCALERP                 (V4L2_CID_FIMC_IS_BASE + 446)
+enum is_scalerp_bypass_mode {
+        IS_SCALERP_BYPASS_DISABLE,
+        IS_SCALERP_BYPASS_ENABLE,
+        IS_SCALERP_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_ROTATION_MODE               (V4L2_CID_FIMC_IS_BASE + 450)
+enum is_rotation_mode {
+        IS_ROTATION_0,
+        IS_ROTATION_90,
+        IS_ROTATION_180,
+        IS_ROTATION_270,
+        IS_ROTATION_MAX
+};
+
+#define V4L2_CID_IS_3DNR_1ST_FRAME_MODE         (V4L2_CID_FIMC_IS_BASE + 451)
+enum is_tdnr_1st_frame_mode {
+        IS_TDNR_1ST_FRAME_NOPROCESSING,
+        IS_TDNR_1ST_FRAME_2DNR,
+        IS_TDNR_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_OBJECT_POSITION_X    (V4L2_CID_FIMC_IS_BASE + 452)
+#define V4L2_CID_IS_CAMERA_OBJECT_POSITION_Y    (V4L2_CID_FIMC_IS_BASE + 453)
+#define V4L2_CID_IS_CAMERA_WINDOW_SIZE_X        (V4L2_CID_FIMC_IS_BASE + 454)
+#define V4L2_CID_IS_CAMERA_WINDOW_SIZE_Y        (V4L2_CID_FIMC_IS_BASE + 455)
+
+#define V4L2_CID_IS_CAMERA_EXIF_EXPTIME         (V4L2_CID_FIMC_IS_BASE + 456)
+#define V4L2_CID_IS_CAMERA_EXIF_FLASH           (V4L2_CID_FIMC_IS_BASE + 457)
+#define V4L2_CID_IS_CAMERA_EXIF_ISO             (V4L2_CID_FIMC_IS_BASE + 458)
+#define V4L2_CID_IS_CAMERA_EXIF_SHUTTERSPEED    (V4L2_CID_FIMC_IS_BASE + 459)
+#define V4L2_CID_IS_CAMERA_EXIF_BRIGHTNESS      (V4L2_CID_FIMC_IS_BASE + 460)
+
+#define V4L2_CID_IS_CAMERA_ISP_SEL_INPUT        (V4L2_CID_FIMC_IS_BASE + 461)
+enum is_isp_sel_input {
+        IS_ISP_INPUT_OTF,
+        IS_ISP_INPUT_DMA1,
+        IS_ISP_INPUT_DMA2,
+        IS_ISP_INPUT_DMA12,
+        IS_ISP_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_ISP_SEL_OUTPUT       (V4L2_CID_FIMC_IS_BASE + 462)
+enum is_isp_sel_output {
+        IS_ISP_OUTPUT_OTF,
+        IS_ISP_OUTPUT_DMA1,
+        IS_ISP_OUTPUT_DMA2,
+        IS_ISP_OUTPUT_DMA12,
+        IS_ISP_OUTPUT_OTF_DMA1,
+        IS_ISP_OUTPUT_OTF_DMA2,
+        IS_ISP_OUTPUT_OTF_DMA12,
+        IS_ISP_OUTPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_DRC_SEL_INPUT        (V4L2_CID_FIMC_IS_BASE + 463)
+enum is_drc_sel_input {
+        IS_DRC_INPUT_OTF,
+        IS_DRC_INPUT_DMA,
+        IS_DRC_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_FD_SEL_INPUT         (V4L2_CID_FIMC_IS_BASE + 464)
+enum is_fd_sel_input {
+        IS_FD_INPUT_OTF,
+        IS_FD_INPUT_DMA,
+        IS_FD_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_INIT_WIDTH           (V4L2_CID_FIMC_IS_BASE + 465)
+#define V4L2_CID_IS_CAMERA_INIT_HEIGHT          (V4L2_CID_FIMC_IS_BASE + 466)
+
+#define V4L2_CID_IS_CMD_ISP                     (V4L2_CID_FIMC_IS_BASE + 467)
+enum is_isp_cmd_mode {
+        IS_ISP_COMMAND_STOP,
+        IS_ISP_COMMAND_START,
+        IS_ISP_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_DRC                     (V4L2_CID_FIMC_IS_BASE + 468)
+enum is_drc_cmd_mode {
+        IS_DRC_COMMAND_STOP,
+        IS_DRC_COMMAND_START,
+        IS_DRC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_FD                      (V4L2_CID_FIMC_IS_BASE + 469)
+enum is_fd_cmd_mode {
+        IS_FD_COMMAND_STOP,
+        IS_FD_COMMAND_START,
+        IS_FD_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_ODC                     (V4L2_CID_FIMC_IS_BASE + 470)
+enum is_odc_cmd_mode {
+        IS_ODC_COMMAND_STOP,
+        IS_ODC_COMMAND_START,
+        IS_ODC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_DIS                     (V4L2_CID_FIMC_IS_BASE + 471)
+enum is_dis_cmd_mode {
+        IS_DIS_COMMAND_STOP,
+        IS_DIS_COMMAND_START,
+        IS_DIS_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_TDNR                    (V4L2_CID_FIMC_IS_BASE + 472)
+enum is_tdnr_cmd_mode {
+        IS_TDNR_COMMAND_STOP,
+        IS_TDNR_COMMAND_START,
+        IS_TDNR_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_SCALERC                 (V4L2_CID_FIMC_IS_BASE + 473)
+enum is_scalerc_cmd_mode {
+        IS_SCALERC_COMMAND_STOP,
+        IS_SCALERC_COMMAND_START,
+        IS_SCALERC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_SCALERP                 (V4L2_CID_FIMC_IS_BASE + 474)
+enum is_scalerp_cmd_mode {
+        IS_SCALERP_COMMAND_STOP,
+        IS_SCALERP_COMMAND_START,
+        IS_SCALERP_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_GET_SENSOR_OFFSET_X         (V4L2_CID_FIMC_IS_BASE + 480)
+#define V4L2_CID_IS_GET_SENSOR_OFFSET_Y         (V4L2_CID_FIMC_IS_BASE + 481)
+#define V4L2_CID_IS_GET_SENSOR_WIDTH            (V4L2_CID_FIMC_IS_BASE + 482)
+#define V4L2_CID_IS_GET_SENSOR_HEIGHT           (V4L2_CID_FIMC_IS_BASE + 483)
+
+#define V4L2_CID_IS_GET_FRAME_VALID             (V4L2_CID_FIMC_IS_BASE + 484)
+#define V4L2_CID_IS_SET_FRAME_VALID             (V4L2_CID_FIMC_IS_BASE + 485)
+#define V4L2_CID_IS_GET_FRAME_BADMARK           (V4L2_CID_FIMC_IS_BASE + 486)
+#define V4L2_CID_IS_SET_FRAME_BADMARK           (V4L2_CID_FIMC_IS_BASE + 487)
+#define V4L2_CID_IS_GET_FRAME_CAPTURED          (V4L2_CID_FIMC_IS_BASE + 488)
+#define V4L2_CID_IS_SET_FRAME_CAPTURED          (V4L2_CID_FIMC_IS_BASE + 489)
+#define V4L2_CID_IS_SET_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 490)
+#define V4L2_CID_IS_GET_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 491)
+#define V4L2_CID_IS_CLEAR_FRAME_NUMBER          (V4L2_CID_FIMC_IS_BASE + 492)
+#define V4L2_CID_IS_GET_LOSTED_FRAME_NUMBER     (V4L2_CID_FIMC_IS_BASE + 493)
+#define V4L2_CID_IS_ISP_DMA_BUFFER_NUM          (V4L2_CID_FIMC_IS_BASE + 494)
+#define V4L2_CID_IS_ISP_DMA_BUFFER_ADDRESS      (V4L2_CID_FIMC_IS_BASE + 495)
+
+#define V4L2_CID_IS_ZOOM_STATE                  (V4L2_CID_FIMC_IS_BASE + 660)
+#define V4L2_CID_IS_ZOOM_MAX_LEVEL              (V4L2_CID_FIMC_IS_BASE + 661)
+#define V4L2_CID_IS_ZOOM                        (V4L2_CID_FIMC_IS_BASE + 662)
+#define V4L2_CID_IS_FW_DEBUG_REGION_ADDR        (V4L2_CID_FIMC_IS_BASE + 663)
+
+#define V4L2_CID_IS_TUNE_SEL_ENTRY              (V4L2_CID_FIMC_IS_TUNE_BASE)
+#define V4L2_CID_IS_TUNE_SENSOR_EXPOSURE        (V4L2_CID_FIMC_IS_TUNE_BASE + 1)
+#define V4L2_CID_IS_TUNE_SENSOR_ANALOG_GAIN     (V4L2_CID_FIMC_IS_TUNE_BASE + 2)
+#define V4L2_CID_IS_TUNE_SENSOR_FRAME_RATE      (V4L2_CID_FIMC_IS_TUNE_BASE + 3)
+#define V4L2_CID_IS_TUNE_SENSOR_ACTUATOR_POS    (V4L2_CID_FIMC_IS_TUNE_BASE + 4)
+
+enum v4l2_blur {
+        BLUR_LEVEL_0 = 0,
+        BLUR_LEVEL_1,
+        BLUR_LEVEL_2,
+        BLUR_LEVEL_3,
+        BLUR_LEVEL_MAX,
+};
+
+#if 1
+#define V4L2_CID_CAMERA_SCENE_MODE              (V4L2_CID_PRIVATE_BASE+70)
+enum v4l2_scene_mode {
+        SCENE_MODE_BASE,
+        SCENE_MODE_NONE,
+        SCENE_MODE_PORTRAIT,
+        SCENE_MODE_NIGHTSHOT,
+        SCENE_MODE_BACK_LIGHT,
+        SCENE_MODE_LANDSCAPE,
+        SCENE_MODE_SPORTS,
+        SCENE_MODE_PARTY_INDOOR,
+        SCENE_MODE_BEACH_SNOW,
+        SCENE_MODE_SUNSET,
+        SCENE_MODE_DUSK_DAWN,
+        SCENE_MODE_FALL_COLOR,
+        SCENE_MODE_FIREWORKS,
+        SCENE_MODE_TEXT,
+        SCENE_MODE_CANDLE_LIGHT,
+        SCENE_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_FLASH_MODE              (V4L2_CID_PRIVATE_BASE+71)
+enum v4l2_flash_mode {
+        FLASH_MODE_BASE,
+        FLASH_MODE_OFF,
+        FLASH_MODE_AUTO,
+        FLASH_MODE_ON,
+        FLASH_MODE_TORCH,
+        FLASH_MODE_RED_EYE,
+        FLASH_MODE_FILL_IN,
+        FLASH_MODE_SLOW_SYNC,
+        FLASH_MODE_RED_EYE_FIX,
+        FLASH_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_BRIGHTNESS              (V4L2_CID_PRIVATE_BASE+72)
+enum v4l2_ev_mode {
+        EV_MINUS_4      = -4,
+        EV_MINUS_3      = -3,
+        EV_MINUS_2      = -2,
+        EV_MINUS_1      = -1,
+        EV_DEFAULT      = 0,
+        EV_PLUS_1       = 1,
+        EV_PLUS_2       = 2,
+        EV_PLUS_3       = 3,
+        EV_PLUS_4       = 4,
+        EV_MAX,
+        EV_MAX_V4L2     = EV_MAX,
+};
+
+enum v4l2_exposure {
+        EXPOSURE_MINUS_6 = -6,
+        EXPOSURE_MINUS_5 = -5,
+        EXPOSURE_MINUS_4 = -4,
+        EXPOSURE_MINUS_3 = -3,
+        EXPOSURE_MINUS_2 = -2,
+        EXPOSURE_MINUS_1 = -1,
+        EXPOSURE_DEFAULT = 0,
+        EXPOSURE_PLUS_1 = 1,
+        EXPOSURE_PLUS_2 = 2,
+        EXPOSURE_PLUS_3 = 3,
+        EXPOSURE_PLUS_4 = 4,
+        EXPOSURE_PLUS_5 = 5,
+        EXPOSURE_PLUS_6 = 6,
+        EXPOSURE_MAX,
+};
+
+#define V4L2_CID_CAMERA_WHITE_BALANCE   (V4L2_CID_PRIVATE_BASE+73)
+enum v4l2_wb_mode {
+        WHITE_BALANCE_BASE = 0,
+        WHITE_BALANCE_AUTO,
+        WHITE_BALANCE_SUNNY,
+        WHITE_BALANCE_CLOUDY,
+        WHITE_BALANCE_TUNGSTEN,
+        WHITE_BALANCE_FLUORESCENT,
+        WHITE_BALANCE_FLUORESCENT_H,
+        WHITE_BALANCE_FLUORESCENT_L,
+        WHITE_BALANCE_CUSTOM,
+        WHITE_BALANCE_K,
+        WHITE_BALANCE_MAX,
+};
+
+#define V4L2_CID_CAMERA_EFFECT                  (V4L2_CID_PRIVATE_BASE+74)
+enum v4l2_effect_mode {
+        IMAGE_EFFECT_BASE = 0,
+        IMAGE_EFFECT_NONE,
+        IMAGE_EFFECT_BNW,
+        IMAGE_EFFECT_SEPIA,
+        IMAGE_EFFECT_AQUA,
+        IMAGE_EFFECT_ANTIQUE,
+        IMAGE_EFFECT_NEGATIVE,
+        IMAGE_EFFECT_SHARPEN,
+        IMAGE_EFFECT_SKETCH,
+        IMAGE_EFFECT_WASHED,
+        IMAGE_EFFECT_VINTAGE_WARM,
+        IMAGE_EFFECT_VINTAGE_COLD,
+        IMAGE_EFFECT_SOLARIZE,
+        IMAGE_EFFECT_POSTERIZE,
+        IMAGE_EFFECT_POINT_BLUE,
+        IMAGE_EFFECT_POINT_RED_YELLOW,
+        IMAGE_EFFECT_POINT_COLOR_3,
+        IMAGE_EFFECT_POINT_GREEN,
+        IMAGE_EFFECT_MAX,
+};
+
+#define V4L2_CID_CAMERA_ISO             (V4L2_CID_PRIVATE_BASE+75)
+enum v4l2_iso_mode {
+        ISO_AUTO = 0,
+        ISO_50,
+        ISO_100,
+        ISO_200,
+        ISO_400,
+        ISO_800,
+        ISO_1600,
+        ISO_SPORTS,
+        ISO_NIGHT,
+        ISO_MOVIE,
+        ISO_MAX,
+};
+
+#define V4L2_CID_CAMERA_METERING        (V4L2_CID_PRIVATE_BASE+76)
+enum v4l2_metering_mode {
+        METERING_BASE = 0,
+        METERING_MATRIX,
+        METERING_CENTER,
+        METERING_SPOT,
+        METERING_MAX,
+};
+
+#define V4L2_CID_CAMERA_CONTRAST        (V4L2_CID_PRIVATE_BASE+77)
+enum v4l2_contrast_mode {
+        CONTRAST_MINUS_4 = 0,
+        CONTRAST_MINUS_3,
+        CONTRAST_MINUS_2,
+        CONTRAST_MINUS_1,
+        CONTRAST_DEFAULT,
+        CONTRAST_PLUS_1,
+        CONTRAST_PLUS_2,
+        CONTRAST_PLUS_3,
+        CONTRAST_PLUS_4,
+        CONTRAST_MAX,
+};
+
+#define V4L2_CID_CAMERA_SATURATION              (V4L2_CID_PRIVATE_BASE+78)
+enum v4l2_saturation_mode {
+        SATURATION_MINUS_2 = 0,
+        SATURATION_MINUS_1,
+        SATURATION_DEFAULT,
+        SATURATION_PLUS_1,
+        SATURATION_PLUS_2,
+        SATURATION_MAX,
+};
+
+#define V4L2_CID_CAMERA_SHARPNESS               (V4L2_CID_PRIVATE_BASE+79)
+enum v4l2_sharpness_mode {
+        SHARPNESS_MINUS_2 = 0,
+        SHARPNESS_MINUS_1,
+        SHARPNESS_DEFAULT,
+        SHARPNESS_PLUS_1,
+        SHARPNESS_PLUS_2,
+        SHARPNESS_PLUS_3,
+        SHARPNESS_MAX,
+};
+
+#define V4L2_CID_CAMERA_WDR             (V4L2_CID_PRIVATE_BASE+80)
+enum v4l2_wdr_mode {
+        WDR_OFF,
+        WDR_ON,
+        WDR_MAX,
+};
+
+#define V4L2_CID_CAMERA_ANTI_SHAKE              (V4L2_CID_PRIVATE_BASE+81)
+enum v4l2_anti_shake_mode {
+        ANTI_SHAKE_OFF,
+        ANTI_SHAKE_STILL_ON,
+        ANTI_SHAKE_MOVIE_ON,
+        ANTI_SHAKE_MAX,
+};
+
+#define V4L2_CID_CAMERA_TOUCH_AF_START_STOP (V4L2_CID_PRIVATE_BASE+82)
+enum v4l2_touch_af {
+        TOUCH_AF_STOP = 0,
+        TOUCH_AF_START,
+        TOUCH_AF_MAX,
+};
+
+#define V4L2_CID_CAMERA_SMART_AUTO              (V4L2_CID_PRIVATE_BASE+83)
+enum v4l2_smart_auto {
+        SMART_AUTO_OFF = 0,
+        SMART_AUTO_ON,
+        SMART_AUTO_MAX,
+};
+
+#define V4L2_CID_CAMERA_VINTAGE_MODE            (V4L2_CID_PRIVATE_BASE+84)
+enum v4l2_vintage_mode {
+        VINTAGE_MODE_BASE,
+        VINTAGE_MODE_OFF,
+        VINTAGE_MODE_NORMAL,
+        VINTAGE_MODE_WARM,
+        VINTAGE_MODE_COOL,
+        VINTAGE_MODE_BNW,
+        VINTAGE_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_JPEG_QUALITY            (V4L2_CID_PRIVATE_BASE+85)
+/* (V4L2_CID_PRIVATE_BASE+86) */
+#define V4L2_CID_CAMERA_GPS_LATITUDE    (V4L2_CID_CAMERA_CLASS_BASE+30)
+/* (V4L2_CID_PRIVATE_BASE+87) */
+#define V4L2_CID_CAMERA_GPS_LONGITUDE   (V4L2_CID_CAMERA_CLASS_BASE + 31)
+/* (V4L2_CID_PRIVATE_BASE+88) */
+#define V4L2_CID_CAMERA_GPS_TIMESTAMP   (V4L2_CID_CAMERA_CLASS_BASE + 32)
+/* (V4L2_CID_PRIVATE_BASE+89)*/
+#define V4L2_CID_CAMERA_GPS_ALTITUDE    (V4L2_CID_CAMERA_CLASS_BASE + 33)
+#define V4L2_CID_CAMERA_EXIF_TIME_INFO  (V4L2_CID_CAMERA_CLASS_BASE + 34)
+#define V4L2_CID_CAMERA_GPS_PROCESSINGMETHOD    (V4L2_CID_CAMERA_CLASS_BASE+35)
+
+#define V4L2_CID_FOCUS_AUTO_MODE                                (V4L2_CID_CAMERA_CLASS_BASE+36)
+enum v4l2_focus_mode_type {
+        V4L2_FOCUS_AUTO_NORMAL = 0,
+        V4L2_FOCUS_AUTO_MACRO,
+        V4L2_FOCUS_AUTO_CONTINUOUS,
+        V4L2_FOCUS_AUTO_FACE_DETECTION,
+        V4L2_FOCUS_AUTO_RECTANGLE,
+        V4L2_FOCUS_AUTO_MAX,
+};
+#define V4L2_CID_FOCUS_AUTO_RECTANGLE_LEFT              (V4L2_CID_CAMERA_CLASS_BASE+37)
+#define V4L2_CID_FOCUS_AUTO_RECTANGLE_TOP               (V4L2_CID_CAMERA_CLASS_BASE+38)
+#define V4L2_CID_FOCUS_AUTO_RECTANGLE_WIDTH             (V4L2_CID_CAMERA_CLASS_BASE+39)
+#define V4L2_CID_FOCUS_AUTO_RECTANGLE_HEIGHT            (V4L2_CID_CAMERA_CLASS_BASE+40)
+
+#define V4L2_CID_CAMERA_ZOOM    (V4L2_CID_PRIVATE_BASE+90)
+enum v4l2_zoom_level {
+        ZOOM_LEVEL_0 = 0,
+        ZOOM_LEVEL_1,
+        ZOOM_LEVEL_2,
+        ZOOM_LEVEL_3,
+        ZOOM_LEVEL_4,
+        ZOOM_LEVEL_5,
+        ZOOM_LEVEL_6,
+        ZOOM_LEVEL_7,
+        ZOOM_LEVEL_8,
+        ZOOM_LEVEL_9,
+        ZOOM_LEVEL_10,
+        ZOOM_LEVEL_11,
+        ZOOM_LEVEL_12,
+        ZOOM_LEVEL_MAX = 31,
+};
+
+#define V4L2_CID_CAMERA_FACE_DETECTION          (V4L2_CID_PRIVATE_BASE+91)
+enum v4l2_face_detection {
+        FACE_DETECTION_OFF = 0,
+        FACE_DETECTION_ON,
+        FACE_DETECTION_NOLINE,
+        FACE_DETECTION_ON_BEAUTY,
+        FACE_DETECTION_NORMAL,
+        FACE_DETECTION_SMILE_SHOT,
+        FACE_DETECTION_BLINK,
+        FACE_DETECTION_MAX,
+};
+
+#define V4L2_CID_CAMERA_SMART_AUTO_STATUS       (V4L2_CID_PRIVATE_BASE+92)
+enum v4l2_smart_auto_status {
+        SMART_AUTO_STATUS_AUTO = 0,
+        SMART_AUTO_STATUS_LANDSCAPE,
+        SMART_AUTO_STATUS_PORTRAIT,
+        SMART_AUTO_STATUS_MACRO,
+        SMART_AUTO_STATUS_NIGHT,
+        SMART_AUTO_STATUS_PORTRAIT_NIGHT,
+        SMART_AUTO_STATUS_BACKLIT,
+        SMART_AUTO_STATUS_PORTRAIT_BACKLIT,
+        SMART_AUTO_STATUS_ANTISHAKE,
+        SMART_AUTO_STATUS_PORTRAIT_ANTISHAKE,
+        SMART_AUTO_STATUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_SET_AUTO_FOCUS          (V4L2_CID_PRIVATE_BASE+93)
+enum v4l2_auto_focus {
+        AUTO_FOCUS_OFF = 0,
+        AUTO_FOCUS_ON,
+        AUTO_FOCUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_BEAUTY_SHOT             (V4L2_CID_PRIVATE_BASE+94)
+enum v4l2_beauty_shot {
+        BEAUTY_SHOT_OFF = 0,
+        BEAUTY_SHOT_ON,
+        BEAUTY_SHOT_MAX,
+};
+
+#define V4L2_CID_CAMERA_AEAWB_LOCK_UNLOCK       (V4L2_CID_PRIVATE_BASE+95)
+enum v4l2_ae_awb_lockunlock {
+        AE_UNLOCK_AWB_UNLOCK = 0,
+        AE_LOCK_AWB_UNLOCK,
+        AE_UNLOCK_AWB_LOCK,
+        AE_LOCK_AWB_LOCK,
+        AE_AWB_MAX
+};
+
+#define V4L2_CID_CAMERA_FACEDETECT_LOCKUNLOCK   (V4L2_CID_PRIVATE_BASE+96)
+enum v4l2_face_lock {
+        FACE_LOCK_OFF = 0,
+        FACE_LOCK_ON,
+        FIRST_FACE_TRACKING,
+        FACE_LOCK_MAX,
+};
+
+#define V4L2_CID_CAMERA_OBJECT_POSITION_X       (V4L2_CID_PRIVATE_BASE+97)
+#define V4L2_CID_CAMERA_OBJECT_POSITION_Y       (V4L2_CID_PRIVATE_BASE+98)
+#define V4L2_CID_CAMERA_FOCUS_MODE              (V4L2_CID_PRIVATE_BASE+99)
+enum v4l2_focusmode {
+        FOCUS_MODE_AUTO = 0,
+        FOCUS_MODE_MACRO,
+        FOCUS_MODE_FACEDETECT,
+        FOCUS_MODE_AUTO_DEFAULT,
+        FOCUS_MODE_MACRO_DEFAULT,
+        FOCUS_MODE_FACEDETECT_DEFAULT,
+        FOCUS_MODE_INFINITY,
+        FOCUS_MODE_FIXED,
+        FOCUS_MODE_CONTINOUS,
+        FOCUS_MODE_CONTINOUS_PICTURE,
+        FOCUS_MODE_CONTINOUS_PICTURE_MACRO,
+        FOCUS_MODE_CONTINOUS_VIDEO,
+        FOCUS_MODE_TOUCH,
+        FOCUS_MODE_MAX,
+        FOCUS_MODE_DEFAULT = (1 << 8),
+};
+
+#define V4L2_CID_CAMERA_OBJ_TRACKING_STATUS     (V4L2_CID_PRIVATE_BASE+100)
+enum v4l2_obj_tracking_status {
+        OBJECT_TRACKING_STATUS_BASE,
+        OBJECT_TRACKING_STATUS_PROGRESSING,
+        OBJECT_TRACKING_STATUS_SUCCESS,
+        OBJECT_TRACKING_STATUS_FAIL,
+        OBJECT_TRACKING_STATUS_MISSING,
+        OBJECT_TRACKING_STATUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_OBJ_TRACKING_START_STOP (V4L2_CID_PRIVATE_BASE+101)
+enum v4l2_ot_start_stop {
+        OT_STOP = 0,
+        OT_START,
+        OT_MAX,
+};
+
+#define V4L2_CID_CAMERA_CAF_START_STOP  (V4L2_CID_PRIVATE_BASE+102)
+enum v4l2_caf_start_stop {
+        CAF_STOP = 0,
+        CAF_START,
+        CAF_MAX,
+};
+
+#define V4L2_CID_CAMERA_AUTO_FOCUS_RESULT       (V4L2_CID_PRIVATE_BASE+103)
+enum v4l2_af_status {
+        CAMERA_AF_STATUS_IN_PROGRESS = 0,
+        CAMERA_AF_STATUS_SUCCESS,
+        CAMERA_AF_STATUS_FAIL,
+        CAMERA_AF_STATUS_1ST_SUCCESS,
+        CAMERA_AF_STATUS_RESTART,
+        CAMERA_AF_STATUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_FRAME_RATE              (V4L2_CID_PRIVATE_BASE+104)
+enum v4l2_frame_rate {
+        FRAME_RATE_AUTO = 0,
+        FRAME_RATE_7 = 7,
+        FRAME_RATE_15 = 15,
+        FRAME_RATE_20 = 20,
+        FRAME_RATE_25 = 25,
+        FRAME_RATE_30 = 30,
+        FRAME_RATE_60 = 60,
+        FRAME_RATE_120 = 120,
+        FRAME_RATE_MAX
+};
+
+#define V4L2_CID_CAMERA_ANTI_BANDING            (V4L2_CID_PRIVATE_BASE+105)
+enum v4l2_anti_banding {
+        ANTI_BANDING_AUTO = 0,
+        ANTI_BANDING_50HZ = 1,
+        ANTI_BANDING_60HZ = 2,
+        ANTI_BANDING_OFF = 3,
+};
+
+#define V4L2_CID_CAMERA_SET_GAMMA       (V4L2_CID_PRIVATE_BASE+106)
+enum v4l2_gamma_mode {
+        GAMMA_OFF = 0,
+        GAMMA_ON = 1,
+        GAMMA_MAX,
+};
+
+#define V4L2_CID_CAMERA_SET_SLOW_AE     (V4L2_CID_PRIVATE_BASE+107)
+enum v4l2_slow_ae_mode {
+        SLOW_AE_OFF,
+        SLOW_AE_ON,
+        SLOW_AE_MAX,
+};
+
+#define V4L2_CID_CAMERA_BATCH_REFLECTION        (V4L2_CID_PRIVATE_BASE+108)
+#define V4L2_CID_CAMERA_EXIF_ORIENTATION        (V4L2_CID_PRIVATE_BASE+109)
+#define V4L2_CID_CAMERA_GET_LUX                 (V4L2_CID_PRIVATE_BASE+110)
+
+/* s1_camera [ Defense process by ESD input ] */
+#define V4L2_CID_CAMERA_RESET                   (V4L2_CID_PRIVATE_BASE+111)
+#define V4L2_CID_CAMERA_CHECK_DATALINE          (V4L2_CID_PRIVATE_BASE+112)
+#define V4L2_CID_CAMERA_CHECK_DATALINE_STOP     (V4L2_CID_PRIVATE_BASE+113)
+
+#endif
+
+/* Modify NTTS1 */
+#if defined(CONFIG_ARIES_NTT)
+#define V4L2_CID_CAMERA_AE_AWB_DISABLE_LOCK     (V4L2_CID_PRIVATE_BASE+114)
+#endif
+#define V4L2_CID_CAMERA_THUMBNAIL_NULL          (V4L2_CID_PRIVATE_BASE+115)
+#define V4L2_CID_CAMERA_SENSOR_MODE             (V4L2_CID_PRIVATE_BASE+116)
+enum v4l2_sensor_mode {
+        SENSOR_CAMERA,
+        SENSOR_MOVIE,
+};
+
+enum stream_mode_t {
+        STREAM_MODE_CAM_OFF,
+        STREAM_MODE_CAM_ON,
+        STREAM_MODE_MOVIE_OFF,
+        STREAM_MODE_MOVIE_ON,
+        STREAM_MODE_WAIT_OFF
+};
+
+#define V4L2_CID_CAMERA_EXIF_EXPTIME            (V4L2_CID_PRIVATE_BASE+117)
+#define V4L2_CID_CAMERA_EXIF_FLASH      (V4L2_CID_PRIVATE_BASE+118)
+#define V4L2_CID_CAMERA_EXIF_ISO                (V4L2_CID_PRIVATE_BASE+119)
+#define V4L2_CID_CAMERA_EXIF_TV         (V4L2_CID_PRIVATE_BASE+120)
+#define V4L2_CID_CAMERA_EXIF_BV         (V4L2_CID_PRIVATE_BASE+121)
+#define V4L2_CID_CAMERA_EXIF_EBV                (V4L2_CID_PRIVATE_BASE+122)
+#define V4L2_CID_CAMERA_CHECK_ESD               (V4L2_CID_PRIVATE_BASE+123)
+#define V4L2_CID_CAMERA_APP_CHECK               (V4L2_CID_PRIVATE_BASE+124)
+#define V4L2_CID_CAMERA_CHECK_SENSOR_STATUS     (V4L2_CID_PRIVATE_BASE+150)
+#define V4L2_CID_CAMERA_DEFAULT_FOCUS_POSITION  (V4L2_CID_PRIVATE_BASE+151)
+#define V4L2_CID_CAMERA_BUSFREQ_LOCK            (V4L2_CID_PRIVATE_BASE+125)
+#define V4L2_CID_CAMERA_BUSFREQ_UNLOCK          (V4L2_CID_PRIVATE_BASE+126)
+
+/* If you would like to control AE and AWB lock with signle command,
+ * use V4L2_CID_CAMERA_AEAWB_LOCK_UNLOCK above.
+ */
+#define V4L2_CID_CAMERA_AE_LOCK_UNLOCK  (V4L2_CID_PRIVATE_BASE + 127)
+enum v4l2_ae_lockunlock {
+        AE_UNLOCK = 0,
+        AE_LOCK,
+        AE_LOCK_MAX
+};
+
+#define V4L2_CID_CAMERA_AWB_LOCK_UNLOCK (V4L2_CID_PRIVATE_BASE + 128)
+enum v4l2_awb_lockunlock {
+        AWB_UNLOCK = 0,
+        AWB_LOCK,
+        AWB_LOCK_MAX
+};
+
+#define V4L2_CID_CAMERA_SENSOR_OUTPUT_SIZE  (V4L2_CID_PRIVATE_BASE + 129)
+#define V4L2_CID_EMBEDDEDDATA_ENABLE    (V4L2_CID_PRIVATE_BASE + 130)
+#define V4L2_CID_CAMERA_JPEG_RESOLUTION  (V4L2_CID_PRIVATE_BASE + 131)
+#define V4L2_CID_CAMERA_FACE_ZOOM  (V4L2_CID_PRIVATE_BASE + 132)
+enum v4l2_face_zoom {
+        FACE_ZOOM_STOP = 0,
+        FACE_ZOOM_START
+};
+
+/* control for post processing block in ISP */
+#define V4L2_CID_CAMERA_SET_ODC                         (V4L2_CID_PRIVATE_BASE+127)
+enum set_odc_mode {
+        CAMERA_ODC_ON,
+        CAMERA_ODC_OFF
+};
+
+#define V4L2_CID_CAMERA_SET_DIS                         (V4L2_CID_PRIVATE_BASE+128)
+enum set_dis_mode {
+        CAMERA_DIS_ON,
+        CAMERA_DIS_OFF
+};
+
+#define V4L2_CID_CAMERA_SET_3DNR                                (V4L2_CID_PRIVATE_BASE+129)
+enum set_3dnr_mode {
+        CAMERA_3DNR_ON,
+        CAMERA_3DNR_OFF
+};
+
+#define V4L2_CID_CAMERA_BRACKET     (V4L2_CID_PRIVATE_BASE+134)
+enum v4l2_face_bracket_mode {
+        BRACKET_MODE_OFF = 0,
+        BRACKET_MODE_AEB,
+        BRACKET_MODE_WBB,
+        BRACKET_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_BRACKET_AEB     (V4L2_CID_PRIVATE_BASE+135)
+enum v4l2_face_bracket_aeb_value {
+        BRACKET_AEB_VALUE1 = 1,
+        BRACKET_AEB_VALUE2,
+        BRACKET_AEB_VALUE3,
+        BRACKET_AEB_VALUE4,
+        BRACKET_AEB_VALUE5,
+        BRACKET_AEB_VALUE6,
+};
+
+#define V4L2_CID_CAMERA_BRACKET_WBB     (V4L2_CID_PRIVATE_BASE+136)
+enum v4l2_face_bracket_wbb_value {
+        BRACKET_WBB_VALUE1 = 1,
+        BRACKET_WBB_VALUE2,
+        BRACKET_WBB_VALUE3,
+        BRACKET_WBB_VALUE4,
+        BRACKET_WBB_VALUE5,
+        BRACKET_WBB_VALUE6,
+};
+
+#define V4L2_CID_CAMERA_DRIVE_DIAL    (V4L2_CID_PRIVATE_BASE+137)
+enum v4l2_drive_dial {
+        DRIVEDIAL_SINGLE = 1,
+        DRIVEDIAL_BKT = 2,
+        DRIVEDIAL_CONTI_3 = 3,
+        DRIVEDIAL_CONTI_5 = 5,
+        DRIVEDIAL_CONTI_10 = 10,
+};
+
+enum v4l2_running_cap_mode {
+        RUNNING_MODE_SINGLE = 0,
+        RUNNING_MODE_CONTINUOUS,
+        RUNNING_MODE_BRACKET,
+        RUNNING_MODE_HDR,
+        RUNNING_MODE_BLINK,
+        RUNNING_MODE_MAX
+};
+
+#define V4L2_CID_CAMERA_FD_EYE_BLINK_RESULT    (V4L2_CID_PRIVATE_BASE+138)
+
+#define V4L2_CID_CAMERA_OPTICAL_ZOOM_STEP      (V4L2_CID_PRIVATE_BASE + 139)
+#define V4L2_CID_CAMERA_OPTICAL_ZOOM_CTRL      (V4L2_CID_PRIVATE_BASE + 140)
+
+enum v4l2_optical_zoom_ctrl {
+        V4L2_OPTICAL_ZOOM_TELE,
+        V4L2_OPTICAL_ZOOM_WIDE,
+        V4L2_OPTICAL_ZOOM_STOP,
+};
+
+#define V4L2_CID_CAMERA_LDC    (V4L2_CID_PRIVATE_BASE+142)
+enum set_LDC_mode {
+        LDC_SET_OFF = 0,
+        LDC_SET_ON = 1,
+};
+
+#define V4L2_CID_CAMERA_LSC    (V4L2_CID_PRIVATE_BASE+143)
+enum set_LSC_mode {
+        LSC_SET_OFF = 0,
+        LSC_SET_ON = 1,
+};
+
+/*      Pixel format FOURCC depth  Description  */
+enum v4l2_pix_format_mode {
+        V4L2_PIX_FMT_MODE_PREVIEW,
+        V4L2_PIX_FMT_MODE_CAPTURE,
+        V4L2_PIX_FMT_MODE_HDR,
+        V4L2_PIX_FMT_MODE_VT_MIRROR,
+        V4L2_PIX_FMT_MODE_VT_NONMIRROR,
+};
+
+/* 12  Y/CbCr 4:2:0 64x32 macroblocks */
+#define V4L2_PIX_FMT_NV12T    v4l2_fourcc('T', 'V', '1', '2')
+#define V4L2_PIX_FMT_NV21T    v4l2_fourcc('T', 'V', '2', '1')
+#define V4L2_PIX_FMT_INTERLEAVED    v4l2_fourcc('I', 'T', 'L', 'V')
+
+/*
+ *  * V4L2 extention for digital camera
+ *   */
+/* Strobe flash light */
+enum v4l2_strobe_control {
+        /* turn off the flash light */
+        V4L2_STROBE_CONTROL_OFF         = 0,
+        /* turn on the flash light */
+        V4L2_STROBE_CONTROL_ON          = 1,
+        /* act guide light before splash */
+        V4L2_STROBE_CONTROL_AFGUIDE     = 2,
+        /* charge the flash light */
+        V4L2_STROBE_CONTROL_CHARGE      = 3,
+};
+
+enum v4l2_strobe_conf {
+        V4L2_STROBE_OFF                 = 0,    /* Always off */
+        V4L2_STROBE_ON                  = 1,    /* Always splashes */
+        /* Auto control presets */
+        V4L2_STROBE_AUTO                = 2,
+        V4L2_STROBE_REDEYE_REDUCTION    = 3,
+        V4L2_STROBE_SLOW_SYNC           = 4,
+        V4L2_STROBE_FRONT_CURTAIN       = 5,
+        V4L2_STROBE_REAR_CURTAIN        = 6,
+        /* Extra manual control presets */
+        /* keep turned on until turning off */
+        V4L2_STROBE_PERMANENT           = 7,
+        V4L2_STROBE_EXTERNAL            = 8,
+};
+
+enum v4l2_strobe_status {
+        V4L2_STROBE_STATUS_OFF          = 0,
+        /* while processing configurations */
+        V4L2_STROBE_STATUS_BUSY         = 1,
+        V4L2_STROBE_STATUS_ERR          = 2,
+        V4L2_STROBE_STATUS_CHARGING     = 3,
+        V4L2_STROBE_STATUS_CHARGED      = 4,
+};
+
+/* capabilities field */
+/* No strobe supported */
+#define V4L2_STROBE_CAP_NONE            0x0000
+/* Always flash off mode */
+#define V4L2_STROBE_CAP_OFF             0x0001
+/* Always use flash light mode */
+#define V4L2_STROBE_CAP_ON              0x0002
+/* Flashlight works automatic */
+#define V4L2_STROBE_CAP_AUTO            0x0004
+/* Red-eye reduction */
+#define V4L2_STROBE_CAP_REDEYE          0x0008
+/* Slow sync */
+#define V4L2_STROBE_CAP_SLOWSYNC        0x0010
+/* Front curtain */
+#define V4L2_STROBE_CAP_FRONT_CURTAIN   0x0020
+/* Rear curtain */
+#define V4L2_STROBE_CAP_REAR_CURTAIN    0x0040
+/* keep turned on until turning off */
+#define V4L2_STROBE_CAP_PERMANENT       0x0080
+/* use external strobe */
+#define V4L2_STROBE_CAP_EXTERNAL        0x0100
+
+/* Set mode and Get status */
+struct v4l2_strobe {
+        /* off/on/charge:0/1/2 */
+        enum    v4l2_strobe_control control;
+        /* supported strobe capabilities */
+        __u32   capabilities;
+        enum    v4l2_strobe_conf mode;
+        enum    v4l2_strobe_status status;      /* read only */
+/* default is 0 and range of value varies from each models */
+        __u32   flash_ev;
+        __u32   reserved[4];
+};
+
+#define VIDIOC_S_STROBE     _IOWR('V', 83, struct v4l2_strobe)
+#define VIDIOC_G_STROBE     _IOR('V', 84, struct v4l2_strobe)
+
+/* Object recognition and collateral actions */
+enum v4l2_recog_mode {
+        V4L2_RECOGNITION_MODE_OFF       = 0,
+        V4L2_RECOGNITION_MODE_ON        = 1,
+        V4L2_RECOGNITION_MODE_LOCK      = 2,
+};
+
+enum v4l2_recog_action {
+        V4L2_RECOGNITION_ACTION_NONE    = 0,    /* only recognition */
+        V4L2_RECOGNITION_ACTION_BLINK   = 1,    /* Capture on blinking */
+        V4L2_RECOGNITION_ACTION_SMILE   = 2,    /* Capture on smiling */
+};
+
+enum v4l2_recog_pattern {
+        V4L2_RECOG_PATTERN_FACE         = 0, /* Face */
+        V4L2_RECOG_PATTERN_HUMAN        = 1, /* Human */
+        V4L2_RECOG_PATTERN_CHAR         = 2, /* Character */
+};
+
+struct v4l2_recog_rect {
+        enum    v4l2_recog_pattern  p;  /* detected pattern */
+        struct  v4l2_rect  o;   /* detected area */
+        __u32   reserved[4];
+};
+
+struct v4l2_recog_data {
+        __u8    detect_cnt;             /* detected object counter */
+        struct  v4l2_rect       o;      /* detected area */
+        __u32   reserved[4];
+};
+
+struct v4l2_recognition {
+        enum v4l2_recog_mode    mode;
+
+        /* Which pattern to detect */
+        enum v4l2_recog_pattern  pattern;
+
+        /* How many object to detect */
+        __u8    obj_num;
+
+        /* select detected object */
+        __u32   detect_idx;
+
+        /* read only :Get object coordination */
+        struct v4l2_recog_data  data;
+
+        enum v4l2_recog_action  action;
+        __u32   reserved[4];
+};
+
+#define VIDIOC_S_RECOGNITION    _IOWR('V', 85, struct v4l2_recognition)
+#define VIDIOC_G_RECOGNITION    _IOR('V', 86, struct v4l2_recognition)
+
+#endif /* __LINUX_VIDEODEV2_SAMSUNG_H */
diff --git a/include/linux/videodev2_samsung.h b/include/linux/videodev2_samsung.h
new file mode 100644
index 00000000000..23cd0aa14b4
--- /dev/null
+++ b/include/linux/videodev2_samsung.h
@@ -0,0 +1,1176 @@
+/*
+ * Video for Linux Two header file for samsung
+ *
+ * Copyright (C) 2009, Dongsoo Nathaniel Kim<dongsoo45.kim@samsung.com>
+ *
+ * This header file contains several v4l2 APIs to be proposed to v4l2
+ * community and until bein accepted, will be used restrictly in Samsung's
+ * camera interface driver FIMC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_VIDEODEV2_SAMSUNG_H
+#define __LINUX_VIDEODEV2_SAMSUNG_H
+
+/* Values for 'capabilities' field */
+/* Object detection device */
+#define V4L2_CAP_OBJ_RECOGNITION        0x10000000
+/* strobe control */
+#define V4L2_CAP_STROBE                 0x20000000
+
+#define V4L2_CID_FOCUS_MODE             (V4L2_CID_CAMERA_CLASS_BASE+17)
+/* Focus Methods */
+enum v4l2_focus_mode {
+        V4L2_FOCUS_MODE_AUTO            = 0,
+        V4L2_FOCUS_MODE_MACRO           = 1,
+        V4L2_FOCUS_MODE_MANUAL          = 2,
+        V4L2_FOCUS_MODE_LASTP           = 2,
+};
+
+#define V4L2_CID_ZOOM_MODE              (V4L2_CID_CAMERA_CLASS_BASE+18)
+/* Zoom Methods */
+enum v4l2_zoom_mode {
+        V4L2_ZOOM_MODE_CONTINUOUS       = 0,
+        V4L2_ZOOM_MODE_OPTICAL          = 1,
+        V4L2_ZOOM_MODE_DIGITAL          = 2,
+        V4L2_ZOOM_MODE_LASTP            = 2,
+};
+
+/* Exposure Methods */
+#define V4L2_CID_PHOTOMETRY             (V4L2_CID_CAMERA_CLASS_BASE+19)
+enum v4l2_photometry_mode {
+        V4L2_PHOTOMETRY_MULTISEG        = 0, /*Multi Segment*/
+        V4L2_PHOTOMETRY_CWA             = 1, /*Centre Weighted Average*/
+        V4L2_PHOTOMETRY_SPOT            = 2,
+        V4L2_PHOTOMETRY_AFSPOT          = 3, /*Spot metering on focused point*/
+        V4L2_PHOTOMETRY_LASTP           = V4L2_PHOTOMETRY_AFSPOT,
+};
+
+/* Manual exposure control items menu type: iris, shutter, iso */
+#define V4L2_CID_CAM_APERTURE   (V4L2_CID_CAMERA_CLASS_BASE+20)
+#define V4L2_CID_CAM_SHUTTER    (V4L2_CID_CAMERA_CLASS_BASE+21)
+#define V4L2_CID_CAM_ISO        (V4L2_CID_CAMERA_CLASS_BASE+22)
+
+/* Following CIDs are menu type */
+#define V4L2_CID_SCENEMODE      (V4L2_CID_CAMERA_CLASS_BASE+23)
+#define V4L2_CID_CAM_STABILIZE  (V4L2_CID_CAMERA_CLASS_BASE+24)
+#define V4L2_CID_CAM_MULTISHOT  (V4L2_CID_CAMERA_CLASS_BASE+25)
+
+/* Control dynamic range */
+#define V4L2_CID_CAM_DR         (V4L2_CID_CAMERA_CLASS_BASE+26)
+
+/* White balance preset control */
+#define V4L2_CID_WHITE_BALANCE_PRESET   (V4L2_CID_CAMERA_CLASS_BASE+27)
+#define V4L2_CID_CAM_SENSOR_FW_VER              (V4L2_CID_CAMERA_CLASS_BASE + 28)
+#define V4L2_CID_CAM_PHONE_FW_VER               (V4L2_CID_CAMERA_CLASS_BASE + 29)
+
+/* CID extensions */
+#define V4L2_CID_ROTATION               (V4L2_CID_PRIVATE_BASE + 0)
+#define V4L2_CID_PADDR_Y                (V4L2_CID_PRIVATE_BASE + 1)
+#define V4L2_CID_PADDR_CB               (V4L2_CID_PRIVATE_BASE + 2)
+#define V4L2_CID_PADDR_CR               (V4L2_CID_PRIVATE_BASE + 3)
+#define V4L2_CID_PADDR_CBCR             (V4L2_CID_PRIVATE_BASE + 4)
+#define V4L2_CID_OVERLAY_AUTO           (V4L2_CID_PRIVATE_BASE + 5)
+#define V4L2_CID_OVERLAY_VADDR0         (V4L2_CID_PRIVATE_BASE + 6)
+#define V4L2_CID_OVERLAY_VADDR1         (V4L2_CID_PRIVATE_BASE + 7)
+#define V4L2_CID_OVERLAY_VADDR2         (V4L2_CID_PRIVATE_BASE + 8)
+#define V4L2_CID_OVLY_MODE              (V4L2_CID_PRIVATE_BASE + 9)
+#define V4L2_CID_DST_INFO               (V4L2_CID_PRIVATE_BASE + 10)
+/* UMP secure id control */
+#define V4L2_CID_GET_UMP_SECURE_ID      (V4L2_CID_PRIVATE_BASE + 11)
+#define V4L2_CID_GET_PHY_SRC_YADDR      (V4L2_CID_PRIVATE_BASE + 12)
+#define V4L2_CID_GET_PHY_SRC_CADDR      (V4L2_CID_PRIVATE_BASE + 13)
+#define V4L2_CID_IMAGE_EFFECT_FN        (V4L2_CID_PRIVATE_BASE + 16)
+#define V4L2_CID_IMAGE_EFFECT_APPLY     (V4L2_CID_PRIVATE_BASE + 17)
+#define V4L2_CID_IMAGE_EFFECT_CB        (V4L2_CID_PRIVATE_BASE + 18)
+#define V4L2_CID_IMAGE_EFFECT_CR        (V4L2_CID_PRIVATE_BASE + 19)
+#define V4L2_CID_RESERVED_MEM_BASE_ADDR (V4L2_CID_PRIVATE_BASE + 20)
+#define V4L2_CID_FIMC_VERSION           (V4L2_CID_PRIVATE_BASE + 21)
+
+#define V4L2_CID_STREAM_PAUSE                   (V4L2_CID_PRIVATE_BASE + 53)
+
+/* CID Extensions for camera sensor operations */
+#define V4L2_CID_CAM_PREVIEW_ONOFF              (V4L2_CID_PRIVATE_BASE + 64)
+#define V4L2_CID_CAM_CAPTURE                    (V4L2_CID_PRIVATE_BASE + 65)
+//#define V4L2_CID_CAM_JPEG_MEMSIZE             (V4L2_CID_PRIVATE_BASE + 66)
+
+#define V4L2_CID_CAM_DATE_INFO_YEAR             (V4L2_CID_PRIVATE_BASE + 14)
+#define V4L2_CID_CAM_DATE_INFO_MONTH            (V4L2_CID_PRIVATE_BASE + 15)
+#define V4L2_CID_CAM_DATE_INFO_DATE             (V4L2_CID_PRIVATE_BASE + 22)
+#define V4L2_CID_CAM_SENSOR_VER                         (V4L2_CID_PRIVATE_BASE + 23)
+#define V4L2_CID_CAM_FW_MINOR_VER               (V4L2_CID_PRIVATE_BASE + 24)
+#define V4L2_CID_CAM_FW_MAJOR_VER               (V4L2_CID_PRIVATE_BASE + 25)
+#define V4L2_CID_CAM_PRM_MINOR_VER              (V4L2_CID_PRIVATE_BASE + 26)
+#define V4L2_CID_CAM_PRM_MAJOR_VER              (V4L2_CID_PRIVATE_BASE + 27)
+#define V4L2_CID_CAM_FW_VER                     (V4L2_CID_PRIVATE_BASE + 28)
+#define V4L2_CID_CAM_SET_FW_ADDR                (V4L2_CID_PRIVATE_BASE + 29)
+#define V4L2_CID_CAM_SET_FW_SIZE                (V4L2_CID_PRIVATE_BASE + 30)
+#define V4L2_CID_CAM_UPDATE_FW  (V4L2_CID_PRIVATE_BASE + 31)
+enum v4l2_firmware_mode {
+        FW_MODE_UPDATE,
+        FW_MODE_VERSION,
+        FW_MODE_DUMP,
+};
+
+#define V4L2_CID_CAM_JPEG_MAIN_SIZE             (V4L2_CID_PRIVATE_BASE + 32)
+#define V4L2_CID_CAM_JPEG_MAIN_OFFSET           (V4L2_CID_PRIVATE_BASE + 33)
+#define V4L2_CID_CAM_JPEG_THUMB_SIZE            (V4L2_CID_PRIVATE_BASE + 34)
+#define V4L2_CID_CAM_JPEG_THUMB_OFFSET          (V4L2_CID_PRIVATE_BASE + 35)
+#define V4L2_CID_CAM_JPEG_POSTVIEW_OFFSET       (V4L2_CID_PRIVATE_BASE + 36)
+#define V4L2_CID_CAM_JPEG_QUALITY       (V4L2_CID_PRIVATE_BASE + 37)
+#define V4L2_CID_CAM_SENSOR_MAKER       (V4L2_CID_PRIVATE_BASE + 38)
+#define V4L2_CID_CAM_SENSOR_OPTICAL     (V4L2_CID_PRIVATE_BASE + 39)
+#define V4L2_CID_CAM_AF_VER_LOW         (V4L2_CID_PRIVATE_BASE + 40)
+#define V4L2_CID_CAM_AF_VER_HIGH        (V4L2_CID_PRIVATE_BASE + 41)
+#define V4L2_CID_CAM_GAMMA_RG_LOW       (V4L2_CID_PRIVATE_BASE + 42)
+#define V4L2_CID_CAM_GAMMA_RG_HIGH      (V4L2_CID_PRIVATE_BASE + 43)
+#define V4L2_CID_CAM_GAMMA_BG_LOW       (V4L2_CID_PRIVATE_BASE + 44)
+#define V4L2_CID_CAM_GAMMA_BG_HIGH      (V4L2_CID_PRIVATE_BASE + 45)
+#define V4L2_CID_CAM_DUMP_FW            (V4L2_CID_PRIVATE_BASE + 46)
+#define V4L2_CID_CAM_GET_DUMP_SIZE  (V4L2_CID_PRIVATE_BASE + 47)
+#define V4L2_CID_CAMERA_VT_MODE                 (V4L2_CID_PRIVATE_BASE + 48)
+#define V4L2_CID_CAMERA_VGA_BLUR        (V4L2_CID_PRIVATE_BASE + 49)
+#define V4L2_CID_CAMERA_CAPTURE         (V4L2_CID_PRIVATE_BASE + 50)
+#define V4L2_CID_CAMERA_HDR             (V4L2_CID_PRIVATE_BASE + 51)
+
+#define V4L2_CID_MAIN_SW_DATE_INFO_YEAR         (V4L2_CID_PRIVATE_BASE + 54)
+#define V4L2_CID_MAIN_SW_DATE_INFO_MONTH        (V4L2_CID_PRIVATE_BASE + 55)
+#define V4L2_CID_MAIN_SW_DATE_INFO_DATE         (V4L2_CID_PRIVATE_BASE + 56)
+#define V4L2_CID_MAIN_SW_FW_MINOR_VER           (V4L2_CID_PRIVATE_BASE + 57)
+#define V4L2_CID_MAIN_SW_FW_MAJOR_VER           (V4L2_CID_PRIVATE_BASE + 58)
+#define V4L2_CID_MAIN_SW_PRM_MINOR_VER          (V4L2_CID_PRIVATE_BASE + 59)
+#define V4L2_CID_MAIN_SW_PRM_MAJOR_VER          (V4L2_CID_PRIVATE_BASE + 60)
+
+#define V4L2_CID_FIMC_IS_BASE                   (V4L2_CTRL_CLASS_CAMERA | 0x1000)
+#define V4L2_CID_FIMC_IS_TUNE_BASE              (V4L2_CTRL_CLASS_CAMERA | 0x2000)
+
+#define V4L2_CID_IS_LOAD_FW                     (V4L2_CID_FIMC_IS_BASE + 10)
+#define V4L2_CID_IS_INIT_PARAM                  (V4L2_CID_FIMC_IS_BASE + 11)
+#define V4L2_CID_IS_RESET                       (V4L2_CID_FIMC_IS_BASE + 12)
+#define V4L2_CID_IS_S_POWER                     (V4L2_CID_FIMC_IS_BASE + 13)
+enum is_set_power {
+        IS_POWER_OFF,
+        IS_POWER_ON
+};
+
+#define V4L2_CID_IS_S_STREAM                    (V4L2_CID_FIMC_IS_BASE + 14)
+enum is_set_stream {
+        IS_DISABLE_STREAM,
+        IS_ENABLE_STREAM
+};
+
+#define V4L2_CID_IS_S_SCENARIO_MODE             (V4L2_CID_FIMC_IS_BASE + 15)
+#define V4L2_CID_IS_S_FORMAT_SCENARIO           (V4L2_CID_FIMC_IS_BASE + 16)
+enum scenario_mode {
+        IS_MODE_PREVIEW_STILL,
+        IS_MODE_PREVIEW_VIDEO,
+        IS_MODE_CAPTURE_STILL,
+        IS_MODE_CAPTURE_VIDEO,
+        IS_MODE_MAX
+};
+
+/* global */
+#define V4L2_CID_IS_CAMERA_SHOT_MODE_NORMAL     (V4L2_CID_FIMC_IS_BASE + 101)
+/* value : 1 : single shot , >=2 : continuous shot */
+
+#define V4L2_CID_IS_CAMERA_SENSOR_NUM           (V4L2_CID_FIMC_IS_BASE + 201)
+
+#define V4L2_CID_IS_CAMERA_FOCUS_MODE           (V4L2_CID_FIMC_IS_BASE + 401)
+enum is_focus_mode {
+        IS_FOCUS_MODE_AUTO,
+        IS_FOCUS_MODE_MACRO,
+        IS_FOCUS_MODE_INFINITY,
+        IS_FOCUS_MODE_CONTINUOUS,
+        IS_FOCUS_MODE_TOUCH,
+        IS_FOCUS_MODE_FACEDETECT,
+        IS_FOCUS_MODE_IDLE,
+        IS_FOCUS_MODE_MAX,
+};
+
+#define V4L2_CID_IS_CAMERA_FLASH_MODE           (V4L2_CID_FIMC_IS_BASE + 402)
+enum is_flash_mode {
+        IS_FLASH_MODE_OFF,
+        IS_FLASH_MODE_AUTO,
+        IS_FLASH_MODE_AUTO_REDEYE,
+        IS_FLASH_MODE_ON,
+        IS_FLASH_MODE_TORCH,
+        IS_FLASH_MODE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_AWB_MODE             (V4L2_CID_FIMC_IS_BASE + 403)
+enum is_awb_mode {
+        IS_AWB_AUTO,
+        IS_AWB_DAYLIGHT,
+        IS_AWB_CLOUDY,
+        IS_AWB_TUNGSTEN,
+        IS_AWB_FLUORESCENT,
+        IS_AWB_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_IMAGE_EFFECT         (V4L2_CID_FIMC_IS_BASE + 404)
+enum is_image_effect {
+        IS_IMAGE_EFFECT_DISABLE,
+        IS_IMAGE_EFFECT_MONOCHROME,
+        IS_IMAGE_EFFECT_NEGATIVE_MONO,
+        IS_IMAGE_EFFECT_NEGATIVE_COLOR,
+        IS_IMAGE_EFFECT_SEPIA,
+        IS_IMAGE_EFFECT_SEPIA_CB,
+        IS_IMAGE_EFFECT_SEPIA_CR,
+        IS_IMAGE_EFFECT_NEGATIVE,
+        IS_IMAGE_EFFECT_ARTFREEZE,
+        IS_IMAGE_EFFECT_EMBOSSING,
+        IS_IMAGE_EFFECT_SILHOUETTE,
+        IS_IMAGE_EFFECT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_ISO                  (V4L2_CID_FIMC_IS_BASE + 405)
+enum is_iso {
+        IS_ISO_AUTO,
+        IS_ISO_50,
+        IS_ISO_100,
+        IS_ISO_200,
+        IS_ISO_400,
+        IS_ISO_800,
+        IS_ISO_1600,
+        IS_ISO_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_CONTRAST             (V4L2_CID_FIMC_IS_BASE + 406)
+enum is_contrast {
+        IS_CONTRAST_AUTO,
+        IS_CONTRAST_MINUS_2,
+        IS_CONTRAST_MINUS_1,
+        IS_CONTRAST_DEFAULT,
+        IS_CONTRAST_PLUS_1,
+        IS_CONTRAST_PLUS_2,
+        IS_CONTRAST_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_SATURATION           (V4L2_CID_FIMC_IS_BASE + 407)
+enum is_saturation {
+        IS_SATURATION_MINUS_2,
+        IS_SATURATION_MINUS_1,
+        IS_SATURATION_DEFAULT,
+        IS_SATURATION_PLUS_1,
+        IS_SATURATION_PLUS_2,
+        IS_SATURATION_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_SHARPNESS            (V4L2_CID_FIMC_IS_BASE + 408)
+enum is_sharpness {
+        IS_SHARPNESS_MINUS_2,
+        IS_SHARPNESS_MINUS_1,
+        IS_SHARPNESS_DEFAULT,
+        IS_SHARPNESS_PLUS_1,
+        IS_SHARPNESS_PLUS_2,
+        IS_SHARPNESS_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_EXPOSURE             (V4L2_CID_FIMC_IS_BASE + 409)
+enum is_exposure {
+        IS_EXPOSURE_MINUS_4,
+        IS_EXPOSURE_MINUS_3,
+        IS_EXPOSURE_MINUS_2,
+        IS_EXPOSURE_MINUS_1,
+        IS_EXPOSURE_DEFAULT,
+        IS_EXPOSURE_PLUS_1,
+        IS_EXPOSURE_PLUS_2,
+        IS_EXPOSURE_PLUS_3,
+        IS_EXPOSURE_PLUS_4,
+        IS_EXPOSURE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_BRIGHTNESS           (V4L2_CID_FIMC_IS_BASE + 410)
+enum is_brightness {
+        IS_BRIGHTNESS_MINUS_2,
+        IS_BRIGHTNESS_MINUS_1,
+        IS_BRIGHTNESS_DEFAULT,
+        IS_BRIGHTNESS_PLUS_1,
+        IS_BRIGHTNESS_PLUS_2,
+        IS_BRIGHTNESS_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_HUE                  (V4L2_CID_FIMC_IS_BASE + 411)
+enum is_hue {
+        IS_HUE_MINUS_2,
+        IS_HUE_MINUS_1,
+        IS_HUE_DEFAULT,
+        IS_HUE_PLUS_1,
+        IS_HUE_PLUS_2,
+        IS_HUE_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_METERING             (V4L2_CID_FIMC_IS_BASE + 412)
+enum is_metering {
+        IS_METERING_AVERAGE,
+        IS_METERING_SPOT,
+        IS_METERING_MATRIX,
+        IS_METERING_CENTER,
+        IS_METERING_MAX
+};
+#define V4L2_CID_IS_CAMERA_METERING_POSITION_X  (V4L2_CID_FIMC_IS_BASE + 500)
+#define V4L2_CID_IS_CAMERA_METERING_POSITION_Y  (V4L2_CID_FIMC_IS_BASE + 501)
+#define V4L2_CID_IS_CAMERA_METERING_WINDOW_X    (V4L2_CID_FIMC_IS_BASE + 502)
+#define V4L2_CID_IS_CAMERA_METERING_WINDOW_Y    (V4L2_CID_FIMC_IS_BASE + 503)
+
+#define V4L2_CID_IS_CAMERA_AFC_MODE             (V4L2_CID_FIMC_IS_BASE + 413)
+enum is_afc_mode {
+        IS_AFC_DISABLE,
+        IS_AFC_AUTO,
+        IS_AFC_MANUAL_50HZ,
+        IS_AFC_MANUAL_60HZ,
+        IS_AFC_MAX
+};
+
+#define V4L2_CID_IS_AWB_LOCK_UNLOCK             (V4L2_CID_FIMC_IS_BASE + 496)
+enum is_awb_lock_unlock {
+        IS_AWB_LOCK,
+        IS_AWB_UNLOCK,
+        IS_AWB_LOCK_UNLOCK_MAX
+};
+
+#define V4L2_CID_IS_AE_LOCK_UNLOCK              (V4L2_CID_FIMC_IS_BASE + 497)
+enum is_ae_lock_unlock {
+        IS_AE_LOCK,
+        IS_AE_UNLOCK,
+        IS_AE_LOCK_UNLOCK_MAX
+};
+
+#define V4L2_CID_IS_FD_GET_FACE_COUNT                   (V4L2_CID_FIMC_IS_BASE + 600)
+#define V4L2_CID_IS_FD_GET_FACE_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 601)
+#define V4L2_CID_IS_FD_GET_FACE_CONFIDENCE              (V4L2_CID_FIMC_IS_BASE + 602)
+#define V4L2_CID_IS_FD_GET_FACE_SMILE_LEVEL             (V4L2_CID_FIMC_IS_BASE + 603)
+#define V4L2_CID_IS_FD_GET_FACE_BLINK_LEVEL             (V4L2_CID_FIMC_IS_BASE + 604)
+#define V4L2_CID_IS_FD_GET_FACE_TOPLEFT_X               (V4L2_CID_FIMC_IS_BASE + 605)
+#define V4L2_CID_IS_FD_GET_FACE_TOPLEFT_Y               (V4L2_CID_FIMC_IS_BASE + 606)
+#define V4L2_CID_IS_FD_GET_FACE_BOTTOMRIGHT_X           (V4L2_CID_FIMC_IS_BASE + 607)
+#define V4L2_CID_IS_FD_GET_FACE_BOTTOMRIGHT_Y           (V4L2_CID_FIMC_IS_BASE + 608)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_TOPLEFT_X           (V4L2_CID_FIMC_IS_BASE + 609)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_TOPLEFT_Y           (V4L2_CID_FIMC_IS_BASE + 610)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_BOTTOMRIGHT_X       (V4L2_CID_FIMC_IS_BASE + 611)
+#define V4L2_CID_IS_FD_GET_LEFT_EYE_BOTTOMRIGHT_Y       (V4L2_CID_FIMC_IS_BASE + 612)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_TOPLEFT_X          (V4L2_CID_FIMC_IS_BASE + 613)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_TOPLEFT_Y          (V4L2_CID_FIMC_IS_BASE + 614)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_BOTTOMRIGHT_X      (V4L2_CID_FIMC_IS_BASE + 615)
+#define V4L2_CID_IS_FD_GET_RIGHT_EYE_BOTTOMRIGHT_Y      (V4L2_CID_FIMC_IS_BASE + 616)
+#define V4L2_CID_IS_FD_GET_MOUTH_TOPLEFT_X              (V4L2_CID_FIMC_IS_BASE + 617)
+#define V4L2_CID_IS_FD_GET_MOUTH_TOPLEFT_Y              (V4L2_CID_FIMC_IS_BASE + 618)
+#define V4L2_CID_IS_FD_GET_MOUTH_BOTTOMRIGHT_X          (V4L2_CID_FIMC_IS_BASE + 619)
+#define V4L2_CID_IS_FD_GET_MOUTH_BOTTOMRIGHT_Y          (V4L2_CID_FIMC_IS_BASE + 620)
+#define V4L2_CID_IS_FD_GET_ANGLE                        (V4L2_CID_FIMC_IS_BASE + 621)
+#define V4L2_CID_IS_FD_GET_YAW_ANGLE                    (V4L2_CID_FIMC_IS_BASE + 622)
+#define V4L2_CID_IS_FD_GET_NEXT                         (V4L2_CID_FIMC_IS_BASE + 623)
+#define V4L2_CID_IS_FD_GET_DATA                         (V4L2_CID_FIMC_IS_BASE + 624)
+
+#define V4L2_CID_IS_FD_SET_MAX_FACE_NUMBER              (V4L2_CID_FIMC_IS_BASE + 650)
+#define V4L2_CID_IS_FD_SET_ROLL_ANGLE                   (V4L2_CID_FIMC_IS_BASE + 651)
+enum is_fd_roll_angle {
+        /* 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_BASIC          = 0,
+        /* 0, 30, 0, -30, 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_PRECISE_BASIC  = 1,
+        /* 0, 90, 0, -90 */
+        IS_FD_ROLL_ANGLE_SIDES          = 2,
+        /* 0, 90, 0, -90 0, 45, 0, -45 */
+        IS_FD_ROLL_ANGLE_PRECISE_SIDES  = 3,
+        /* 0, 90, 0, -90, 0, 180 */
+        IS_FD_ROLL_ANGLE_FULL           = 4,
+        /* 0, 90, 0, -90, 0, 180, 0, 135, 0, -135 */
+        IS_FD_ROLL_ANGLE_PRECISE_FULL   = 5,
+};
+
+#define V4L2_CID_IS_FD_SET_YAW_ANGLE                    (V4L2_CID_FIMC_IS_BASE + 652)
+enum is_fd_yaw_angle {
+        IS_FD_YAW_ANGLE_0       = 0,
+        IS_FD_YAW_ANGLE_45      = 1,
+        IS_FD_YAW_ANGLE_90      = 2,
+        IS_FD_YAW_ANGLE_45_90   = 3,
+};
+
+#define V4L2_CID_IS_FD_SET_SMILE_MODE                   (V4L2_CID_FIMC_IS_BASE + 653)
+enum is_fd_smile_mode {
+        IS_FD_SMILE_MODE_DISABLE        = 0,
+        IS_FD_SMILE_MODE_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_BLINK_MODE                   (V4L2_CID_FIMC_IS_BASE + 654)
+enum is_fd_blink_mode {
+        IS_FD_BLINK_MODE_DISABLE        = 0,
+        IS_FD_BLINK_MODE_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_EYE_DETECT_MODE              (V4L2_CID_FIMC_IS_BASE + 655)
+enum is_fd_eye_detect_mode {
+        IS_FD_EYE_DETECT_DISABLE        = 0,
+        IS_FD_EYE_DETECT_ENABLE         = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_MOUTH_DETECT_MODE            (V4L2_CID_FIMC_IS_BASE + 656)
+enum is_fd_mouth_detect_mode {
+        IS_FD_MOUTH_DETECT_DISABLE      = 0,
+        IS_FD_MOUTH_DETECT_ENABLE       = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_ORIENTATION_MODE             (V4L2_CID_FIMC_IS_BASE + 657)
+enum is_fd_orientation_mode {
+        IS_FD_ORIENTATION_DISABLE       = 0,
+        IS_FD_ORIENTATION_ENABLE        = 1,
+};
+
+#define V4L2_CID_IS_FD_SET_ORIENTATION                  (V4L2_CID_FIMC_IS_BASE + 658)
+#define V4L2_CID_IS_FD_SET_DATA_ADDRESS                 (V4L2_CID_FIMC_IS_BASE + 659)
+
+#define V4L2_CID_IS_SET_ISP                     (V4L2_CID_FIMC_IS_BASE + 440)
+enum is_isp_bypass_mode {
+        IS_ISP_BYPASS_DISABLE,
+        IS_ISP_BYPASS_ENABLE,
+        IS_ISP_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_DRC                     (V4L2_CID_FIMC_IS_BASE + 441)
+enum is_drc_bypass_mode {
+        IS_DRC_BYPASS_DISABLE,
+        IS_DRC_BYPASS_ENABLE,
+        IS_DRC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_FD                      (V4L2_CID_FIMC_IS_BASE + 442)
+enum is_fd_bypass_mode {
+        IS_FD_BYPASS_DISABLE,
+        IS_FD_BYPASS_ENABLE,
+        IS_FD_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_ODC                     (V4L2_CID_FIMC_IS_BASE + 443)
+enum is_odc_bypass_mode {
+        IS_ODC_BYPASS_DISABLE,
+        IS_ODC_BYPASS_ENABLE,
+        IS_ODC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_DIS                     (V4L2_CID_FIMC_IS_BASE + 444)
+enum is_dis_bypass_mode {
+        IS_DIS_BYPASS_DISABLE,
+        IS_DIS_BYPASS_ENABLE,
+        IS_DIS_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_3DNR                    (V4L2_CID_FIMC_IS_BASE + 445)
+enum is_tdnr_bypass_mode {
+        IS_TDNR_BYPASS_DISABLE,
+        IS_TDNR_BYPASS_ENABLE,
+        IS_TDNR_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_SCALERC                 (V4L2_CID_FIMC_IS_BASE + 446)
+enum is_scalerc_bypass_mode {
+        IS_SCALERC_BYPASS_DISABLE,
+        IS_SCALERC_BYPASS_ENABLE,
+        IS_SCALERC_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_SET_SCALERP                 (V4L2_CID_FIMC_IS_BASE + 446)
+enum is_scalerp_bypass_mode {
+        IS_SCALERP_BYPASS_DISABLE,
+        IS_SCALERP_BYPASS_ENABLE,
+        IS_SCALERP_BYPASS_MAX
+};
+
+#define V4L2_CID_IS_ROTATION_MODE               (V4L2_CID_FIMC_IS_BASE + 450)
+enum is_rotation_mode {
+        IS_ROTATION_0,
+        IS_ROTATION_90,
+        IS_ROTATION_180,
+        IS_ROTATION_270,
+        IS_ROTATION_MAX
+};
+
+#define V4L2_CID_IS_3DNR_1ST_FRAME_MODE         (V4L2_CID_FIMC_IS_BASE + 451)
+enum is_tdnr_1st_frame_mode {
+        IS_TDNR_1ST_FRAME_NOPROCESSING,
+        IS_TDNR_1ST_FRAME_2DNR,
+        IS_TDNR_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_OBJECT_POSITION_X    (V4L2_CID_FIMC_IS_BASE + 452)
+#define V4L2_CID_IS_CAMERA_OBJECT_POSITION_Y    (V4L2_CID_FIMC_IS_BASE + 453)
+#define V4L2_CID_IS_CAMERA_WINDOW_SIZE_X        (V4L2_CID_FIMC_IS_BASE + 454)
+#define V4L2_CID_IS_CAMERA_WINDOW_SIZE_Y        (V4L2_CID_FIMC_IS_BASE + 455)
+
+#define V4L2_CID_IS_CAMERA_EXIF_EXPTIME         (V4L2_CID_FIMC_IS_BASE + 456)
+#define V4L2_CID_IS_CAMERA_EXIF_FLASH           (V4L2_CID_FIMC_IS_BASE + 457)
+#define V4L2_CID_IS_CAMERA_EXIF_ISO             (V4L2_CID_FIMC_IS_BASE + 458)
+#define V4L2_CID_IS_CAMERA_EXIF_SHUTTERSPEED    (V4L2_CID_FIMC_IS_BASE + 459)
+#define V4L2_CID_IS_CAMERA_EXIF_BRIGHTNESS      (V4L2_CID_FIMC_IS_BASE + 460)
+
+#define V4L2_CID_IS_CAMERA_ISP_SEL_INPUT        (V4L2_CID_FIMC_IS_BASE + 461)
+enum is_isp_sel_input {
+        IS_ISP_INPUT_OTF,
+        IS_ISP_INPUT_DMA1,
+        IS_ISP_INPUT_DMA2,
+        IS_ISP_INPUT_DMA12,
+        IS_ISP_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_ISP_SEL_OUTPUT       (V4L2_CID_FIMC_IS_BASE + 462)
+enum is_isp_sel_output {
+        IS_ISP_OUTPUT_OTF,
+        IS_ISP_OUTPUT_DMA1,
+        IS_ISP_OUTPUT_DMA2,
+        IS_ISP_OUTPUT_DMA12,
+        IS_ISP_OUTPUT_OTF_DMA1,
+        IS_ISP_OUTPUT_OTF_DMA2,
+        IS_ISP_OUTPUT_OTF_DMA12,
+        IS_ISP_OUTPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_DRC_SEL_INPUT        (V4L2_CID_FIMC_IS_BASE + 463)
+enum is_drc_sel_input {
+        IS_DRC_INPUT_OTF,
+        IS_DRC_INPUT_DMA,
+        IS_DRC_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_FD_SEL_INPUT         (V4L2_CID_FIMC_IS_BASE + 464)
+enum is_fd_sel_input {
+        IS_FD_INPUT_OTF,
+        IS_FD_INPUT_DMA,
+        IS_FD_INPUT_MAX
+};
+
+#define V4L2_CID_IS_CAMERA_INIT_WIDTH           (V4L2_CID_FIMC_IS_BASE + 465)
+#define V4L2_CID_IS_CAMERA_INIT_HEIGHT          (V4L2_CID_FIMC_IS_BASE + 466)
+
+#define V4L2_CID_IS_CMD_ISP                     (V4L2_CID_FIMC_IS_BASE + 467)
+enum is_isp_cmd_mode {
+        IS_ISP_COMMAND_STOP,
+        IS_ISP_COMMAND_START,
+        IS_ISP_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_DRC                     (V4L2_CID_FIMC_IS_BASE + 468)
+enum is_drc_cmd_mode {
+        IS_DRC_COMMAND_STOP,
+        IS_DRC_COMMAND_START,
+        IS_DRC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_FD                      (V4L2_CID_FIMC_IS_BASE + 469)
+enum is_fd_cmd_mode {
+        IS_FD_COMMAND_STOP,
+        IS_FD_COMMAND_START,
+        IS_FD_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_ODC                     (V4L2_CID_FIMC_IS_BASE + 470)
+enum is_odc_cmd_mode {
+        IS_ODC_COMMAND_STOP,
+        IS_ODC_COMMAND_START,
+        IS_ODC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_DIS                     (V4L2_CID_FIMC_IS_BASE + 471)
+enum is_dis_cmd_mode {
+        IS_DIS_COMMAND_STOP,
+        IS_DIS_COMMAND_START,
+        IS_DIS_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_TDNR                    (V4L2_CID_FIMC_IS_BASE + 472)
+enum is_tdnr_cmd_mode {
+        IS_TDNR_COMMAND_STOP,
+        IS_TDNR_COMMAND_START,
+        IS_TDNR_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_SCALERC                 (V4L2_CID_FIMC_IS_BASE + 473)
+enum is_scalerc_cmd_mode {
+        IS_SCALERC_COMMAND_STOP,
+        IS_SCALERC_COMMAND_START,
+        IS_SCALERC_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_CMD_SCALERP                 (V4L2_CID_FIMC_IS_BASE + 474)
+enum is_scalerp_cmd_mode {
+        IS_SCALERP_COMMAND_STOP,
+        IS_SCALERP_COMMAND_START,
+        IS_SCALERP_COMMAND_MAX
+};
+
+#define V4L2_CID_IS_GET_SENSOR_OFFSET_X         (V4L2_CID_FIMC_IS_BASE + 480)
+#define V4L2_CID_IS_GET_SENSOR_OFFSET_Y         (V4L2_CID_FIMC_IS_BASE + 481)
+#define V4L2_CID_IS_GET_SENSOR_WIDTH            (V4L2_CID_FIMC_IS_BASE + 482)
+#define V4L2_CID_IS_GET_SENSOR_HEIGHT           (V4L2_CID_FIMC_IS_BASE + 483)
+
+#define V4L2_CID_IS_GET_FRAME_VALID             (V4L2_CID_FIMC_IS_BASE + 484)
+#define V4L2_CID_IS_SET_FRAME_VALID             (V4L2_CID_FIMC_IS_BASE + 485)
+#define V4L2_CID_IS_GET_FRAME_BADMARK           (V4L2_CID_FIMC_IS_BASE + 486)
+#define V4L2_CID_IS_SET_FRAME_BADMARK           (V4L2_CID_FIMC_IS_BASE + 487)
+#define V4L2_CID_IS_GET_FRAME_CAPTURED          (V4L2_CID_FIMC_IS_BASE + 488)
+#define V4L2_CID_IS_SET_FRAME_CAPTURED          (V4L2_CID_FIMC_IS_BASE + 489)
+#define V4L2_CID_IS_SET_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 490)
+#define V4L2_CID_IS_GET_FRAME_NUMBER            (V4L2_CID_FIMC_IS_BASE + 491)
+#define V4L2_CID_IS_CLEAR_FRAME_NUMBER          (V4L2_CID_FIMC_IS_BASE + 492)
+#define V4L2_CID_IS_GET_LOSTED_FRAME_NUMBER     (V4L2_CID_FIMC_IS_BASE + 493)
+#define V4L2_CID_IS_ISP_DMA_BUFFER_NUM          (V4L2_CID_FIMC_IS_BASE + 494)
+#define V4L2_CID_IS_ISP_DMA_BUFFER_ADDRESS      (V4L2_CID_FIMC_IS_BASE + 495)
+
+#define V4L2_CID_IS_ZOOM_STATE                  (V4L2_CID_FIMC_IS_BASE + 660)
+#define V4L2_CID_IS_ZOOM_MAX_LEVEL              (V4L2_CID_FIMC_IS_BASE + 661)
+#define V4L2_CID_IS_ZOOM                        (V4L2_CID_FIMC_IS_BASE + 662)
+#define V4L2_CID_IS_FW_DEBUG_REGION_ADDR        (V4L2_CID_FIMC_IS_BASE + 663)
+
+#define V4L2_CID_IS_TUNE_SEL_ENTRY              (V4L2_CID_FIMC_IS_TUNE_BASE)
+#define V4L2_CID_IS_TUNE_SENSOR_EXPOSURE        (V4L2_CID_FIMC_IS_TUNE_BASE + 1)
+#define V4L2_CID_IS_TUNE_SENSOR_ANALOG_GAIN     (V4L2_CID_FIMC_IS_TUNE_BASE + 2)
+#define V4L2_CID_IS_TUNE_SENSOR_FRAME_RATE      (V4L2_CID_FIMC_IS_TUNE_BASE + 3)
+#define V4L2_CID_IS_TUNE_SENSOR_ACTUATOR_POS    (V4L2_CID_FIMC_IS_TUNE_BASE + 4)
+
+enum v4l2_blur
+{
+        BLUR_LEVEL_0 = 0,
+        BLUR_LEVEL_1,
+        BLUR_LEVEL_2,
+        BLUR_LEVEL_3,
+        BLUR_LEVEL_MAX,
+};
+
+#if 1
+#define V4L2_CID_CAMERA_SCENE_MODE              (V4L2_CID_PRIVATE_BASE+70)
+enum v4l2_scene_mode
+{
+        SCENE_MODE_BASE,
+        SCENE_MODE_NONE,
+        SCENE_MODE_PORTRAIT,
+        SCENE_MODE_NIGHTSHOT,
+        SCENE_MODE_BACK_LIGHT,
+        SCENE_MODE_LANDSCAPE,
+        SCENE_MODE_SPORTS,
+        SCENE_MODE_PARTY_INDOOR,
+        SCENE_MODE_BEACH_SNOW,
+        SCENE_MODE_SUNSET,
+        SCENE_MODE_DUSK_DAWN,
+        SCENE_MODE_FALL_COLOR,
+        SCENE_MODE_FIREWORKS,
+        SCENE_MODE_TEXT,
+        SCENE_MODE_CANDLE_LIGHT,
+        SCENE_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_FLASH_MODE              (V4L2_CID_PRIVATE_BASE+71)
+enum v4l2_flash_mode
+{
+        FLASH_MODE_BASE,
+        FLASH_MODE_OFF,
+        FLASH_MODE_AUTO,
+        FLASH_MODE_ON,
+        FLASH_MODE_TORCH,
+        FLASH_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_BRIGHTNESS              (V4L2_CID_PRIVATE_BASE+72)
+enum v4l2_ev_mode {
+        EV_MINUS_4 = 0,
+        EV_MINUS_3,
+        EV_MINUS_2,
+        EV_MINUS_1,
+        EV_DEFAULT,
+        EV_PLUS_1,
+        EV_PLUS_2,
+        EV_PLUS_3,
+        EV_PLUS_4,
+        EV_MAX,
+};
+
+#define V4L2_CID_CAMERA_WHITE_BALANCE   (V4L2_CID_PRIVATE_BASE+73)
+enum v4l2_wb_mode {
+        WHITE_BALANCE_BASE = 0,
+        WHITE_BALANCE_AUTO,
+        WHITE_BALANCE_SUNNY,
+        WHITE_BALANCE_CLOUDY,
+        WHITE_BALANCE_TUNGSTEN,
+        WHITE_BALANCE_FLUORESCENT,
+        WHITE_BALANCE_MAX,
+};
+
+#define V4L2_CID_CAMERA_EFFECT                  (V4L2_CID_PRIVATE_BASE+74)
+enum v4l2_effect_mode {
+        IMAGE_EFFECT_BASE = 0,
+        IMAGE_EFFECT_NONE,
+        IMAGE_EFFECT_BNW,
+        IMAGE_EFFECT_SEPIA,
+        IMAGE_EFFECT_AQUA,
+        IMAGE_EFFECT_ANTIQUE,
+        IMAGE_EFFECT_NEGATIVE,
+        IMAGE_EFFECT_SHARPEN,
+        IMAGE_EFFECT_MAX,
+};
+
+#define V4L2_CID_CAMERA_ISO                             (V4L2_CID_PRIVATE_BASE+75)
+enum v4l2_iso_mode {
+        ISO_AUTO = 0,
+        ISO_50,
+        ISO_100,
+        ISO_200,
+        ISO_400,
+        ISO_800,
+        ISO_1600,
+        ISO_SPORTS,
+        ISO_NIGHT,
+        ISO_MOVIE,
+        ISO_MAX,
+};
+
+#define V4L2_CID_CAMERA_METERING                        (V4L2_CID_PRIVATE_BASE+76)
+enum v4l2_metering_mode {
+        METERING_BASE = 0,
+        METERING_MATRIX,
+        METERING_CENTER,
+        METERING_SPOT,
+        METERING_MAX,
+};
+
+#define V4L2_CID_CAMERA_CONTRAST                        (V4L2_CID_PRIVATE_BASE+77)
+enum v4l2_contrast_mode {
+        CONTRAST_MINUS_2 = 0,
+        CONTRAST_MINUS_1,
+        CONTRAST_DEFAULT,
+        CONTRAST_PLUS_1,
+        CONTRAST_PLUS_2,
+        CONTRAST_MAX,
+};
+
+#define V4L2_CID_CAMERA_SATURATION              (V4L2_CID_PRIVATE_BASE+78)
+enum v4l2_saturation_mode {
+        SATURATION_MINUS_2 = 0,
+        SATURATION_MINUS_1,
+        SATURATION_DEFAULT,
+        SATURATION_PLUS_1,
+        SATURATION_PLUS_2,
+        SATURATION_MAX,
+};
+
+#define V4L2_CID_CAMERA_SHARPNESS               (V4L2_CID_PRIVATE_BASE+79)
+enum v4l2_sharpness_mode {
+        SHARPNESS_MINUS_2 = 0,
+        SHARPNESS_MINUS_1,
+        SHARPNESS_DEFAULT,
+        SHARPNESS_PLUS_1,
+        SHARPNESS_PLUS_2,
+        SHARPNESS_MAX,
+};
+
+#define V4L2_CID_CAMERA_WDR                             (V4L2_CID_PRIVATE_BASE+80)
+enum v4l2_wdr_mode {
+        WDR_OFF,
+        WDR_ON,
+        WDR_MAX,
+};
+
+#define V4L2_CID_CAMERA_ANTI_SHAKE              (V4L2_CID_PRIVATE_BASE+81)
+enum v4l2_anti_shake_mode {
+        ANTI_SHAKE_OFF,
+        ANTI_SHAKE_STILL_ON,
+        ANTI_SHAKE_MOVIE_ON,
+        ANTI_SHAKE_MAX,
+};
+
+#define V4L2_CID_CAMERA_TOUCH_AF_START_STOP             (V4L2_CID_PRIVATE_BASE+82)
+enum v4l2_touch_af {
+        TOUCH_AF_STOP = 0,
+        TOUCH_AF_START,
+        TOUCH_AF_MAX,
+};
+
+#define V4L2_CID_CAMERA_SMART_AUTO              (V4L2_CID_PRIVATE_BASE+83)
+enum v4l2_smart_auto {
+        SMART_AUTO_OFF = 0,
+        SMART_AUTO_ON,
+        SMART_AUTO_MAX,
+};
+
+#define V4L2_CID_CAMERA_VINTAGE_MODE            (V4L2_CID_PRIVATE_BASE+84)
+enum v4l2_vintage_mode {
+        VINTAGE_MODE_BASE,
+        VINTAGE_MODE_OFF,
+        VINTAGE_MODE_NORMAL,
+        VINTAGE_MODE_WARM,
+        VINTAGE_MODE_COOL,
+        VINTAGE_MODE_BNW,
+        VINTAGE_MODE_MAX,
+};
+
+#define V4L2_CID_CAMERA_JPEG_QUALITY            (V4L2_CID_PRIVATE_BASE+85)
+#define V4L2_CID_CAMERA_GPS_LATITUDE            (V4L2_CID_CAMERA_CLASS_BASE + 30)//(V4L2_CID_PRIVATE_BASE+86)
+#define V4L2_CID_CAMERA_GPS_LONGITUDE   (V4L2_CID_CAMERA_CLASS_BASE + 31)//(V4L2_CID_PRIVATE_BASE+87)
+#define V4L2_CID_CAMERA_GPS_TIMESTAMP   (V4L2_CID_CAMERA_CLASS_BASE + 32)//(V4L2_CID_PRIVATE_BASE+88)
+#define V4L2_CID_CAMERA_GPS_ALTITUDE            (V4L2_CID_CAMERA_CLASS_BASE + 33)//(V4L2_CID_PRIVATE_BASE+89)
+#define V4L2_CID_CAMERA_EXIF_TIME_INFO  (V4L2_CID_CAMERA_CLASS_BASE + 34)
+#define V4L2_CID_CAMERA_GPS_PROCESSINGMETHOD                     (V4L2_CID_CAMERA_CLASS_BASE+35)
+#define V4L2_CID_CAMERA_ZOOM                            (V4L2_CID_PRIVATE_BASE+90)
+enum v4l2_zoom_level {
+        ZOOM_LEVEL_0 = 0,
+        ZOOM_LEVEL_1,
+        ZOOM_LEVEL_2,
+        ZOOM_LEVEL_3,
+        ZOOM_LEVEL_4,
+        ZOOM_LEVEL_5,
+        ZOOM_LEVEL_6,
+        ZOOM_LEVEL_7,
+        ZOOM_LEVEL_8,
+        ZOOM_LEVEL_9,
+        ZOOM_LEVEL_10,
+        ZOOM_LEVEL_11,
+        ZOOM_LEVEL_12,
+        ZOOM_LEVEL_MAX = 31,
+};
+
+#define V4L2_CID_CAMERA_FACE_DETECTION          (V4L2_CID_PRIVATE_BASE+91)
+enum v4l2_face_detection {
+        FACE_DETECTION_OFF = 0,
+        FACE_DETECTION_ON,
+        FACE_DETECTION_NOLINE,
+        FACE_DETECTION_ON_BEAUTY,
+        FACE_DETECTION_MAX,
+};
+
+#define V4L2_CID_CAMERA_SMART_AUTO_STATUS               (V4L2_CID_PRIVATE_BASE+92)
+enum v4l2_smart_auto_status {
+        SMART_AUTO_STATUS_AUTO = 0,
+        SMART_AUTO_STATUS_LANDSCAPE,
+        SMART_AUTO_STATUS_PORTRAIT,
+        SMART_AUTO_STATUS_MACRO,
+        SMART_AUTO_STATUS_NIGHT,
+        SMART_AUTO_STATUS_PORTRAIT_NIGHT,
+        SMART_AUTO_STATUS_BACKLIT,
+        SMART_AUTO_STATUS_PORTRAIT_BACKLIT,
+        SMART_AUTO_STATUS_ANTISHAKE,
+        SMART_AUTO_STATUS_PORTRAIT_ANTISHAKE,
+        SMART_AUTO_STATUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_SET_AUTO_FOCUS          (V4L2_CID_PRIVATE_BASE+93)
+enum v4l2_auto_focus {
+        AUTO_FOCUS_OFF = 0,
+        AUTO_FOCUS_ON,
+        AUTO_FOCUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_BEAUTY_SHOT             (V4L2_CID_PRIVATE_BASE+94)
+enum v4l2_beauty_shot {
+        BEAUTY_SHOT_OFF = 0,
+        BEAUTY_SHOT_ON,
+        BEAUTY_SHOT_MAX,
+};
+
+#define V4L2_CID_CAMERA_AEAWB_LOCK_UNLOCK               (V4L2_CID_PRIVATE_BASE+95)
+enum v4l2_ae_awb_lockunlock {
+        AE_UNLOCK_AWB_UNLOCK = 0,
+        AE_LOCK_AWB_UNLOCK,
+        AE_UNLOCK_AWB_LOCK,
+        AE_LOCK_AWB_LOCK,
+        AE_AWB_MAX
+};
+
+#define V4L2_CID_CAMERA_FACEDETECT_LOCKUNLOCK   (V4L2_CID_PRIVATE_BASE+96)
+enum v4l2_face_lock {
+        FACE_LOCK_OFF = 0,
+        FACE_LOCK_ON,
+        FIRST_FACE_TRACKING,
+        FACE_LOCK_MAX,
+};
+
+#define V4L2_CID_CAMERA_OBJECT_POSITION_X       (V4L2_CID_PRIVATE_BASE+97)
+#define V4L2_CID_CAMERA_OBJECT_POSITION_Y       (V4L2_CID_PRIVATE_BASE+98)
+#define V4L2_CID_CAMERA_FOCUS_MODE              (V4L2_CID_PRIVATE_BASE+99)
+enum v4l2_focusmode {
+        FOCUS_MODE_AUTO = 0,
+        FOCUS_MODE_MACRO,
+        FOCUS_MODE_FACEDETECT,
+        FOCUS_MODE_INFINITY,
+        FOCUS_MODE_CONTINOUS,
+        FOCUS_MODE_TOUCH,
+        FOCUS_MODE_MAX,
+        FOCUS_MODE_DEFAULT = (1 << 8),
+};
+
+#define V4L2_CID_CAMERA_OBJ_TRACKING_STATUS     (V4L2_CID_PRIVATE_BASE+100)
+enum v4l2_obj_tracking_status {
+        OBJECT_TRACKING_STATUS_BASE,
+        OBJECT_TRACKING_STATUS_PROGRESSING,
+        OBJECT_TRACKING_STATUS_SUCCESS,
+        OBJECT_TRACKING_STATUS_FAIL,
+        OBJECT_TRACKING_STATUS_MISSING,
+        OBJECT_TRACKING_STATUS_MAX,
+};
+
+#define V4L2_CID_CAMERA_OBJ_TRACKING_START_STOP (V4L2_CID_PRIVATE_BASE+101)
+enum v4l2_ot_start_stop {
+        OT_STOP = 0,
+        OT_START,
+        OT_MAX,
+};
+
+#define V4L2_CID_CAMERA_CAF_START_STOP  (V4L2_CID_PRIVATE_BASE+102)
+enum v4l2_caf_start_stop {
+        CAF_STOP = 0,
+        CAF_START,
+        CAF_MAX,
+};
+
+#define V4L2_CID_CAMERA_AUTO_FOCUS_RESULT                       (V4L2_CID_PRIVATE_BASE+103)
+#define V4L2_CID_CAMERA_FRAME_RATE                      (V4L2_CID_PRIVATE_BASE+104)
+enum v4l2_frame_rate {
+        FRAME_RATE_AUTO = 0,
+        FRAME_RATE_7 = 7,
+        FRAME_RATE_15 = 15,
+        FRAME_RATE_20 = 20,
+        FRAME_RATE_30 = 30,
+        FRAME_RATE_60 = 60,
+        FRAME_RATE_120 = 120,
+        FRAME_RATE_MAX
+};
+
+#define V4L2_CID_CAMERA_ANTI_BANDING                                    (V4L2_CID_PRIVATE_BASE+105)
+enum v4l2_anti_banding{
+        ANTI_BANDING_AUTO = 0,
+        ANTI_BANDING_50HZ = 1,
+        ANTI_BANDING_60HZ = 2,
+        ANTI_BANDING_OFF = 3,
+};
+
+#define V4L2_CID_CAMERA_SET_GAMMA       (V4L2_CID_PRIVATE_BASE+106)
+enum v4l2_gamma_mode{
+        GAMMA_OFF = 0,
+        GAMMA_ON = 1,
+        GAMMA_MAX,
+};
+
+#define V4L2_CID_CAMERA_SET_SLOW_AE     (V4L2_CID_PRIVATE_BASE+107)
+enum v4l2_slow_ae_mode{
+        SLOW_AE_OFF,
+        SLOW_AE_ON,
+        SLOW_AE_MAX,
+};
+
+#define V4L2_CID_CAMERA_BATCH_REFLECTION                                        (V4L2_CID_PRIVATE_BASE+108)
+#define V4L2_CID_CAMERA_EXIF_ORIENTATION                                        (V4L2_CID_PRIVATE_BASE+109)
+
+#define V4L2_CID_CAMERA_RESET                                                           (V4L2_CID_PRIVATE_BASE+111)     //s1_camera [ Defense process by ESD input ]
+#define V4L2_CID_CAMERA_CHECK_DATALINE                                          (V4L2_CID_PRIVATE_BASE+112)
+#define V4L2_CID_CAMERA_CHECK_DATALINE_STOP                                     (V4L2_CID_PRIVATE_BASE+113)
+
+#endif
+
+#if defined(CONFIG_ARIES_NTT) // Modify NTTS1
+#define V4L2_CID_CAMERA_AE_AWB_DISABLE_LOCK                                     (V4L2_CID_PRIVATE_BASE+114)
+#endif
+#define V4L2_CID_CAMERA_THUMBNAIL_NULL                                  (V4L2_CID_PRIVATE_BASE+115)
+#define V4L2_CID_CAMERA_SENSOR_MODE                                     (V4L2_CID_PRIVATE_BASE+116)
+enum v4l2_sensor_mode {
+        SENSOR_CAMERA,
+        SENSOR_MOVIE,
+};
+
+typedef enum {
+        STREAM_MODE_CAM_OFF,
+        STREAM_MODE_CAM_ON,
+        STREAM_MODE_MOVIE_OFF,
+        STREAM_MODE_MOVIE_ON,
+} stream_mode_t;
+
+#define V4L2_CID_CAMERA_EXIF_EXPTIME                            (V4L2_CID_PRIVATE_BASE+117)
+#define V4L2_CID_CAMERA_EXIF_FLASH                                      (V4L2_CID_PRIVATE_BASE+118)
+#define V4L2_CID_CAMERA_EXIF_ISO                                        (V4L2_CID_PRIVATE_BASE+119)
+#define V4L2_CID_CAMERA_EXIF_TV                                         (V4L2_CID_PRIVATE_BASE+120)
+#define V4L2_CID_CAMERA_EXIF_BV                                         (V4L2_CID_PRIVATE_BASE+121)
+#define V4L2_CID_CAMERA_EXIF_EBV                                        (V4L2_CID_PRIVATE_BASE+122)
+#define V4L2_CID_CAMERA_CHECK_ESD               (V4L2_CID_PRIVATE_BASE+123)
+#define V4L2_CID_CAMERA_APP_CHECK               (V4L2_CID_PRIVATE_BASE+124)
+#define V4L2_CID_CAMERA_BUSFREQ_LOCK            (V4L2_CID_PRIVATE_BASE+125)
+#define V4L2_CID_CAMERA_BUSFREQ_UNLOCK          (V4L2_CID_PRIVATE_BASE+126)
+
+#define V4L2_CID_EMBEDDEDDATA_ENABLE    (V4L2_CID_PRIVATE_BASE + 130)
+
+
+#define V4L2_CID_CAMERA_GET_ISO (V4L2_CID_PRIVATE_BASE+202)
+#define V4L2_CID_CAMERA_GET_SHT_TIME    (V4L2_CID_PRIVATE_BASE+203)
+#define V4L2_CID_CAMERA_GET_FLASH_ONOFF (V4L2_CID_PRIVATE_BASE+204)
+#define V4L2_CID_CAMERA_RETURN_FOCUS    (V4L2_CID_PRIVATE_BASE+205)
+#define V4L2_CID_ESD_INT        (V4L2_CID_PRIVATE_BASE+206)
+
+
+
+
+
+/*      Pixel format FOURCC depth  Description  */
+enum v4l2_pix_format_mode {
+        V4L2_PIX_FMT_MODE_PREVIEW,
+        V4L2_PIX_FMT_MODE_CAPTURE,
+        V4L2_PIX_FMT_MODE_HDR,
+        V4L2_PIX_FMT_MODE_VT_MIRROR,
+        V4L2_PIX_FMT_MODE_VT_NONMIRROR,
+};
+/* 12  Y/CbCr 4:2:0 64x32 macroblocks */
+#define V4L2_PIX_FMT_NV12T    v4l2_fourcc('T', 'V', '1', '2')
+#define V4L2_PIX_FMT_NV21T    v4l2_fourcc('T', 'V', '2', '1')
+#define V4L2_PIX_FMT_INTERLEAVED    v4l2_fourcc('I', 'T', 'L', 'V')
+
+/*
+ *  * V4L2 extention for digital camera
+ *   */
+/* Strobe flash light */
+enum v4l2_strobe_control {
+        /* turn off the flash light */
+        V4L2_STROBE_CONTROL_OFF         = 0,
+        /* turn on the flash light */
+        V4L2_STROBE_CONTROL_ON          = 1,
+        /* act guide light before splash */
+        V4L2_STROBE_CONTROL_AFGUIDE     = 2,
+        /* charge the flash light */
+        V4L2_STROBE_CONTROL_CHARGE      = 3,
+};
+
+enum v4l2_strobe_conf {
+        V4L2_STROBE_OFF                 = 0,    /* Always off */
+        V4L2_STROBE_ON                  = 1,    /* Always splashes */
+        /* Auto control presets */
+        V4L2_STROBE_AUTO                = 2,
+        V4L2_STROBE_REDEYE_REDUCTION    = 3,
+        V4L2_STROBE_SLOW_SYNC           = 4,
+        V4L2_STROBE_FRONT_CURTAIN       = 5,
+        V4L2_STROBE_REAR_CURTAIN        = 6,
+        /* Extra manual control presets */
+        /* keep turned on until turning off */
+        V4L2_STROBE_PERMANENT           = 7,
+        V4L2_STROBE_EXTERNAL            = 8,
+};
+
+enum v4l2_strobe_status {
+        V4L2_STROBE_STATUS_OFF          = 0,
+        /* while processing configurations */
+        V4L2_STROBE_STATUS_BUSY         = 1,
+        V4L2_STROBE_STATUS_ERR          = 2,
+        V4L2_STROBE_STATUS_CHARGING     = 3,
+        V4L2_STROBE_STATUS_CHARGED      = 4,
+};
+
+/* capabilities field */
+/* No strobe supported */
+#define V4L2_STROBE_CAP_NONE            0x0000
+/* Always flash off mode */
+#define V4L2_STROBE_CAP_OFF             0x0001
+/* Always use flash light mode */
+#define V4L2_STROBE_CAP_ON              0x0002
+/* Flashlight works automatic */
+#define V4L2_STROBE_CAP_AUTO            0x0004
+/* Red-eye reduction */
+#define V4L2_STROBE_CAP_REDEYE          0x0008
+/* Slow sync */
+#define V4L2_STROBE_CAP_SLOWSYNC        0x0010
+/* Front curtain */
+#define V4L2_STROBE_CAP_FRONT_CURTAIN   0x0020
+/* Rear curtain */
+#define V4L2_STROBE_CAP_REAR_CURTAIN    0x0040
+/* keep turned on until turning off */
+#define V4L2_STROBE_CAP_PERMANENT       0x0080
+/* use external strobe */
+#define V4L2_STROBE_CAP_EXTERNAL        0x0100
+
+/* Set mode and Get status */
+struct v4l2_strobe {
+        /* off/on/charge:0/1/2 */
+        enum    v4l2_strobe_control control;
+        /* supported strobe capabilities */
+        __u32   capabilities;
+        enum    v4l2_strobe_conf mode;
+        enum    v4l2_strobe_status status;      /* read only */
+        /* default is 0 and range of value varies from each models */
+        __u32   flash_ev;
+        __u32   reserved[4];
+};
+
+#define VIDIOC_S_STROBE     _IOWR('V', 83, struct v4l2_strobe)
+#define VIDIOC_G_STROBE     _IOR('V', 84, struct v4l2_strobe)
+
+/* Object recognition and collateral actions */
+enum v4l2_recog_mode {
+        V4L2_RECOGNITION_MODE_OFF       = 0,
+        V4L2_RECOGNITION_MODE_ON        = 1,
+        V4L2_RECOGNITION_MODE_LOCK      = 2,
+};
+
+enum v4l2_recog_action {
+        V4L2_RECOGNITION_ACTION_NONE    = 0,    /* only recognition */
+        V4L2_RECOGNITION_ACTION_BLINK   = 1,    /* Capture on blinking */
+        V4L2_RECOGNITION_ACTION_SMILE   = 2,    /* Capture on smiling */
+};
+
+enum v4l2_recog_pattern {
+        V4L2_RECOG_PATTERN_FACE         = 0, /* Face */
+        V4L2_RECOG_PATTERN_HUMAN        = 1, /* Human */
+        V4L2_RECOG_PATTERN_CHAR         = 2, /* Character */
+};
+
+struct v4l2_recog_rect {
+        enum    v4l2_recog_pattern  p;  /* detected pattern */
+        struct  v4l2_rect  o;   /* detected area */
+        __u32   reserved[4];
+};
+
+struct v4l2_recog_data {
+        __u8    detect_cnt;             /* detected object counter */
+        struct  v4l2_rect       o;      /* detected area */
+        __u32   reserved[4];
+};
+
+struct v4l2_recognition {
+        enum v4l2_recog_mode    mode;
+
+        /* Which pattern to detect */
+        enum v4l2_recog_pattern  pattern;
+
+        /* How many object to detect */
+        __u8    obj_num;
+
+        /* select detected object */
+        __u32   detect_idx;
+
+        /* read only :Get object coordination */
+        struct v4l2_recog_data  data;
+
+        enum v4l2_recog_action  action;
+        __u32   reserved[4];
+};
+
+#define VIDIOC_S_RECOGNITION    _IOWR('V', 85, struct v4l2_recognition)
+#define VIDIOC_G_RECOGNITION    _IOR('V', 86, struct v4l2_recognition)
+
+/* We use this struct as the v4l2_streamparm raw_data for
+ * VIDIOC_G_PARM and VIDIOC_S_PARM
+ */
+struct sec_cam_parm {
+        struct v4l2_captureparm capture;
+        int contrast;
+        int effects;
+        int brightness;
+    int exposure;
+        int flash_mode;
+        int focus_mode;
+    int aeawb_mode;
+        int iso;
+        int metering;
+        int saturation;
+        int scene_mode;
+        int sharpness;
+    int hue;
+        int white_balance;
+    int anti_banding;
+        int fps;
+};
+
+#endif /* __LINUX_VIDEODEV2_SAMSUNG_H */
diff --git a/include/linux/wakelock.h b/include/linux/wakelock.h
new file mode 100644
index 00000000000..a096d24ada1
--- /dev/null
+++ b/include/linux/wakelock.h
@@ -0,0 +1,91 @@
+/* include/linux/wakelock.h
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_WAKELOCK_H
+#define _LINUX_WAKELOCK_H
+
+#include <linux/list.h>
+#include <linux/ktime.h>
+
+/* A wake_lock prevents the system from entering suspend or other low power
+ * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock
+ * prevents a full system suspend. If the type is WAKE_LOCK_IDLE, low power
+ * states that cause large interrupt latencies or that disable a set of
+ * interrupts will not entered from idle until the wake_locks are released.
+ */
+
+enum {
+        WAKE_LOCK_SUSPEND, /* Prevent suspend */
+        WAKE_LOCK_IDLE,    /* Prevent low power idle */
+        WAKE_LOCK_TYPE_COUNT
+};
+
+struct wake_lock {
+#ifdef CONFIG_HAS_WAKELOCK
+        struct list_head    link;
+        int                 flags;
+        const char         *name;
+        unsigned long       expires;
+#ifdef CONFIG_WAKELOCK_STAT
+        struct {
+                int             count;
+                int             expire_count;
+                int             wakeup_count;
+                ktime_t         total_time;
+                ktime_t         prevent_suspend_time;
+                ktime_t         max_time;
+                ktime_t         last_time;
+        } stat;
+#endif
+#endif
+};
+
+#ifdef CONFIG_HAS_WAKELOCK
+
+void wake_lock_init(struct wake_lock *lock, int type, const char *name);
+void wake_lock_destroy(struct wake_lock *lock);
+void wake_lock(struct wake_lock *lock);
+void wake_lock_timeout(struct wake_lock *lock, long timeout);
+void wake_unlock(struct wake_lock *lock);
+
+/* wake_lock_active returns a non-zero value if the wake_lock is currently
+ * locked. If the wake_lock has a timeout, it does not check the timeout
+ * but if the timeout had aready been checked it will return 0.
+ */
+int wake_lock_active(struct wake_lock *lock);
+
+/* has_wake_lock returns 0 if no wake locks of the specified type are active,
+ * and non-zero if one or more wake locks are held. Specifically it returns
+ * -1 if one or more wake locks with no timeout are active or the
+ * number of jiffies until all active wake locks time out.
+ */
+long has_wake_lock(int type);
+
+#else
+
+static inline void wake_lock_init(struct wake_lock *lock, int type,
+                                        const char *name) {}
+static inline void wake_lock_destroy(struct wake_lock *lock) {}
+static inline void wake_lock(struct wake_lock *lock) {}
+static inline void wake_lock_timeout(struct wake_lock *lock, long timeout) {}
+static inline void wake_unlock(struct wake_lock *lock) {}
+
+static inline int wake_lock_active(struct wake_lock *lock) { return 0; }
+static inline long has_wake_lock(int type) { return 0; }
+
+#endif
+
+#endif
+
diff --git a/include/linux/wifi_tiwlan.h b/include/linux/wifi_tiwlan.h
new file mode 100644
index 00000000000..f07e0679fb8
--- /dev/null
+++ b/include/linux/wifi_tiwlan.h
@@ -0,0 +1,27 @@
+/* include/linux/wifi_tiwlan.h
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _LINUX_WIFI_TIWLAN_H_
+#define _LINUX_WIFI_TIWLAN_H_
+
+#include <linux/wlan_plat.h>
+
+#define WMPA_NUMBER_OF_SECTIONS 3
+#define WMPA_NUMBER_OF_BUFFERS  160
+#define WMPA_SECTION_HEADER     24
+#define WMPA_SECTION_SIZE_0     (WMPA_NUMBER_OF_BUFFERS * 64)
+#define WMPA_SECTION_SIZE_1     (WMPA_NUMBER_OF_BUFFERS * 256)
+#define WMPA_SECTION_SIZE_2     (WMPA_NUMBER_OF_BUFFERS * 2048)
+
+#endif
diff --git a/include/linux/wl127x-rfkill.h b/include/linux/wl127x-rfkill.h
new file mode 100644
index 00000000000..9057ec63d5d
--- /dev/null
+++ b/include/linux/wl127x-rfkill.h
@@ -0,0 +1,35 @@
+/*
+ * Bluetooth TI wl127x rfkill power control via GPIO
+ *
+ * Copyright (C) 2009 Motorola, Inc.
+ * Copyright (C) 2008 Texas Instruments
+ * Initial code: Pavan Savoy <pavan.savoy@gmail.com> (wl127x_power.c)
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef _LINUX_WL127X_RFKILL_H
+#define _LINUX_WL127X_RFKILL_H
+
+#include <linux/rfkill.h>
+
+struct wl127x_rfkill_platform_data {
+        int nshutdown_gpio;
+
+        struct rfkill *rfkill;  /* for driver only */
+};
+
+#endif
diff --git a/include/linux/wlan_plat.h b/include/linux/wlan_plat.h
new file mode 100644
index 00000000000..40ec3482d1e
--- /dev/null
+++ b/include/linux/wlan_plat.h
@@ -0,0 +1,27 @@
+/* include/linux/wlan_plat.h
+ *
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _LINUX_WLAN_PLAT_H_
+#define _LINUX_WLAN_PLAT_H_
+
+struct wifi_platform_data {
+        int (*set_power)(int val);
+        int (*set_reset)(int val);
+        int (*set_carddetect)(int val);
+        void *(*mem_prealloc)(int section, unsigned long size);
+        int (*get_mac_addr)(unsigned char *buf);
+        void *(*get_country_code)(char *ccode);
+};
+
+#endif
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 3f6542ca619..a378c295851 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -7,9 +7,28 @@
 #include <linux/sched.h>
 #include <linux/fs.h>
 
-struct backing_dev_info;
+/*
+ * The 1/4 region under the global dirty thresh is for smooth dirty throttling:
+ *
+ *      (thresh - thresh/DIRTY_FULL_SCOPE, thresh)
+ *
+ * Further beyond, all dirtier tasks will enter a loop waiting (possibly long
+ * time) for the dirty pages to drop, unless written enough pages.
+ *
+ * The global dirty threshold is normally equal to the global dirty limit,
+ * except when the system suddenly allocates a lot of anonymous memory and
+ * knocks down the global dirty threshold quickly, in which case the global
+ * dirty limit will follow down slowly to prevent livelocking all dirtier tasks.
+ */
+#define DIRTY_SCOPE             8
+#define DIRTY_FULL_SCOPE        (DIRTY_SCOPE / 2)
 
-extern spinlock_t inode_wb_list_lock;
+/*
+ * 4MB minimal write chunk size
+ */
+#define MIN_WRITEBACK_PAGES     (4096UL >> (PAGE_CACHE_SHIFT - 10))
+
+struct backing_dev_info;
 
 /*
  * fs/fs-writeback.c
@@ -20,17 +39,29 @@ enum writeback_sync_modes {
 };
 
 /*
+ * why some writeback work was initiated
+ */
+enum wb_reason {
+        WB_REASON_BACKGROUND,
+        WB_REASON_TRY_TO_FREE_PAGES,
+        WB_REASON_SYNC,
+        WB_REASON_PERIODIC,
+        WB_REASON_LAPTOP_TIMER,
+        WB_REASON_FREE_MORE_MEM,
+        WB_REASON_FS_FREE_SPACE,
+        WB_REASON_FORKER_THREAD,
+
+        WB_REASON_MAX,
+};
+extern const char *wb_reason_name[];
+
+/*
  * A control structure which tells the writeback code what to do.  These are
  * always on the stack, and hence need no locking.  They are always initialised
  * in a manner such that unspecified fields are set to zero.
  */
 struct writeback_control {
         enum writeback_sync_modes sync_mode;
-        unsigned long *older_than_this; /* If !NULL, only write back inodes
-                                           older than this */
-        unsigned long wb_start;         /* Time writeback_inodes_wb was
-                                           called. This is needed to avoid
-                                           extra jobs and livelock */
         long nr_to_write;               /* Write this many pages, and decrement
                                            this for each page written */
         long pages_skipped;             /* Pages which were not written */
@@ -43,14 +74,11 @@ struct writeback_control {
         loff_t range_start;
         loff_t range_end;
 
-        unsigned nonblocking:1;         /* Don't get stuck on request queues */
-        unsigned encountered_congestion:1; /* An output: a queue is full */
         unsigned for_kupdate:1;         /* A kupdate writeback */
         unsigned for_background:1;      /* A background writeback */
         unsigned tagged_writepages:1;   /* tag-and-write to avoid livelock */
         unsigned for_reclaim:1;         /* Invoked from the page allocator */
         unsigned range_cyclic:1;        /* range_start is cyclic */
-        unsigned more_io:1;             /* more io to be dispatched */
 };
 
 /*
@@ -58,15 +86,17 @@ struct writeback_control {
  */     
 struct bdi_writeback;
 int inode_wait(void *);
-void writeback_inodes_sb(struct super_block *);
-void writeback_inodes_sb_nr(struct super_block *, unsigned long nr);
-int writeback_inodes_sb_if_idle(struct super_block *);
-int writeback_inodes_sb_nr_if_idle(struct super_block *, unsigned long nr);
+void writeback_inodes_sb(struct super_block *, enum wb_reason reason);
+void writeback_inodes_sb_nr(struct super_block *, unsigned long nr,
+                                                        enum wb_reason reason);
+int writeback_inodes_sb_if_idle(struct super_block *, enum wb_reason reason);
+int writeback_inodes_sb_nr_if_idle(struct super_block *, unsigned long nr,
+                                                        enum wb_reason reason);
 void sync_inodes_sb(struct super_block *);
-void writeback_inodes_wb(struct bdi_writeback *wb,
-                struct writeback_control *wbc);
+long writeback_inodes_wb(struct bdi_writeback *wb, long nr_pages,
+                                enum wb_reason reason);
 long wb_do_writeback(struct bdi_writeback *wb, int force_wait);
-void wakeup_flusher_threads(long nr_pages);
+void wakeup_flusher_threads(long nr_pages, enum wb_reason reason);
 
 /* writeback.h requires fs.h; it, too, is not included from here. */
 static inline void wait_on_inode(struct inode *inode)
@@ -95,6 +125,8 @@ static inline void laptop_sync_completion(void) { }
 #endif
 void throttle_vm_writeout(gfp_t gfp_mask);
 
+extern unsigned long global_dirty_limit;
+
 /* These are exported to sysctl. */
 extern int dirty_background_ratio;
 extern unsigned long dirty_background_bytes;
@@ -129,6 +161,14 @@ void global_dirty_limits(unsigned long *pbackground, unsigned long *pdirty);
 unsigned long bdi_dirty_limit(struct backing_dev_info *bdi,
                                unsigned long dirty);
 
+void __bdi_update_bandwidth(struct backing_dev_info *bdi,
+                            unsigned long thresh,
+                            unsigned long bg_thresh,
+                            unsigned long dirty,
+                            unsigned long bdi_thresh,
+                            unsigned long bdi_dirty,
+                            unsigned long start_time);
+
 void page_writeback_init(void);
 void balance_dirty_pages_ratelimited_nr(struct address_space *mapping,
                                         unsigned long nr_pages_dirtied);