diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-18 19:59:10 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-18 19:59:10 -0400 |
commit | c3a0bd7515c682f4529a35318b6712c9ae456edc (patch) | |
tree | 0dea8aa7f0f1e5f37c4c67faaf3aeb18f4a04701 /include/linux | |
parent | a41842f70d6d6b0cfde3d21e163add81c4318ebd (diff) | |
parent | 0d5e6f7ae8609b944c08e8a2f63f7d169c548134 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
ARM: Fix RiscPC decompressor build errors
ARM: Fix sorting of platform group config options and includes
ARM: 5991/1: Fix regression in restore_user_regs macro
ARM: 5989/1: ARM: KGDB: add support for SMP platforms
ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
ARM: Add final piece to fix XIP decompressor in read-only memory
video: enable sh_mobile_lcdc on SH-Mobile ARM
ARM: mach-shmobile: ap4evb SDHI0 platform data V2
ARM: mach-shmobile: sh7372 SDHI vector merge
ARM: mach-shmobile: sh7377 SDHI vector merge
ARM: mach-shmobile: sh7367 SDHI vector merge
ARM: mach-shmobile: G4EVM KEYSC platform data
mtd: enable sh_flctl on SH-Mobile ARM
ARM: mach-shmobile: G3EVM FLCTL platform data
ARM: mach-shmobile: G3EVM KEYSC platform data
Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
ARM: Add L2 cache handling to smp boot support
ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
...
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/amba/clcd.h | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h index 29c0448265c..ca16c3801a1 100644 --- a/include/linux/amba/clcd.h +++ b/include/linux/amba/clcd.h | |||
@@ -21,22 +21,21 @@ | |||
21 | #define CLCD_UBAS 0x00000010 | 21 | #define CLCD_UBAS 0x00000010 |
22 | #define CLCD_LBAS 0x00000014 | 22 | #define CLCD_LBAS 0x00000014 |
23 | 23 | ||
24 | #if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) | 24 | #define CLCD_PL110_IENB 0x00000018 |
25 | #define CLCD_IENB 0x00000018 | 25 | #define CLCD_PL110_CNTL 0x0000001c |
26 | #define CLCD_CNTL 0x0000001c | 26 | #define CLCD_PL110_STAT 0x00000020 |
27 | #else | 27 | #define CLCD_PL110_INTR 0x00000024 |
28 | /* | 28 | #define CLCD_PL110_UCUR 0x00000028 |
29 | * Someone rearranged these two registers on the Versatile | 29 | #define CLCD_PL110_LCUR 0x0000002C |
30 | * platform... | 30 | |
31 | */ | 31 | #define CLCD_PL111_CNTL 0x00000018 |
32 | #define CLCD_IENB 0x0000001c | 32 | #define CLCD_PL111_IENB 0x0000001c |
33 | #define CLCD_CNTL 0x00000018 | 33 | #define CLCD_PL111_RIS 0x00000020 |
34 | #endif | 34 | #define CLCD_PL111_MIS 0x00000024 |
35 | 35 | #define CLCD_PL111_ICR 0x00000028 | |
36 | #define CLCD_STAT 0x00000020 | 36 | #define CLCD_PL111_UCUR 0x0000002c |
37 | #define CLCD_INTR 0x00000024 | 37 | #define CLCD_PL111_LCUR 0x00000030 |
38 | #define CLCD_UCUR 0x00000028 | 38 | |
39 | #define CLCD_LCUR 0x0000002C | ||
40 | #define CLCD_PALL 0x00000200 | 39 | #define CLCD_PALL 0x00000200 |
41 | #define CLCD_PALETTE 0x00000200 | 40 | #define CLCD_PALETTE 0x00000200 |
42 | 41 | ||
@@ -147,6 +146,8 @@ struct clcd_fb { | |||
147 | struct clcd_board *board; | 146 | struct clcd_board *board; |
148 | void *board_data; | 147 | void *board_data; |
149 | void __iomem *regs; | 148 | void __iomem *regs; |
149 | u16 off_ienb; | ||
150 | u16 off_cntl; | ||
150 | u32 clcd_cntl; | 151 | u32 clcd_cntl; |
151 | u32 cmap[16]; | 152 | u32 cmap[16]; |
152 | }; | 153 | }; |