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authorLinus Torvalds <torvalds@linux-foundation.org>2010-02-26 19:54:27 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-02-26 19:54:27 -0500
commit64d497f55379b1e320a08ec2426468d96f5642ec (patch)
tree22b9ab3c5e69c5cc2728cbc2ca7fc7623beef8f1 /include/linux
parent37d4008484977f60d5d37499a2670c79b214dd46 (diff)
parentb5f5fe80fa98a60daa0fa94512d1599b1e26674c (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (187 commits) sh: remove dead LED code for migo-r and ms7724se sh: ecovec build fix for CONFIG_I2C=n sh: ecovec r-standby support sh: ms7724se r-standby support sh: SH-Mobile R-standby register save/restore clocksource: Fix up a registration/IRQ race in the sh drivers. sh: ms7724: modify scan_timing for KEYSC sh: ms7724: Add sh_sir support sh: mach-ecovec24: Add sh_sir support sh: wire up SET/GET_UNALIGN_CTL. sh: allow alignment fault mode to be configured at kernel boot. sh: sh7724: Update FSI/SPU2 clock sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec sh: add sh7724 kick callback to clk_div4_table sh: introduce struct clk_div4_table sh: clock-cpg div4 set_rate() shift fix sh: Turn on speculative return for SH7785 and SH7786 sh: Merge legacy and dynamic PMB modes. sh: Use uncached I/O helpers in PMB setup. sh: Provide uncached I/O helpers. ...
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mtd/sh_flctl.h3
-rw-r--r--include/linux/sh_intc.h33
2 files changed, 25 insertions, 11 deletions
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index e77c1cea404..ab77609ec33 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -51,6 +51,8 @@
51#define _4ECCCNTEN (0x1 << 24) 51#define _4ECCCNTEN (0x1 << 24)
52#define _4ECCEN (0x1 << 23) 52#define _4ECCEN (0x1 << 23)
53#define _4ECCCORRECT (0x1 << 22) 53#define _4ECCCORRECT (0x1 << 22)
54#define SHBUSSEL (0x1 << 20)
55#define SEL_16BIT (0x1 << 19)
54#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/ 56#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/
55#define QTSEL_E (0x1 << 17) 57#define QTSEL_E (0x1 << 17)
56#define ENDIAN (0x1 << 16) /* 1 = little endian */ 58#define ENDIAN (0x1 << 16) /* 1 = little endian */
@@ -96,6 +98,7 @@
96struct sh_flctl { 98struct sh_flctl {
97 struct mtd_info mtd; 99 struct mtd_info mtd;
98 struct nand_chip chip; 100 struct nand_chip chip;
101 struct platform_device *pdev;
99 void __iomem *reg; 102 void __iomem *reg;
100 103
101 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ 104 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 4ef246f1465..51d288d8ac8 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -45,7 +45,7 @@ struct intc_sense_reg {
45#define INTC_SMP(stride, nr) 45#define INTC_SMP(stride, nr)
46#endif 46#endif
47 47
48struct intc_desc { 48struct intc_hw_desc {
49 struct intc_vect *vectors; 49 struct intc_vect *vectors;
50 unsigned int nr_vectors; 50 unsigned int nr_vectors;
51 struct intc_group *groups; 51 struct intc_group *groups;
@@ -56,29 +56,40 @@ struct intc_desc {
56 unsigned int nr_prio_regs; 56 unsigned int nr_prio_regs;
57 struct intc_sense_reg *sense_regs; 57 struct intc_sense_reg *sense_regs;
58 unsigned int nr_sense_regs; 58 unsigned int nr_sense_regs;
59 char *name;
60 struct intc_mask_reg *ack_regs; 59 struct intc_mask_reg *ack_regs;
61 unsigned int nr_ack_regs; 60 unsigned int nr_ack_regs;
62}; 61};
63 62
64#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 63#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
64#define INTC_HW_DESC(vectors, groups, mask_regs, \
65 prio_regs, sense_regs, ack_regs) \
66{ \
67 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
68 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
69 _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
70}
71
72struct intc_desc {
73 char *name;
74 intc_enum force_enable;
75 intc_enum force_disable;
76 struct intc_hw_desc hw;
77};
78
65#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ 79#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
66 mask_regs, prio_regs, sense_regs) \ 80 mask_regs, prio_regs, sense_regs) \
67struct intc_desc symbol __initdata = { \ 81struct intc_desc symbol __initdata = { \
68 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 82 .name = chipname, \
69 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 83 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
70 _INTC_ARRAY(sense_regs), \ 84 prio_regs, sense_regs, NULL), \
71 chipname, \
72} 85}
73 86
74#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ 87#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
75 mask_regs, prio_regs, sense_regs, ack_regs) \ 88 mask_regs, prio_regs, sense_regs, ack_regs) \
76struct intc_desc symbol __initdata = { \ 89struct intc_desc symbol __initdata = { \
77 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 90 .name = chipname, \
78 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 91 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
79 _INTC_ARRAY(sense_regs), \ 92 prio_regs, sense_regs, ack_regs), \
80 chipname, \
81 _INTC_ARRAY(ack_regs), \
82} 93}
83 94
84void __init register_intc_controller(struct intc_desc *desc); 95void __init register_intc_controller(struct intc_desc *desc);